Rapid verification method for data transmission of non-standard Type-C interface
By extracting the real-time signal characteristics of the non-standard Type-C interface and dynamically matching the standard transmission parameter library, testing instructions sorted by priority are generated, which solves the problem that it is difficult to effectively verify the data transmission characteristics of the non-standard Type-C interface in the existing technology, and realizes the verification effect of high accuracy and coverage.
Patent Information
- Application Number
- CN202510476025.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-16
- Publication Date
- 2025-05-13
- Estimated Expiration
- 2045-04-16
AI Technical Summary
The prior art is difficult to effectively verify the data transmission characteristics of the non-standard Type-C interface, and cannot dynamically adjust the test content and priority according to the real-time signal characteristics of the interface, resulting in a lack of targetedness in the verification process and it is difficult to accurately detect potential transmission problems.
By obtaining the physical connection status identifier of the non-standard Type-C interface, real-time signal characteristics are extracted, such as voltage fluctuation sequence, current change trajectory and data packet transmission interval distribution, dynamically match and preset standard transmission parameter library, generate a set of test instructions sorted by priority, perform phased signal injection and feedback capture, record execution results and time-series marking, and generate verification reports.
It realizes intelligently generating personalized test instructions based on the real-time situation of the interface, adapting to the diversity and complexity of non-standard interfaces, improving the accuracy and coverage of verification, ensuring timely detection of potential problems, and the verification process is more detailed and traceable.
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Figure CN119988119A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of computer testing technology, and in particular to a method for quickly verifying data transmission of a non-standard Type-C interface. Background Art
[0002] With the continuous development and popularization of electronic devices, Type-C interface has been widely used in various electronic products due to its many advantages, such as support for positive and negative insertion, high-speed data transmission, high-power charging, etc. However, due to the diversity of electronic devices on the market and the differentiated needs of different manufacturers for interface applications, non-standard Type-C interface came into being.
[0003] Although the non-standard Type-C interface meets the special needs of specific devices or scenarios to a certain extent, it also brings a series of problems in data transmission verification. For example, in the prior art, the data transmission verification method for the standard Type-C interface is relatively mature, mainly according to a fixed standard process, verifying some basic electrical parameters and transmission specifications, such as simply testing the rated voltage and current of the interface and the accuracy of data transmission at a fixed rate.
[0004] However, the verification method for standard interfaces cannot be directly applied to non-standard Type-C interfaces. On the one hand, the physical connection method and transmission mode of non-standard Type-C interfaces are often unique, and existing technologies cannot effectively deal with the various states of these non-standard Type-C interfaces when connected to the device, making it difficult to effectively evaluate the subsequent data transmission. On the other hand, most existing verification schemes use a fixed set of test instructions, and are unable to dynamically adjust the test content and priority according to the real-time signal characteristics of the non-standard Type-C interface. As a result, when faced with the complex and changeable transmission characteristics of non-standard interfaces, the verification process lacks pertinence and is difficult to accurately detect potential transmission problems. Summary of the invention
[0005] In view of the above-mentioned problems, in combination with the first aspect of the present invention, an embodiment of the present invention provides a method for quickly verifying data transmission of a non-standard Type-C interface, the method comprising: Obtain a verification request triggered when the target device accesses a non-standard Type-C interface, wherein the verification request includes a physical connection status identifier of the interface to be verified and a current transmission mode parameter, wherein the current transmission mode parameter is used to indicate a status parameter in the current transmission mode; Based on the physical connection state identifier, extracting the real-time signal characteristics of the non-standard Type-C interface in the current transmission mode from a preset signal acquisition module, wherein the real-time signal characteristics include a voltage fluctuation sequence, a current change trajectory, and a data packet transmission interval distribution; Dynamically matching the real-time signal feature with a preset standard transmission parameter library to generate a test instruction set for the non-standard Type-C interface, the test instruction set comprising a plurality of groups of verification actions sorted by priority and corresponding trigger condition thresholds; Calling the verification action in the test instruction set, performing phased signal injection and feedback capture on the non-standard Type-C interface, and recording the execution result of each verification action and the corresponding timing mark; A verification report is generated based on the execution result and the timing mark, and abnormal nodes in the verification report that do not meet the preset transmission stability index are mapped to a physical structure defect description of the non-standard Type-C interface.
[0006] On the other hand, an embodiment of the present invention also provides an interface data transmission verification system, including a processor and a machine-readable storage medium, wherein the machine-readable storage medium is connected to the processor, the machine-readable storage medium is used to store programs, instructions or codes, and the processor is used to execute the programs, instructions or codes in the machine-readable storage medium to implement the above method.
[0007] Based on the above aspects, the embodiment of the present invention extracts the real-time signal characteristics of the non-standard Type-C interface in the current transmission mode from the preset signal acquisition module based on the physical connection state identifier, covering multi-dimensional information such as voltage fluctuation sequence, current change trajectory and data packet transmission interval distribution, and dynamically matches the real-time signal characteristics with the preset standard transmission parameter library to generate a test instruction set containing multiple groups of verification actions sorted by priority and corresponding trigger condition thresholds, which can intelligently generate personalized test instructions according to the real-time situation of the interface. Compared with the traditional fixed-mode test instruction generation method, it can better adapt to the diversity and complexity of non-standard interfaces, effectively improve the accuracy and coverage of verification, and ensure that various potential problems can be detected in time. In the verification action execution stage, the verification action in the test instruction set is called, and the non-standard Type-C interface is executed for phased signal injection and feedback capture, and the execution result of each verification action and the corresponding timing mark are recorded, so that the verification process is more detailed and traceable. Different from the traditional one-time verification method, the phased verification can deeply check the performance of the interface at different stages, and the detailed timing mark provides data support for subsequent problem analysis, which helps to quickly locate the problem. Finally, a verification report is generated based on the execution results and timing marks, and the abnormal nodes in the verification report that do not meet the preset transmission stability indicators are mapped to the physical structure defect description of the non-standard Type-C interface. This not only can intuitively present the verification results of the interface, but also can deeply explore the root causes of the problem and associate the abstract transmission anomalies with specific physical structure defects, which helps to improve the overall quality and reliability of the non-standard Type-C interface. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1 The present invention is a flowchart of a method for quickly verifying data transmission of a non-standard Type-C interface provided by an embodiment of the present invention.
[0009] Figure 2 It is a schematic diagram of exemplary hardware and software components of the interface data transmission verification system provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0010] The present invention will be described in detail below with reference to the accompanying drawings. Figure 1 The figure is a flow chart of a method for quickly verifying data transmission of a non-standard Type-C interface provided by an embodiment of the present invention. The method for quickly verifying data transmission of a non-standard Type-C interface is introduced in detail below.
[0011] Step S110, obtaining a verification request triggered when the target device is connected to a non-standard Type-C interface, wherein the verification request includes a physical connection status identifier of the interface to be verified and a current transmission mode parameter, wherein the current transmission mode parameter is used to represent a status parameter in the current transmission mode.
[0012] In this embodiment, such a scenario can be considered: there is a new type of tablet computer as the target device, which is designed to be able to perform multiple functions such as charging, data transmission, and external display devices through the Type-C interface. In the production test phase, the tablet computer needs to be connected to a non-standard Type-C interface (the non-standard here usually refers to the difference between the internal line layout of the interface or certain electrical parameters and the standard Type-C interface, for example, a customized design is performed to adapt to a special charger or external device). When the tablet computer is connected to the non-standard Type-C interface, the program system inside the tablet computer will automatically trigger a verification request, which contains a physical connection status identifier about the interface to be verified, for example, the physical connection status identifier can clearly indicate whether this connection is the first connection or the reconnection state. If the tablet computer is connected to the specific non-standard Type-C interface for the first time, the physical connection status identifier will be marked as the first connection state; if there has been a connection record before, it will be marked as the reconnection state. At the same time, the verification request can also include the current transmission mode parameter. Assuming that the current usage scenario of the tablet computer is to back up data while charging, the current transmission mode parameters will include information related to charging and data transmission, such as charging power requirements, data transmission rate requirements (such as USB3.1Gen2 transmission rate), etc.
[0013] Step S120, based on the physical connection state identifier, extracting the real-time signal characteristics of the non-standard Type-C interface in the current transmission mode from a preset signal acquisition module, wherein the real-time signal characteristics include a voltage fluctuation sequence, a current change trajectory, and a data packet transmission interval distribution.
[0014] Let's continue to take the scenario of the connection between the tablet computer and the non-standard Type-C interface as an example. If the physical connection status indicator indicates the first connection state, then during the test, the high-speed sampling unit in the preset signal acquisition module can be activated, and the high-speed sampling unit is configured to collect the initial handshake signal of the non-standard Type-C interface at a higher first sampling frequency. For example, the first sampling frequency can be set to collect signal samples once every microsecond. In this process, the signal conditions of the power pin, the ground pin, and the data pin can be collected. For the initial handshake signal, the parameters such as the voltage rise slope, the current steady-state value, and the handshake protocol response time will be extracted. Assume that in the initial handshake process of the first connection, the collected voltage rises from 0V to 5V, and its rising slope is a value that gradually increases and then tends to stabilize. After calculation, it is found that the voltage rise slope is 0.5V / millisecond (this is just an example value). At the same time, it is measured that the current reaches a stable current steady-state value, such as 0.5A, after a short fluctuation. The handshake protocol response time is 10 milliseconds from the start of the connection to the completion of the handshake protocol interaction. These parameters are key features in the initial handshake signal.
[0015] When the physical connection status indicator indicates a reconnection state, the test system switches to the anti-interference sampling unit in the signal acquisition module, which uses a lower preset second sampling frequency for acquisition, such as once every 5 microseconds, and is configured with a dynamic filtering algorithm to eliminate the residual noise of historical connections. Taking the reconnection scenario as an example, when the tablet is reconnected to the non-standard Type-C interface, the anti-interference sampling unit will collect the reconnection synchronization signal of the non-standard Type-C interface. In this process, parameters such as the noise suppression ratio, phase offset, and number of data retransmissions in the reconnection synchronization signal can be extracted. Assume that during reconnection, due to certain electromagnetic interference in the surrounding environment, the noise suppression ratio is measured to be 80% (indicating that 80% of external interference noise can be suppressed) through the dynamic filtering algorithm of the anti-interference sampling unit. At the same time, the phase offset is detected to be 5 degrees (here to illustrate that the phase has shifted to a certain extent), and due to the unstable factors that may exist in the previous connection, the number of data retransmissions is 2 times (indicating that 2 data packets need to be retransmitted to ensure data integrity). Finally, the extracted parameters of the initial handshake signal at the first connection or the reconnection synchronization signal at the reconnection are combined and analyzed with the current transmission mode parameters (such as the requirements for charging and data transmission) to generate real-time signal features including timestamps. For example, the voltage rise slope, current steady-state value, and handshake protocol response time at the first connection are combined with the parameters such as 5V and 0.5A required for charging and the rate of USB3.1Gen2 required for data transmission, and the timestamp of each acquisition point are added to form a complete real-time signal feature. The real-time signal feature contains information such as voltage fluctuation sequence, current change trajectory, and data packet transmission interval distribution for subsequent analysis.
[0016] Step S130, dynamically matching the real-time signal characteristics with a preset standard transmission parameter library, generating a test instruction set for the non-standard Type-C interface, wherein the test instruction set includes multiple groups of verification actions sorted by priority and corresponding trigger condition thresholds.
[0017] In the above scenario, the reference signal template corresponding to the current transmission mode parameters can be loaded from the standard transmission parameter library. Assuming that the current transmission mode is charging and data transmission at the same time, the corresponding reference signal template is found from the standard transmission parameter library. The reference signal template contains a standard voltage range (for example, 4.5V-5.5V), an allowable current threshold (for example, 0.4A-0.6A), and a data packet integrity check rule (such as using CRC-32 check, requiring the check result to be correct, and the interval between data packets cannot exceed 10 milliseconds, etc.). Then compare the voltage fluctuation sequence in the real-time signal feature with the standard voltage range point by point. For example, in the previously collected voltage fluctuation sequence, it was detected that the voltage values of several points were lower than 4.5V. For these abnormal voltage points that exceed the standard voltage range, calculate their duration (assuming that one of the low voltage points lasts for 5 milliseconds) and amplitude deviation (such as the deviation from the standard voltage lower limit of 4.5V is -0.2V).
[0018] Next, the current change trajectory is segmented and fitted with the allowed current threshold. Assuming that during the charging process, the current change trajectory shows that the current suddenly rises from 0.5A to 0.7A in a certain period of time, this area is identified as the current limit area. By further analyzing the load fluctuation pattern corresponding to the current limit area, it is detected that the tablet computer started a high-power background task in this period of time, causing the sudden increase in load. Then, the data packet transmission interval distribution is time-sequentially associated with the data packet integrity check rule. For example, during the data transmission process, it is detected that the transmission interval of 3 data packets exceeds 10 milliseconds, and the packet loss rate (assuming 5%), the number of disordered times (assuming 1 time) and the verification failure event (such as the CRC-32 verification result of 1 data packet fails) are counted.
[0019] Based on the statistical results of these abnormal voltage points, current overlimit areas and verification failure events, a matching difference matrix containing weighted scores is generated. For example, the duration and amplitude deviation of each abnormal voltage point are segmented and classified. If the duration of an abnormal voltage point is long and the amplitude deviation is large, its impact range level is rated as high, which means that the voltage fluctuation has a high potential risk to the stability of the interface power supply. For the current overlimit area, the instantaneous overload capacity and steady-state load adaptability of the non-standard Type-C interface are identified according to the load fluctuation pattern. Assuming that in the above-mentioned current overlimit situation, the instantaneous overload capacity of the interface is detected to be 1.2A (indicating the maximum instantaneous current that can be tolerated), and the steady-state load adaptability is 0.6A (indicating the load current suitable in a stable state), the current stability score is generated based on the difference between the two (such as a score representing stability calculated by a specific formula). For verification failure events, the type distribution and occurrence frequency of verification failure events are extracted, and the verification failure events are classified into protocol mismatch type, timing disorder type and data corruption type. Assume that in this scenario, the verification failure event is of the data corruption type and occurs once within 10 seconds. Count the number of times each type of verification failure event is triggered per unit time to obtain the distribution of verification failure event types.
[0020] Then, based on the impact range level, current stability score and verification failure event type distribution, a voltage weight coefficient is assigned to each abnormal voltage point, a current weight coefficient is assigned to each current overlimit area, and a verification weight coefficient is assigned to each type of verification failure event. For example, a higher voltage weight coefficient is assigned to a high-risk abnormal voltage point, a corresponding current weight coefficient is assigned to the current overlimit area according to its impact on stability, and a verification weight coefficient is assigned to the verification failure event according to its type and frequency of occurrence. Then, the above weight coefficients are mapped to a multidimensional space coordinate system according to preset rules to generate a matching difference matrix. In the matching difference matrix, each dimension corresponds to an abnormal type (such as voltage abnormality, current abnormality, verification failure, etc.), and the value of the matrix node represents the comprehensive impact weight of the corresponding type of abnormality on transmission stability. According to the numerical size of the nodes in the matching difference matrix, a verification action priority list is generated from high to low, and a trigger condition threshold is associated with each verification action. For example, the verification action corresponding to the highest value abnormality has the highest priority. For example, in the case of severe voltage fluctuation, the corresponding verification action (such as in-depth test of voltage stability) is given the highest priority, and the trigger condition threshold is set, such as the upper limit of voltage fluctuation is ±0.1V (indicating that a more stringent test or fault is triggered if the fluctuation range is exceeded), the current transient recovery time is 100 milliseconds (indicating that the current should be restored to the normal range within 100 milliseconds after a transient change), and the number of verification failure tolerance is 0 times (indicating that no verification failure is allowed), etc. If the value of any node in the matching difference matrix exceeds the preset emergency response threshold (such as the comprehensive impact weight of an abnormality reaches 0.8, and the emergency response threshold is set to 0.7), the priority of the corresponding verification action is raised to the highest level, and the strictness of its trigger condition threshold is dynamically adjusted, such as further reducing the upper limit of voltage fluctuation to ±0.05V, etc. Finally, the verification action groups in the test instruction set are generated in sequence according to the priority list.
[0021] Step S140, calling the verification action in the test instruction set, performing phased signal injection and feedback capture on the non-standard Type-C interface, and recording the execution result of each verification action and the corresponding timing mark.
[0022] In the test scenario of the tablet computer and the non-standard Type-C interface mentioned above, the target verification action is selected from the test instruction set in turn according to the priority order of the verification action, and the trigger condition threshold corresponding to the target verification action is parsed. For example, the first selected target verification action belongs to the voltage stability test type, and a step voltage waveform is injected into the power pin of the non-standard Type-C interface as required. Assume that the injected step voltage waveform starts from 4.5V, gradually rises to 5.5V in steps of 0.1V, and then gradually decreases back to 4.5V. While injecting the voltage, the transient response and voltage drop recovery time of the feedback current are monitored synchronously. For example, when the voltage rises to 5.0V, it is detected that the feedback current rises from 0.5A to 0.6A instantly, and then recovers to 0.5A after 50 milliseconds. The transient response and voltage drop recovery time in this process are recorded.
[0023] Next, if the next target verification action belongs to the data integrity test type, send a preset verification data sequence to the data channel of the non-standard Type-C interface. Construct a standard test data packet containing an increasing sequence number, a pseudo-random data block, and a cyclic redundancy check code (CRC-32), and send the verification data sequence corresponding to the standard test data packet to the data channel of the non-standard Type-C interface at a preset sending interval (such as sending a data packet every 1 millisecond). Deploy a data packet listener at the receiving end of the non-standard Type-C interface, and use the data packet listener to record the arrival time, sequence number integrity, and verification code matching status of each received standard test data packet. For example, after sending 100 data packets, it is detected that the arrival time of the 50th data packet is 2 milliseconds later than expected, and the verification code matching status shows that the verification code does not match. Calculate the one-way transmission delay based on the sending interval and arrival time, obtain the response delay of the data channel (such as the response delay of the 50th data packet is 2 milliseconds), and count the occurrence position (50th data packet) and interval of the packet loss event based on the sequence number integrity. When the check code matching status indicates that the check code does not match, the retransmission request generator is triggered to send a retransmission instruction to the sender, and the retransmission request frequency of the retransmission instruction (for example, during the transmission of these 100 data packets, the retransmission request frequency is 10%, that is, 10 data packets need to be retransmitted) and the successful response ratio (assuming that there are 8 data packets that are successfully retransmitted, then the successful response ratio is 80%), as well as the bit error rate corresponding to the check code matching status (a value representing the bit error rate is calculated according to a specific algorithm). The one-way transmission delay, packet loss event and retransmission response ratio are integrated into a data integrity assessment matrix and associated with the sending batch identifier of the current test data packet.
[0024] If the next target verification action belongs to the physical connection durability test type, the plug-in mechanism of the non-standard Type-C interface is controlled to perform periodic connection-disconnection operations. For example, the robot arm is controlled to clamp the plug part of the non-standard Type-C interface and perform 100 insertion-removal cycles at a preset insertion speed (such as 1 insertion and removal per second) and force (such as applying a 1N insertion and removal force). After each insertion, the contact resistance value between the power pin and the ground pin of the non-standard Type-C interface is measured by a contact resistance tester, and the initial value of the contact resistance value (assuming that the initial value after the first insertion is 0.1Ω) and the stable value (the resistance value after a period of stabilization is 0.2Ω) are recorded. During each removal process, the separation trajectory of the plug and the interface is captured by the camera, and the wear mark distribution of the metal contacts of the plug (such as slight scratches on the edge of the metal contact) and the foreign matter attachment area (assuming that 0.1 square millimeters of dust are attached) are analyzed. The contact resistance value, wear marks and foreign matter attachment area are input into the durability prediction model to calculate the expected plug-in life of the non-standard Type-C interface (e.g., the model calculates that it can be plugged and unplugged normally 500 times) and the contact reliability index (e.g., a value representing contact reliability is calculated based on factors such as contact resistance value and wear condition). If the expected plug-in life is lower than the preset threshold (assuming the preset threshold is 1000 times), the mechanical structure defect level of the interface (e.g., marked as a mild defect) and the recommended replacement cycle (e.g., it is recommended to replace after 100 plug-ins) are marked in the verification report. After each target verification action is executed, the monitoring data is compared with the trigger condition threshold in real time. For example, in the voltage stability test, if the voltage fluctuation exceeds the set trigger condition threshold (e.g., the fluctuation exceeds ±0.1V), the subsequent verification action is terminated and marked as a critical fault node.
[0025] Step S150, generating a verification report based on the execution result and the timing mark, and mapping the abnormal nodes in the verification report that do not meet the preset transmission stability index to the physical structure defect description of the non-standard Type-C interface.
[0026] In this embodiment, after completing all the previous tests, the execution results of each verification action are integrated into a multidimensional data set according to the time sequence mark, and the multidimensional data set contains evaluation indicators of the voltage stability dimension, the data integrity dimension and the connection durability dimension. For example, in the voltage stability dimension, the evaluation indicators include voltage fluctuation range, transient response time, etc.; in the data integrity dimension, the evaluation indicators include packet loss rate, bit error rate, etc.; in the connection durability dimension, the evaluation indicators include contact resistance change, expected plug-in life, etc. Then these evaluation indicators are normalized. The first weight coefficient (assuming 0.5) is assigned to the voltage stability dimension, the second weight coefficient (assuming 0.3) is assigned to the data integrity dimension, and the third weight coefficient (assuming 0.2) is assigned to the connection durability dimension. The original evaluation indicator of each dimension is converted into a standardized value in the range of 0-1. For example, for the voltage stability dimension, if the voltage fluctuation range is within the allowable range, its standardized value is set to 1, indicating that it fully complies with the standard; if the voltage fluctuation exceeds the allowable range, the standardized value is set to a value less than 1 (such as 0.6, indicating that it partially complies with the standard) according to the degree of excess. The standardized values are weighted and summed according to the weight coefficient to obtain the comprehensive performance score of the non-standard Type-C interface. Assume that the comprehensive performance score is 0.7 after calculation. If the comprehensive performance score is lower than the preset qualified line (assuming the qualified line is 0.8), the three-level alarm mechanism is triggered. If the comprehensive performance score is lower than the qualified line due to the voltage stability dimension, the first-level alarm is triggered to indicate a voltage stability defect; if it is a problem in the data integrity dimension, the second-level alarm is triggered to indicate a data integrity defect; if it is a problem in the connection durability dimension, the third-level alarm is triggered to indicate a connection durability defect. The generation format of the verification report is dynamically adjusted according to the alarm level, and different color identifiers (such as red for the first-level alarm, yellow for the second-level alarm, and blue for the third-level alarm) and repair priority labels are associated with each alarm level (such as the first-level alarm has the highest repair priority).
[0027] Next, identify the target dimension whose comprehensive score is lower than the preset qualified threshold. Assuming that the comprehensive score of the voltage stability dimension is lower than the qualified threshold, extract the original monitoring data of the corresponding target dimension (such as the specific value of the voltage fluctuation beyond the range, the transient response time, etc.) and the execution environment parameters (such as the temperature and humidity during the test, etc.). Reverse match the defect feature model in the standard transmission parameter library based on the original monitoring data. Load the historical defect database corresponding to the non-standard Type-C interface model from the standard transmission parameter library, which contains the defect feature model of known physical defects. Calculate the similarity between the currently detected abnormal voltage fluctuation pattern and the oxidation contact feature, aging insulation feature and cold solder pin feature in the defect feature model. Assuming that the similarity between the abnormal voltage fluctuation pattern and the oxidation contact feature exceeds the first threshold (such as 0.8), then generate the metal contact oxidation probability (such as 80%) and the recommended cleaning solution (such as using an alcohol cotton ball to gently wipe the contact). If the similarity between the abnormal voltage fluctuation pattern and the aging insulation feature exceeds the second threshold (such as 0.7), generate the insulation layer aging level (such as mild aging) and the recommended replacement of insulation material prompt. If the similarity between the abnormal voltage fluctuation pattern and the characteristics of the cold solder pin exceeds the third threshold (such as 0.6), the cold soldering position of the pin is located (such as indicating that the third pin may have a cold solder joint) and a rework process flow chart is generated. Finally, the defect probability and location information are converted into a readable physical structure defect description and associated with the abnormal node coordinates in the verification report (such as indicating in the verification report that a specific test point in the voltage stability test is abnormal) and repair suggestions.
[0028] Based on the above steps, the embodiment of the present invention extracts the real-time signal characteristics of the non-standard Type-C interface in the current transmission mode from the preset signal acquisition module based on the physical connection state identifier, covering multi-dimensional information such as voltage fluctuation sequence, current change trajectory and data packet transmission interval distribution, and dynamically matches the real-time signal characteristics with the preset standard transmission parameter library to generate a test instruction set containing multiple groups of verification actions sorted by priority and corresponding trigger condition thresholds, which can intelligently generate personalized test instructions according to the real-time situation of the interface. Compared with the traditional fixed-mode test instruction generation method, it can better adapt to the diversity and complexity of non-standard interfaces, effectively improve the accuracy and coverage of verification, and ensure that various potential problems can be discovered in time. In the verification action execution stage, the verification action in the test instruction set is called, and the non-standard Type-C interface is executed for phased signal injection and feedback capture, and the execution result of each verification action and the corresponding timing mark are recorded, so that the verification process is more detailed and traceable. Different from the traditional one-time verification method, the phased verification can deeply check the performance of the interface at different stages, and the detailed timing mark provides data support for subsequent problem analysis, which helps to quickly locate the problem. Finally, a verification report is generated based on the execution results and timing marks, and the abnormal nodes in the verification report that do not meet the preset transmission stability indicators are mapped to the physical structure defect description of the non-standard Type-C interface. This can not only intuitively present the verification results of the interface, but also deeply explore the root causes of the problem and associate the abstract transmission anomalies with specific physical structure defects, which helps to improve the overall quality and reliability of the non-standard Type-C interface.
[0029] In a possible implementation, step S120 includes: Step S121, when the physical connection status identifier indicates a first connection state, activate the high-speed sampling unit in the signal acquisition module, collect the initial handshake signal of the non-standard Type-C interface at a preset first sampling frequency, and extract the voltage rising slope, current steady-state value and handshake protocol response time in the initial handshake signal.
[0030] Still taking the above scenario as an example, when the tablet computer is connected to the non-standard Type-C interface for the first time, since the physical connection status indicator indicates the first connection state, the high-speed sampling unit in the signal acquisition module can be activated. The high-speed sampling unit is set to collect data at a higher first sampling frequency. Assuming that the first sampling frequency is collected once per microsecond, the high-speed sampling unit starts to collect the initial handshake signal of the non-standard Type-C interface. The initial handshake signal contains information such as power pins, ground pins, and data pins. During the acquisition process, focus on and extract key parameters such as the voltage rise slope, current steady-state value, and handshake protocol response time in the initial handshake signal. For example, from the power pin, the voltage starts to rise from 0V. After measurement and calculation, it is detected that the voltage rise slope is 0.5V / millisecond during the process of rising to 5V, which means that the voltage changes at a rate of 0.5V per millisecond. At the same time, in terms of current, after a short fluctuation, a stable current steady-state value is reached. After measurement, the current steady-state value is 0.5A. As for the handshake protocol response time, from the beginning of the interactive handshake protocol between the tablet computer and the non-standard Type-C interface to the complete completion of the handshake protocol, the timing showed that this process took 10 milliseconds.
[0031] Step S122, when the physical connection status identifier indicates a reconnection state, switch to the anti-interference sampling unit in the signal acquisition module, collect the reconnection synchronization signal of the non-standard Type-C interface at a preset second sampling frequency, and extract the noise suppression ratio, phase offset and number of data retransmissions in the reconnection synchronization signal.
[0032] When the tablet computer is in a reconnection state with the non-standard Type-C interface, the physical connection state indicator indicates a reconnection state. At this time, the anti-interference sampling unit in the signal acquisition module can be switched to collect the reconnection synchronization signal of the non-standard Type-C interface at a preset second sampling frequency. Here, it is assumed that the second sampling frequency is collected once every 5 microseconds, and the anti-interference sampling unit is configured with a dynamic filtering algorithm to eliminate the residual noise of the historical connection. During the reconnection process, there may be some electromagnetic interference factors around, such as weak electromagnetic fields generated by other electronic devices. After the reconnection synchronization signal is collected by the anti-interference sampling unit, parameters such as noise suppression ratio, phase offset, and number of data retransmissions are extracted from it. Assuming that in this reconnection scenario, the noise suppression ratio is 80% after measurement and calculation, which indicates that the anti-interference sampling unit can effectively suppress 80% of external interference noise. At the same time, the phase offset is detected to be 5 degrees, which means that the phase of the signal has shifted by 5 degrees relative to the ideal state. Since there may be unstable factors in the previous connection, the number of data retransmissions is 2 times, that is, 2 data packets need to be retransmitted to ensure data integrity.
[0033] Step S123: Combine and analyze the extracted parameters of the initial handshake signal or the reconnection synchronization signal with the current transmission mode parameters to generate the real-time signal feature including a timestamp.
[0034] The first sampling frequency is higher than the second sampling frequency, and the anti-interference sampling unit is configured with a dynamic filtering algorithm to eliminate residual noise from historical connections.
[0035] In this embodiment, whether it is the initial handshake signal collected during the first connection or the reconnection synchronization signal collected during the reconnection, the extracted parameters can be combined with the current transmission mode parameters for analysis. For example, the current transmission mode of the tablet computer is to perform data backup while charging. The voltage range required for charging is 4.5V-5.5V, the current requirement is between 0.4A-0.6A, the data transmission requirement follows the rate standard of USB3.1Gen2, and the interval between data packets during the data transmission process is required not to exceed 10 milliseconds. The voltage rise slope, current steady-state value, handshake protocol response time extracted during the first connection, or the noise suppression ratio, phase offset, data retransmission times extracted during the reconnection are combined with these charging and data transmission requirements. At the same time, a timestamp is added to each collected parameter point to generate a real-time signal feature containing a timestamp. The real-time signal feature contains information such as the voltage fluctuation sequence, the current change trajectory, and the data packet transmission interval distribution. This information will provide an important basis for subsequent analysis, such as judging whether the performance of the interface meets the requirements and whether there are potential problems.
[0036] In a possible implementation, step S130 includes: Step S131, loading a reference signal template corresponding to the current transmission mode parameters from the standard transmission parameter library, wherein the reference signal template includes a standard voltage range, an allowable current threshold, and a data packet integrity check rule.
[0037] Still taking the above scenario as an example, since the tablet computer is in the transmission mode of charging and data backup at the same time, the corresponding reference signal template is found in the standard transmission parameter library. The reference signal template contains information such as the standard voltage range, the allowable current threshold, and the packet integrity verification rules. For example, the standard voltage range is set to 4.5V-5.5V, which is to ensure that the tablet computer can obtain a stable voltage supply during charging and normal operation, while ensuring the safety of the interface and the device; the allowable current threshold is set between 0.4A-0.6A, which is determined based on the tablet computer's charging circuit and the power requirements during data transmission. Within this current range, the normal operation of the device can be guaranteed without overload or underload; the packet integrity verification rule adopts the CRC-32 verification method, requiring that during the data transmission process, the verification result of each data packet must be correct, and the interval between data packets cannot exceed 10 milliseconds to ensure the accuracy and continuity of data transmission.
[0038] Step S132, comparing the voltage fluctuation sequence in the real-time signal feature with the standard voltage range point by point, and calculating the duration and amplitude deviation of the abnormal voltage point exceeding the standard voltage range.
[0039] For example, in the previously collected voltage fluctuation sequence, there will be a series of data points whose voltage values change over time. For each data point, compare it with the standard voltage range. For example, in a certain period of time, it is detected that the voltage values of several data points are lower than 4.5V or higher than 5.5V. These are abnormal voltage points that exceed the standard voltage range. For each abnormal voltage point, calculate its duration and amplitude deviation. Assume that one of the abnormal voltage points starts from time t1 and ends at t2, and the duration is t2-t1, which is calculated to be 5 milliseconds. The amplitude deviation of this abnormal voltage point relative to the standard voltage lower limit of 4.5V is -0.2V, that is, the actual voltage value is 4.3V.
[0040] Step S133, performing segmented fitting on the current variation trajectory and the allowable current threshold, and identifying the current exceeding limit area and the corresponding load fluctuation mode.
[0041] During the charging and data transmission process of the tablet computer, the current changes dynamically with the working state of the device. By performing segmented fitting on the collected current change trajectory, the current change can be analyzed more clearly. For example, in a certain period of time, the current suddenly rises from 0.5A to 0.7A, and this area is identified as the current overlimit area. By further analyzing the load fluctuation pattern corresponding to the current overlimit area, it is detected that the tablet computer starts a high-power background task during this period of time, such as automatic background software update, which requires additional power support, resulting in a sudden increase in load. The above load fluctuation pattern reflects the current response of the non-standard Type-C interface when dealing with different working states of the device.
[0042] Step S134, performing time-sequence association between the data packet transmission interval distribution and the data packet integrity check rule, and counting the packet loss rate, disorder times and check failure events.
[0043] During data transmission, the sending and receiving of each data packet has certain time sequence and interval requirements. According to the collected data packet transmission interval distribution data, the packet loss rate, disorder times and verification failure events are counted. For example, in the process of sending 100 data packets, it is detected that the transmission interval of 3 data packets exceeds 10 milliseconds, and the packet loss rate is calculated to be 5%. At the same time, it is detected that the receiving order of 1 data packet is inconsistent with the sending order, and the disorder times is 1. In addition, the CRC-32 check result of 1 data packet fails, which is a verification failure event.
[0044] Step S135, based on the statistical results of the abnormal voltage points, current exceeding limit areas and verification failure events, generate a matching difference matrix including weight scores, and generate multiple groups of verification actions sorted by priority and corresponding trigger condition thresholds according to the weight scores to obtain a test instruction set.
[0045] For example, in a possible implementation, step S135 includes: Step S1351, classify the duration and amplitude deviation of each abnormal voltage point into segments, and determine the impact range level of the abnormal voltage point, where the impact range level is used to characterize the potential risk degree of voltage fluctuation to the power supply stability of the interface.
[0046] For example, for abnormal voltage points with a long duration and large amplitude deviation, the impact range level is rated as high, which means that this voltage fluctuation has a high potential risk to the stability of the interface power supply. Assuming that an abnormal voltage point lasts for more than 10 milliseconds and the amplitude deviation exceeds 0.3V, the abnormal voltage point is classified as a high impact range level. According to the high impact range level, it can be considered that this voltage fluctuation may have a greater impact on the charging stability of the tablet, such as causing unstable charging speed or shortened battery life.
[0047] Step S1352: Identify the instantaneous overload capacity and steady-state load adaptability of the non-standard Type-C interface according to the load fluctuation pattern in the current overlimit area, and generate a current stability score based on the difference between the overload capacity and the adaptability.
[0048] In the current overlimit situation mentioned earlier, it is assumed that after analysis, the instantaneous overload capacity of the non-standard Type-C interface is 1.2A, which means that the maximum current that the interface can withstand in a short period of time is 1.2A. The steady-state load adaptability is 0.6A, which means that under stable working conditions, the load current suitable for the interface is 0.6A. Based on the difference between the two, a current stability score is generated through a specific algorithm. For example, the difference is 0.6A, and according to a set scoring formula, a score representing current stability is calculated, which can intuitively reflect the stability of the interface in terms of current.
[0049] Step S1353, extract the type distribution and occurrence frequency of the verification failure events, classify the verification failure events into protocol mismatch type, timing disorder type and data corruption type, and count the number of triggering times of each type of verification failure event per unit time to obtain the type distribution of verification failure events.
[0050] For example, in the verification failure event mentioned above, the verification failure event is of data corruption type and occurs once within 10 seconds. If there are other types of verification failure events, they are also classified and counted in the same way. For example, within a period of time, the protocol mismatch type verification failure event occurs 0 times, the timing disorder type verification failure event occurs 0 times, and the data corruption type verification failure event occurs 1 time, thereby obtaining the distribution of the verification failure event types.
[0051] Step S1354, based on the impact range level, current stability score and verification failure event type distribution, a voltage weight coefficient is assigned to each abnormal voltage point, a current weight coefficient is assigned to each current exceeding limit area, and a verification weight coefficient is assigned to each type of verification failure event.
[0052] For example, for abnormal voltage points with a high impact range level, a higher voltage weight coefficient is assigned because it has a greater potential impact on interface performance. For example, the voltage weight coefficient of abnormal voltage points with a high impact range level is 0.5. For current over-limit areas, the corresponding current weight coefficient is assigned according to the degree of its impact on stability. Assume that the current weight coefficient of the current over-limit area mentioned above is 0.3. For verification failure events, the verification weight coefficient is assigned according to its type and frequency of occurrence. For example, the verification weight coefficient of data corruption verification failure events is 0.2.
[0053] Step S1355, map the voltage weight coefficient, current weight coefficient and verification weight coefficient to the multidimensional space coordinate system according to preset rules to generate the matching difference matrix, wherein each dimension of the matching difference matrix corresponds to an abnormality type, and the numerical value of the matrix node represents the comprehensive impact weight of the corresponding type of abnormality on the transmission stability.
[0054] In the matching difference matrix, each dimension corresponds to an abnormality type, such as voltage abnormality, current abnormality, verification failure, etc. The value of the matrix node represents the comprehensive impact weight of the corresponding type of abnormality on the transmission stability. For example, the value of a node in the voltage abnormality dimension is 0.3, which means that the comprehensive impact weight of the voltage abnormality on the transmission stability is 0.3; the value of a node in the current abnormality dimension is 0.2, and the value of a node in the verification failure dimension is 0.1, etc. These values comprehensively reflect the degree of influence of various abnormal situations on the transmission stability between the tablet and the non-standard Type-C interface.
[0055] Step S1356, generate a verification action priority list by sorting from high to low according to the numerical values of the nodes in the matching difference matrix, and associate a trigger condition threshold with each verification action, wherein the trigger condition threshold includes the upper limit of voltage fluctuation allowable, current transient recovery time and the number of verification failure tolerances.
[0056] For example, the verification action corresponding to the highest numerical anomaly has the highest priority. For example, in the case of severe voltage fluctuations, the corresponding verification action (such as in-depth testing of voltage stability) is given the highest priority, and the trigger condition threshold is set. Assuming that the upper limit of voltage fluctuation is ±0.1V, this means that if the voltage fluctuation exceeds this range in subsequent tests, it will trigger a stricter test or be judged as a fault; the current transient recovery time is 100 milliseconds, indicating that the current should return to the normal range within 100 milliseconds after a transient change; the number of verification failure tolerances is 0 times, indicating that no verification failure is allowed.
[0057] Step S1357, when the value of any node in the matching difference matrix exceeds the preset emergency response threshold, the priority of the corresponding verification action is increased to the highest level, and the strictness of its trigger condition threshold is dynamically adjusted.
[0058] For example, assuming that the emergency response threshold is set to 0.7, when the comprehensive impact weight of a certain anomaly (such as voltage anomaly) reaches 0.8, exceeding the emergency response threshold, the priority of the voltage stability-related verification action is raised to the highest level. At the same time, the trigger condition threshold is dynamically adjusted, such as further reducing the upper limit of voltage fluctuation to ±0.05V, making the test more stringent to ensure that the performance of the interface meets the requirements in such high-risk situations.
[0059] Step S1358: Generate verification action groups in the test instruction set in sequence according to the priority list.
[0060] For example, the verification actions related to the voltage stability test can be put into the test instruction set first, followed by the verification actions related to the current stability test, and finally the verification actions related to the data integrity test, etc. Each verification action has a corresponding trigger condition threshold. These verification action groups will test the non-standard Type-C interface in sequence during the subsequent test process to comprehensively evaluate the performance of the interface and find possible problems.
[0061] In a possible implementation, step S140 includes: Step S141 , selecting target verification actions from the test instruction set in sequence according to the priority order of the verification actions, and parsing the trigger condition thresholds corresponding to the target verification actions.
[0062] For example, since the priority of the verification action has been determined based on the analysis of various abnormal situations, the target verification action will be selected in this order. For example, the verification action with the highest priority may be an action of the voltage stability test type. After selecting the target verification action, the corresponding trigger condition threshold is parsed. Assume that the trigger condition threshold is that the upper limit of the voltage fluctuation is ±0.1V, the current transient recovery time is 100 milliseconds, etc. These thresholds are based on the performance requirements of the tablet computer and the non-standard Type-C interface during normal operation and the previous analysis of abnormal situations. They will serve as the standard for judging whether the interface performance is qualified.
[0063] Step S142, when the target verification action belongs to the voltage stability test type, inject a step voltage waveform into the power pin of the non-standard Type-C interface, and synchronously monitor the transient response of the feedback current and the voltage drop recovery time.
[0064] In this embodiment, the design of the stepped voltage waveform is to comprehensively test the stability of the interface under different voltages. For example, starting from 4.5V, it gradually rises to 5.5V in steps of 0.1V, and then gradually decreases back to 4.5V. While injecting the voltage, the transient response of the feedback current and the voltage drop recovery time are synchronously monitored. During the voltage rise process, when the voltage reaches 5.0V, the change of the feedback current will be closely monitored. It is detected by the measuring instrument that the feedback current rises from 0.5A to 0.6A instantly, which is the transient response of the feedback current. Subsequently, as the voltage stabilizes, the current begins to decrease. After measurement and calculation, it is detected that the voltage drop recovery time for the current to recover from 0.6A to 0.5A is 50 milliseconds. All data in this process will be recorded in detail for subsequent comparison with the trigger condition threshold.
[0065] Step S143, when the target verification action belongs to the data integrity test type, a preset verification data sequence is sent to the data channel of the non-standard Type-C interface, and the response delay, bit error rate and retransmission request frequency of the data channel are captured.
[0066] In this embodiment, according to a preset sending interval, for example, a data packet is sent every 1 millisecond, and a verification data sequence corresponding to the standard test data packet is sent to the data channel of the non-standard Type-C interface. A data packet listener is deployed at the receiving end of the non-standard Type-C interface, and the function of the data packet listener is to record important information such as the arrival time, sequence number integrity and check code matching status of each received standard test data packet. After sending 100 data packets, the received data is analyzed. For example, it is detected that the arrival time of the 50th data packet is 2 milliseconds later than expected, which is the response delay of the data channel. At the same time, the sequence number integrity is checked, and it is detected that there is no missing or disordered sequence number. However, the check code matching status shows that the CRC-32 check result of the 50th data packet fails. According to the above situation, the bit error rate is calculated. Since only one data packet fails to check, assuming that the total length of the data packet is 1000 bytes, according to a specific bit error rate calculation algorithm, the bit error rate is obtained as a specific value. When the check code does not match, the retransmission request generator is triggered to send a retransmission instruction to the sending end, and the retransmission request frequency of the retransmission instruction is counted. During the transmission of these 100 data packets, assuming that there are 10 data packets that need to be retransmitted, the retransmission request frequency is 10%. At the same time, the successful response ratio of the retransmission command is recorded. For example, if there are 8 data packets that are successfully retransmitted, the successful response ratio is 80%. The one-way transmission delay, packet loss events, and retransmission response ratio are integrated into a data integrity assessment matrix and associated with the sending batch identifier of the current test data packet, so that there is a detailed basis for the subsequent analysis of the integrity of the entire data transmission process.
[0067] Step S144, when the target verification action belongs to the physical connection durability test type, the plug-in mechanism of the non-standard Type-C interface is controlled to perform periodic connection-disconnection operations, and the contact resistance change and signal attenuation rate after each operation are recorded.
[0068] In this embodiment, the periodic connection-disconnection operation is to simulate the frequent plugging and unplugging of the tablet computer with the non-standard Type-C interface during actual use. For example, a mechanical arm is used to clamp the plug part of the non-standard Type-C interface, and 100 insertion-unplugging cycles are performed at a preset plug-in speed (plug-in and unplug-out once per second) and force (applying a plug-in and unplugging force of 1N). After each insertion is completed, the contact resistance value between the power pin and the ground pin of the non-standard Type-C interface is measured by a contact resistance tester, and the initial value and stable value of the contact resistance value are recorded. After the first insertion, the initial value of the contact resistance value was measured to be 0.1Ω. After a period of stabilization, the stable value was measured again to be 0.2Ω. During each unplugging process, the separation trajectory of the plug and the interface is captured by a camera, and the distribution of wear marks on the metal contacts of the plug is analyzed. Through image analysis, it is found that there are slight scratches on the edge of the metal contacts of the plug, and the foreign matter attachment area can also be analyzed. It is assumed that 0.1 square millimeters of dust attachment is detected. The data such as contact resistance value, wear marks and foreign matter attachment area are input into the durability prediction model. The durability prediction model calculates the expected plug-in life and contact reliability index of the non-standard Type-C interface based on the preset algorithm and a large amount of experimental data. For example, the model calculates that the expected plug-in life of the non-standard Type-C interface is 500 times. The contact reliability index calculates a value representing the contact reliability based on factors such as the change in contact resistance value, wear and foreign matter attachment. If the expected plug-in life is lower than the preset threshold (assuming the preset threshold is 1000 times), the mechanical structure defect level of the interface (for example, marked as a mild defect) and the recommended replacement cycle (such as recommended replacement after 100 plug-ins) are marked in the verification report.
[0069] Step S145, after each target verification action is executed, the monitoring data is compared with the trigger condition threshold in real time. If the trigger condition threshold is exceeded, the subsequent verification action is terminated and marked as a critical fault node.
[0070] For example, in the voltage stability test, if the voltage fluctuation exceeds the set trigger condition threshold (such as the fluctuation exceeds ±0.1V) during the injection of the step voltage waveform, the subsequent verification action will be terminated and marked as a critical fault node. This is because the voltage fluctuation exceeding the threshold indicates that the non-standard Type-C interface has serious problems in voltage stability, which may affect the normal charging and operation of the tablet computer. Continuing other tests may cause further damage to the device or obtain inaccurate test results. Similarly, in the data integrity test, if the bit error rate exceeds the set threshold or the retransmission request frequency is too high, the subsequent verification action will be terminated and marked as a critical fault node. In the physical connection durability test, if the change in the contact resistance value exceeds the expected value or the wear mark is too serious, the same treatment will be made. Through this real-time comparison and key fault node marking method, serious problems with the non-standard Type-C interface can be detected in time, the test efficiency can be improved, and the safety and stability of the tablet computer when using the non-standard Type-C interface can be ensured.
[0071] In a possible implementation, step S150 includes: Step S151 , integrating the execution results of each verification action into a multi-dimensional data set according to time series marks, wherein the multi-dimensional data set includes evaluation indicators of voltage stability dimension, data integrity dimension and connection durability dimension.
[0072] In the various tests previously conducted on non-standard Type-C interfaces, including voltage stability tests, data integrity tests, and physical connection durability tests, each test has its execution results and corresponding timing markers. The above execution results are integrated into a multidimensional data set, which includes evaluation indicators in the voltage stability dimension, data integrity dimension, and connection durability dimension.
[0073] In the voltage stability dimension, the evaluation indicators include data such as voltage fluctuation range and transient response time in previous tests. For example, in the voltage stability test, when a step voltage waveform is injected into the power pin of the non-standard Type-C interface, the recorded voltage fluctuation range is from 4.3V to 5.7V (including the situation that exceeds the standard voltage range of 4.5V-5.5V), and the transient response time is measured at certain voltage change points, such as when the voltage rises from 5.0V to 5.1V, the transient response time of the current is 50 milliseconds.
[0074] In the data integrity dimension, the evaluation indicators include packet loss rate, bit error rate, etc. In the data integrity test, after sending 100 data packets, the packet loss rate is 5% according to statistics, and the bit error rate of a specific data packet is calculated to obtain a specific value, such as the bit error rate of a certain data packet is 0.1% (assumed).
[0075] In the dimension of connection durability, the evaluation indicators include contact resistance change, expected plug-in life, etc. In the physical connection durability test, the contact resistance value measured after each plug-in and plug-out changes. The initial contact resistance value after the first insertion is 0.1Ω, and the stable contact resistance value after multiple plug-ins and plug-outs is 0.2Ω. It is calculated that the expected plug-in life of the non-standard Type-C interface is 500 times.
[0076] Step S152, normalizing the evaluation index, and calculating the comprehensive score of each dimension based on a preset transmission stability weight coefficient.
[0077] For example, the first weight coefficient is assigned to the voltage stability dimension, assuming it is 0.5; the second weight coefficient is assigned to the data integrity dimension, assuming it is 0.3; and the third weight coefficient is assigned to the connection durability dimension, assuming it is 0.2. For the voltage stability dimension, the original evaluation indicators such as the voltage fluctuation range and the transient response time are converted into standardized values in the range of 0-1. For example, if the voltage fluctuation range is completely within the standard voltage range (4.5V-5.5V), its standardized value is set to 1, indicating full compliance with the standard; if the voltage fluctuation range is from 4.3V to 5.7V as previously recorded, the standardized value is set to a value less than 1 according to the degree of exceeding the standard range, assuming it is 0.6, indicating partial compliance with the standard. The evaluation indicators of the data integrity dimension and the connection durability dimension are normalized in a similar way. Then, the standardized values are weighted and summed according to the weight coefficients to obtain the comprehensive performance score of the non-standard Type-C interface. Assuming that after calculation, the standardized value of the voltage stability dimension is 0.6, the standardized value of the data integrity dimension is 0.8, and the standardized value of the connection durability dimension is 0.7, then the comprehensive performance score = 0.5×0.6+0.3×0.8+0.2×0.7=0.68.
[0078] Step S153, identifying the target dimension whose comprehensive score is lower than the preset qualified threshold, and extracting the original monitoring data and execution environment parameters of the corresponding target dimension.
[0079] Assuming that the preset qualified threshold is 0.8, since the calculated comprehensive performance score of 0.68 is lower than the qualified threshold, it is necessary to find out which dimensions caused this result. In this example, it is detected that the score of the voltage stability dimension is low. Therefore, the original monitoring data of the voltage stability dimension is extracted, such as the voltage fluctuation range from 4.3V to 5.7V mentioned earlier, and the transient response time at different voltage change points, and the execution environment parameters are extracted at the same time, such as the temperature of 25°C and the humidity of 50% during the test.
[0080] Step S154, reverse matching the defect feature model in the standard transmission parameter library according to the original monitoring data to determine the defect probability and location information of the non-standard Type-C interface.
[0081] For example, a historical defect database corresponding to a non-standard Type-C interface model is loaded from the standard transmission parameter library, and the historical defect database contains defect feature models of known physical defects. The currently detected abnormal voltage fluctuation pattern (such as a fluctuation range of 4.3V-5.7V) is similar to the oxidized contact features, aged insulation features, and cold solder pin features in the defect feature model. Assuming that after calculation, the similarity between the abnormal voltage fluctuation pattern and the oxidized contact features exceeds the first threshold (assuming the first threshold is 0.8), then the metal contact oxidation probability is generated, for example, 80%, and a recommended cleaning solution is given according to the standard operating procedure, such as using a special electronic equipment cleaning fluid and a clean wipe to gently wipe the contact. If the similarity between the abnormal voltage fluctuation pattern and the aged insulation features exceeds the second threshold (assuming the second threshold is 0.7), the insulation layer aging level (such as mild aging) and the recommended replacement of the insulation material prompt are generated. If the similarity between the abnormal voltage fluctuation pattern and the characteristics of the cold solder joint pin exceeds the third threshold (assuming the third threshold is 0.6), the cold solder joint position of the pin is located (such as indicating that the third pin may have a cold solder joint) and a rework process flow diagram is generated.
[0082] Step S155, converting the defect probability and location information into a readable physical structure defect description, and associating it with the abnormal node coordinates and repair suggestions in the verification report.
[0083] For example, "the probability of metal contact oxidation is 80%" is converted into a physical structure defect description such as "the metal contact of the power pin of the non-standard Type-C interface has an 80% probability of oxidation". In the verification report, the physical structure defect description is associated with the coordinates of the relevant abnormal nodes in the voltage stability test, for example, it is marked as the abnormality was detected at the 5th test point in the voltage stability test. At the same time, repair suggestions are given, such as "Use a special electronic equipment cleaning fluid and a clean wipe to gently wipe the contacts, and avoid causing other damage to the interface when wiping."
[0084] In a possible implementation, when activating the high-speed sampling unit in the signal acquisition module, or switching to the anti-interference sampling unit in the signal acquisition module, the method further includes: Step S210, configuring a multi-channel parallel acquisition circuit in the high-speed sampling unit, and capturing independent signal traces of the power pin, ground pin, and data pin of the non-standard Type-C interface.
[0085] In this embodiment, the multi-channel parallel acquisition circuit can simultaneously acquire signals from three pins, ensuring that the signal of each pin can be acquired independently and accurately. For example, for the power pin, the acquired signal trace may show the process of the voltage rising from 0V to 5V at a certain slope; for the ground pin, the acquired signal trace is a relatively stable low-level signal trace, whose voltage value is close to 0V and has very small fluctuations; for the data pin, the acquired signal trace is a series of complex pulse signals, which represent the data transmission process.
[0086] Step S220 , allocating an independent buffer queue to each signal trace, and performing polling reading on the buffer queue according to the first sampling frequency to generate time-aligned multi-channel signal samples.
[0087] In this embodiment, each cache queue is specifically used to store the signal data of the corresponding pin, and polling reading is performed according to the previously set first sampling frequency (assuming that the data is collected once every microsecond). For example, at a certain moment, data is read from three cache queues at the same time to ensure that the timestamps of the signal data of each pin are aligned, thereby generating time-aligned multi-channel signal samples. These multi-channel signal samples can accurately reflect the signal status of each pin at the same moment.
[0088] Step S230, embedding an adaptive noise canceller in the anti-interference sampling unit, predicting the current environmental noise spectrum according to the historical connection record of the non-standard Type-C interface, and dynamically adjusting the center frequency and bandwidth of the band-stop filter.
[0089] Since previous connections may be affected by different environmental noises, by analyzing historical connection records, we can understand the noise spectrum that may occur in a specific environment. For example, historical records show that there is high electromagnetic interference noise in a certain frequency band. The adaptive noise canceller predicts the noise spectrum that may exist in the current environment based on this information, and then dynamically adjusts the center frequency and bandwidth of the bandstop filter. If the predicted main noise frequency is 100kHz, the center frequency of the bandstop filter is adjusted to around 100kHz, and the bandwidth of the filter is adjusted according to the bandwidth of the noise to maximize the suppression of the noise in this frequency band.
[0090] Step S240: Input the filtered multi-channel signal samples to a signal feature extractor, and separate the effective signal component from the residual noise component by using a peak detection algorithm and a mean shift algorithm.
[0091] In this embodiment, some residual noise may still exist in the multi-channel signal samples after being filtered by the band-stop filter. The signal feature extractor uses a peak detection algorithm to identify peak points in the signal, which often correspond to important features in the signal, such as the start bit or stop bit in data transmission. At the same time, the mean shift algorithm can distinguish between valid signals and noise based on the mean change of the signal. For example, for the signal of the data pin, the mean of the valid signal is relatively stable and fluctuates within a certain range, while noise will cause irregular changes in the signal mean. Through these two algorithms, the valid signal component and the residual noise component can be accurately separated, thereby obtaining purer signal data for subsequent analysis, such as extracting parameters such as the noise suppression ratio, phase offset, and number of data retransmissions in the reconnection synchronization signal.
[0092] In a possible implementation, step S143 includes: Step S1431, construct a standard test data packet including an increasing sequence number, a pseudo-random data block and a cyclic redundancy check code, and send a check data sequence corresponding to the standard test data packet to the data channel of the non-standard Type-C interface at a preset sending interval.
[0093] In this process, in order to fully test the performance of the data channel, the standard test data packet is first used. The increasing sequence number is used to ensure the order of the data packet. Each data packet has a unique and increasing number, for example, starting from 1 and increasing in sequence to the number required for the test. The pseudo-random data block simulates the data content in the actual data transmission. Its randomness can cover various possible data combinations to fully test the data channel's transmission capacity for different data. The cyclic redundancy check code (CRC) is an important error detection code used to verify whether an error occurs in the data packet during transmission at the receiving end. Assuming that the CRC-32 check code is used, it can calculate the data block and generate a 32-bit check value attached to the end of the data packet. According to the preset sending interval, for example, a check data sequence corresponding to such a standard test data packet is sent every 1 millisecond to the data channel of the non-standard Type-C interface.
[0094] Step S1432, deploying a data packet listener at the receiving end of the non-standard Type-C interface, and recording the arrival time, sequence number integrity and check code matching status of each received standard test data packet through the data packet listener.
[0095] When the data packet arrives at the receiving end, for each standard test data packet received, the data packet listener records its arrival time, which is the time from the beginning of the data packet sending to the receiving end receiving it, and is recorded with nanosecond accuracy. At the same time, the sequence number integrity is checked to ensure that the sequence numbers of the received data packets are incremented in sequence, without skipping numbers or duplicate numbers. For example, if 100 data packets are sent, the receiving end should receive the data packets with the correct sequence numbers in the order of 1-100. The checksum matching status is also strictly checked. The receiving end recalculates the CRC-32 checksum based on the content of the received data packet (including the pseudo-random data block) and compares it with the checksum attached to the data packet.
[0096] Step S1433, calculating the one-way transmission delay according to the sending interval and the arrival time to obtain the response delay of the data channel, and counting the occurrence position and interval of the packet loss event according to the sequence number integrity.
[0097] For example, the sending time of the 10th data packet is 10 milliseconds (because a data packet is sent every 1 millisecond), and the receiving end records its arrival time as 12 milliseconds, then the one-way transmission delay of the data packet is 12-10=2 milliseconds. This calculation is performed for all received data packets to obtain the response delay of the data channel. When checking the integrity of the sequence number, if it is detected that the sequence numbers of the received data packets are not continuously increasing, for example, data packets with sequence numbers 8, 10, and 11 are received, then it can be determined that a packet loss event has occurred, and the location of the packet loss is the packet with sequence number 9, and the packet loss interval can be calculated based on the sequence numbers of the data packets received before and after. If multiple packet loss events occur, the overall distribution of the packet loss events can be counted, including the location of the packet loss and the interval pattern.
[0098] Step S1434, when the check code matching status indicates that the check code does not match, trigger the retransmission request generator to send a retransmission instruction to the sending end, and count the retransmission request frequency and successful response ratio of the retransmission instruction, as well as the bit error rate corresponding to the check code matching status.
[0099] Assume that among the 100 received data packets, the checksums of 5 data packets do not match. When the checksum mismatch is detected, the retransmission request generator is triggered to send a retransmission instruction to the sender. For these 5 data packets that need to be retransmitted, the retransmission request frequency is counted. If a total of 50 retransmission requests occur during the entire test process (assuming that 1000 data packets are sent), the retransmission request frequency is 50 / 1000=5%. After sending the retransmission instruction, the receiver waits for the sender to resend the data packet and counts the number of successful receipt of the correct data packet (i.e., the checksum matches). If 40 out of 50 retransmission requests successfully receive the correct data packet, the successful response ratio is 40 / 50=80%. For data packets with mismatched checksums, the bit error rate needs to be calculated. By comparing the difference between the actual received data in the data packet and the original data from the sender, the bit error rate is calculated according to a specific bit error rate calculation algorithm, such as the ratio of the number of error bits in the data block to the total number of bits. Assume that a data packet with a mismatched checksum contains a total of 1000 bits, of which 10 bits are incorrect, then the bit error rate is 10 / 1000=1%.
[0100] Step S1435: Integrate the one-way transmission delay, packet loss event and retransmission response ratio into a data integrity evaluation matrix, and associate it with the sending batch identifier of the current test data packet.
[0101] For example, a data integrity evaluation matrix is constructed, the rows of which can represent different test data packets or data packet groups, and the columns are parameters such as one-way transmission delay, packet loss events (including information such as packet loss location and interval), and retransmission response ratio. For example, for a group of data packets with a sending batch identifier of 1 (assuming that each group contains 100 data packets), the corresponding rows in the matrix record the average one-way transmission delay of this group of data packets (assuming it is 2 milliseconds), the packet loss event situation (such as packet loss at the 10th data packet), and the retransmission response ratio (assuming it is 80%). In this way, the data integrity of each sending batch can be comprehensively evaluated through the data integrity evaluation matrix, and the data transmission integrity of different batches of data packets can be conveniently queried and analyzed through the sending batch identifier.
[0102] In a possible implementation, when the plugging and unplugging mechanism of the non-standard Type-C interface is controlled to perform a periodic connection-disconnection operation, the method further includes: Step S310, controlling the robotic arm to clamp the plug portion of the non-standard Type-C interface, and performing multiple insertion-extraction cycles at a preset insertion and extraction speed and force.
[0103] When testing the physical connection durability of non-standard Type-C interfaces, a robotic arm is used to simulate the plugging and unplugging operations in actual use. The robotic arm clamps the plug part of the non-standard Type-C interface and operates according to the preset plugging and unplugging speed and force. Assume that the preset plugging and unplugging speed is 1 plugging and unplugging per second, and the force is 1N. Such speed and force are set according to the plugging and unplugging situations that the tablet may encounter in actual use scenarios, such as the approximate operation of users when plugging and unplugging chargers or external devices in daily use. The robotic arm performs multiple plug-in-unplugging cycles according to the setting, for example, 100 such cycles, to fully test the performance changes of the interface after multiple plugging and unplugging.
[0104] Step S320, after each insertion is completed, measure the contact resistance value between the power pin and the ground pin of the non-standard Type-C interface by a contact resistance tester, and record the initial value and stable value of the contact resistance value.
[0105] When the robot completes an insertion operation, the contact resistance tester is used to measure the contact resistance between the power pin and the ground pin of the non-standard Type-C interface. At the moment of insertion, the contact resistance value may have an initial value, which reflects the contact between the pin and the interface when the plug is just inserted. For example, the initial contact resistance value measured after the first insertion is 0.1Ω. Over time, the contact resistance value may change. After a period of stabilization (for example, 10 seconds), the stable value is 0.2Ω measured again. This stable value represents the contact resistance between the pin and the interface under normal connection. For each insertion operation, this measurement and recording process is repeated to obtain a series of initial and stable contact resistance data, which can reflect the impact of plugging and unplugging operations on contact resistance and the change of contact resistance over time.
[0106] Step S330: During each unplugging process, the separation track of the plug and the interface is captured by the camera, and the wear mark distribution of the metal contacts of the plug and the area of foreign matter adhesion are analyzed.
[0107] During the unplugging process, the camera is placed in a suitable position to clearly capture the separation trajectory of the plug and the interface. The captured images are processed through image analysis technology to analyze the distribution of wear marks on the metal contacts of the plug. For example, during the unplugging process, slight scratches may be detected on the edge of the metal contacts of the plug. Information such as the location, length, and depth of these scratches can be obtained through image analysis. At the same time, the area of foreign matter attachment can also be analyzed. Suppose that after a certain unplugging, 0.1 square millimeters of dust is detected on the metal contacts of the plug through image analysis. The above analysis is performed for each unplugging operation, so as to obtain detailed data on the wear of the metal contacts of the plug after multiple plugging and unplugging and the attachment of foreign matter.
[0108] Step S340: input the contact resistance value, wear mark and foreign matter attachment area into a durability prediction model to calculate the expected plug-in life and contact reliability index of the non-standard Type-C interface.
[0109] The durability prediction model is a mathematical model established based on a large amount of experimental data and theoretical analysis. The contact resistance value, wear marks (such as quantitative information such as the length and depth of the scratches), and foreign matter attachment area obtained from each plug-in operation are input into the durability prediction model. The durability prediction model calculates the expected plug-in life and contact reliability index of the non-standard Type-C interface based on the above input data. For example, based on the change trend of the input contact resistance value, the severity of the wear marks, and the size of the foreign matter attachment area, the model calculates that the expected plug-in life of the non-standard Type-C interface is 500 times. The contact reliability index is calculated based on the calculation logic within the model and comprehensively considers various factors to obtain a value representing the contact reliability, which is assumed to be 0.7 (the value is between 0-1, and the higher the value, the higher the contact reliability).
[0110] Step S350: When the expected plug-in life is lower than a preset threshold, the mechanical structure defect level of the interface and the recommended replacement cycle are marked in the verification report.
[0111] Assume that the preset threshold is 1000 plug-in lifespans. If the calculated expected plug-in lifespan is 500 times, which is lower than the preset threshold, the mechanical structure of the non-standard Type-C interface is annotated in the verification report. For example, based on the difference between the expected plug-in lifespan and the preset threshold and the contact reliability index and other factors, the mechanical structure defect level is annotated as a mild defect. At the same time, based on the model analysis and empirical data, a recommended replacement cycle is given. For example, it is recommended to replace after 100 plug-ins to ensure the stability and safety of the tablet when using a non-standard Type-C interface.
[0112] In a possible implementation manner, when the evaluation index is normalized, the method further includes: Step S410, assigning a first weight coefficient to the voltage stability dimension, assigning a second weight coefficient to the data integrity dimension, and assigning a third weight coefficient to the connection durability dimension, wherein the first weight coefficient is greater than the second weight coefficient and the third weight coefficient.
[0113] For example, in the test scenario of the tablet computer and the non-standard Type-C interface, since voltage stability is crucial to the normal charging and operation of the tablet computer, a higher weight coefficient is given to the voltage stability dimension. Assume that the first weight coefficient is 0.5, the second weight coefficient is 0.3, and the third weight coefficient is 0.2. The above weight coefficients can be determined based on the importance of each dimension to the overall performance of the tablet computer.
[0114] Step S420, converting the original evaluation index of each dimension into a standardized value in the range of 0-1, where 0 indicates that it does not meet the standard at all and 1 indicates that it fully meets the standard.
[0115] In the dimension of voltage stability, for example, in the previous test, the measured voltage fluctuation range is from 4.3V to 5.7V (the standard voltage range is 4.5V-5.5V), and the transient response time also has corresponding measured values at certain voltage change points. For the voltage fluctuation range, calculate the degree of deviation from the standard range. The width of the standard range is 5.5V-4.5V=1V, and the width of the actual fluctuation beyond the range is (5.7V-5.5V)+(4.5V-4.3V)=0.4V. Then calculate the standardized value according to the degree of deviation, assuming that the standardized value is 0.6 according to a specific calculation formula (factors such as the proportional relationship between the degree of deviation and the total width), indicating partial compliance with the standard. For the transient response time, it is assumed that the standard transient response time requirement is within 50 milliseconds to fully comply with the standard, and the maximum value of the transient response time at certain voltage change points actually measured is 60 milliseconds. Calculate the standardized value based on the proportion of the transient response time exceeding the standard, assuming that it is 0.8 (indicating that it is relatively close to fully complying with the standard). Taking into account factors such as the voltage fluctuation range and transient response time, the final standardized value of the voltage stability dimension is obtained according to the conventional comprehensive calculation method in the prior art (such as taking the average value or weighted average according to importance, etc.).
[0116] In the dimension of data integrity, take packet loss rate and bit error rate as an example. If in the data transmission test, the packet loss rate is 5% and the bit error rate is 0.1%. Assume that the packet loss rate that fully meets the standard is 0%, and the packet loss rate that does not meet the standard is 10% (this is the assumed limit set based on the acceptable range of data transmission packet loss rate for the tablet). Calculate the standardized value of the packet loss rate according to the linear ratio, that is, (10%-5%) / 10%=0.5. For the bit error rate, assume that the bit error rate that fully meets the standard is 0%, and the bit error rate that does not meet the standard is 1% (also the set limit), and calculate the standardized value of the bit error rate according to a similar method as (1%-0.1%) / 1%=0.9. Then, based on the importance of packet loss rate and bit error rate in data integrity (assuming that packet loss rate is more important), the standardized value of the data integrity dimension is obtained by weighted average and other methods.
[0117] In the dimension of connection durability, for example, the change in contact resistance, it is assumed that the initial contact resistance value is 0.1Ω, the stable contact resistance value is 0.2Ω, and the standard contact resistance stable value is required to be below 0.15Ω to fully comply with the standard. The standardized value is calculated according to the degree to which the contact resistance value deviates from the standard, and it is assumed that it is 0.6 according to a specific formula. For the expected plug-in life, it is assumed that the test results in an expected plug-in life of 500 times, and the preset plug-in life that fully complies with the standard is 1000 times. The standardized value calculated according to the ratio is 500 / 1000=0.5. Taking into account factors such as contact resistance and expected plug-in life, the standardized value of the connection durability dimension is obtained.
[0118] Step S430, performing weighted summation on the standardized values according to the weight coefficients to obtain a comprehensive performance score of the non-standard Type-C interface.
[0119] For example, according to the weight coefficients set above, the comprehensive performance score = 0.5 × voltage stability dimension standardized value + 0.3 × data integrity dimension standardized value + 0.2 × connection durability dimension standardized value. Assuming that the voltage stability dimension standardized value is 0.6, the data integrity dimension standardized value is 0.8, and the connection durability dimension standardized value is 0.5, then the comprehensive performance score = 0.5 × 0.6 + 0.3 × 0.8 + 0.2 × 0.5 = 0.64.
[0120] Step S440, when the comprehensive performance score is lower than the preset qualified line, a three-level alarm mechanism is triggered: the first-level alarm indicates a voltage stability defect, the second-level alarm indicates a data integrity defect, and the third-level alarm indicates a connection durability defect.
[0121] Assume that the preset qualified line is 0.8. Since the calculated comprehensive performance score of 0.64 is lower than the qualified line, the alarm mechanism needs to be triggered. Because in this score, the weight of the voltage stability dimension is large and its standardized value is relatively low, the first consideration is whether there is a problem with voltage stability that leads to a low comprehensive score. If the comprehensive performance score is lower than the qualified line due to the evaluation indicators of the voltage stability dimension, then a level 1 alarm is triggered, indicating a voltage stability defect. This means that problems with voltage stability have a greater impact on the overall performance and require focus and repair. If the evaluation indicators of the data integrity dimension mainly cause the comprehensive score to be lower than the qualified line, a level 2 alarm is triggered to indicate a data integrity defect. If the problem of the connection durability dimension is the dominant factor, a level 3 alarm is triggered to indicate a connection durability defect.
[0122] Step S450, dynamically adjusting the generation format of the verification report according to the alarm level, and associating different color identifications and repair priority labels for each alarm level.
[0123] For example, for the first level alarm (voltage stability defect), in the verification report, the test data and analysis results related to voltage stability are placed in a more prominent position, such as being elaborated in detail at the beginning of the report. And the red mark is associated with this alarm level, indicating a serious problem, and the repair priority is set to the highest, prompting relevant personnel to give priority to this problem, because the voltage stability problem may directly affect the normal charging and operation of the tablet computer, and may even cause damage to the device. For the second level alarm (data integrity defect), the corresponding data and analysis results are placed in a less important position in the verification report, and are associated with a yellow mark, indicating a medium-severity problem, and the repair priority is medium, indicating that although there is a problem with data integrity, the impact on the overall performance is slightly smaller than that of the voltage stability problem. For the third level alarm (connection durability defect), the relevant content is placed in a relatively later position in the verification report, and is associated with a blue mark, indicating a relatively minor problem, and the repair priority is low, which means that after dealing with the voltage stability and data integrity problems, if there are resources and time, consider dealing with the connection durability problem.
[0124] In a possible implementation manner, when reverse matching the defect feature model in the standard transmission parameter library according to the original monitoring data to determine the defect probability and location information of the non-standard Type-C interface, the method further includes: Step S510: Loading a historical defect database corresponding to the non-standard Type-C interface model from the standard transmission parameter library, wherein the historical defect database includes defect feature models of known physical defects.
[0125] When determining the defect probability and location information of the non-standard Type-C interface, it is necessary to load the historical defect database corresponding to the non-standard Type-C interface model from the standard transmission parameter library. The historical defect database contains the defect feature models of known physical defects. In the test scenario of tablet computers and non-standard Type-C interfaces, the historical defect database is specially established for this type of interface and the matching tablet devices.
[0126] Step S520, calculating the similarity between the currently detected abnormal voltage fluctuation pattern and the oxidation contact feature, the aged insulation feature and the cold solder pin feature in the defect feature model.
[0127] For example, the abnormal voltage fluctuation pattern detected in the previous voltage stability test is that the voltage fluctuates between 4.3V and 5.7V. This fluctuation pattern needs to be compared with various defect feature models in the historical defect database.
[0128] Step S530: If the similarity between the abnormal voltage fluctuation pattern and the oxidized contact feature exceeds a first threshold, a metal contact oxidation probability and a recommended cleaning solution are generated.
[0129] Assuming that the first threshold is set to 0.8, after a specific similarity calculation algorithm (which may involve comparison of factors such as fluctuation range and fluctuation frequency with the characteristic model of oxidized contacts), it is detected that the similarity between the abnormal voltage fluctuation pattern and the oxidized contact characteristics is 0.9, which exceeds the first threshold. Based on this result, combined with historical data and empirical formulas, the probability of metal contact oxidation is generated. For example, it is concluded that there is an 80% probability that metal contacts will be oxidized. At the same time, a recommended cleaning solution is given, such as using a professional electronic equipment cleaning fluid and a clean, non-static wiping cloth to gently wipe the metal contacts. Avoid mechanical damage to the contacts during the wiping process, and ensure that the cleaning fluid does not penetrate into the interface and cause short circuits and other problems.
[0130] Step S540: If the similarity between the abnormal voltage fluctuation pattern and the aged insulation feature exceeds a second threshold, an insulation layer aging level and a suggestion to replace the insulation material are generated.
[0131] Assuming the second threshold is 0.7, after calculation, the similarity between the abnormal voltage fluctuation pattern and the aged insulation feature is 0.8, which exceeds the second threshold. Based on this result, based on the corresponding relationship in the historical defect data, the insulation layer aging level is generated, for example, it is judged as mild aging. Then, a suggestion to replace the insulation material is given, such as recommending the use of insulation materials of specific models and specifications for replacement, and strict operating procedures must be followed during the replacement process to ensure the insulation effect after replacement and the overall performance of the interface.
[0132] Step S550: if the similarity between the abnormal voltage fluctuation pattern and the characteristics of the cold-welded pin exceeds a third threshold, the cold-welded pin position is located and a rework process flow chart is generated.
[0133] Assuming that the third threshold is 0.6, when the calculated similarity between the abnormal voltage fluctuation pattern and the feature of the cold-soldered pin is 0.7, the third threshold is exceeded. Through detailed comparison and analysis with the cold-soldered pin feature model, the cold-soldered pin position is located, for example, it is determined that the third pin is more likely to be cold-soldered. Then, based on historical rework data and standard operating procedures, a rework process flow chart is generated. The rework process flow chart shows in detail the entire process from disassembling the device casing, locating the cold-soldered pins, re-soldering to assembling the device, including the tools used, welding temperature and time and other key parameters, so that maintenance personnel can perform rework operations according to standard procedures to ensure that the repaired non-standard Type-C interface can work normally and meet the charging and data transmission requirements of the tablet computer.
[0134] Figure 2The schematic diagram shows exemplary hardware and software components of the interface data transmission verification system 100 provided by some embodiments of the present invention that can implement the concept of the present invention. For example, the processor 120 can be used in the interface data transmission verification system 100 and used to perform the functions of the present invention.
[0135] The interface data transmission verification system 100 can be a general server or a special-purpose server, both of which can be used to implement the non-standard Type-C interface data transmission fast verification method of the present invention. Although the present invention only shows one server, for convenience, the functions described in the present invention can be implemented in a distributed manner on multiple similar platforms to balance the processing load.
[0136] For example, the interface data transmission verification system 100 may include a network port 110 connected to a network, one or more processors 120 for executing program instructions, a communication bus 130, and storage media 140 in different forms, such as a disk, ROM, or RAM, or any combination thereof. Exemplarily, the interface data transmission verification system 100 may also include program instructions stored in ROM, RAM, or other types of non-temporary storage media, or any combination thereof. The method of the present invention can be implemented according to these program instructions. The interface data transmission verification system 100 also includes an input / output (I / O) interface 150 between the computer and other input / output devices.
[0137] For ease of explanation, only one processor is described in the interface data transmission verification system 100. However, it should be noted that the interface data transmission verification system 100 in the present invention may also include multiple processors, so the steps performed by one processor described in the present invention may also be performed jointly or individually by multiple processors. For example, if the processor of the interface data transmission verification system 100 performs step A and step B, it should be understood that step A and step B may also be performed jointly by two different processors or individually in one processor. For example, the first processor performs step A, the second processor performs step B, or the first processor and the second processor perform steps A and B together.
[0138] In addition, an embodiment of the present invention further provides a readable storage medium, in which computer executable instructions are preset. When a processor executes the computer executable instructions, the above-mentioned method for rapid verification of data transmission of a non-standard Type-C interface is implemented.
[0139] It should be noted that in order to simplify the description of the present invention and thus help understand one or more embodiments of the invention, in the foregoing description of the embodiments of the present invention, various features are sometimes combined into one embodiment, drawing or description thereof.
Claims
1. A method for rapid verification of data transmission of a non-standard Type-C interface, characterized in that: The method comprises: Obtain a verification request triggered when the target device accesses a non-standard Type-C interface, wherein the verification request includes a physical connection status identifier of the interface to be verified and a current transmission mode parameter, wherein the current transmission mode parameter is used to indicate a status parameter in the current transmission mode; Based on the physical connection state identifier, extracting the real-time signal characteristics of the non-standard Type-C interface in the current transmission mode from a preset signal acquisition module, wherein the real-time signal characteristics include a voltage fluctuation sequence, a current change trajectory, and a data packet transmission interval distribution; Dynamically matching the real-time signal feature with a preset standard transmission parameter library to generate a test instruction set for the non-standard Type-C interface, the test instruction set comprising a plurality of groups of verification actions sorted by priority and corresponding trigger condition thresholds; Calling the verification action in the test instruction set, performing phased signal injection and feedback capture on the non-standard Type-C interface, and recording the execution result of each verification action and the corresponding timing mark; A verification report is generated based on the execution result and the timing mark, and abnormal nodes in the verification report that do not meet the preset transmission stability index are mapped to a physical structure defect description of the non-standard Type-C interface.
2. The method for rapid verification of data transmission of a non-standard Type-C interface according to claim 1, characterized in that: The extracting, based on the physical connection state identifier, the real-time signal feature of the non-standard Type-C interface in the current transmission mode from a preset signal acquisition module includes: When the physical connection status identifier indicates a first connection state, activating the high-speed sampling unit in the signal acquisition module, collecting the initial handshake signal of the non-standard Type-C interface at a preset first sampling frequency, and extracting the voltage rising slope, current steady-state value and handshake protocol response time in the initial handshake signal; When the physical connection state identifier indicates a reconnection state, switch to the anti-interference sampling unit in the signal acquisition module, collect the reconnection synchronization signal of the non-standard Type-C interface at a preset second sampling frequency, and extract the noise suppression ratio, phase offset and number of data retransmissions in the reconnection synchronization signal; Combine and analyze the extracted parameters of the initial handshake signal or the reconnection synchronization signal with the current transmission mode parameters to generate the real-time signal feature including a timestamp; The first sampling frequency is higher than the second sampling frequency, and the anti-interference sampling unit is configured with a dynamic filtering algorithm to eliminate residual noise from historical connections.
3. The method for rapid verification of data transmission of a non-standard Type-C interface according to claim 1, characterized in that: The dynamically matching the real-time signal characteristics with a preset standard transmission parameter library to generate a test instruction set for the non-standard Type-C interface includes: Loading a reference signal template corresponding to the current transmission mode parameters from the standard transmission parameter library, the reference signal template including a standard voltage range, an allowable current threshold, and a data packet integrity check rule; Compare the voltage fluctuation sequence in the real-time signal feature with the standard voltage range point by point, and calculate the duration and amplitude deviation of the abnormal voltage point exceeding the standard voltage range; Performing segmented fitting of the current change trajectory and the allowable current threshold to identify the current over-limit area and the corresponding load fluctuation mode; Perform time-sequential correlation between the data packet transmission interval distribution and the data packet integrity check rule, and count the packet loss rate, disorder times and check failure events; Based on the statistical results of the abnormal voltage points, current exceeding limit areas and verification failure events, a matching difference matrix including weight scores is generated, and multiple groups of verification actions sorted by priority and corresponding trigger condition thresholds are generated according to the weight scores to obtain a test instruction set.
4. The method for rapid verification of data transmission of a non-standard Type-C interface according to claim 1, characterized in that: The calling of the verification action in the test instruction set to perform phased signal injection and feedback capture on the non-standard Type-C interface includes: Selecting target verification actions from the test instruction set in sequence according to the priority order of the verification actions, and parsing the trigger condition thresholds corresponding to the target verification actions; When the target verification action belongs to the voltage stability test type, a step voltage waveform is injected into the power pin of the non-standard Type-C interface, and the transient response and voltage drop recovery time of the feedback current are simultaneously monitored; When the target verification action belongs to the data integrity test type, a preset verification data sequence is sent to the data channel of the non-standard Type-C interface, and the response delay, bit error rate and retransmission request frequency of the data channel are captured; When the target verification action belongs to the physical connection durability test type, the plug-in mechanism of the non-standard Type-C interface is controlled to perform periodic connection-disconnection operations, and the contact resistance change and signal attenuation rate after each operation are recorded; After each target verification action is executed, the monitoring data is compared with the trigger condition threshold in real time. If the trigger condition threshold is exceeded, the subsequent verification action is terminated and marked as a critical fault node.
5. The method for rapid verification of data transmission of a non-standard Type-C interface according to claim 1, characterized in that: The generating of the verification report based on the execution result and the timing mark, and mapping the abnormal nodes in the verification report that do not meet the preset transmission stability index to the physical structure defect description of the non-standard Type-C interface, includes: Integrate the execution results of each verification action into a multidimensional data set according to time series marks, wherein the multidimensional data set includes evaluation indicators of voltage stability dimension, data integrity dimension and connection durability dimension; Normalizing the evaluation indicators and calculating a comprehensive score for each dimension based on a preset transmission stability weight coefficient; Identify the target dimension whose comprehensive score is lower than the preset qualified threshold, and extract the original monitoring data and execution environment parameters of the corresponding target dimension; Reverse matching the defect feature model in the standard transmission parameter library according to the original monitoring data to determine the defect probability and location information of the non-standard Type-C interface; The defect probability and location information are converted into a readable physical structure defect description and associated with the abnormal node coordinates and repair suggestions in the verification report.
6. The method for rapid verification of data transmission of a non-standard Type-C interface according to claim 2, characterized in that: When the high-speed sampling unit in the signal acquisition module is activated, or when the anti-interference sampling unit in the signal acquisition module is switched, the method further includes: A multi-channel parallel acquisition circuit is configured in the high-speed sampling unit, and independent signal traces of the power pin, ground pin and data pin of the non-standard Type-C interface are captured; Allocate an independent buffer queue for each signal trace, and poll and read the buffer queue according to the first sampling frequency to generate time-aligned multi-channel signal samples; An adaptive noise canceller is embedded in the anti-interference sampling unit, the current environmental noise spectrum is predicted according to the historical connection record of the non-standard Type-C interface, and the center frequency and bandwidth of the band-stop filter are dynamically adjusted; The filtered multi-channel signal samples are input into the signal feature extractor, and the effective signal components and residual noise components are separated by the peak detection algorithm and the mean shift algorithm.
7. The method for rapid verification of data transmission of a non-standard Type-C interface according to claim 4, characterized in that: The sending of a preset verification data sequence to the data channel of the non-standard Type-C interface and capturing the response delay, bit error rate and retransmission request frequency of the data channel includes: Constructing a standard test data packet including an increasing sequence number, a pseudo-random data block, and a cyclic redundancy check code, and sending a verification data sequence corresponding to the standard test data packet to the data channel of the non-standard Type-C interface at a preset sending interval; Deploy a data packet listener at the receiving end of the non-standard Type-C interface, and record the arrival time, sequence number integrity and check code matching status of each received standard test data packet through the data packet listener; Calculate the one-way transmission delay according to the sending interval and the arrival time to obtain the response delay of the data channel, and count the occurrence position and interval of the packet loss event according to the sequence number integrity; When the check code matching status indicates that the check code does not match, the retransmission request generator is triggered to send a retransmission instruction to the sending end, and the retransmission request frequency and successful response ratio of the retransmission instruction, as well as the bit error rate corresponding to the check code matching status are counted; The one-way transmission delay, packet loss event and retransmission response ratio are integrated into a data integrity evaluation matrix and associated with a sending batch identifier of a current test data packet.
8. The method for rapid verification of data transmission of a non-standard Type-C interface according to claim 4, characterized in that: When the plugging and unplugging mechanism of the non-standard Type-C interface is controlled to perform a periodic connection-disconnection operation, the method further includes: Controlling the robotic arm to clamp the plug portion of the non-standard Type-C interface and perform multiple insertion-extraction cycles at a preset insertion and extraction speed and force; After each insertion is completed, the contact resistance value between the power pin and the ground pin of the non-standard Type-C interface is measured by a contact resistance tester, and the initial value and stable value of the contact resistance value are recorded; During each unplugging process, the camera captures the separation track of the plug and the interface, and analyzes the wear trace distribution of the metal contacts of the plug and the area of foreign matter adhesion; Inputting the contact resistance value, wear mark and foreign matter attachment area into a durability prediction model to calculate the expected plug-in life and contact reliability index of the non-standard Type-C interface; When the expected plug-in life is lower than a preset threshold, the mechanical structure defect level of the interface and the recommended replacement cycle are marked in the verification report.
9. The method for rapid verification of data transmission of a non-standard Type-C interface according to claim 5, characterized in that: When the evaluation index is normalized, the method further includes: Assigning a first weight coefficient to the voltage stability dimension, assigning a second weight coefficient to the data integrity dimension, and assigning a third weight coefficient to the connection durability dimension, wherein the first weight coefficient is greater than the second weight coefficient and the third weight coefficient; The original evaluation index of each dimension is converted into a standardized value in the range of 0-1, where 0 means that it does not meet the standard at all and 1 means that it fully meets the standard; Performing weighted summation on the standardized values according to the weight coefficients to obtain a comprehensive performance score of the non-standard Type-C interface; When the comprehensive performance score is lower than the preset qualified line, a three-level alarm mechanism is triggered: the first-level alarm indicates a voltage stability defect, the second-level alarm indicates a data integrity defect, and the third-level alarm indicates a connection durability defect; The generation format of the verification report is dynamically adjusted according to the alarm level, and different color identification and repair priority labels are associated with each alarm level.
10. The method for rapid verification of data transmission of a non-standard Type-C interface according to claim 9, characterized in that: When reverse matching the defect feature model in the standard transmission parameter library according to the original monitoring data to determine the defect probability and location information of the non-standard Type-C interface, the method further includes: Loading a historical defect database corresponding to the non-standard Type-C interface model from the standard transmission parameter library, the historical defect database containing defect feature models of known physical defects; Calculate the similarity between the abnormal voltage fluctuation mode currently detected and the oxidation contact feature, the aged insulation feature and the cold solder pin feature in the defect feature model; If the similarity between the abnormal voltage fluctuation pattern and the oxidized contact feature exceeds a first threshold, a metal contact oxidation probability and a recommended cleaning solution are generated; If the similarity between the abnormal voltage fluctuation pattern and the aged insulation feature exceeds a second threshold, an insulation layer aging level and a suggestion to replace the insulation material are generated; If the similarity between the abnormal voltage fluctuation pattern and the feature of the cold-welded pin exceeds a third threshold, the cold-welded pin position is located and a rework process flow chart is generated.
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