SOC (system on chip) burning method for USB (universal serial bus) interface and burner device

Abstract

The invention provides an SOC chip burner device and method for a USB interface, the burner device comprises a power supply module, a burning control module, a to-be-burnt clamp, a mode generation module, a USB host controller module and a storage module, and the to-be-burnt clamp is configured to be used for connecting an SOC chip to be burnt and the burner device; the power supply module is configured to provide power supply voltage for the SOC chip to be burnt through a power supply bus VBUS; the mode generation module is configured to output a specific mode signal to the DP and DM pins in a specific time window after power is supplied to the SOC chip; the USB host controller module is configured to be used for detecting a USB equipment connection signal sent by the SOC chip and communicating with the SOC chip to be burnt through a default address and a control endpoint of USB equipment; the burning control module is configured to control the burning process so as to send a command and data to be burnt to the SOC chip to be burnt through the USB host controller module.

Description

Technical Field

[0001] The present disclosure relates to the field of SOC (System on Chip) programming methods, and particularly to an SOC programming method and a programmer device for a USB interface. Background Art

[0002] An SOC (System on Chip) is a micro-system-level integrated circuit that integrates core modules such as a CPU, a memory, and a communication interface, and includes both a hardware architecture and an embedded software algorithm. Currently, with the development of technology, the technology update speed in the consumer electronics industry is getting faster and faster, and the requirement for the cost performance of products is also getting higher and higher. For some 2.4G wireless receivers, such as products with a USB interface like Bluetooth receivers and WIFI receivers, on the one hand, solution providers and customers hope that the products can be as cheap as possible, and on the other hand, customers hope that the products are convenient for programming and the product quality can be guaranteed. Therefore, for consumer-grade products with a small size and a radio frequency antenna, a radio frequency SOC chip with a USB interface is generally used. The solution provider configures the SOC chip with a matching circuit, etc. into a standard SOC chip semi-finished product with a USB interface. After the end customer puts forward detailed requirements, the solution provider first develops a firmware that meets the customer's needs through a development board, and uses a programmer to burn the corresponding firmware into the memory of the SOC chip in the semi-finished product through the USB interface, so as to quickly meet the needs of the end customer.

[0003] Currently, an existing technical solution for programming an SOC chip is that when the SOC chip is designed, the bootloader (boot loader) program is solidified in the memory of the SOC chip. When programming the semi-finished product, the SOC chip first executes the bootloader program after power-on. The bootloader code enumerates the semi-finished SOC chip as a USB device, and communicates with the programmer through the data endpoint of the enumerated USB device, thereby realizing the programming of the SOC chip. One problem with this programming method is that the bootloader program needs to be stored in the SOC chip, which will significantly increase the cost of the SOC chip itself. Another problem is that during programming, the bootloader needs to first enumerate the USB device, and wait until the USB device enumeration is completed before programming can be performed. This process will increase the programming time and thus increase the production cost. Summary of the Invention

[0004] The present invention provides a method for burning an SOC and a corresponding burner device to reduce the cost of the SOC chip and improve the competitiveness of the chip. According to the method of the present invention, when the receiver of the SOC chip semi-finished product is inserted into the fixture of the burner device, the burner device powers on the receiver of the SOC chip semi-finished product through the power supply bus VBUS. Within a time window after the power supply is stable, the burner device loads a specific pattern to the SOC chip through the DP and DM pins of the USB interface. After the SOC chip detects the specific pattern within this time window, the hardware of the SOC chip sets the USB device address to the default address and enables the USB device connection signal, and then makes the SOC chip enter the burning mode. After the burner device detects the USB device connection signal, it sends commands and data to the SOC chip through the default address and control endpoint of the configured USB device of the burner device. The SOC chip executes the corresponding commands and writes the data to be burned into the memory to be burned, and at the same time returns the corresponding status and data to the burner.

[0005] Embodiments of the present disclosure provide a burner device for an SOC chip with a USB interface, including: a power supply module, a burning control module, a fixture to be burned, a pattern generation module, a USB host controller module, and a storage module. Among them, the fixture to be burned is configured to connect the SOC chip to be burned and the burner device, and at least includes a power supply bus VBUS, DP and DM pins, and a ground wire GND; the power supply module is configured to provide a power supply voltage to the SOC chip to be burned through the power supply bus VBUS; the pattern generation module is configured to output a specific pattern signal to the DP and DM pins within a specific time window after powering on the SOC chip; the USB host controller module is configured to detect the USB device connection signal sent by the SOC chip and communicate with the SOC chip to be burned through the default address and control endpoint of the USB device; the burning control module is configured to control the burning process, so that after the USB host controller module detects the USB device connection signal, based on the configuration information obtained from the storage module and the firmware to be burned cached, it sends commands and data to be burned to the SOC chip to be burned through the USB host controller module to start the burning process, and receives the status information and data fed back by the SOC chip.

[0006] Embodiments of the present disclosure provide a burner device for an SOC chip with a USB interface, wherein the DP and DM pins are configured as communication interfaces for communicating with the SOC chip to be burned.

[0007] Embodiments of the present disclosure provide a burner device for an SOC chip with a USB interface, wherein the fixture to be burned further includes an access detection module, and the access detection module is configured to detect the insertion of the SOC chip to be burned.

[0008] Embodiments of the present disclosure provide a SOC chip programmer device for a USB interface. Among them, according to the detection of the access of the SOC chip to be programmed, the DP and DM pins are configured in the GPIO function mode, and among them, the specific mode signal is set in the GPIO function mode.

[0009] Embodiments of the present disclosure provide a SOC chip programmer device for a USB interface. Among them, the specific mode signal is set as a 16-bit mode signal.

[0010] Embodiments of the present disclosure provide a SOC chip programmer device for a USB interface. Among them, after the DP and DM pins output the specific mode signal, they are configured in the USB data line mode, and among them, in the USB data line mode, commands and data to be programmed are sent through the DP and DM pins, and the status and data feedback from the SOC chip are received through the DP and DM pins.

[0011] Embodiments of the present disclosure provide a SOC chip programmer device for a USB interface. Among them, after the SOC chip detects the specific mode signal within a specific time window, the USB device connection signal is detected through the DP and DM pins.

[0012] Embodiments of the present disclosure provide a SOC chip programmer device for a USB interface, further including a status indication and alarm module, which is configured to indicate the programming status and result of the SOC chip to be programmed, and issue an alarm if the programming fails.

[0013] Embodiments of the present disclosure provide a SOC chip programmer device for a USB interface. Among them, the programming process includes an erasing stage, a programming stage, and a verification stage.

[0014] Embodiments of the present disclosure provide a programming method for a SOC chip programmer device for a USB interface, including: detecting the insertion of a semi-finished SOC chip to be programmed; supplying power to the semi-finished SOC chip through the power supply bus VBUS; after supplying power for a specific time, sending a specific mode signal through the DP and DM leads within a specific time window; determining whether a USB device connection signal is received, and when the USB device connection signal is received, sending commands and programming data to the SOC chip to be programmed through the default address and control endpoint of the USB device of the programmer device, and receiving the status information and data feedback from the SOC chip.

[0015] Embodiments of the present disclosure provide a programming method for a SOC chip programmer device for a USB interface. The DP and DM pins are configured as a communication interface for communicating with the SOC chip to be programmed.

[0016] Embodiments of the present disclosure provide a programming method for a programming device of a SOC chip for a USB interface, wherein the USB device connection signal is generated through the DP or DM pin after the SOC chip detects a specific pattern signal in a specific time window.

[0017] Embodiments of the present disclosure provide a programming method for a programming device of a SOC chip for a USB interface, wherein a specific pattern signal is sent through the DP and DM pins in the GPIO function mode, and wherein, in the USB data line mode, commands and data to be programmed are sent through the DP and DM pins, and the status and data fed back by the SOC chip are received through the DP and DM pins.

[0018] Embodiments of the present disclosure provide a programming method for a programming device of a SOC chip for a USB interface, wherein the specific pattern signal is set as a 16-bit pattern signal.

[0019] Through the programming device and method of the SOC chip proposed by the present disclosure, the bootloader program in the prior art is innovatively removed in the SOC chip design stage. By setting a programming mode in the SOC chip programming and cooperating with the programming device in the present invention, the programming commands and data are transmitted through the default address and control endpoint of the USB device, reducing the cost of the chip, simplifying the programming process, and shortening the programming time. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The drawings are not necessarily drawn to scale. In all the drawings, for the purpose of illustration, elements of similar structure or function are generally denoted by the same reference numerals or parts thereof. The drawings are merely for facilitating the description of the various embodiments described herein. The drawings do not depict every aspect of the teachings disclosed herein and do not limit the scope of the claims. To prevent the drawings from becoming blurred, not all components, connections, etc. are shown, and not all components have reference numerals. However, the pattern of the component configuration can be easily seen from the drawings. The drawings, together with the description, illustrate example embodiments of the present disclosure and are used together with the description to explain the principles of the present disclosure. From the following description in conjunction with the drawings, the above and other aspects, features, and advantages of certain embodiments of the present disclosure will become more apparent, wherein:

[0021] Figure 1 A schematic diagram of an example programming device according to an embodiment of the present disclosure is shown;

[0022] Figure 2 is a flowchart of a SOC chip programming method executed by a programming device according to an embodiment of the present invention;

[0023] Figure 3It is a flowchart of an SOC chip programming method executed at a semi-finished SOC chip to be programmed according to an embodiment of the present invention;

[0024] Figure 4 It is a schematic diagram showing a specific pattern signal according to an embodiment of the present invention; and

[0025] Figure 5 It is a schematic diagram showing the programming process of an SOC chip according to an embodiment of the present invention. Detailed implementation manners

[0026] Before proceeding with the following detailed description, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document. The terms "coupled," "connected," and their derivatives refer to any direct or indirect communication or connection between two or more elements, whether or not those elements are in physical contact with each other. The terms "transmit," "receive," and "communicate," and their derivatives, cover both direct and indirect communication. The terms "comprise" and "include," and their derivatives, mean including but not limited to. The term "or" is inclusive, meaning and / or. The phrases "associated with," "corresponding to," and their derivatives mean including, included within, interconnected, contained in, contained within, connected or connected to, coupled or coupled to, communicating with, cooperating with, interlacing, juxtaposing, adjacent to, bound or bound to, having, having an attribute, having a relationship, or having a relationship with, etc. The term "controller" refers to any device, system, or part thereof that controls at least one operation. Such a controller can be implemented in hardware, or in a combination of hardware and software and / or firmware. The functions associated with any particular controller may be centralized or distributed, whether local or remote. The phrase "at least one," when used with a list of items, means that different combinations of one or more of the listed items can be used, and it may only be necessary to have one item in the list. For example, "at least one of A, B, C" includes any of the following combinations: A, B, C, A and B, A and C, B and C, A and B and C.

[0027] Definitions of other specific words and phrases are provided throughout this patent document. Those of ordinary skill in the art should understand that, in many cases, if not most cases, such definitions apply to the prior and future use of the words and phrases so defined.

[0028] In this patent document, the application combinations of modules and the hierarchical division of sub-modules are only for illustration. Without departing from the scope of the present disclosure, the application combinations of modules and the hierarchical division of sub-modules can have different forms. The embodiments of the present disclosure can be implemented in different forms and should not be construed as being limited to the embodiments described herein. On the contrary, these embodiments are provided to make the present disclosure thorough and complete and to fully convey exemplary implementation manners to those skilled in the art. The embodiments of the present disclosure can be combined arbitrarily to form additional embodiments.

[0029] In the present disclosure, terms such as programs, routines, tasks, etc. can refer to each other.

[0030] Currently, the existing technical solution for burning SOC chips is that when designing the SOC chip, a bootloader program with USB interface function is designed in advance. When producing the SOC chip, the bootloader program is solidified in the storage area inside the SOC chip. When the SOC chip becomes a semi-finished product and needs to be burned, after inserting the semi-finished SOC chip into the fixture of the burner, the burner powers on the SOC chip through the power supply bus VBUS. After the SOC chip is powered on, it first executes the bootloader program. The bootloader program first enumerates the semi-finished SOC chip as a USB device, and then communicates with the burner through the data endpoints of the USB device. The bootloader program receives commands and data to be burned from the burner, executes relevant commands to burn the data to be burned into the storage area to be burned of the SOC chip, and returns relevant status and corresponding data.

[0031] The existing technology has the following two problems: 1) When producing the chip, it is necessary to pre-solidify the bootloader program firmware into the memory of the SOC chip, which requires an additional storage space for storing the bootloader program. In addition, it is necessary to add the step of solidifying the bootloader program into the memory, thus increasing the cost of the SOC chip itself and the production cost; 2) In the burning link of the semi-finished SOC chip, the semi-finished SOC chip needs to execute the bootloader program, enumerate the semi-finished SOC chip as a USB device before it can communicate with the burner for burning. This process increases the burning time of the semi-finished SOC chip, and thus increases the production cost.

[0032] To solve the above problems, when designing the SOC chip, the present invention removes the bootloader program of the SOC chip. Instead, a specific programming pattern signal is added to the SOC chip. After detecting this specific programming pattern signal, communication is carried out with the programming device through the default address and control endpoint of the USB device to achieve the programming of the SOC chip.

[0033] Since in this programming pattern, only the command parsing part and related command execution units in the bootloader program function need to be implemented, various descriptors and the USB protocol stack in the bootloader are omitted, reducing the implementation cost. At the same time, the chip production process is simplified, the programming time of semi-finished products is shortened, the total product cost is reduced, and the product cost performance and competitiveness are improved.

[0034] Next, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0035] Figure 1 The figure shows a schematic diagram of an exemplary programming device according to an embodiment of the present disclosure.

[0036] As Figure 1 shown, the programming device 100 is connected to the SOC chip semi-finished product 200 to be programmed through the programming fixture 103. The programming fixture 103 is configured to be compatible with the USB interface and includes a power supply bus VBUS, DP and DM pins, and a ground wire GND therein.

[0037] The programming device 100 may include: a power supply module 101, a programming control module 102, a programming fixture 103, a pattern generation module 104, a USB host controller module 105, a status indication and alarm module 106, a storage module 107, and a main control module 108.

[0038] The power supply module 101 is configured to connect the 5V power supply on the programming board to the power supply bus VBUS of the programming fixture 103 through a switch, and the switch can be configured to be controlled to conduct and turn off by the main control module 108.

[0039] The programming control module 102 is configured to send commands and data to be programmed to the SOC chip semi-finished product to be programmed through the default address and control endpoint of the USB device of the programming device; and receive the status and data fed back by the SOC chip.

[0040] The programming fixture 103 is configured to connect the SOC chip semi-finished product 200 to be programmed and the programming device 100, and includes an access detection module for detecting the access (insertion) of the SOC chip semi-finished product to be programmed.

[0041] According to an embodiment of the present invention, the fixture 103 to be programmed is configured to at least include a power supply bus VBUS, DP and DM pins, and a ground wire GND.

[0042] For example, according to an embodiment of the present invention, the fixture 103 to be programmed can be configured as a female socket of a USB-A port for small-batch manual programming; or it can also be configured as a mechanical probe for large-batch automatic programming. The access detection module is configured to be located on the fixture 103 to be programmed. When the fixture 103 is a female socket of a USB-A port, it is configured as a pair of infrared phototransistors installed with openings up and down (or left and right) of the female socket. When the semi-finished SOC chip to be programmed is not inserted into the female socket, the receiving transistor in the infrared phototransistor can receive the signal sent by the transmitting transistor, and when the semi-finished SOC chip to be programmed is inserted into the female socket, due to occlusion, the receiving transistor in the infrared phototransistor cannot receive the signal, thereby generating a signal for detecting the insertion of the semi-finished SOC chip to be programmed and sending it to the main control module 108. When the fixture 103 is configured as a mechanical probe, the access detection module is configured as a pressure sensor installed on the probe. When the semi-finished SOC chip to be programmed is inserted, the pressure sensor generates a signal for detecting the insertion of the semi-finished SOC chip to be programmed and sends it to the main control module 108.

[0043] The pattern generation module 104 is configured to output signals representing a specific pattern to the DP and DM pins in the USB interface within a specific time window.

[0044] The USB host controller module 105 is configured to: detect the USB device connection signal sent by the SOC chip through the USB interface, and detect the disconnection signal when the semi-finished SOC chip to be programmed is removed.

[0045] According to an embodiment of the present invention, after the USB host controller module 105 detects the USB device connection signal sent by the SOC chip through the USB interface, the programmer device 100 sends commands and programming data to the SOC chip to be programmed according to the configuration information obtained from the storage module 107 and the cached firmware to be programmed. The relevant commands and data are sent through the default address and control endpoint of the USB device of the programmer device.

[0046] According to an embodiment of the present invention, when the burned SOC chip is removed from the fixture 103 to be burned, the USB host controller module 105 of the burner device 100 is configured to detect a disconnection signal indicating the disconnection of the USB interface. When the disconnection signal is detected, the burner device 100 first disconnects the switch of the power supply module 101; secondly, turns off all the status indicator lights and the buzzer of the status indication and alarm module 106; then turns off the function of the USB host controller module 105, and switches the DP and DM pins to the GPIO (general-purpose input / output interface) mode; finally, resets all the state machines of the programs in the burner device 100 and waits for the access of the next semi-finished SOC chip to be burned.

[0047] The status indication and alarm module 106 is configured to indicate the burning progress and the burning result of the semi-finished SOC chip to be burned, and issue an alarm if the burning fails.

[0048] According to an embodiment of the present invention, the status indication and alarm module 106 is configured to include 3 LED status indicator lights of different colors (red, green, and blue), and is controlled by the main control module 108 according to the status and data provided by the SOC chip. Before the semi-finished SOC chip 200 to be burned is connected to the fixture 103 to be burned, all the LED lights are turned off. When the semi-finished SOC chip 200 to be burned is connected to the fixture 103 to be burned and the burning starts, the green light (BUSY indicator light) flashes continuously to indicate that the burning is in progress; when the burning is successful, the green light is turned off and the blue light (SUCCESS indicator light) is constantly on to indicate that the burning is successful; when the disconnection signal indicating that the semi-finished SOC chip to be burned is pulled out is detected, the status indicator lights are turned off. When an error occurs during the burning process, the red light (FAIL indicator light) is constantly on. The status indication and alarm module 106 is also configured with a buzzer. After the red light is constantly on when the burning fails, the buzzer emits an alarm sound to warn that the burning fails and prevent the semi-finished SOC chips with failed burning and the semi-finished SOC chips with successful burning from being mixed together. When the semi-finished SOC chip with failed burning is removed, the buzzer is turned off and the status indicator lights are turned off.

[0049] The storage module 107 is configured to store the program firmware and product configuration data to be burned, as well as the burning-related configuration files.

[0050] According to an embodiment of the present invention, the storage module 107 is configured as a TF card. Preferably, after the burner device 100 is powered on, the burn-related configuration file is first parsed from the storage module 107 to obtain burn information (e.g., burn start address, burn block size, etc.). Thereafter, the burn program firmware and product configuration data are copied from the storage module 107 to the RAM of the burner device 100 and verified. If the verification fails, the three status indicator lights of the status indication and alarm module 106 flash simultaneously and the buzzer emits an alarm sound to indicate a storage error. According to an embodiment of the present invention, copying the burn program firmware and product configuration data from the storage module 107 to the RAM is to avoid reading from the storage module 107 during each burn process to accelerate the burn speed.

[0051] The main control module 108 is connected to other modules or components in the burner device 100 through a bus and is configured to control the operations of the components in the burner device 100. For example, according to an embodiment of the present invention, the main control module 108 is configured to control the power-on operation of the power supply module 101 according to the insertion signal of the SOC chip, and control the operation of the status indication and alarm module 106 according to the status and data returned by the SOC chip. However, those skilled in the art should understand that without departing from the scope of the present invention, the main control module 108 can also be configured to control the operations of other modules (e.g., the burn control module 102, the mode generation module 104, or the USB host controller module 105), and can also be combined with other components into a single module. For example, according to an embodiment of the present invention, the main control module 108 can be combined with the burn control module 102. For example, the main control module 108 can be configured by a chip with an ARM Cortex-M3 core.

[0052] Figure 2 is a flowchart of a method for burning an SOC chip executed by a burner device according to an embodiment of the present invention.

[0053] Reference Figure 2 As shown in, in step S201, the insertion of the SOC chip semi-finished product to be burned is detected. According to an embodiment of the present invention, the access detection module of the fixture 103 to be burned is used to detect the access of the SOC chip to be burned. And after detecting the insertion of the SOC chip to be burned, the DP and DM leads in the USB interface of the fixture 103 to be burned are configured into the GPIO function mode.

[0054] After that, in step S202, the power supply module 101 is controlled to supply power to the SOC chip semi-finished product through the power supply bus VBUS of the fixture 103 to be burned, and a timer is started after the power supply.

[0055] In step S203, after the timer counts a specific time (e.g., 10 ms), a specific pattern signal is sent through the DP and DM leads within a specific time window.

[0056] In step S204, after the specific pattern signal is sent through the DP and DM leads, the DP and DM leads are set to the USB data line mode, and the USB device address of the burner device 100 is configured as the default address, waiting for the USB device connection signal.

[0057] In step S205, it is determined whether the USB device connection signal is detected. When the USB device connection signal is detected, in step S206, the burner device 100 sends commands and programming data to the SOC chip to be programmed, and receives relevant status information and data, according to the configuration information obtained from the storage module 107 and the cached firmware to be programmed, by configuring the default address of the USB device address of the USB host controller module 105 and controlling the endpoint. Among them, the default address of the device address is configured as 0.

[0058] Figure 3 It is a flowchart of the SOC chip programming method executed at the semi-finished product of the SOC chip to be programmed according to an embodiment of the present invention.

[0059] Reference Figure 3 In step S301, power is supplied through the VBUS of the power supply bus of the fixture 103 to be programmed.

[0060] In step D302, a specific pattern signal is detected through the DP and DM pins at the detection window (specific time window) after the power supply is stabilized. When the specific pattern signal is detected, in step S303, the programming mode is entered; when the specific pattern signal is not detected, in step S304, the normal working mode is entered.

[0061] In step S305, the USB device address of the SOC chip semi-finished product is set as the default address, the receiving function is enabled, and a USB device connection signal is sent (enabled through a 1.5K pull-up resistor on the DP or DM lead).

[0062] In step S306, commands and data are received through the DP and DM pins on the USB bus.

[0063] After receiving the commands and data, the SOC chip parses and executes the commands and data, and burns the data to be programmed into the area to be programmed of the SOC chip; in addition, the SOC chip returns relevant status and data through the DP and DM pins on the USB bus.

[0064] Figure 4It is a schematic diagram showing a specific pattern signal according to an embodiment of the present invention.

[0065] According to an embodiment of the present invention, a specific pattern signal is provided to the semi-finished SOC chip to be programmed through two pins, DP and DM. In this embodiment, the pattern signal is set as a 16-bit signal. For example, referring to Figure 4 , it is set as the hexadecimal signal 0xACA1.

[0066] Figure 5 It is a schematic diagram showing the programming process of the SOC chip according to an embodiment of the present invention. Referring to Figure 5 , the programming process can be divided into three stages, including an erase stage 501, a programming stage 502, and a verification stage 503.

[0067] When the programmer device detects a USB device connection signal, it sends commands and programming data to the SOC chip to start the programming process.

[0068] First, in the erase stage, an ERASE command is sent to the SOC chip to be programmed. After the command is successfully sent, the GET_STATUS command for obtaining the status is continuously sent. After receiving this command, the SOC chip to be programmed starts to erase the entire area to be programmed. If the GET_STATUS command is received during the erase, the BUSY status is returned to the programmer. If the GET_STATUS command is received after the erase is completed, the execution result, such as SUCCESS or FAIL, is returned to the programmer. If FAIL is returned, the entire programming process ends.

[0069] After the erasure phase ends, the programming process enters the programming phase. In the programming phase, the programming device constructs a programming command according to the programming start address configured in the storage module of the programming device, the size of the programming block of the memory of the SOC chip to be programmed, and the length of the data to be programmed, and sends it to the SOC chip to be programmed. If the length of the data to be programmed is greater than or equal to the length of the programming block, the data length length is set to the length of the programming block; if it is less than the length of the programming block, the data length length is set to the actual length. Then, the firmware data to be programmed is read from the RAM of the programming device and sent to the SOC chip to be programmed through the OUT data phase. After the OUT data phase ends, the programming device continuously sends the GET_STATUS command for status acquisition. After receiving the programming command and data, the SOC chip to be programmed starts programming. If the GET_STATUS command is received during programming, the SOC chip returns the busy (BUSY) status to the programming device; if the GET_STATUS command is received after programming ends, the execution result, such as success (SUCCESS) or failure (FAIL), is returned to the programming device. If FAIL is returned, the entire programming process ends.

[0070] After the execution of a programming command ends, the length of the last programming command is subtracted from the length of the data to be programmed. If the length of the data to be programmed is not zero, the programming address to be programmed is increased by the size of the programming block of the memory of the SOC chip to be programmed, and programming continues according to the above programming method until the length of the data to be programmed is zero, at which point the programming phase ends.

[0071] After the programming phase ends, the verification phase is entered. In the verification phase, the programming device constructs a read command according to the programming start address configured in the storage module of the programming device and the size of the programming block of the memory of the SOC chip to be programmed, and sends it to the SOC chip to be programmed. The SOC chip to be programmed reads the data from the memory and returns it to the programming device through the IN data phase. The programming device compares the read data with that in the RAM. If they are consistent, the next block is read continuously, and the loop operation continues until the entire firmware is completely compared. If there is an inconsistency in the verification phase, it is considered that the programming fails, and the entire programming process ends.

[0072] During the three phases of the programming process, as long as there is no failure (FAIL), the busy (BUSY) indicator light keeps flashing. Once FAIL occurs, the BUSY indicator light goes out, the FAIL indicator light stays on constantly, and the buzzer emits an alarm sound, and the programming process ends. If the verification phase is successful, the success (SUCCESS) indicator light stays on constantly. At this time, whether the programming is successful or fails, the SOC chip to be programmed becomes the programmed SOC chip.

[0073] According to an embodiment of the present invention, in the case of small-batch manual programming, the operator removes the programmed SOC chips according to the results of the status indicator lights and stores them separately by category. In the case of large-batch automatic programming, the programming indication status signal is led out and sent to the automatic control device, and the automatic control device removes and sorts the programmed SOC chips according to the status indication.

[0074] It should be understood that the methods described above in conjunction with various embodiments or figures are merely examples. Embodiments of the present disclosure may also perform any addition, deletion, replacement, or combination of steps or elements in the methods shown above. The steps in the methods in the embodiments of the present disclosure may be executed in parallel and may be executed in any other order not shown herein, which is not limited herein.

[0075] Although the present disclosure has been described with exemplary embodiments, various changes and modifications can be proposed to those skilled in the art. The present disclosure is intended to cover such changes and modifications that fall within the scope of the appended claims.

[0076] Any description in the present disclosure should not be construed as implying that any particular element, step, or function is an essential element that must be included within the scope of the claims. The scope of the patent subject matter is defined only by the claims.

[0077] Exemplary embodiments in accordance with the present disclosure have been disclosed herein, and although specific terms have been employed, they have been used and interpreted in a general and descriptive sense only and not for purposes of limitation. In some cases, features, characteristics, and / or elements described in connection with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in connection with other embodiments, unless otherwise stated. Accordingly, those skilled in the art will appreciate that various changes in form and detail may be made to the present disclosure without departing from the spirit and scope of the claims.

Claims

1. A SOC chip burner device for a USB interface, comprising: A power supply module, a burning control module, a fixture to be burned, a mode generation module, a USB host controller module and a storage module, wherein: The fixture to be burned is configured to connect the SOC chip to be burned and the burner device, and at least includes a power supply bus VBUS, DP and DM pins, and a ground line GND; The power supply module is configured to provide a power supply voltage to the SOC chip to be burned through the power supply bus VBUS; The mode generation module is configured to output a specific mode signal to the DP and DM pins within a specific time window after power is supplied to the SOC chip; The USB host controller module is configured to detect the USB device connection signal sent by the SOC chip, and communicate with the SOC chip to be burned through the default address and control endpoint of the USB device; The burning control module is configured to control the burning process so that after the USB host controller module detects the USB device connection signal, based on the configuration information obtained from the storage module and the cached firmware to be burned, the command and the data to be burned are sent to the SOC chip to be burned through the USB host controller module to start the burning process, and the status information and data fed back by the SOC chip are received.

2. The burner device according to claim 1, wherein: The DP and DM pins are configured as a communication interface for communicating with the SOC chip to be burned.

3. The burner device according to claim 1, wherein: The fixture to be programmed further comprises an access detection module, and the access detection module is configured to detect the insertion of the SOC chip to be programmed.

4. The burner device according to claim 3, wherein: According to the detection of the access of the SOC chip to be burned, the DP and DM pins are configured as GPIO function mode. Wherein, the specific mode signal is set in the GPIO function mode.

5. The burner device according to claim 1, wherein: The specific mode signal is set as a 16-bit mode signal.

6. The burner device according to claim 1, wherein: After the DP and DM pins output specific mode signals, they are configured as USB data line mode, and In the USB data line mode, commands and data to be burned are sent through the DP and DM pins, and the status and data fed back by the SOC chip are received through the DP and DM pins.

7. The burner device according to claim 1, wherein: After the SOC chip detects a specific mode signal in a specific time window, the USB device connection signal is received through the DP and DM pins.

8. The programmer device according to claim 1, further comprising a status indication and alarm module, which is configured to indicate the programming status and programming result of the SOC chip to be programmed, and to issue an alarm if the programming fails.

9. The burner device according to claim 1, wherein: The burning process includes an erasing stage, a burning stage and a verification stage.

10. A method for programming a SOC chip programmer device for a USB interface, comprising: Detect the insertion of the semi-finished SOC chip to be burned; Power the SOC chip semi-finished product through the power supply bus VBUS; After power is supplied for a specific time, a specific mode signal is sent through the DP and DM leads in a specific time window; Determine whether a USB device connection signal is received, and when the USB device connection signal is received, send commands and burning data to the SOC chip to be burned through the default address and control endpoint of the USB device of the burner device, and receive status information and data fed back by the SOC chip.

11. The method according to claim 10, wherein: The DP and DM pins are configured as a communication interface for communicating with the SOC chip to be burned.

12. The method according to claim 10, wherein: The USB device connection signal is received through the DP and DM pins after the SOC chip detects a specific mode signal in a specific time window.

13. The method according to claim 10, wherein: In GPIO function mode, specific mode signals are sent through the DP and DM pins, and In the USB data line mode, commands and data to be burned are sent through the DP and DM pins, and the status and data fed back by the SOC chip are received through the DP and DM pins.

14. The method according to claim 10, wherein: The specific mode signal is set as a 16-bit mode signal.

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