Design method and implementation circuit of discrete local active memristor
By designing discrete local active memristors, using discrete iterative computing model and modular framework, combining sine function and cosine function, the reliability and accuracy problems of continuous model memristors in the precise characterization of biological neurons and digital hardware are solved, and higher adaptability and stability are achieved.
Patent Information
- Application Number
- CN202510533812.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-27
- Publication Date
- 2025-05-27
- Estimated Expiration
- 2045-04-27
AI Technical Summary
The existing continuous model memristors have reliability and accuracy problems when accurately characterizing the discrete activation characteristics of biological neurons and the implementation of digital hardware, and the immature material preparation process leads to insufficient stability.
A discrete local active memristor is designed, and the discrete design and circuit implementation of the memristor are implemented by design based on discrete iterative computing model and modular framework, using sinusoidal function and cosine function as nonlinear function modules.
Improves the reliability and accuracy of the memristor, enhances compatibility with biodiscrete dynamics and adaptability of digital systems.
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Figure CN120046555A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of electronic circuit design, and particularly relates to a design method and implementation circuit of a discrete local active memristor. Background Art
[0002] As the fourth basic circuit element after resistors, capacitors, and inductors, memristors have shown great potential in the fields of neuromorphic computing, chaotic encryption, etc. due to their unique synaptic-like characteristics and non-linear dynamics characteristics.
[0003] At the current stage, the research on memristors mainly focuses on continuous models. However, such continuous models have two key limitations: 1) The essential contradiction between the continuous model and biological discrete dynamics: The action potential firing of biological neurons is driven by discrete events (such as the gating mechanism of ion channels), and continuous models are difficult to accurately describe the discrete activation characteristics required for pulse timing coding; 2) Poor adaptability to digital systems: When continuous models are implemented on digital hardware such as microcontrollers (MCUs), field-programmable gate arrays (FPGAs), etc., discretization approximation is required, and the process of discretization approximation is prone to cumulative quantization errors and distortion of dynamic characteristics. Therefore, the existing continuous model memristors have relatively poor reliability and accuracy.
[0004] In addition, due to the immature material preparation process, the existing memristive devices generally have the defect of insufficient stability; therefore, the technical solutions based on circuit equivalent models have become the mainstream solutions for the current implementation of memristors. Currently, such solutions are mainly divided into two implementation methods: analog circuits and digital circuits; however, no matter which circuit implementation method is used, the existing solutions cannot effectively solve the contradictions between the continuous model and biological discrete dynamics and digital system compatibility. Summary of the Invention
[0005] One of the purposes of the present invention is to provide a design method of a discrete local active memristor with high reliability, good accuracy, and good adaptability.
[0006] Another purpose of the present invention is to provide an implementation circuit of a discrete local active memristor.
[0007] The design method of the discrete local active memristor provided by the present invention includes the following steps: S1. Based on the input voltage, input current, and state variables of the discrete local active memristor in the DC state, determine the discretized iterative operation model of the discrete local active memristor; S2. According to the discretized iterative operation model determined in step S1, determine the modular framework of the discrete local active memristor including a non-linear function module; S3. Based on the modular framework determined in step S2, select non-linear function modules based on sine and cosine functions to complete the design of the discrete local active memristor.
[0008] The said step S1 specifically includes the following steps: The discretized iterative operation form of the discrete local active memristor is expressed as: In the formula is the input voltage at time under DC state; is the output current at time under DC state; is the state variable at time under DC state; is the memductance function; is the non-linear modulation function; is the scaling factor.
[0009] The said step S2 specifically includes the following steps: The modular framework of the discrete local active memristor includes: Implement the iteration of the state variable through the forward difference algorithm; The first non-linear function module is used to implement the memductance function of the discrete local active memristor, and the second non-linear function module is used to implement the non-linear modulation function of the discrete local active memristor; Use a multiplier module to implement the product of the memductance function of the discrete local active memristor and the input voltage; Implement the addition operation through an accumulator module.
[0010] The said step S3 includes the following steps: Based on the modular framework determined in step S2, select sine and cosine functions as non-linear function modules to complete the design of the discrete local active memristor.
[0011] The said step S3 specifically includes the following steps: There are 4 types of the designed discrete local active memristors: Type of discrete local active memristor, expressed as: ; Type of discrete local active memristor, expressed as: ; Type of discrete local active memristor, expressed as: ; A type of discrete locally active memristor, expressed as: ; Wherein a is the first amplitude adjustment coefficient; b is the second amplitude adjustment coefficient; is the first angular frequency adjustment coefficient; is the second angular frequency adjustment coefficient.
[0012] The present invention also provides an implementation circuit for a discrete locally active memristor, including an analog implementation circuit and a digital implementation circuit; Based on a sample and hold circuit, an operational amplifier, and an operational function editor, an analog implementation circuit for a discrete locally active memristor is implemented; Based on a control chip, a digital implementation circuit for a discrete locally active memristor is implemented.
[0013] The described analog implementation circuit specifically includes a staircase wave function generator, a NOT gate, a first sample and hold circuit, a second sample and hold circuit, a first proportional gain amplifier, a second proportional gain amplifier, a first operational function editor, a second operational function editor, a multiplier, a first operational amplifier, a second operational amplifier, a sinusoidal voltage source, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, and a seventh resistor; The negative electrode of the staircase wave function generator is grounded; the positive electrode of the staircase wave function generator is simultaneously connected to the first input terminal of the first sample and hold circuit and the input terminal of the NOT gate; the output terminal of the NOT gate is connected to the first input terminal of the second sample and hold circuit; the second input terminal of the first sample and hold circuit is connected to the output terminal of the second operational amplifier, and the output terminal of the first sample and hold circuit is connected to the second input terminal of the second sample and hold circuit; the output terminal of the second sample and hold circuit is connected to the inverting input terminal of the first operational amplifier through the first resistor, and the output terminal of the second sample and hold circuit is also connected to the inverting input terminal of the first operational amplifier through the serially connected second proportional gain amplifier, second operational function editor, and second resistor, and the output terminal of the second sample and hold circuit is further connected to the second input terminal of the multiplier through the serially connected first proportional gain amplifier and first operational function editor; the negative electrode of the sinusoidal voltage source is grounded, the positive electrode of the sinusoidal voltage source is directly connected to the first input terminal of the multiplier, and the positive electrode of the sinusoidal voltage source is also simultaneously connected to the inverting input terminal of the first operational amplifier through the third resistor; the output terminal of the multiplier is grounded through the seventh resistor; the non-inverting input terminal of the first operational amplifier is grounded; the inverting input terminal of the first operational amplifier is further connected to the output terminal of the first operational amplifier through the fourth resistor; the output terminal of the first operational amplifier is connected to the inverting input terminal of the second operational amplifier through the fifth resistor; the non-inverting input terminal of the second operational amplifier is grounded, and the inverting input terminal of the second operational amplifier is further connected to the output terminal of the second operational amplifier through the sixth resistor; Among them, the first sample-and-hold circuit and the second sample-and-hold circuit are used to implement differential calculation, the first operational amplifier is used to implement proportional addition and subtraction operations, and the second operational amplifier is used to implement the reverse function.
[0014] The described digital implementation circuit is specifically a digital circuit composed of a control chip of model STM32F407ZGT6; the discretized iterative operation of the discrete local active memristor is realized through the control chip, so as to implement the discrete local active memristor with a digital circuit.
[0015] The design method and implementation circuit of the discrete local active memristor provided by the present invention, through the determination of the discretized iterative operation model and modular framework of the discrete local active memristor, not only realizes the design of the discrete local active memristor and the corresponding circuit implementation, but also has higher reliability, better accuracy and better adaptability of the present invention. Description of the Drawings
[0016] Figure 1 It is a schematic flowchart of the method of the present invention.
[0017] Figure 2 It is a schematic diagram of the modeling framework structure of the discrete local active memristor of the method of the present invention.
[0018] Figure 3 It is a schematic diagram of the POP curve of the discrete local active memristor of the method of the present invention; among them, Figure 3 (a) is type and type POP curves of the discrete local active memristor, Figure 3 (b) is type and type POP curves of the discrete local active memristor.
[0019] Figure 4 It is the V - I curve schematic diagram of the type-II discrete local active memristor of the method of the present invention in the DC state; among them, Figure 4 (a) is the periodic orbit curves at angular frequencies and , Figure 4 (b) is the periodic orbit curves at angular frequencies and .
[0020] Figure 5 It is a schematic diagram of the hysteresis curves presented by the type-II discrete local active memristor of the method of the present invention under different excitation parameters; among them, Figure 5 (a) is the angular frequencies and Hysteresis curves with sequentially varying excitation amplitudes at Figure 5 (b) are hysteresis curves with sequentially varying excitation frequencies at angular frequencies and ; Figure 5 (c) are hysteresis curves with sequentially varying excitation amplitudes at angular frequencies and ; Figure 5 (d) are hysteresis curves with sequentially varying excitation frequencies at angular frequencies and .
[0021] Figure 6 is the circuit schematic diagram of the analog implementation circuit of the present invention.
[0022] Figure 7 is the PSIM simulation experimental result diagram of the analog implementation circuit corresponding to the type-II discrete locally active memristor of the present invention; wherein, Figure 7 (a) are hysteresis curves with sequentially varying excitation amplitudes at angular frequencies and ; Figure 7 (b) are hysteresis curves with sequentially varying excitation frequencies at angular frequencies and ; Figure 7 (c) are hysteresis curves with sequentially varying excitation amplitudes at angular frequencies and ; Figure 7 (d) are hysteresis curves with sequentially varying excitation frequencies at angular frequencies and .
[0023] Figure 8 is the circuit schematic diagram of the digital implementation circuit and the peripheral auxiliary circuit of the present invention.
[0024] Figure 9 is the PSIM simulation experimental result diagram of the digital implementation circuit corresponding to the type-II discrete locally active memristor of the present invention; wherein, Figure 9 (a) are hysteresis curves with sequentially varying excitation amplitudes at angular frequencies and ; Figure 9 (b) are hysteresis curves with sequentially varying excitation frequencies at angular frequencies and ; Figure 9 (c) are hysteresis curves with sequentially varying excitation amplitudes at angular frequencies and ; Figure 9 (d) are hysteresis curves with sequentially varying excitation frequencies at angular frequencies and . Detailed implementation manners
[0025] As Figure 1 shown in the following is the schematic diagram of the method flow of the method of the present invention: The design method of the discrete local active memristor disclosed in the present invention includes the following steps: S1. Based on the input voltage, input current and state variable of the discrete local active memristor in the DC state, determine the discretized iterative operation model of the discrete local active memristor; specifically including the following steps: The discretized iterative operation form of the discrete local active memristor is shown as Figure 2 follows, specifically: In the formula is the input voltage at the moment in the DC state; is the output current at the moment in the DC state; is the state variable at the moment in the DC state; is the memductance function; is the non-linear modulation function; is the scale factor.
[0026] S2. According to the discretized iterative operation model determined in step S1, determine the modular framework of the discrete local active memristor including a non-linear function module; specifically including the following steps: The modular framework of the discrete local active memristor includes: By using the forward difference algorithm, realize the iteration of the state variable , that is, realize the calculation of ; The first non-linear function module is used to realize the memductance function of the discrete local active memristor, and the second non-linear function module is used to realize the non-linear modulation function of the discrete local active memristor; Use a multiplier module to realize the product of the memductance function of the discrete local active memristor and the input voltage; Realize the addition operation through an accumulation module; Connect the above-mentioned parts to realize the discretized iterative operation of the discrete local active memristor.
[0027] S3. According to the modular framework determined in step S2, select the non-linear function module based on the sine function and cosine function to complete the design of the discrete local active memristor; including the following steps: Based on the modular framework determined in step S2, sine and cosine functions are selected as non-linear function modules based on the non-linearity, boundedness, and periodicity characteristics of trigonometric functions to complete the design of the discrete locally active memristor.
[0028] Specifically, the implementation includes the following steps: There are four types of designed discrete locally active memristors: Type I discrete locally active memristor, expressed as: ; Type II discrete locally active memristor, expressed as: ; Type III discrete locally active memristor, expressed as: ; Type IV discrete locally active memristor, expressed as: ; where a is the first amplitude adjustment coefficient; b is the second amplitude adjustment coefficient; is the first angular frequency adjustment coefficient; is the second angular frequency adjustment coefficient; the parameters a and b are used to regulate the dynamic amplitude of the non-linear function, and the parameters and are used to regulate the angular frequency of the non-linear function.
[0029] The following numerical simulation experiments prove that the four types of discrete locally active memristors provided by the present invention can exhibit different memristive characteristics under different parameter groups, and at the same time, the DC characteristics and AC characteristics are tested.
[0030] The DC characteristics of the discrete locally active memristor can be verified through non-volatility and local activity. Non-volatility is judged by the POP (Power-off Plot) curve, which records the state trajectory and the appearance of two or more negative slope intersections (stable equilibrium points) intersecting with the axis in the power-off state. When the discrete DC excitation signal and the second state equation of the discrete locally active memristor can be simplified to: ; The state trajectory intersects with the axis in the variable interval to generate five and four different equilibrium points respectively, as shown in Figure 3 . Figure 3 (a) shows the two stable equilibrium points ( and ) in the type and are located in different negative slope regions, while the three unstable equilibrium points ( , , ) are located in different positive slope regions. Figure 3 (b) shows that for the -type and -type discrete locally active memristors, the two stable equilibrium points ( , ) are located in different negative slope regions, while the three unstable equilibrium points ( , ) are located in different positive slope regions. It should be noted that the above only discusses the state trajectory changes of the POP curve within a finite variable interval. If the variable interval is extended, it is not difficult to find that the POP curve has infinitely many negative slope regions and negative slope equilibrium points. Obviously, a discrete locally active memristor with two or more stable equilibrium points is non-volatile.
[0031] Then, the local active characteristics of the discrete locally active memristor can be verified by the V - I curve under the DC state, where V and I represent the input voltage and output current under the DC state, respectively. The state variable under DC is expressed as . Let , and we can get: ; V The relationship between I and and can be expressed as: where the memristor parameters are set as , . The -type memristor is used to verify the local active characteristics of this memristor, as shown in Figure 4 . Figure 4 (a) shows that when the angular frequencies and , the V - I curve under the DC state enters the periodic orbit and exhibits the hysteresis characteristic. Figure 4 (b) shows that when the angular frequencies and , the V - I curve under the DC state enters the quasi-periodic orbit that never intersects. Through a large number of simulation experiments, it is found that when the angular frequencies and are not 0, the V -I There is always a locally active region with a negative slope in the curve, that is, the local active characteristic of this memristor is verified. Let , if Q is a rational number, that is and are in a non-coprime relationship, V - I the curve shows a periodic orbit; if Q is an irrational number, that is and are in a coprime relationship, V - I the curve shows a quasi-periodic orbit (never intersecting).
[0032] The AC characteristics of the discrete locally active memristor can be verified by three fingerprint characteristics. At both ends of the type memristor under the above memristor parameters, a discrete sine excitation signal is applied. The initial state of the memristor is set to , and the excitation amplitude and the frequency are controlled to change respectively, presenting a shrinking hysteresis curve in the voltage-current plane, as shown in Figure 5 . When the angular frequency and , Figure 5 (a) shows , when the excitation amplitude is applied successively , the area of the hysteresis sidelobe region shows a monotonic shrinking trend as the excitation amplitude decreases; Figure 5 (b) shows that when , when the excitation frequency is assigned successively , the area of the hysteresis sidelobe region gradually decreases as the excitation frequency increases, and gradually tends to a single-valued function. Similarly, when the angular frequency and , Figure 5 (c) and Figure 5 (d) show the same process as in the above set of parameters. Obviously, the three fingerprint characteristics of the Figure 5 type discrete locally active memristor are well demonstrated, that is, the AC characteristics of the memristor are verified in
[0033] As the hardware carriers for the physical implementation of memristors, analog circuits and digital circuits show significant complementarity in performance characteristics and application scenarios. Analog circuits have the characteristics of high real-time performance, high bandwidth, and low latency, while digital circuits have advantages such as strong anti-interference ability, high flexibility, and hardware repeatability. Therefore, based on the above discrete locally active memristor, this application designs an analog simulation circuit and a digital hardware circuit to verify the effectiveness of the model and the hardware realizability.
[0034] The present invention also provides an implementation circuit for a discrete local active memristor, including an analog implementation circuit and a digital implementation circuit; An analog implementation circuit for a discrete local active memristor is implemented based on a sample-and-hold circuit, an operational amplifier, and an operational function editor; A digital implementation circuit for a discrete local active memristor is implemented based on a control chip.
[0035] PSIM has become an important tool for the design and verification of memristive circuits due to its advantages such as fast simulation speed and clear waveform visualization. Due to the sine and cosine functions included in the discrete local active memristor model, problems such as limited dynamic range and nonlinear distortion are faced in the hardware implementation of analog circuits. Therefore, in this application, a simulation experimental circuit based on PSIM is constructed to verify the feasibility of the analog circuit implementation scheme.
[0036] The analog implementation circuit constructed in this application, as Figure 6 shown, specifically includes a staircase wave function generator , a NOT gate D, a first sample-and-hold circuit , a second sample-and-hold circuit , a first proportional gain circuit , a second proportional gain circuit , a first operational function editor , a second operational function editor , a multiplier, a first operational amplifier , a second operational amplifier , a sine voltage source , a first resistor , a second resistor , a third resistor , a fourth resistor , a fifth resistor , a sixth resistor and a seventh resistor ; The negative terminal of the staircase wave function generator is grounded; the positive terminal of the staircase wave function generator is simultaneously connected to the first input terminal of the first sample and hold circuit and the input terminal of the NOT gate; the output terminal of the NOT gate is connected to the first input terminal of the second sample and hold circuit; the second input terminal of the first sample and hold circuit is connected to the output terminal of the second operational amplifier, and the output terminal of the first sample and hold circuit is connected to the second input terminal of the second sample and hold circuit; the output terminal of the second sample and hold circuit is connected to the inverting input terminal of the first operational amplifier through the first resistor, and the output terminal of the second sample and hold circuit is also connected to the inverting input terminal of the first operational amplifier through the series-connected second proportional gain circuit, second operational function editor, and second resistor; the output terminal of the second sample and hold circuit is further connected to the second input terminal of the multiplier through the series-connected first proportional gain circuit and first operational function editor; the negative terminal of the sine voltage source is grounded, the positive terminal of the sine voltage source is directly connected to the first input terminal of the multiplier, and the positive terminal of the sine voltage source is also connected to the inverting input terminal of the first operational amplifier through the third resistor; the output terminal of the multiplier is grounded through the seventh resistor; the non-inverting input terminal of the first operational amplifier is grounded; the inverting input terminal of the first operational amplifier is further connected to the output terminal of the first operational amplifier through the fourth resistor; the output terminal of the first operational amplifier is connected to the inverting input terminal of the second operational amplifier through the fifth resistor; the non-inverting input terminal of the second operational amplifier is grounded, and the inverting input terminal of the second operational amplifier is further connected to the output terminal of the second operational amplifier through the sixth resistor; Among them, the first sample and hold circuit and the second sample and hold circuit are used to implement differential calculation, the first operational amplifier is used to implement proportional addition and subtraction operations, and the second operational amplifier is used to implement the reverse function.
[0037] The difference between the sample and hold circuits can be used to implement the differential calculation of the iterative equation, and the operational amplifier is used to implement proportional addition and subtraction operations and the reverse function. The discrete local active memristor circuit state equation can be written as: Among them, and are the voltage dimension forms of the internal state variables, and respectively represent the input voltage and output current in the circuit, g = 1 is the multiplier gain. The resistors are set to , , ; the peak-to-peak voltage set by the staircase wave function generator is 3 V, the frequency is 10 kHz, and the duty cycle is 50%; the sine voltage source is configured as , .
[0038] By adjusting the excitation amplitude and frequency in the sine voltage source, the three fingerprint characteristics of the above-mentioned memristor can be verified in the simulation circuit. In the PSIM circuit simulation, the "time step", "total duration", and "sampling duration" are respectively set to , 0.6 s, and 0.5 s. Figure 7 (a) and Figure 7 (b) respectively show the hysteresis curves presented when the angular frequencies and are such that the excitation frequency and amplitude in the sinusoidal voltage source are fixed respectively, and the excitation amplitude decreases successively and the excitation frequency increases successively. Figure 7 (c) and Figure 7 (d) respectively show the same process when the angular frequency changes to and . Figure 7 The experimental simulation results in the PSIM circuit in Figure 5 are basically consistent with the numerical simulation results in
[0039] The digital implementation circuit constructed by the present invention, as shown in Figure 8 , can adopt a circuit composed of a control chip of model STM32F407ZGT6; the discretized iterative operation of the discrete local active memristor is realized through the control chip, so as to realize the discrete local active memristor; Figure 8 In
[0040] , the digital implementation circuit can be realized only by a DSP chip of model STM32F407ZGT6, while the computer and the downloader are used to program the DSP chip, and the digital-to-analog converter and the oscilloscope are used to display the output of the DSP chip for experimental verification. Figure 9 In the dual-channel synchronous output mode of the oscilloscope, channel A outputs the excitation voltage signal, and channel B outputs the memristor current signal, constituting the X-Y oscilloscope observation mode. The hardware experimental results captured by the oscilloscope are integrated through Photoshop software, Figure 5 respectively showing the hysteresis curves generated by the type-II discrete local active memristor under the action of different excitation parameters, which are basically consistent with the numerical simulation results in
[0041] The above analog simulation implementation based on PSIM and digital hardware implementation based on MCU further illustrate the effectiveness of the design method and implementation circuit of the discrete local active memristor of the present invention, the rationality of the design scheme, and the feasibility of circuit implementation.
Claims
1. A design method for a discrete local active memristor, characterized in that The steps include: S1. Determine a discrete iterative operation model of a discrete local active memristor based on the input voltage, input current and state variables of the discrete local active memristor in a DC state; S2. According to the discretization iterative operation model determined in step S1, a modular framework of a discrete local active memristor including a nonlinear function module is determined; S3. According to the modular framework determined in step S2, a nonlinear function module is selected based on the sine function and the cosine function to complete the design of the discrete local active memristor.
2. The design method of discrete local active memristor according to claim 1, characterized in that The step S1 specifically includes the following steps: The discrete iterative operation form of the discrete local active memristor is expressed as: In the formula In DC state Input voltage at the moment; In DC state Output current at the moment; In DC state State variables at the moment; is the memetic derivative function; is a nonlinear modulation function; is the scale factor.
3. The design method of discrete local active memristor according to claim 2, characterized in that The step S2 specifically includes the following steps: The modular framework of discrete locally active memristors includes: Through the forward difference algorithm, the state variables are realized Iterations; The first nonlinear function module Memristor for realizing discrete locally active memristors , the second nonlinear function module Nonlinear modulation function for realizing discrete locally active memristors ; A multiplier module is used to realize the product of the memristor function of the discrete local active memristor and the input voltage; Addition operation is realized through the accumulation module.
4. The design method of discrete local active memristor according to claim 3, characterized in that The step S3 comprises the following steps: According to the modular framework determined in step S2, the sine function and the cosine function are selected as nonlinear function modules to complete the design of the discrete local active memristor.
5. The design method of discrete local active memristor according to claim 4, characterized in that The step S3 specifically includes the following steps: There are 4 types of discrete local active memristors designed: The discrete local active memristor is expressed as: ; The discrete local active memristor is expressed as: ; The discrete local active memristor is expressed as: ; The discrete local active memristor is expressed as: ; In the formula a is the first amplitude adjustment coefficient; b is the second amplitude adjustment coefficient; is the first angular frequency adjustment coefficient; is the second angular frequency adjustment coefficient.
6. A discrete local active memristor implementation circuit obtained by using the discrete local active memristor design method according to any one of claims 1 to 5, characterized in that Including analog implementation circuit and digital implementation circuit; Based on the sample-and-hold device, operational amplifier and operation function editor, the analog circuit of discrete local active memristor is realized; Based on the control chip, a digital implementation circuit of discrete local active memristor is realized.
7. The implementation circuit according to claim 6, characterized in that The analog implementation circuit specifically includes a step wave function generator, a NOT gate, a first sample holder, a second sample holder, a first proportional gain device, a second proportional gain device, a first operational function editor, a second operational function editor, a multiplier, a first operational amplifier, a second operational amplifier, a sinusoidal voltage source, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, and a seventh resistor; The negative pole of the step wave function generator is grounded; the positive pole of the step wave function generator is simultaneously connected to the first input end of the first sample holder and the input end of the NOT gate; the output end of the NOT gate is connected to the first input end of the second sample holder; the second input end of the first sample holder is connected to the output end of the second operational amplifier, and the output end of the first sample holder is connected to the second input end of the second sample holder; the output end of the second sample holder is connected to the input inverting end of the first operational amplifier through a first resistor, and the output end of the second sample holder is also connected to the input inverting end of the first operational amplifier through a second proportional gain device, a second operational function editor and a second resistor connected in series, and the output end of the second sample holder is also connected to the input inverting end of the first operational amplifier through a first proportional gain device connected in series The device and the first operational function editor are connected to the second input terminal of the multiplier; the negative electrode of the sinusoidal voltage source is grounded, the positive electrode of the sinusoidal voltage source is directly connected to the first input terminal of the multiplier, and the positive electrode of the sinusoidal voltage source is also connected to the input inverting terminal of the first operational amplifier through the third resistor; the output terminal of the multiplier is grounded through the seventh resistor; the input non-inverting terminal of the first operational amplifier is grounded; the input inverting terminal of the first operational amplifier is also connected to the output terminal of the first operational amplifier through the fourth resistor; the output terminal of the first operational amplifier is connected to the input inverting terminal of the second operational amplifier through the fifth resistor; the input non-inverting terminal of the second operational amplifier is grounded, and the input inverting terminal of the second operational amplifier is also connected to the output terminal of the second operational amplifier through the sixth resistor; The first sample holder and the second sample holder are used to implement differential calculation, the first operational amplifier is used to implement proportional addition and subtraction operations, and the second operational amplifier is used to implement an inverse function.
8. The implementation circuit according to claim 6, characterized in that The digital implementation circuit is specifically a digital circuit composed of a control chip of model STM32F407ZGT6; the discrete iterative operation of the discrete local active memristor is realized by the control chip, so as to realize the discrete local active memristor by the digital circuit.
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