Semiconductor device and method of manufacturing the same

By introducing an on-chip all-optical switching network module into the AI ​​accelerator module, the problems of delay and power consumption caused by electrical interconnection in the prior art are solved, and a more efficient and scalable computing module interconnection solution is realized.

CN120090995APending Publication Date: 2025-06-03SHANGHAI XIZHI TECH CO LTD

Patent Information

Application Number
CN202311628850.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-11-30
Publication Date
2025-06-03

AI Technical Summary

Technical Problem

Communication between existing AI accelerator modules relies on board traces, resulting in high latency and power consumption, and a more complex interface design that limits IO bandwidth and interconnection distance.

Method used

The on-chip all-optical switching network module is adopted to realize optical interconnection between the computing module through photonic chips and transceiver analog electronic chips. The on-chip optical switch is used to change the connection topology, supporting longer transmission distances and more uniform bandwidth.

Benefits of technology

It reduces the loss of signal transmission, supports longer transmission distances, improves bandwidth utilization between computing modules, enhances the scalability of artificial intelligence computing systems, and reduces power consumption.

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Abstract

The invention provides a semiconductor device for realizing interconnection by using an on-chip all-optical switching network module and a manufacturing method thereof. The semiconductor device includes: a circuit board having a plurality of electrical connection paths; the on-chip all-optical switching network module is arranged on the circuit board and comprises a photon chip and a plurality of analog electric chips which are arranged above the photon chip and are used for transmitting and receiving; the photon chip comprises a plurality of communication nodes, a plurality of optical connection paths and at least one on-chip optical switch which are in corresponding communication connection with the plurality of analog electric chips for receiving and transmitting, and the on-chip optical switch is configured to be capable of changing the connection topology among the plurality of communication nodes; and the plurality of calculation modules are arranged on the circuit board and are in corresponding communication connection with the plurality of analog electric chips for transmitting and receiving of the on-chip all-optical switching network module through the electric connection paths on the circuit board, so that the connection topology among the plurality of calculation modules can be changed by the on-chip optical switch.
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Description

Technical Field

[0001] The present invention relates to the field of computer technology, and more specifically, to a semiconductor device and a manufacturing method thereof. Background Art

[0002] According to OpenAI data, the growth rate of the computing power of artificial intelligence (AI) models far exceeds that of computing hardware. AI accelerators obtain continuous improvement in computing power through process technology iteration and chip architecture innovation, and the interconnection bandwidth between AI accelerators is also increasing continuously. The interconnection network of AI accelerators has become the key to improving the overall computing power. The Open Compute Project (OCP) has launched the OCP Accelerator Module (OAM) with a general form factor, which has been adopted by leading GPU (Graphics Processing Unit) suppliers. The current mainstream communication form between general-form-factor OCP artificial intelligence acceleration modules is usually as follows: Figure 1 As shown, the 8 computing modules 100 can achieve point-to-point full interconnection through the traces 105 on the printed circuit board (PCB) 700. Due to the large loss of PCB traces, high-speed interfaces usually come at the cost of delay and power consumption. In addition, due to the need to use long PCB traces, the computing modules generally need to adopt interfaces similar to CEI Long Range (LR) SerDes. For the Figure 1 fully connected structure, each SerDes interface needs to access a specific single computing module, which further reduces the bandwidth between each pair of computing modules.

[0003] In addition, since the response of the electrical channel decays with the increase of the signal rate, higher-rate interfaces often involve more complex architectures and circuit designs, introducing the cost of delay, consuming more power and occupying a larger chip area, thus limiting the chip IO (input / output) bandwidth. In addition, the longer metal wiring distance will further deteriorate the loss characteristics of the circuit and limit the interconnection distance between AI accelerators. Summary of the Invention

[0004] In view of the above defects of the prior art, the present invention provides a semiconductor device using an on-chip all-optical switching network module for interconnection and a manufacturing method thereof.

[0005] According to an embodiment of the present invention, a semiconductor device is provided, including:

[0006] A circuit board having a plurality of electrical connection paths;

[0007] An on-chip all-optical switching network module is disposed on the circuit board. The on-chip all-optical switching network module includes a photonic chip and a plurality of transceiver analog electrical chips disposed above the photonic chip. The photonic chip includes a plurality of communication nodes corresponding to and communicatively connected to the plurality of transceiver analog electrical chips, a plurality of optical connection paths, and at least one on-chip optical switch. The on-chip optical switch is configured to be able to change the connection topology between the plurality of communication nodes;

[0008] A plurality of computing modules are disposed on the circuit board and are communicatively connected to the plurality of transceiver analog electrical chips of the on-chip all-optical switching network module through electrical connection paths on the circuit board, so that the connection topology between the plurality of computing modules can be changed by the on-chip optical switch.

[0009] Compared with electrical interconnection, the loss of the optical interconnection channel remains constant at different frequencies, and the loss value is very small. Therefore, optical interconnection can support longer transmission distances. The on-chip all-optical switching network module of the present invention combines an optical interconnection module with optical switching technology, which can make the bandwidth more uniform inside and between nodes, facilitating large-scale expansion of computing modules.

[0010] In some embodiments of the present invention, the circuit board has a first plug interface, and the on-chip all-optical switching network module is removably plugged into the first plug interface.

[0011] In some embodiments of the present invention, the circuit board has a plurality of mounting areas, and the plurality of computing modules are respectively mounted in the plurality of mounting areas. The plurality of computing modules are communicatively connected to the first plug interface through the plurality of electrical connection paths.

[0012] In some embodiments of the present invention, the plurality of computing modules include a first computing module and a second computing module. The communication path between the first computing module and the second computing module includes: a first electrical connection path connecting the first computing module and the first plug interface, a second electrical connection path connecting the first plug interface and the first transceiver analog electrical chip, a third electrical connection path connecting the first transceiver analog electrical chip and the first communication node, a first optical connection path connecting the first communication node and the on-chip switch, a second optical connection path connecting the on-chip optical switch and the second communication node, a fourth electrical connection path connecting the second communication node and the second transceiver analog electrical chip, a fifth electrical connection path connecting the second transceiver analog electrical chip and the first plug interface, and a sixth electrical connection path connecting the first plug interface and the second computing module.

[0013] In some embodiments of the present invention, the photonic chip includes at least two photonic integrated circuit sub-chips, and adjacent photonic integrated circuit sub-chips are optically interconnected with each other;

[0014] Each of the photonic integrated circuit sub-chips has at least two of the communication nodes, multiple of the optical connection paths, and at least one of the on-chip optical switches.

[0015] On the photonic chip, communication is achieved between any two of the communication nodes via at least one of the on-chip optical switches and the optical connection paths.

[0016] In some embodiments of the present invention, the on-chip all-optical switching network module further includes at least one optical switching control analog electrical chip, and the at least one optical switching control analog electrical chip is correspondingly disposed above at least one of the on-chip optical switches so as to control the corresponding on-chip optical switch. Each on-chip optical switch on the photonic chip and the corresponding optical switching control analog electrical chip form an on-chip optical switching module. Correspondingly, the on-chip all-optical switching network has multiple on-chip optical switching modules.

[0017] In some embodiments of the present invention, each of the communication nodes includes:

[0018] An electro-optical conversion unit for converting the information to be transmitted carried by an electrical signal into an optical signal; and

[0019] An opto-electrical conversion unit for converting the received optical signal into an electrical signal carrying the received information.

[0020] In some embodiments of the present invention, the multiple transceiver analog electrical chips are mounted on the photonic chip and are correspondingly disposed with multiple of the communication nodes, and are configured such that communication can be achieved between any two of the analog electrical chips via the corresponding communication nodes and at least one on-chip optical switch in the photonic chip.

[0021] In some embodiments of the present invention, the electro-optical conversion unit includes a modulator or a modulator array; and / or, the opto-electrical conversion unit includes a detector or a detector array.

[0022] In some embodiments of the present invention, the modulator includes a microring modulator, a Mach-Zehnder modulator, or an electro-absorption modulator; and / or, the detector includes a microring detector or a photodiode.

[0023] In some embodiments of the present invention, each of the photon integrated circuit sub-chips further has: an optical input coupler and an optical power splitter. Among them, in the photon chip, the optical input coupler on one of the photon integrated circuit sub-chips is configured to couple light from an off-chip light source into the photon chip; and the optical power splitter is optically connected to the optical input coupler configured to couple light from the off-chip light source into the photon chip, and is configured to separate the light from the optical input coupler into multiple optical outputs, where each of the multiple optical outputs has substantially the same power, and the multiple optical outputs are transmitted to each modulator.

[0024] In some embodiments of the present invention, in the photon chip, the optical connection path includes a first type of optical waveguide, where adjacent two photon integrated circuit sub-chips are optically interconnected through the first type of optical waveguide.

[0025] In some embodiments of the present invention, the first type of optical waveguides facing each other at the junction of adjacent two photon integrated circuit sub-chips are configured as a structure with a gradually increasing waveguide cross-section from one photon integrated circuit sub-chip to the other photon integrated circuit sub-chip.

[0026] In some embodiments of the present invention, the optical connection path further includes a second type of optical waveguide. Among them, in each of the photon integrated circuit sub-chips, the second type of optical waveguide is located in a different layer from the first type of optical waveguide; in each of the photon integrated circuit sub-chips, one or more of the on-chip optical switch, electro-optic conversion unit, opto-electric conversion unit, optical input coupler, and optical power splitter are optically connected to the corresponding first type of optical waveguide through different second type of optical waveguides; the second type of optical waveguide is optically connected to the first type of optical waveguide through an evanescent wave coupler.

[0027] In some embodiments of the present invention, the on-chip optical switch is a silicon optical switch, which includes multiple optical switching units. Among them, the optical switching control analog electric chip is configured to control the multiple optical switching units to arrange and exchange the data transmitted in the silicon optical switch, so that the connection topology between the multiple communication nodes can be changed.

[0028] In some embodiments of the present invention, the optical switching unit has a Mach-Zehnder interferometer structure.

[0029] In some embodiments of the present invention, the photon integrated circuit sub-chip is fabricated by exposure using a full photomask.

[0030] In some embodiments of the present invention, each of the computing modules includes a digital electric chip and a memory, and the digital electric chip and the memory are integrally packaged on a packaging substrate.

[0031] In addition, an embodiment of the present invention further provides a method for manufacturing the semiconductor device, which includes:

[0032] Providing a circuit board having a plurality of electrical connection paths;

[0033] Providing an on-chip all-optical switching network module, the on-chip all-optical switching network module includes a photonic chip and a plurality of transceiver analog electrical chips disposed above the photonic chip, the photonic chip includes a plurality of communication nodes corresponding to and communicatively connected to the plurality of transceiver analog electrical chips, a plurality of optical connection paths, and at least one on-chip optical switch, and the on-chip optical switch is configured to be able to change the connection topology between the plurality of communication nodes;

[0034] Providing a plurality of computing modules;

[0035] Disposing the all-optical switching network module and the plurality of computing modules on the circuit board, wherein the plurality of computing modules are communicatively connected to the plurality of transceiver analog electrical chips of the on-chip all-optical switching network module through the electrical connection paths on the circuit board, so that the connection topology between the plurality of computing modules can be changed by the on-chip optical switch.

[0036] In some embodiments of the present invention, the circuit board has a first socket. The disposing the on-chip all-optical switching network module on the circuit board includes removably inserting the on-chip all-optical switching network module into the first socket.

[0037] In some embodiments of the present invention, the photonic chip includes at least two photonic integrated circuit sub-chips, adjacent photonic integrated circuit sub-chips are optically interconnected with each other, and the photonic integrated circuit sub-chips are fabricated by exposure using a full-optical mask template.

[0038] Applying the present invention can achieve the following beneficial effects:

[0039] In the on-chip all-optical switching network module of the present invention, the connection topology between each communication node (and its corresponding analog electrical chip for transceiver) can be reconfigured and adjusted through the on-chip optical switch, so that the interconnection between the computing modules (including digital electrical chips) of the semiconductor device is no longer fixed, but can be field-reconfigurable. This can bring many benefits, the most important of which is the ability to change the topology between computing modules according to a specific artificial intelligence model. In terms of topology, the requirements for data streams of different artificial intelligence models can be roughly divided into three categories, namely: data parallelism, where each chip loads the entire model and different chips process different data in the data set; model parallelism, where some layers in the model are particularly large, so each chip is only responsible for a part of the calculation in such a large layer; and pipeline parallelism, where different layers in the model are assigned to different chips for calculation, and different data streams correspond to different computing interconnection topologies. Using the reconfigurable optical interconnection of the present invention can quickly switch the interconnection topology between different chips, effectively improve the bandwidth utilization rate, and improve the scalability of the artificial intelligence computing system, that is, enable multiple computing modules to efficiently and reliably cooperate with each other to accelerate such large models. In addition, the on-chip all-optical switching network module only consumes a few hundred milliwatts of power, which is several orders of magnitude lower than that of an electrical switch, and the reconstruction delay is generally in the microsecond or even nanosecond range, enabling real-time optical path reconstruction during the training process of the artificial intelligence model.

[0040] In the semiconductor device of the present invention, the photonic chip of the on-chip all-optical switching network module is interconnected by splicing photonic integrated circuit sub-chips through a full-optical mask. Except for the silicon nitride exposure mask template that connects the optical coupler for input laser and the communication node, the exposure mask templates of other components on the photonic integrated circuit sub-chips are exactly the same, saving the chip tape-out cost. Moreover, the on-chip all-optical switching network structure multiplexes multiple analog electrical chips for transceiver, breaking through the limitation of the chip mask size while improving the system energy efficiency ratio, and enhancing the total computing throughput of the system.

[0041] In addition, the commercialization of silicon optical switches usually has problems with fiber coupling and polarization correlation, while the present invention uses an optical switch used directly on the chip (i.e., an on-chip optical switch) to avoid these problems. Traditional optical switches usually use optical fibers as input and output interfaces, and the spacing between array optical fibers is usually 250um or 127um. For optical switches with dozens of input and output optical ports, it will not only occupy a large chip area, but also reduce the coupling yield between the optical fiber and the chip, making the optical coupling loss problem more serious. The present invention overcomes the problem of optical coupling loss by using an optical switch used directly on the chip. In addition, since conventional sub-micron-sized silicon waveguides on insulators have strong birefringence characteristics, the effective refractive index of transverse electric field and transverse magnetic field polarization is very different, so the couplers and phase shifters based on this also have polarization correlation. For optical switches with fiber input and output, how to reduce the polarization dependence of the device has always been a difficult problem in silicon-based optical switching design. In the present invention, an optical switch used directly on the chip is used, and the waveguide input and output polarization is fixed and single, which cleverly avoids the difficulty of polarization correlation of silicon optical switches, and the waveguide input and output have better stability. The on-chip optical switch is compatible with the silicon photonic process of the photonic chip, which simplifies the process flow and saves costs.

[0042] In addition, the on-chip all-optical switching network module of the present invention is arranged or plugged into the circuit board, so it is also called the on-chip all-optical switching network module. The on-chip all-optical switching network module or the on-chip optical switch and the computing module or the digital electronic chip do not need to be packaged together, but only need to be installed on the circuit board separately, which is convenient and flexible, has good scalability, and is highly controllable.

[0043] The various aspects, features, advantages, etc. of the present invention will be described in detail below in conjunction with the accompanying drawings. According to the following detailed description in conjunction with the accompanying drawings, the above-mentioned various aspects, features, advantages, etc. of the present invention will become more clear. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 It is a schematic diagram showing point-to-point full interconnection between eight computing modules in an existing semiconductor device through circuit board routing.

[0045] Figure 2 FIG. 1 is a schematic diagram showing a planar layout of a semiconductor device according to an embodiment of the present invention.

[0046] Figures 3A to 3C Shows Figure 2 The change of connection topology between eight computing modules in the semiconductor device is shown.

[0047] Figure 4 It is shown Figure 2 FIG. 1 is a schematic diagram of a planar layout of an on-chip all-optical switching network module in a semiconductor device.

[0048] Figure 5 is a schematic diagram showing Figure 2 the packaging structure of the semiconductor device shown.

[0049] Figure 6 is a schematic diagram showing the structure of an on-chip optical switch composed of multiple optical switching units.

[0050] Figure 7 is a schematic diagram showing Figure 6 the structure of the optical switching unit in

[0051] Figure 8 is a schematic diagram showing Figure 4 the splicing coupler of the optical waveguide interconnection of adjacent photonic integrated circuit sub-chips in the on-chip all-optical switching network module shown.

[0052] Figure 9 is a schematic diagram showing Figure 4 the evanescent wave coupler of the optical waveguide interconnection of different layers in the photonic integrated circuit sub-chip of the on-chip all-optical switching network module shown. Detailed implementation manners

[0053] The following will describe exemplary embodiments in more detail with reference to the accompanying drawings. Certain terms may be used in the description for reference only, and these terms are not intended to limit the scope of protection. For example, terms such as "top", "bottom", "upper", "lower", "above...", and "below..." may be used to refer to the directions in the accompanying drawings used as a reference. Terms such as "front", "back", "rear", "side", "outer", and "inner" may be used to describe the orientation and / or position of each part of a component within a consistent but arbitrary reference system, and the orientation and / or position can be clearly understood by referring to the text describing the component being discussed and the associated drawings. Unless clearly indicated in the context, "first", "second", and other similar numerical terms do not imply order or sequence.

[0054] It should be understood that when an element or feature is referred to as "on another element or layer", "connected to" or "coupled to" another element or layer, it can be directly on another element or feature, connected to or coupled to another element or feature, or there may be one or more intermediate elements or features. Additionally, it should also be understood that when an element or feature is referred to as "between" two elements or features, it can be the only element or feature between these two elements or features, or there may also be one or more intermediate elements or features.

[0055] The terms used herein are for the purpose of describing particular embodiments and are not intended to limit the present invention. Such terms may include the words specifically mentioned herein, their derivatives, and words of similar meaning. As used herein, the singular form "a" is also intended to include the plural form unless the context clearly indicates otherwise. It should also be understood that the terms "comprising," "including," and "having" specify the presence of the stated features, wholes, steps, operations, elements, and / or components herein, but do not preclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or their combinations. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Expressions such as "at least one of..." modify the entire list of elements when preceding the list of elements, rather than modifying individual elements of the list.

[0056] As used herein, "substantially," "about," and their like terms are used as approximate terms and not as terms of degree, and are intended to account for the inherent variations in measured or calculated values that would be recognized by a person of ordinary skill in the art. As used herein, the terms "use," "is using," and "is used" may be considered synonymous with the terms "utilize," "is utilizing," and "is utilized," respectively.

[0057] Figure 2 An exemplary embodiment of a semiconductor device of the present invention is shown. As Figure 2 shown, the semiconductor device includes a circuit board 500, an on-chip all-optical switching network module 600, and a plurality of computing modules 100. The circuit board 500 is, for example, a PCB board, which is configured with a plurality of electrical connection paths 106. The on-chip all-optical switching network module 600 and the computing modules 100 are disposed on the circuit board 500. In this exemplary embodiment, eight computing modules 100 and one on-chip all-optical switching network module 600 are disposed on the circuit board 500, and each computing module 100 is electrically connected to and communicates with the on-chip all-optical switching network module 600 through the electrical connection path 106. The electrical connection path 106 includes traces on the circuit board 500.

[0058] Combined with Figure 4, the on-chip all-optical switching network module 600 includes a photonic chip 200 and a plurality of transceiver analog electric chips 203 disposed above the photonic chip. The photonic chip includes a plurality of communication nodes (TX / RX) 201, a plurality of optical connection paths, and at least one on-chip optical switch 202. The on-chip optical switch is configured to be able to change the connection topology between the plurality of communication nodes. The plurality of computing modules 100 are correspondingly communicatively connected to the plurality of transceiver analog electric chips 203 of the on-chip all-optical switching network module 600 through the electrical connection paths on the circuit board 500. For example, the computing module 100 disposed on the circuit board is electrically connected to the transceiver analog electric chip above the photonic chip through the electrical traces on the circuit board by using a long-distance SerDes interface. Thus, the connection topology between the plurality of computing modules 100 can be changed by the on-chip optical switch. Figures 3A to 3C is a schematic diagram showing Figure 2 a partial schematic diagram of an optional connection topology among 8 computing modules 100 in FIG. The connection topology among 8 computing modules 100 can be reconfigured by the on-chip all-optical switching network module 600. The on-chip optical switch generally changes the transmission path of the optical signal based on the thermo-optical and electro-optical principles, and the reconfiguration delay is generally at the microsecond level or even the nanosecond level. Therefore, the on-chip optical network can change the paths connecting the input and output in real time. By controlling the optical switching network, the connection topology between the computing modules 100 can be changed into a full interconnection ( Figure 3A ), a ring ( Figure 3B ), a point-to-point ( Figure 3C ) or any other optional form in real time. As Figures 3A to 3C shown, the 8 computing modules 100 are numbered from 0 to 7 respectively. The communication bandwidth between computing module 0 and computing module 1 can be switched in real time between the bandwidth B (full interconnection), the bandwidth 4B (ring), the bandwidth 8B (point-to-point) or other optional forms, so as to match the bandwidth requirements of different communication algorithms, improve the bandwidth utilization rate, and thus improve the overall operation efficiency of the artificial intelligence computing system.

[0059] In some embodiments of the present invention, the computing module 100 includes a digital electric chip 101 and a memory 102, wherein the digital electric chip 101 and a series of high-bandwidth memories (HBMs) are packaged on a silicon interposer 103, so that the computing module 100 is integrally packaged on a package substrate 104. The circuit board 500 has a plurality of mounting areas, and the plurality of computing modules 100 are respectively mounted in the plurality of mounting areas.

[0060] In some embodiments of the present invention, the circuit board 500 has a first insertion interface, and the on-chip all-optical switching network module 600 is removably inserted into the first insertion interface. The plurality of computing modules 100 are communicatively connected to the first insertion interface through the plurality of electrical connection paths. Thus, the high-speed electrical signals on the digital electrical chip 101 are transmitted to the edge of the on-chip all-optical switching network module 600 through the traces of the packaging substrate 104 and the traces 106 of the circuit board 500, and are amplified and electro-optic / photoelectrically converted by the components in the on-chip optical network module 600, and then the on-chip optical switch reconstructs the optical network to change the interconnection topology between the computing modules 100 or their digital electrical chips 101.

[0061] In some embodiments of the present invention, the plurality of computing modules 100 include a first computing module and a second computing module, and the communication path between the first computing module and the second computing module includes: a first electrical connection path connecting the first computing module and the first insertion interface, a second electrical connection path connecting the first insertion interface and the first analog electrical chip for transceiver, a third electrical connection path connecting the first analog electrical chip for transceiver and the first communication node, a first optical connection path connecting the first communication node and the on-chip optical switch, a second optical connection path connecting the on-chip optical switch and the second communication node, a fourth electrical connection path connecting the second communication node and the second analog electrical chip for transceiver, a fifth electrical connection path connecting the second analog electrical chip for transceiver and the first insertion interface, and a sixth electrical connection path connecting the first insertion interface and the second computing module. In some embodiments of the present invention, the electrical connection path includes metal traces, conductive vias, etc., and the optical connection path includes optical waveguides, etc.

[0062] In an exemplary embodiment, as Figure 4 shown, the on-chip all-optical switching network module includes a photonic chip 200, an analog electrical chip 203 for transceiver, and an analog electrical chip 204 for optical switching control. The photonic chip 200 includes an on-chip optical switch 202, and the on-chip optical switch 202 and the analog electrical chip 204 for optical switching control are arranged in one-to-one correspondence to form an on-chip optical switch module. The on-chip all-optical switching network module includes a plurality of the on-chip optical switch modules. In some embodiments of the present invention, a photonic chip 200 is packaged on the packaging substrate 206, and the photonic chip 200 is formed by splicing at least two photonic integrated circuit sub-chips through waveguides, that is, adjacent photonic integrated circuit sub-chips are optically interconnected with each other. Figure 4Fig. 200 shows a photonic chip formed by four photonic integrated circuit sub-chips of the full photomask size. The photonic integrated circuit sub-chip of the full photomask size means that the photonic integrated circuit sub-chip is fabricated by exposure using a full photomask reticle. In some embodiments, the photonic chip includes more than four photonic integrated circuit sub-chips.

[0063] Each photonic integrated circuit sub-chip has at least two communication nodes (TX / RX) 201 and multiple optical connection paths. The optical connection paths include optical waveguides. For the sake of clarity of the illustration, Figure 4 the silicon nitride waveguide wiring for connecting the input / output ports is omitted. On the photonic chip 200, communication is achieved between any two of the communication nodes 201 via at least one on-chip optical switch 202 and the optical connection paths. Above each photonic integrated circuit sub-chip, two identical analog electrical chips 203 for transceiver and at least one analog electrical chip 204 for optical switch control are integrated. The analog electrical chips 203 for transceiver are correspondingly arranged above the corresponding photonic integrated circuit sub-chip. The on-chip optical switch 202 is formed as an optical element in the photonic integrated circuit sub-chip. The analog electrical chips 204 for optical switch control are correspondingly arranged above the photonic integrated circuit sub-chip one by one with the on-chip optical switch. Communication can be achieved between any two of the analog electrical chips 203 for transceiver through the corresponding communication nodes and at least one on-chip optical switch in the photonic chip.

[0064] In some embodiments of the present invention, each of the communication nodes includes an electro-optical conversion unit and an opto-electronic conversion unit. The electro-optical conversion unit is used to convert the information to be transmitted carried by an electrical signal into an optical signal. For example, the electro-optical conversion unit includes a modulator or a modulator array. The opto-electronic conversion unit is used to convert the received optical signal into an electrical signal carrying the received information. For example, the opto-electronic conversion unit includes a detector or a detector array. In some embodiments of the present invention, the modulator includes a microring modulator, a Mach-Zehnder modulator, or an electro-absorption modulator. The detector includes a microring detector or a photodiode.

[0065] In some embodiments of the present invention, each of the photon integrated circuit sub-chips further has: an optical input coupler and an optical power splitter. Among them, in the photon chip 200, the optical input coupler on one of the photon integrated circuit sub-chips is configured to couple light from an off-chip light source into the photon chip; and the optical power splitter is optically connected to the optical input coupler configured to couple light from an off-chip light source into the photon chip, and is configured to split the light from the optical input coupler into multiple optical outputs, where each of the multiple optical outputs has substantially the same power, and the multiple optical outputs are transmitted to respective modulators.

[0066] In some embodiments of the present invention, in the photon chip 200, the optical connection path includes a first type of optical waveguide, such as a silicon nitride waveguide, where the first type of optical waveguides of adjacent two photon integrated circuit sub-chips are optically interconnected. In some embodiments of the present invention, as Figure 8 shown, the first type of optical waveguides 401 facing each other at the junction 403 of adjacent two photon integrated circuit sub-chips are configured into a structure with a gradually increasing waveguide cross-section from one photon integrated circuit sub-chip to the other (for example, horn-shaped, tapered), so that the coupling surface becomes larger, increasing the alignment tolerance of the adjacent first type of optical waveguides 401 at the junction of the photon integrated circuit sub-chips and improving the coupling efficiency. In some embodiments of the present invention, the optical connection path further includes a second type of optical waveguide, such as a silicon waveguide, where in each of the photon integrated circuit sub-chips, the second type of optical waveguide is located in a different layer from the first type of optical waveguide. In each of the photon integrated circuit sub-chips, one or more of the on-chip optical switch, the electro-optic conversion unit, the opto-electric conversion unit, the optical input coupler, and the optical power splitter are optically connected to the corresponding first type of optical waveguide through different second type of optical waveguides, as Figure 9 shown, the second type of optical waveguide 400 and the first type of optical waveguide 401 are optically connected through an evanescent wave coupler 402.

[0067] In some embodiments of the present invention, the on-chip optical switch 202 can be a silicon optical switch, as Figure 6 shown, and can include multiple optical switching units 405. Among them, the optical switching control analog electric chip 204 is configured to control the multiple optical switching units 405 to arrange and exchange the data transmitted in the on-chip optical switch, so that the connection topology between multiple communication nodes 201 can be changed. Figure 6An exemplary structure of an 8x8 strictly non-blocking optical switch is shown. The optical switch is composed of 64 optical switching units 405. By controlling the signal output ports of each switching unit, any path combination between the 8 input channels (input ports 0 to 7) and the 8 output channels (output ports 0 to 7) in the figure can be achieved, and the insertion loss on each path is independent of the path. For example, input port 0 can be connected or disconnected from any one of output ports 0 to 7, so as to achieve the purpose of reconstructing the optical path and real-time configuring the connection topology. In a specific application, the 8x8 silicon optical switch can be further repeated horizontally, and two or more optical switches can be arranged on the same photonic integrated circuit sub-chip to meet greater bandwidth switching requirements. Moreover, since the on-chip all-optical switching network module of the present invention is connected to the circuit board in a pluggable manner, the bandwidth of the semiconductor device can be conveniently and quickly expanded as needed.

[0068] In some embodiments of the present invention, the optical switching unit 405 has a Mach-Zehnder interferometer structure. As Figure 7 shown, the optical switching unit is composed of an electro-optic or thermo-optic phase shifter 406 and a 2x2 beam splitter 407. By controlling the electro-optic or thermo-optic phase shifters 406 on the upper and lower arms, the phase can be changed and the output port position can be changed by using the interference effect, so as to obtain the technical effect of reconstructing the optical path and real-time configuring the connection topology. Furthermore, Figure 2 the connection topology between the various computing modules in the semiconductor device shown can be changed from Figure 3A the fully interconnected topology shown to Figure 3B the ring topology shown or Figure 3C the point-to-point topology shown or any other feasible interconnection topology.

[0069] Returning to Figure 5 , which shows Figure 2 the package structure of the semiconductor device shown. On the substrate 500, the on-chip all-optical switching network module 600 is connected to a series of computing modules 100. The high-speed long-distance SerDes signals on each computing module 100 are transmitted to the corresponding transceiver analog electrical chip 203 through the metal traces on the package substrate 104, the circuit board 500, and the package substrate 206 and through the through-silicon via 205. The modulator or modulator array included in the communication node 201 corresponding to the transceiver analog electrical chip 203 on the photonic chip 200 can be composed of a microring modulator, a Mach-Zehnder modulator, or an electro-absorption modulator. The detector or detector array selects whether to include or not include a wavelength division multiplexing device according to whether the input laser is multi-wavelength or single-wavelength.

[0070] Referring to Figure 4, the light wave emitted by the off-chip single-wavelength or multi-wavelength laser module 300 is transmitted through the fiber array 301 to the optical input coupler 405, such as an on-chip grating coupler or an end-face coupler. The single-wavelength or multi-wavelength laser is coupled into the photonic chip 200 through the optical input coupler 405. On the photonic chip 200, the laser energy is evenly distributed to the input ports of the modulators or modulator arrays under different analog electric chips 203 through a series of optical power splitters such as broadband beam splitters. The signals on the analog electric chips 203 for transceiver are loaded onto the light wave through the modulators or modulator arrays, and data is arranged and exchanged through the on-chip optical switch 202 and the optical switch control analog electric chip 204. Then, it is transmitted to the detectors or detector arrays under other analog electric chips 203 for transceiver through the optical waveguide to receive the modulated optical signal and convert it into an analog electric signal. The analog electric signal is transmitted to the computing module 100 as the receiving end through the circuit board 500, thus completing the information transmission between different computing modules 100.

[0071] Specifically, in an exemplary embodiment, in combination with Figure 2 , Figure 4 and Figure 5, the low-speed parallel signal (i.e., digital information) of the digital electrical chip 101 at the sending end is converted into a high-speed serial signal via the long-distance SerDes interface, and is transmitted to the corresponding analog electrical chip 203 for transceiver on the photon chip 200 through the metal traces on the packaging substrate 104, the circuit board 500, the packaging substrate 206, and the through-silicon via 205. The analog electrical chip 203 for transceiver generates an electrical signal for modulating light based on the received high-speed serial signal. The modulator or modulator array at the communication node 201 corresponding to the analog electrical chip 203 for transceiver at the sending end modulates the light input by the laser module 300 based on the electrical signal of the analog electrical chip for transceiver to obtain a modulated optical signal, thereby loading the information carried by the electrical signal into the modulated optical signal. The modulated optical signal after being modulated by the modulator or modulator array is transmitted to the input port of the corresponding on-chip optical switch 202 via the optical waveguide. The on-chip optical switch 202 determines the output port and reconstructs the optical path under the control of the optical switching control analog electrical chip 204. The modulated optical signal is output from the determined output port of the on-chip optical switch 202, and is transmitted to the detector or detector array below the analog electrical chip 203 for transceiver at the receiving end via the optical waveguide optically connected to the output port. The detector or detector array converts the received modulated optical signal into an analog electrical signal through photoelectric conversion, and sends it to the analog electrical chip 203 at the corresponding receiving end. The analog electrical chip 203 at the receiving end processes the received electrical signal and transmits it to the long-distance SerDes interface on the corresponding digital electrical chip 101 at the receiving end through the through-silicon via 205 of the photon chip 200 and the metal traces on the packaging substrate 104, the circuit board 500, and the packaging substrate 206. The long-distance SerDes interface converts the serial signal into a parallel signal, thereby realizing the communication between the digital electrical chip 101 at the sending end and the digital electrical chip 101 at the receiving end.

[0072] Compared with the electrical interconnection structure of the prior art, the present invention does not pass through any electrical switch, and the high-speed electrical signal of one computing module can reach other computing modules with the lowest delay. In Figure 1 the existing semiconductor device, the computing module 100 including the digital electrical chip 101 is interconnected point-to-point with other computing modules 100 on the circuit board 700 through the trace 105. Since the circuit board trace 105 is relatively long, the high-speed interface design is usually complex and the circuit board 500 needs to be specially designed to meet the sufficient link budget. The high-speed interface often has the cost of delay and power consumption.

[0073] In the present invention, a photon chip formed by splicing waveguides from multiple photon integrated circuit sub-chips of the full photomask size is used as an intermediate layer to integrate a series of analog electrical chips for transceiver and analog electrical chips for optical switching control to form an on-chip all-optical switching network module. A series of computing modules are connected to the on-chip all-optical switching network module through long-distance SerDes interfaces. The high-speed electrical signals of the computing modules are transmitted to the edge of the on-chip all-optical switching network module through circuit board traces. The high-speed electrical signals of the computing modules are loaded onto light waves through the analog electrical chips for transceiver, and then the optical signals shuttle at high speed in the optical intermediate layer. Data is arranged and exchanged through a series of on-chip optical switches and analog electrical chips for optical switching control on the photon chip. The optical path connection is reconstructed through on-chip optical switching, so as to realize reconfigurable optical interconnection between different computing modules, and the high-speed electrical signals of the computing modules can reach other computing modules with the lowest latency.

[0074] In addition, in an exemplary embodiment, a method of manufacturing a semiconductor device includes:

[0075] providing a circuit board having a plurality of electrical connection paths;

[0076] providing an on-chip all-optical switching network module, the on-chip all-optical switching network module including a photon chip and a plurality of analog electrical chips for transceiver disposed above the photon chip, the photon chip including a plurality of communication nodes corresponding to and communicatively connected to the plurality of analog electrical chips for transceiver, a plurality of optical connection paths, and at least one on-chip optical switch configured to be capable of changing a connection topology between the plurality of communication nodes;

[0077] providing a plurality of computing modules;

[0078] disposing the all-optical switching network module and the plurality of computing modules on the circuit board, wherein the plurality of computing modules are communicatively connected to the plurality of analog electrical chips for transceiver of the on-chip all-optical switching network module through the electrical connection paths on the circuit board, such that the connection topology between the plurality of computing modules can be changed by the on-chip optical switch.

[0079] In some embodiments of the present invention, the circuit board has a first plug interface, wherein disposing the on-chip all-optical switching network module on the circuit board includes removably plugging the on-chip all-optical switching network module into the first plug interface.

[0080] In some embodiments of the present invention, the photon chip includes at least two photon integrated circuit sub-chips, adjacent photon integrated circuit sub-chips are optically interconnected with each other, and the photon integrated circuit sub-chips are fabricated by exposure using a full photomask template.

[0081] Those skilled in the art should understand that what is disclosed above is only the embodiments of the present invention. Certainly, it cannot be used to limit the scope of the rights claimed in this application. Equivalent changes made according to the embodiments of the present invention still fall within the scope covered by the claims of this application. For example, the technical solution of the present invention is not limited to being used in a semiconductor device including the illustrated 8 computing modules, and can also be applied to a semiconductor device including less than 8 or more than 8 computing modules. In addition, the present invention is not limited to the communication between computing modules and can be used for the communication between any communication devices. That is to say, the computing modules of the present invention can be replaced by any module, unit or device having the function of receiving and transmitting information. Those skilled in the art should understand that these variations also fall within the scope of patent protection of this application.

Claims

1. A semiconductor device, which comprises: a circuit board having a plurality of electrical connection paths; an on-chip all-optical switching network module disposed on the circuit board, the on-chip all-optical switching network module including a photonic chip and a plurality of transceiver analog electrical chips disposed above the photonic chip, the photonic chip including a plurality of communication nodes corresponding to and communicatively connected to the plurality of transceiver analog electrical chips, a plurality of optical connection paths, and at least one on-chip optical switch configured to be capable of changing the connection topology between the plurality of communication nodes; a plurality of computing modules disposed on the circuit board and communicatively connected to the plurality of transceiver analog electrical chips of the on-chip all-optical switching network module through the electrical connection paths on the circuit board, such that the connection topology between the plurality of computing modules can be changed by the on-chip optical switch.

2. The semiconductor device according to claim 1, wherein, the circuit board has a first insertion interface, and the on-chip all-optical switching network module is removably inserted into the first insertion interface.

3. The semiconductor device according to claim 2, wherein, the circuit board has a plurality of mounting areas, the plurality of computing modules are respectively mounted in the plurality of mounting areas, and the plurality of computing modules are communicatively connected to the first insertion interface through the plurality of electrical connection paths.

4. The semiconductor device according to claim 3, wherein, the plurality of computing modules include a first computing module and a second computing module, and the communication path between the first computing module and the second computing module includes: a first electrical connection path connecting the first computing module and the first insertion interface, a second electrical connection path connecting the first insertion interface and a first transceiver analog electrical chip, a third electrical connection path connecting the first transceiver analog electrical chip and a first communication node, a first optical connection path connecting the first communication node and the on-chip switch, a second optical connection path connecting the on-chip optical switch and a second communication node, a fourth electrical connection path connecting the second communication node and a second transceiver analog electrical chip, a fifth electrical connection path connecting the second transceiver analog electrical chip and the first insertion interface, and a sixth electrical connection path connecting the first insertion interface and the second computing module.

5. The semiconductor device according to claim 1, wherein, the photonic chip includes at least two photonic integrated circuit sub-chips, and adjacent photonic integrated circuit sub-chips are optically interconnected to each other; each of the photonic integrated circuit sub-chips has at least two of the communication nodes, a plurality of the optical connection paths, and at least one of the on-chip optical switches, and on the photonic chip, communication between any two of the communication nodes is achieved via at least one of the on-chip optical switches and the optical connection paths.

6. The semiconductor device according to claim 5, wherein, the on-chip all-optical switching network module further includes at least one optical switching control analog electrical chip, The at least one optical switching control analog electric chip is correspondingly disposed above at least one of the on-chip optical switches to control the corresponding on-chip optical switch.

7. The semiconductor device according to claim 5, wherein, each of the communication nodes includes: an electro-optic conversion unit configured to convert information to be transmitted carried by an electrical signal into an optical signal; and an opto-electric conversion unit configured to convert a received optical signal into an electrical signal carrying the received information.

8. The semiconductor device according to claim 7, wherein, the electro-optic conversion unit includes a modulator or a modulator array; and / or, the opto-electric conversion unit includes a detector or a detector array.

9. The semiconductor device according to claim 8, wherein, the modulator includes a microring modulator, a Mach-Zehnder modulator, or an electro-absorption modulator; and / or, the detector includes a microring detector or a photodiode.

10. The semiconductor device according to claim 8, wherein, each of the photonic integrated circuit sub-chips further has: an optical input coupler and an optical power splitter, wherein, in the photonic chip, the optical input coupler on one of the photonic integrated circuit sub-chips is configured to couple light from an off-chip light source into the photonic chip; and the optical power splitter is optically connected to the optical input coupler configured to couple light from an off-chip light source into the photonic chip, and is configured to split the light from the optical input coupler into a plurality of optical outputs, each of the plurality of optical outputs having substantially the same power, and the plurality of optical outputs are transmitted to respective modulators.

11. The semiconductor device according to claim 10, wherein, in the photonic chip, the optical connection path includes a first type of optical waveguide, wherein, adjacent two photonic integrated circuit sub-chips are optically interconnected by the first type of optical waveguide.

12. The semiconductor device according to claim 11, wherein, the first type of optical waveguides facing each other at the junction of adjacent two photonic integrated circuit sub-chips are configured as a structure in which the waveguide cross-section gradually increases from one photonic integrated circuit sub-chip to the other photonic integrated circuit sub-chip.

13. The semiconductor device according to claim 10, wherein, the optical connection path further includes a second type of optical waveguide, wherein, in each of the photonic integrated circuit sub-chips, the second type of optical waveguide is in a different layer from the first type of optical waveguide; wherein, in each of the photonic integrated circuit sub-chips, one or more of the on-chip optical switch, the electro-optic conversion unit, the opto-electric conversion unit, the optical input coupler, and the optical power splitter are optically connected to the corresponding first type of optical waveguide through different second type of optical waveguides; the second type of optical waveguide is optically connected to the first type of optical waveguide through an evanescent wave coupler.

14. The semiconductor device according to claim 5, wherein, the on-chip optical switch is a silicon optical switch, which includes a plurality of optical switching units; Among them, the optical switching control analog electric chip is configured to control the multiple optical switching units to arrange and exchange the data transmitted in the silicon optical switch, so that the connection topology between the multiple communication nodes can be changed.

15. The semiconductor device according to claim 14, wherein, the optical switching unit has a Mach-Zehnder interferometer structure.

16. The semiconductor device according to any one of claims 5 to 15, wherein, the photonic integrated circuit sub-chip is fabricated by exposure using a full photomask template.

17. The semiconductor device according to claim 1, wherein, each of the computing modules includes a digital electric chip and a memory.

18. A method for manufacturing the semiconductor device according to any one of claims 1 to 17, which comprises: providing a circuit board having a plurality of electrical connection paths; providing an on-chip all-optical switching network module, the on-chip all-optical switching network module including a photonic chip and a plurality of transceiver analog electric chips disposed above the photonic chip, the photonic chip including a plurality of communication nodes, a plurality of optical connection paths, and at least one on-chip optical switch that are correspondingly communicatively connected to the plurality of transceiver analog electric chips, the on-chip optical switch being configured to be able to change the connection topology between the plurality of communication nodes; providing a plurality of computing modules; disposing the all-optical switching network module and the plurality of computing modules on the circuit board, wherein the plurality of computing modules are correspondingly communicatively connected to the plurality of transceiver analog electric chips of the on-chip all-optical switching network module through the electrical connection paths on the circuit board, so that the connection topology between the plurality of computing modules can be changed by the on-chip optical switch.

19. The method according to claim 18, wherein, the circuit board has a first socket, and disposing the on-chip all-optical switching network module on the circuit board includes: removably inserting the on-chip all-optical switching network module into the first socket.

20. The method according to claim 18, wherein, the photonic chip includes at least two photonic integrated circuit sub-chips, adjacent photonic integrated circuit sub-chips are optically interconnected with each other, and the photonic integrated circuit sub-chips are fabricated by exposure using a full photomask template.

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