Memory test management method and device, electronic equipment and storage medium

Abstract

The invention discloses a memory test management method and device, electronic equipment and a storage medium, and relates to the technical field of test management, and the method comprises the following steps: obtaining standard configuration information of a memory; obtaining a plurality of pieces of serial number information about registers according to the standard configuration information; according to the number information, determining a unique ID identifier corresponding to the memory from the corresponding register through identification combination processing; performing a preset performance test on the memory to obtain a test result; generating a log file according to the test result and the corresponding unique ID identifier; and integrating the log files of the plurality of memories to obtain a log data packet. According to the method and the device, the management definition and normalization of the memory test result can be improved.

Description

Technical Field

[0001] The present application relates to the field of test management technology, and in particular to a management method, device, electronic device and storage medium for memory device testing. Background Art

[0002] In modern electronic devices, memory is a key component, and its performance and stability directly affect the operation of the entire device. With the rapid development of technology, the functions of electronic devices are becoming increasingly complex, and the requirements for memory are also getting higher and higher. In the production and use of memory, it is necessary to conduct comprehensive and accurate testing management.

[0003] Currently, there are many challenges in memory test management. After the performance test of the memory, there is a lack of effective means to record and integrate the test results, and it is impossible to accurately associate the test results with the memory. The traditional memory test management method is relatively scattered and chaotic, lacking in systematicness and accuracy, and is not convenient for subsequent tracing and management of the test result log files. Summary of the invention

[0004] The present application aims to solve at least one of the technical problems existing in the prior art. To this end, the present application proposes a memory test management method, device, electronic device and storage medium, which can improve the management clarity and standardization of memory test results.

[0005] In a first aspect, the present application provides a method for managing memory testing, comprising:

[0006] Obtaining standard configuration information of the memory;

[0007] According to the standard configuration information, obtain a number of register number information;

[0008] According to the serial number information, determine the unique ID corresponding to the memory device through identification combination processing;

[0009] Performing a preset performance test on the memory to obtain a test result;

[0010] Generate a log file based on the test result and the corresponding unique ID;

[0011] The log files of multiple memories are integrated and processed to obtain log data packets.

[0012] According to the management method of the memory device test of the first aspect of the present application, there are at least the following beneficial effects: obtaining standard configuration information, parsing and processing the obtained standard configuration information according to the pre-set rules and algorithms, extracting several numbering information about registers, the register corresponding to the numbering information records the identification information about the memory device, and performing a specific combination operation on the read identification information to determine the unique ID identification corresponding to the memory device. According to the pre-established performance test plan, a comprehensive performance test is carried out on the memory device to obtain the test results of the performance performance data of the memory device in various actual use scenarios. The obtained test results are closely associated with the corresponding unique ID identification, and the corresponding log files are generated according to the unified and standardized log format requirements. The log files generated by multiple memory devices are collected and sorted, and finally a complete log data packet is formed. By determining the unique ID identification, each memory device has a clear and unique identity identification in the test management process, and the test results are associated with the unique ID identification, and the memory device ID and each test result are accurately recorded when the log file is generated, so that in the subsequent tracing and management process, the test data corresponding to each memory device can be found quickly and accurately, which improves the management clarity and standardization of the memory device test results.

[0013] According to some embodiments of the first aspect of the present application, determining the unique ID corresponding to the memory device by identifying and combining the numbering information includes:

[0014] According to the numbering information, a logic table is established; wherein the logic table includes a plurality of units, and the number of the units matches the number of the numbering information;

[0015] According to the sequence of the numbering information, the data in each of the registers is read in sequence to obtain an ID sub-identification;

[0016] Fill the ID sub-identifiers into the cells of the logic table in sequence;

[0017] According to the filled logic table, a unique ID is obtained through a preset combination sequence.

[0018] According to some embodiments of the first aspect of the present application, each of the cells of the logic table includes a horizontal coordinate and a vertical coordinate;

[0019] The method of obtaining a unique ID through a preset combination sequence according to the populated logic table includes:

[0020] According to the order of the horizontal coordinates from small to large, a first priority order is set;

[0021] According to the ascending order of the ordinates, a second priority order is set; wherein the priority of the first priority order is greater than the priority of the second priority order;

[0022] According to the first priority order and the second priority order, the ID sub-identifiers in the unit are combined in sequence to obtain a unique ID identifier.

[0023] According to some embodiments of the first aspect of the present application, generating a log file according to the test result and the corresponding unique ID identifier includes:

[0024] Obtaining a test order number and a test timestamp for the memory;

[0025] A log file is generated based on the test result and the corresponding unique ID, the test order number and the test timestamp.

[0026] According to some embodiments of the first aspect of the present application, after the step of integrating the log files of the multiple memories to obtain the log data packet, the step further includes:

[0027] Obtain at least one of the ID to be queried, the time period to be queried, or the order number to be queried;

[0028] According to the query ID, the time period to be queried or the order number to be queried, data is screened based on the log data packet to obtain the log file that meets the conditions.

[0029] According to some embodiments of the first aspect of the present application, after the step of filtering data based on the log data packet according to the query ID identifier, the time period to be queried, or the order number to be queried to obtain the log file that meets the conditions, the step further includes:

[0030] Get the rules engine;

[0031] Extracting information from the screened log files to obtain a test data feature set;

[0032] Based on the rule engine, the test data feature set is formatted to obtain a test data result table that is easy to consult.

[0033] According to some embodiments of the first aspect of the present application, performing a preset performance test on the memory to obtain a test result includes:

[0034] Writing a preset test sequence into the memory;

[0035] After the test sequence is written into the memory, the memory is read to obtain the target sequence;

[0036] A test result is obtained according to the test sequence and the target sequence.

[0037] In a second aspect, the present application also provides a management device for memory test, including:

[0038] An acquiring unit, used for acquiring standard configuration information of the memory;

[0039] A processing unit, used to obtain a plurality of register number information according to the standard configuration information;

[0040] A determination unit, configured to determine a unique ID corresponding to the memory device through identification and combination processing according to the numbering information;

[0041] A testing unit, used to perform a preset performance test on the memory device and obtain a test result;

[0042] A generating unit, configured to generate a log file according to the test result and the corresponding unique ID;

[0043] The integration unit is used to integrate the log files of multiple memories to obtain log data packets.

[0044] In a third aspect, the present application also provides an electronic device, including:

[0045] at least one memory;

[0046] at least one processor;

[0047] at least one program;

[0048] The program is stored in the memory, and the processor executes at least one of the programs to implement the memory test management method as described in any one of the embodiments of the first aspect.

[0049] In a fourth aspect, the present application further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer-executable signal, and the computer-executable signal is used to execute the memory device test management method as described in any embodiment of the first aspect.

[0050] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0052] Figure 1 A flowchart of a method for managing memory testing provided in some embodiments of the present application;

[0053] Figure 2 For this application Figure 1 Flow chart of step S130;

[0054] Figure 3 For this application Figure 2 Flow chart of step S240;

[0055] Figure 4 For this application Figure 1 Flow chart of step S150;

[0056] Figure 5 For this application Figure 1 Regarding the flowchart after step S160;

[0057] Figure 6 For this application Figure 5 Regarding the flowchart after step S520;

[0058] Figure 7 For this application Figure 1 Flow chart regarding step S140. DETAILED DESCRIPTION

[0059] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.

[0060] In the description of the present application, it should be understood that descriptions involving orientation, such as up, down, front, back, left, right, etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0061] In the description of this application, if there is a description of first or second, it is only for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0062] In the description of this application, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in this application based on the specific content of the technical solution.

[0063] In modern electronic devices, memory is a key component, and its performance and stability directly affect the operation of the entire device. With the rapid development of technology, the functions of electronic devices are becoming increasingly complex, and the requirements for memory are also getting higher and higher. In the production and use of memory, it is necessary to conduct comprehensive and accurate testing management.

[0064] Currently, there are many challenges in memory test management. After the performance test of the memory, there is a lack of effective means to record and integrate the test results, and it is impossible to accurately associate the test results with the memory. The traditional memory test management method is relatively scattered and chaotic, lacking in systematicness and accuracy, and is not convenient for subsequent tracing and management of the test result log files.

[0065] Based on this, the present application provides a memory test management method, device, electronic device and storage medium to solve the above-mentioned technical problems. The technical solutions provided by the present application are described in detail one by one below.

[0066] First, refer to Figure 1 The present application provides a method for managing memory testing, including but not limited to the following steps:

[0067] Step S110: obtaining standard configuration information of the memory;

[0068] Step S120: obtaining a number of register number information according to the standard configuration information;

[0069] Step S130: According to the serial number information, determine the unique ID corresponding to the memory device from the corresponding register through identification combination processing;

[0070] Step S140: performing a preset performance test on the memory to obtain a test result;

[0071] Step S150: Generate a log file according to the test result and the corresponding unique ID;

[0072] Step S160: integrating the log files in the multiple memories to obtain a log data packet.

[0073] In step S110 to step S160, standard configuration information is obtained, and the obtained standard configuration information is parsed and processed according to the pre-set rules and algorithms, and several number information about registers are extracted from the registers. The registers corresponding to the number information record the identification information about the memory device, and the read identification information is subjected to a specific combination operation to determine the unique ID identification corresponding to the memory device. According to the pre-established performance test plan, a comprehensive performance test is carried out on the memory device to obtain the test results of the performance data of the memory device in various actual use scenarios. The obtained test results are closely associated with the corresponding unique ID identification, and the corresponding log files are generated according to the unified and standardized log format requirements. The log files generated by multiple memory devices are collected and sorted, and finally a complete log data packet is formed. By determining the unique ID identification, each memory device has a clear and unique identity identification in the test management process, and the test results are associated with the unique ID identification. When generating the log file, the memory device ID and each test result are accurately recorded, so that in the subsequent tracing and management process, the test data corresponding to each memory device can be found quickly and accurately, which improves the management clarity and standardization of the memory device test results.

[0074] It should be noted that the standard configuration information in step S110 can be obtained by internal acquisition, that is, reading the standard configuration information from a specific storage area or register inside the memory device according to the established protocol and instructions. It can also be obtained by external acquisition, that is, obtaining relevant information from external materials such as the user manual of the memory device, and extracting the content related to the memory device configuration by carefully reading the user manual.

[0075] Reference Figure 2 It is understandable that step S130 may include but is not limited to the following steps:

[0076] Step S210: establishing a logic table according to the numbering information; wherein the logic table includes a plurality of units, and the number of the units matches the number of the numbering information;

[0077] Step S220: Read the data in each register in sequence according to the sequence of the numbering information to obtain an ID sub-identifier;

[0078] Step S230: filling the ID sub-identifiers into the cells of the logic table in sequence;

[0079] Step S240: According to the populated logic table, a unique ID is obtained through a preset combination sequence.

[0080] In step S210 to step S240, by establishing a logic table and matching the number of its units with the number of number information, the entire ID identification process is made more orderly and structured, and the data in the corresponding register is read in sequence according to the number information to obtain the ID sub-identifier, and then the ID sub-identifier is filled into the logic table unit in sequence, and the unique ID identification is obtained according to the filled logic table and the preset combination sequence. In this way, the generation of the unique ID identification is highly standardized and repeatable.

[0081] Reference Figure 3 It is understood that each unit of the logic table includes a horizontal coordinate and a vertical coordinate. In step S240, the following steps may be included but not limited to:

[0082] Step S310: setting a first priority order according to the order of the horizontal coordinates from small to large;

[0083] Step S320: setting a second priority order according to the order of the vertical coordinates from small to large; wherein the priority of the first priority order is greater than the priority of the second priority order;

[0084] Step S330: According to the first priority order and the second priority order, the ID sub-identifiers in the unit are combined in sequence to obtain a unique ID identifier.

[0085] The first priority is set according to the order of the horizontal axis from small to large, and the second priority is set according to the order of the vertical axis from small to large. By setting clear horizontal and vertical coordinate order rules, as well as priority relationships, the certainty and uniqueness of the ID sub-identifier combination are ensured. This standardization also facilitates the subsequent maintenance and optimization of algorithms and processes. When faced with the need to generate and manage ID identifiers for a large number of memories, this orderly combination method can efficiently process data.

[0086] For example, according to the standard configuration information, the number information of the registers is MR47, MR48, MR49, MR50, MR51, MR52, MR53 and MR54, respectively, and the ID sub-identifiers are extracted from the above 8 registers, respectively, which are A, B, C, D, E, F, G and H. In practice, the above ID sub-identifiers can be strings composed of binary. Then, the ID sub-identifiers are filled into the cells of the logic table in sequence. The logic table includes 8 cells, which are distributed in two rows and four columns. The abscissa of the first cell is 0 and the ordinate is 0; the abscissa of the second cell is 0 and the ordinate is 1; the abscissa of the fourth cell is 0 and the ordinate is 3; the abscissa of the fifth cell is 1 and the ordinate is 0; the abscissa of the eighth cell is 1 and the ordinate is 3, and so on. Thus, A, B, C, D, E, F, G and H are filled into the first to eighth cells respectively. According to the first priority order and the second priority order, the unique ID identification obtained by combination should be ABCDEFGH.

[0087] Reference Figure 4 It can be understood that step S150 includes but is not limited to the following steps:

[0088] Step S410: Obtain the test order number and test timestamp of the memory;

[0089] Step S420: Generate a log file based on the test results and the corresponding unique ID, test order number and test timestamp.

[0090] In step S410 to step S420, by introducing the test order number, each memory device test is associated with a specific order. In the product production process, when it is necessary to trace the quality of the memory devices of a batch or a certain order, the corresponding log file can be quickly located according to the test order number to understand the detailed test conditions of the memory devices under the order, including various performance indicators, whether there are problems, etc., which greatly improves the accuracy and efficiency of product quality traceability. The test results, unique ID identification, test order number and test timestamp are integrated in the log file, which enriches the content of the log file and makes each log file an independent recording unit containing comprehensive information. This is not only conducive to the subsequent in-depth analysis of the test conditions of a single memory device, but also provides a more complete and reliable data foundation for the entire memory device test management system, which is convenient for data statistics, analysis and mining, and provides a strong basis for decision-making.

[0091] Reference Figure 5 It is understandable that after step S160, the following steps are also included but not limited to:

[0092] Step S510: obtaining at least one of the ID to be queried, the time period to be queried, or the order number to be queried;

[0093] Step S520: According to the query ID, the time period to be queried or the order number to be queried, data is screened based on the log data packet to obtain a log file that meets the conditions.

[0094] In step S510 to step S520, the required log file can be accurately found from a large number of log data packets based on conditions such as the ID to be queried, the time period to be queried, or the order number to be queried. For example, if you want to view the detailed test status of a specific memory device, you can directly locate the log file corresponding to the memory device using the ID to be queried, without having to browse many irrelevant files one by one, which greatly improves the query efficiency. At the same time, it supports multiple query conditions, and users can flexibly choose according to actual needs. You can query the test records of all memory devices in a certain period by time period, or you can query the log files of all memory devices under a certain order by order number, which meets the query needs of different scenarios.

[0095] Reference Figure 6 It is understandable that after step S520, the following steps are also included but not limited to:

[0096] Step S610: Obtain a rule engine;

[0097] Step S620: extract information from the filtered log files to obtain a test data feature set;

[0098] Step S630: Based on the rule engine, the test data feature set is formatted to obtain a test data result table that is easy to consult.

[0099] In step S610 to step S630, the test data feature set in the filtered log file is converted into a test data result table that is easy to consult through the rule engine, and the originally complex and disordered log data is presented in a clear and intuitive table form. Whether it is a technician, a manager or other relevant personnel, they can quickly understand and obtain key information, which greatly improves the readability and usability of the data. At the same time, the test data result table after format conversion is more convenient for data analysis and mining, which greatly saves the time and energy of manual data processing.

[0100] Reference Figure 7 It is understandable that step S140 may include but is not limited to the following steps:

[0101] Step S710: writing a preset test sequence into a memory;

[0102] Step S720: After the sequence to be tested is written into the memory, the memory is read to obtain the target sequence;

[0103] Step S730: Obtain a test result according to the test sequence and the target sequence.

[0104] In step S710 to step S730, by writing a preset test sequence into the memory device, then reading to obtain the target sequence, and then comparing the two, the read and write performance of the memory device can be accurately evaluated. Among them, the preset test sequence can contain various types of data and operations, such as random data, continuous data, a combination of read and write operations, etc., so as to comprehensively detect the performance of the memory device under different conditions. Specifically in the test, when the target sequence is inconsistent with the test sequence, the possible fault point of the memory device can be quickly located according to the specific circumstances of the difference. For example, if the read data is wrong, there may be a problem with the storage unit of the memory device; if the reading speed is too slow, there may be a performance bottleneck in the read and write circuit or the control chip. This helps to quickly diagnose faults and improve maintenance efficiency.

[0105] In a second aspect, the present application also provides a memory test management device, including:

[0106] An acquisition unit, used for acquiring standard configuration information of the memory;

[0107] A processing unit, used for obtaining a plurality of number information about registers according to standard configuration information;

[0108] A determination unit, used to determine the unique ID corresponding to the memory device from the corresponding register through identification combination processing according to the serial number information;

[0109] The test unit is used to perform a preset performance test on the memory and obtain the test result;

[0110] A generating unit, used for generating a log file according to the test result and the corresponding unique ID;

[0111] The integration unit is used to integrate the log files of multiple memories to obtain log data packets.

[0112] The specific implementation of the memory test management device is substantially the same as the specific implementation of the memory test management method described above, and will not be described in detail herein.

[0113] In a third aspect, the present application also provides an electronic device, comprising: at least one memory, at least one processor and at least one program, the program is stored in the memory, and the processor executes one or more programs to implement the above-mentioned memory device test management method.

[0114] In the electronic device, standard configuration information is obtained, and the obtained standard configuration information is parsed and processed according to pre-set rules and algorithms, and several number information about registers are extracted from the registers. The registers corresponding to the number information record the identification information about the memory device, and the read identification information is subjected to a specific combination operation to determine the unique ID identification corresponding to the memory device. According to the pre-established performance test plan, a comprehensive performance test is carried out on the memory device to obtain the test results of the performance data of the memory device in various actual use scenarios. The obtained test results are closely associated with the corresponding unique ID identification, and the corresponding log files are generated according to the unified and standardized log format requirements. The log files generated by multiple memory devices are collected and sorted, and finally a complete log data packet is formed. By determining the unique ID identification, each memory device has a clear and unique identity identification in the test management process, and the test results are associated with the unique ID identification. When generating the log file, the memory device ID and each test result are accurately recorded, so that in the subsequent tracing and management process, the test data corresponding to each memory device can be quickly and accurately found, which improves the management clarity and standardization of the memory device test results.

[0115] The memory may include a program storage area and a data storage area, wherein the program storage area may store an operating system and an application required by at least one function; the data storage area may store relevant data of the management method of the above-mentioned memory device test, etc. In addition, the memory may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device or other non-transient solid-state storage device. In some embodiments, the memory may optionally include a memory remotely arranged relative to the processor, and these remote memories may be connected to the processing module via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0116] One or more signals are stored in a memory, and when executed by one or more processors, the memory test management method in any of the above method embodiments is executed.

[0117] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, which stores a computer program. The computer program is executed by one or more processors, enabling the one or more processors to execute the memory device test management method in the above method embodiment.

[0118] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, i.e., may be located in one place, or may be distributed over multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0119] Through the description of the above embodiments, it will be appreciated by those skilled in the art that all or some of the steps and systems in the disclosed methods above can be implemented as software, firmware, hardware and appropriate combinations thereof. Some physical components or all physical components can be implemented as software executed by a processor, such as a central processing unit, a digital signal processor or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, and the computer-readable medium can include a computer storage medium (or a non-transitory medium) and a communication medium (or a temporary medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as a computer-readable signal, a data structure, a program module or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassette, magnetic tape, disk storage or other magnetic storage device, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, it is well known to those skilled in the art that communication media generally embodies computer readable signals, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0120] It should be understood that in the present application, "at least one item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following items)" or similar expressions refers to any combination of these items, including any combination of single items () or plural items (). For example, at least one of a, b or c () can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0121] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the above units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0122] The units described above as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0123] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0124] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium, including multiple instructions to enable a computer device (such as a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods of various embodiments of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk, and other media that can store programs.

[0125] The embodiments of the present application are described in detail above in conjunction with the accompanying drawings, but the present application is not limited to the above embodiments, and various changes can be made within the knowledge scope of ordinary technicians in the relevant technical field without departing from the purpose of the present application.

Claims

1. A memory device test management method, characterized in that: include: Obtaining standard configuration information of the memory; According to the standard configuration information, obtain a number of register number information; According to the serial number information, determine the unique ID corresponding to the memory device from the corresponding register through identification combination processing; Performing a preset performance test on the memory to obtain a test result; Generate a log file based on the test result and the corresponding unique ID; The log files of multiple memories are integrated and processed to obtain log data packets.

2. The memory test management method according to claim 1, characterized in that: The step of determining the unique ID corresponding to the memory from the corresponding register by identifying the combination process according to the serial number information includes: According to the numbering information, a logic table is established; wherein the logic table includes a plurality of units, and the number of the units matches the number of the numbering information; According to the sequence of the numbering information, the data in each of the registers is read in sequence to obtain an ID sub-identification; Fill the ID sub-identifiers into the cells of the logic table in sequence; According to the filled logic table, a unique ID is obtained through a preset combination sequence.

3. The memory test management method according to claim 2, characterized in that: Each of said cells of said logic table comprises an abscissa and a ordinate; The method of obtaining a unique ID through a preset combination sequence according to the populated logic table includes: According to the order of the horizontal coordinates from small to large, a first priority order is set; According to the ascending order of the ordinates, a second priority order is set; wherein the priority of the first priority order is greater than the priority of the second priority order; According to the first priority order and the second priority order, the ID sub-identifiers in the unit are combined in sequence to obtain a unique ID identifier.

4. The memory test management method according to claim 1, characterized in that: Generating a log file according to the test result and the corresponding unique ID includes: Obtaining a test order number and a test timestamp for the memory; A log file is generated based on the test result and the corresponding unique ID, the test order number and the test timestamp.

5. The memory test management method according to claim 4, characterized in that: After the step of integrating the log files of the multiple memories to obtain the log data packet, the method further includes: Obtain at least one of the ID to be queried, the time period to be queried, or the order number to be queried; According to the query ID, the time period to be queried or the order number to be queried, data is screened based on the log data packet to obtain the log file that meets the conditions.

6. The memory test management method according to claim 5, characterized in that: After the step of filtering data based on the log data packet according to the query ID, the time period to be queried or the order number to be queried to obtain the log file that meets the conditions, the method further includes: Get the rules engine; Extracting information from the screened log files to obtain a test data feature set; Based on the rule engine, the test data feature set is formatted to obtain a test data result table that is easy to consult.

7. The memory test management method according to claim 1, characterized in that: The performing a preset performance test on the memory to obtain a test result includes: Writing a preset test sequence into the memory; After the test sequence is written into the memory, the memory is read to obtain the target sequence; A test result is obtained according to the test sequence and the target sequence.

8. A memory test management device, characterized in that: include: An acquiring unit, used for acquiring standard configuration information of the memory; A processing unit, used to obtain a plurality of register number information according to the standard configuration information; A determination unit, configured to determine the unique ID corresponding to the memory from the corresponding register by identifying and combining the number information; A testing unit, used to perform a preset performance test on the memory device and obtain a test result; A generating unit, configured to generate a log file according to the test result and the corresponding unique ID; The integration unit is used to integrate the log files of multiple memories to obtain log data packets.

9. An electronic device, characterized in that: include: at least one memory; at least one processor; at least one program; The programs are stored in the memory, and the processor executes at least one of the programs to implement the memory test management method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer-executable signal, and the computer-executable signal is used to execute the memory test management method according to any one of claims 1 to 7.

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