Double-sided semi-embedded package substrate and processing method thereof

Abstract

The invention discloses a double-sided semi-embedded packaging substrate and a processing method thereof, and the processing method comprises the steps: carrying out the N times of double-sided circuit manufacturing and the N-1 times of double-sided layer adding of a multi-layer substrate alternately, and obtaining an operation board with two groups of symmetrical circuit structures; the circuit structure is provided with an outer circuit layer and (N-1) inner circuit layers which are communicated with each other, and the inner circuit layer located on the innermost side is provided with a bonding pad. Performing laser groove burning on the working board, and processing a blind groove which is provided with an opening at the outer circuit layer and takes the other inner circuit layer adjacent to the innermost inner circuit layer as the groove bottom locally on each group of circuit structure; removing the copper foil on the bottom of the blind groove; the bonding pads are completely exposed in the blind grooves corresponding to the bonding pads, the blind grooves in the two sets of circuit structures are communicated, and a through groove structure is obtained; and cleaning the surface of the bonding pad to obtain the double-sided semi-embedded packaging substrate. The processing method is simple and reasonable, the processing cost is low, the processing efficiency is high, and the reliability of the obtained double-sided semi-embedded packaging substrate is very high.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit boards, and in particular to a double-sided semi-embedded packaging substrate and a processing method thereof. Background Art

[0002] As the integration density of semiconductor integrated circuits continues to increase, the challenges of packaging technology and packaging substrates are also getting higher and higher. For packaging substrates, in addition to continuously improving the density in the horizontal and vertical directions, heterogeneous integration is also a very meaningful research field, including full embedded packaging, single-sided semi-embedded packaging, double-sided semi-embedded packaging technology, etc.

[0003] The conventional processing method of the semi-embedded package substrate is as follows: three substrates are provided, namely, a first substrate 71 used as a cover, a second substrate 72 with a cavity, and a third substrate 73 with a circuit pattern; first, the three substrates are riveted together into an intermediate board with an embedded cavity structure by a riveting process, as shown in the attached figure. Figure 1 Then, after the outer layer circuit is fabricated and solder mask is processed on the intermediate board, a semi-embedded package substrate can be obtained by using a laser uncovering process. Figure 2 However, the conventional processing method of the semi-embedded package substrate has the following shortcomings in practical application: ① poor riveting accuracy; ② because the intermediate board with the embedded cavity structure needs to be processed, in order to prevent the upper part of the cavity structure from being sunken during the processing, the first substrate cannot be further thinned, which limits the product structure design; ③ the embedded cavity structure is easily delaminated when heated during the processing; ④ the insulating medium is easily damaged when the laser is uncovered, which will cause abnormal appearance and even bring risks to the reliability of the product.

[0004] In view of this, the present invention is proposed. Summary of the invention

[0005] In order to overcome the above defects, the present invention provides a double-sided semi-embedded packaging substrate and a processing method thereof. The processing method is simple and reasonable, has low processing cost and high processing efficiency, and the obtained double-sided semi-embedded packaging substrate has very high reliability.

[0006] The technical solution adopted by the present invention to solve the technical problem is: a processing method of a double-sided semi-embedded packaging substrate, comprising:

[0007] A multi-layer substrate composed of multiple copper foil layers and multiple insulation layers alternately arranged is provided, and after N double-sided circuit production and N-1 double-sided layer addition operations are alternately performed on the multi-layer substrate, a working board with two groups of symmetrical circuit structures is obtained; wherein N ≥ 3, each group of the circuit structures is provided with an outer circuit layer and N-1 inner circuit layers located inside the outer circuit layer, the outer circuit layer and the N-1 inner circuit layers are interconnected, and a pad is provided on the innermost inner circuit layer;

[0008] Performing a laser groove burning operation on the working board to form a blind groove on each group of the circuit structures, the blind groove opening at the outer circuit layer and having a portion of another inner circuit layer adjacent to the innermost inner circuit layer as the bottom of the groove;

[0009] Removing the copper foil on the bottom of the blind groove;

[0010] The pads in each group of the circuit structures are completely exposed in the blind grooves corresponding thereto, and then the blind grooves on the two groups of the circuit structures are connected to obtain a through groove structure for light transmission and air permeability or for component installation;

[0011] The double-sided semi-embedded packaging substrate is obtained by cleaning the surface of the pad.

[0012] As a further improvement of the present invention, the double-sided circuit production adopts a subtractive process or an mSAP process; wherein the subtractive process includes the sequential steps of pre-coating, coating with an anti-corrosion photosensitive film, exposure, development, etching and film stripping; the mSAP process includes the sequential steps of pre-coating, coating with an anti-plating photosensitive film, exposure, development, graphic electroplating, film stripping, baking and flash etching.

[0013] As a further improvement of the present invention, when the subtractive process is used to manufacture any inner circuit layer and the outer circuit layer other than the innermost layer, the subtractive process further comprises a whole-board electroplating process arranged before the lamination pre-treatment;

[0014] When the mSAP process is used to manufacture any inner circuit layer and the outer circuit layer other than the innermost layer, the mSAP process further includes a resist removal and copper deposition process arranged before the lamination pre-treatment.

[0015] As a further improvement of the present invention, the double-sided build-up operation adopts a lamination build-up process; the build-up structure obtained by the double-sided build-up operation includes a stacked insulation build-up layer and a copper foil build-up layer, and the insulation build-up layer adopts pure glue or a semi-cured sheet.

[0016] As a further improvement of the present invention, after the outer layer solder mask operation is performed on the working plate, the laser groove burning operation is performed.

[0017] As a further improvement of the present invention, the processing parameters of the laser groove burning operation are: the mask thickness is 1.8-2.1 mm, the laser pulse width is 5-8 μs, the laser energy is 3.2-8.5 MJ, and the number of laser shots is 2-8;

[0018] In addition, one or more blind grooves are processed on each group of the circuit structures, and the blind grooves on the two groups of the circuit structures are arranged opposite to each other.

[0019] As a further improvement of the present invention, the copper foil on the bottom of the blind groove is removed by an etching process.

[0020] As a further improvement of the present invention, a UV picosecond laser is used to perform laser windowing on the bottom of the blind groove after copper removal to expose the pad, and the processing parameters of the UV picosecond laser are: output power of 4.5 to 10.5 W, repetition frequency of 1000 to 2500 Hz, laser scanning speed of 1000 to 2000 mm / s, and scanning times of 2 to 5 times;

[0021] A UV picosecond laser is also used to open up the two blind grooves that are opposite to each other after copper removal. At that time, the processing parameters of the UV picosecond laser are: output power of 4.5-10.5W, repetition frequency of 800-2000Hz, laser scanning speed of 600-1800mm / s, and scanning times of 3-15 times.

[0022] As a further improvement of the present invention, the surface of the pad is cleaned by a plasma cleaning process, and the processing parameters of the plasma cleaning process are: the cleaning gas adopts a mixed gas composed of nitrogen and oxygen, the flow rate of nitrogen is 100-500sccm, and the flow rate of oxygen is 800-2000sccm; the discharge power is 6-10KW, and the cleaning temperature is 60-90°C.

[0023] The present invention also provides a double-sided semi-embedded packaging substrate, which is manufactured by using the processing method of the double-sided semi-embedded packaging substrate described in the present invention.

[0024] The beneficial effects of the present invention are as follows: compared with the traditional technology, the processing method of the double-sided semi-embedded packaging substrate provided by the present invention has the following advantages: ① The interlayer precision is high, which effectively avoids the precision defects caused by the traditional riveting process; ② The product thickness design is flexible, and the blind groove depth can be flexibly designed according to product design requirements; ③ No embedded cavity structure appears in the entire processing process, thereby greatly reducing the risk of delamination; ④ The processing method is simple, reasonable, low in processing cost, and high in processing efficiency, and the reliability of the obtained double-sided semi-embedded packaging substrate is very high. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 A schematic diagram of the cross-sectional structure of an intermediate plate with an embedded cavity structure manufactured by a traditional processing method;

[0026] Figure 2 A schematic diagram of the cross-sectional structure of a semi-embedded package substrate manufactured using a traditional processing method;

[0027] Figure 3 This is a flow chart of a method for processing a double-sided semi-embedded packaging substrate according to Embodiment 1 of the present invention;

[0028] Figure 4 is a schematic cross-sectional structure diagram of the multi-layer substrate described in Example 1 of the present invention;

[0029] Figure 5 is a schematic cross-sectional structural diagram of the work plate described in Example 1 of the present invention;

[0030] Figure 6 It is a schematic cross-sectional structure diagram of the working board after the outer layer solder masking operation is completed in Embodiment 1 of the present invention;

[0031] Figure 7 It is a schematic cross-sectional structure diagram of a first intermediate plate obtained after the laser groove burning operation is completed on the working plate in Example 1 of the present invention;

[0032] Figure 8 is a schematic cross-sectional structural diagram of a second intermediate board obtained by removing the copper foil on the bottom of the blind groove in the first intermediate board in Example 1 of the present invention;

[0033] Fig. 9 It is a schematic cross-sectional structure diagram of the second intermediate plate after the pad window opening operation is completed in Embodiment 1 of the present invention;

[0034] Fig.10 It is a schematic cross-sectional structure diagram of a double-sided semi-embedded packaging substrate obtained after the blind grooves are opened and the pad surfaces are cleaned on the second intermediate plate in Embodiment 1 of the present invention;

[0035] Fig.11 This is a schematic diagram of the cross-sectional structure of the finished double-sided semi-embedded packaging substrate obtained in Example 1 of the present invention.

[0036] Combined with the attached drawings, the following description is given:

[0037] 1. Multi-layer substrate; 10. Copper foil layer; 11. Composite layer; 2. Working board; 20. Outer circuit layer; 21. Inner circuit layer; 210. Solder pad; 22. Insulation build-up layer; 23. Connecting copper body; 3. Blind groove; 4. Through groove structure; 5. Solder mask; 6. Nickel-gold layer; 71. First substrate; 72. Second substrate; 73. Third substrate. DETAILED DESCRIPTION

[0038] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings.

[0039] Embodiment 1:

[0040] Please refer to the attached Figure 3 ~Attached Fig.11 As shown, this embodiment 1 provides a method for processing a double-sided semi-embedded packaging substrate, comprising the following processing steps:

[0041] S1: A multi-layer substrate 1 consisting of a plurality of copper foil layers 10 and a plurality of insulating layers alternately arranged is provided, and the multi-layer substrate 1 is subjected to N double-sided circuit production operations and N-1 double-sided layer-adding operations alternately in sequence, so as to obtain a working board 2 having two groups of symmetrical circuit structures; wherein N ≥ 3, each group of the circuit structures is provided with an outer circuit layer 20 and N-1 inner circuit layers 21 located on the inner side of the outer circuit layer 20, the outer circuit layer 20 and the N-1 inner circuit layers 21 are interconnected, and a solder pad 210 is provided on the innermost inner circuit layer 21.

[0042] Specifically, the specific processing method of the above S1 is:

[0043] S10: Provide a multi-layer substrate 1, wherein the multi-layer substrate 1 is a multi-layer symmetrical composite board structure composed of multiple copper foil layers 10 and multiple insulation layers arranged alternately in sequence, and at the same time, the innermost layer of the multi-layer substrate 1 is an insulation layer, and the two outermost layers of the multi-layer substrate 1 are both copper foil layers 10. Figure 4 A simplified diagram of the structure of the multi-layer substrate 1 is shown. It can be understood that the composite layer 11 includes other copper foil layers 10 and an insulating layer except the two outermost copper foil layers 10 .

[0044] Furthermore, the present embodiment does not impose any restrictions on the number and thickness of the copper foil layer 10 and the insulating layer, and the thickness is determined according to product design requirements. In addition, the insulating layer can preferably be, but not limited to, a prepreg.

[0045] S11: According to the product wiring density requirements, this embodiment 1 uses a subtractive process to perform a first double-sided circuit production on the multi-layer substrate 1, so as to produce the first inner circuit layer 21 on the two outermost copper foil layers 10 of the multi-layer substrate 1. It can be understood that the two inner circuit layers 21 located on the first layer are back-to-back and symmetrically arranged, and the two inner circuit layers 21 located on the first layer are both provided with an inner circuit pattern A and a pad 210 electrically connected to the inner circuit pattern A.

[0046] Furthermore, the above-mentioned subtractive process includes the following steps: pre-coating treatment, coating with a resist photosensitive film, exposure, development, etching and film stripping. Since the above-mentioned subtractive process belongs to the conventional technical means in the field of circuit board processing, it is briefly described as follows:

[0047] ① Pre-coating treatment: micro-etching (or roughening), cleaning and drying the multi-layer substrate 1 to enhance the bonding force between the anti-corrosion photosensitive dry film and the two outermost copper foil layers 10 in the subsequent process.

[0048] ② Laminating with an anti-corrosion photosensitive film: A vacuum laminating machine is used to laminate an anti-corrosion photosensitive dry film onto the two outermost copper foil layers 10 .

[0049] ③Exposure and development: Exposure is to expose part of the resist photosensitive dry film according to the work data; development is to remove the unexposed area of ​​the resist photosensitive dry film. Furthermore, the exposure operation can be carried out by LDI exposure machine, which has high exposure accuracy and accurate alignment.

[0050] ④ Etching and film stripping: Etching is to remove the portion of the copper foil layer 10 exposed outside the anti-etching photosensitive dry film, so as to form the inner circuit layer 21 (including the inner circuit pattern A and the pad 210) and the inner target on the copper foil layer 10. Film stripping is to remove the anti-etching photosensitive dry film with a strong alkaline solution, so that the inner circuit layer 21 and the inner target can be exposed.

[0051] In addition, after the first inner circuit layer 21 is manufactured, the manufactured inner circuit layer 21 and the inner target are also inspected by an optical scanning method (ie, AOI inspection).

[0052] S12: First, the multi-layer substrate 1 that has completed the first double-sided circuit production is subjected to browning pretreatment, and then an insulating build-up layer 22 and a copper foil build-up layer are sequentially stacked on each inner circuit layer 21 (especially the first inner circuit layer 21), and then lamination is performed to complete the first double-sided build-up operation. Furthermore, the insulating build-up layer 22 can preferably be made of, but not limited to, a prepreg or pure glue. Similarly, this embodiment 1 does not impose any restrictions on the thickness of the insulating build-up layer 22 and the copper foil build-up layer, which is determined according to product design requirements.

[0053] In addition, for the convenience of subsequent description, this embodiment 1 defines the board obtained after completing the above S12 as an intermediate board A.

[0054] S13: First, the intermediate board A is subjected to X-Ray target shooting (or drilling), edge milling (to remove the overflow glue on the edge of the board) and laser drilling (to process the interlayer conductive holes); then, the intermediate board A is subjected to a second double-sided circuit production using a subtractive process, so as to produce the second inner circuit layer 21 on the two copper foil build-up layers of the intermediate board A. It can be understood that the two inner circuit layers 21 located on the second layer are also back-to-back and symmetrically arranged, and the two inner circuit layers 21 located on the second layer are both provided with inner circuit patterns B. At the same time, in the process of producing the second inner circuit layer 21, a connecting copper body 23 is also produced in the interlayer conductive holes, and the connecting copper body 23 connects the inner circuit pattern B of the second inner circuit layer 21 with the inner circuit pattern A of the first inner circuit layer 21.

[0055] Furthermore, compared with the specific processing steps of the subtractive process provided in S11, the subtractive process adopted in the above S13 has an additional whole-board electroplating step, that is: before the pre-lamination treatment, the intermediate board A is electroplated throughout the board to achieve the thickening of the copper foil build-up layer, which is conducive to the production of the second inner circuit layer 21, and also to achieve the full copper plating in the interlayer conductive hole to obtain the connecting copper body 23 connected to the copper foil build-up layer.

[0056] Note: Except for the whole-board electroplating process described above, the other processes in the subtractive process used in the above S13 are the same as the subtractive process provided in the above S11, so they are not described here in detail.

[0057] Furthermore, in this embodiment 1, AOI inspection is also performed on the second inner circuit layer 21 obtained.

[0058] S14: Similar to S12 above, the intermediate board A that has completed the second double-sided circuit production is first subjected to browning pretreatment, and then a layer of semi-cured sheet (or pure glue) and a layer of copper foil build-up layer are stacked in sequence on each of the inner circuit layers 21 (especially the second inner circuit layer 21), followed by lamination and pressing, thus completing the second double-sided build-up operation.

[0059] In addition, for the convenience of subsequent description, this embodiment 1 defines the board obtained after completing the above S14 as an intermediate board B.

[0060] S15: First, the intermediate board B is subjected to X-Ray target shooting (or drilling), edge milling (to remove the overflow glue on the edge of the board) and laser drilling (to process the interlayer conductive holes); then, the intermediate board B is subjected to a third double-sided circuit production using a subtractive process, so as to produce the outer circuit layer 20 on the two copper foil build-up layers of the intermediate board B. It can be understood that the two outer circuit layers 20 are also back-to-back and symmetrically arranged, and the two outer circuit layers 20 are both provided with outer circuit patterns. At the same time, in the process of producing the outer circuit layer 20, a connecting copper body 23 is also produced in the interlayer conductive holes, and the connecting copper body 23 can connect the outer circuit pattern of the outer circuit layer 20 with the inner circuit pattern B of the second inner circuit layer 21. At this time, a work board 2 having two sets of symmetrical circuit structures is obtained, wherein each set of the circuit structures is provided with one outer circuit layer 20 and two inner circuit layers 21 located inside the outer circuit layer 20, the outer circuit layer 20 and the two inner circuit layers 21 are interconnected, and a soldering pad 210 is provided on the innermost inner circuit layer 21; the specific structure of the work board 2 can be found in the attached Figure 5 As shown, it can be understood that the working board 2 is manufactured by alternately performing three double-sided circuit manufacturing operations and two double-sided layer adding operations on the multi-layer substrate 1.

[0061] Furthermore, the subtractive process used in the above S15 is the same as the subtractive process used in the above S13, so it will not be described here in detail.

[0062] Furthermore, in this embodiment 1, AOI inspection is also performed on the outer circuit layer 20 obtained.

[0063] S16: Perform an outer layer solder mask operation on the work board 2 to form a solder mask layer 5 on the outermost layer of the work board 2; Figure 6 As shown. It is understandable that by adopting the processing procedure of first making solder mask and then performing laser groove burning, it is helpful to improve the risk of solder mask oil accumulation and ensure product quality.

[0064] Furthermore, regarding the specific operation method of the outer layer solder mask, the processing steps of "super-roughening, ink coating, pre-curing, exposure, development and post-curing combination" can be adopted, which belongs to the conventional technical means in the field of circuit board processing, so it will not be described in detail here.

[0065] S2: CO treatment of the work plate 2 after the outer layer solder mask operation is completed 2The laser groove burning operation is performed to process a blind groove 3 on each group of the circuit structure, which is opened at the outer circuit layer 20 and has a portion of another inner circuit layer 21 adjacent to the innermost inner circuit layer 21 as the groove bottom. It can be understood that based on the structure of the working board 2 prepared in this embodiment 1, the blind groove 3 is opened at the outer circuit layer 20 and has a portion of the second inner circuit layer 21 as the groove bottom. For details, please refer to the attached Figure 7 shown.

[0066] Furthermore, the above CO 2 The preferred processing parameters for laser groove burning are: mask thickness of 1.8 to 2.1 mm, laser pulse width of 5 to 8 μs, laser energy of 3.2 to 8.5 MJ, and laser shot number of 2 to 8 shots.

[0067] Furthermore, according to product design requirements, this embodiment 1 implements processing of one or more blind grooves 3 on each group of the circuit structures, and the blind grooves 3 on the two groups of the circuit structures are arranged one by one opposite to each other.

[0068] In addition, for the convenience of subsequent description, this embodiment 1 also defines the board obtained after completing the above S2 as a first intermediate board.

[0069] S3: removing the copper foil on the bottom of the blind groove 3 by etching.

[0070] Specifically, the specific processing method of the above S3 is: after cleaning and drying the first intermediate plate, the anti-etching photosensitive dry film is pasted on the two outermost sides of the first intermediate plate by a vacuum film laminating machine; then exposure and development are performed to expose the copper foil on the bottom of the blind groove 3; then alkaline etching is performed to remove the copper foil on the bottom of the blind groove 3; finally, a strong alkaline solution is used to remove the anti-etching photosensitive dry film, that is, the copper removal process is completed. It can be understood that after the above copper removal process, the blind groove 3 is deepened to the point where the insulating layer 22 is partially the groove bottom. For details, please refer to the attached Figure 8 shown.

[0071] In addition, for the convenience of subsequent description, this embodiment 1 also defines the board obtained after completing the above S3 as a second intermediate board.

[0072] S4: First, completely expose the pads 210 in each group of the circuit structures in the corresponding blind grooves 3. Fig. 9 Then the blind grooves 3 on the two groups of the circuit structure are connected to obtain a through groove structure 4 for light transmission and ventilation or for component installation. Fig.10 shown.

[0073] Specifically, in this embodiment 1, a UV picosecond laser is used to laser-open the bottom of the blind groove 3 after copper removal to expose the pad 210, and the preferred processing parameters of the UV picosecond laser are: output power of 4.5-10.5W, repetition frequency of 1000-2500Hz, laser scanning speed of 1000-2000mm / s, and scanning times of 2-5 times. Based on the above preferred processing parameters, it can be ensured that the surface roughness Ra of the pad 210 is 0.2-0.6μm, and the copper loss is ≤2μm; it meets the production requirements very well.

[0074] In addition, in this embodiment 1, a UV picosecond laser is used to open the two blind grooves 3 that are opposite to each other after copper removal to obtain the through groove structure 4; the preferred processing parameters of the UV picosecond laser in this process are: output power of 4.5 to 10.5 W, repetition frequency of 800 to 2000 Hz, laser scanning speed of 600 to 1800 mm / s, and scanning times of 3 to 15 times.

[0075] S5: Clean the surface of the pad 210 to obtain the double-sided semi-embedded packaging substrate. Fig.10 shown.

[0076] Specifically, in this embodiment 1, a plasma cleaning process is used to clean the surface of the pad 210, and the preferred processing parameters of the plasma cleaning process are: the cleaning gas adopts a mixed gas composed of nitrogen and oxygen, the flow rate of nitrogen is 100 to 500 sccm, and the flow rate of oxygen is 800 to 2000 sccm; the discharge power is 6 to 10 kW, and the cleaning temperature is 60 to 90°C.

[0077] S6: According to the product design requirements, the double-sided semi-embedded packaging substrate is subjected to conventional surface treatment (such as electroplating to form a nickel-gold layer 6 on the double-sided semi-embedded packaging substrate), molding, electrical testing, finished product inspection, packaging and shipment, etc., to complete the subsequent production of the double-sided semi-embedded packaging substrate finished product. The specific structure of the double-sided semi-embedded packaging substrate finished product can be found in the attached Fig.11 shown.

[0078] From the above content, it can be seen that compared with traditional technology, the processing method of the double-sided semi-embedded packaging substrate provided by the present application has the following advantages: ① The interlayer precision is high, which effectively avoids the precision defects caused by the traditional riveting process; ② The product thickness design is flexible, and the blind groove depth can be flexibly designed according to product design requirements; ③ No embedded cavity structure appears in the entire processing process, which greatly reduces the risk of delamination; ④ The processing method is simple, reasonable, low in processing cost, and high in processing efficiency, and the reliability of the obtained double-sided semi-embedded packaging substrate is very high.

[0079] Embodiment 2:

[0080] This embodiment 2 also provides a processing method for a double-sided semi-embedded packaging substrate, and compared with embodiment 1, the processing method for a double-sided semi-embedded packaging substrate provided by this embodiment 2 has the following differences: the double-sided circuit manufacturing process used in this embodiment 2 is different from that in embodiment 1.

[0081] Specifically, in this embodiment 2, the mSAP process is used to produce double-sided circuits. The mSAP process includes the following steps: pre-coating treatment, photoresist coating, exposure, development, pattern electroplating, film stripping, baking, and flash etching. Since the mSAP process is also a conventional technical means in the field of circuit board processing, it is briefly described as follows: Taking the production of the first inner circuit layer 21 as an example,

[0082] ① Pre-filming treatment and anti-plating photosensitive film coating: Pre-filming treatment is to micro-etch (or roughen), clean and dry the multi-layer substrate 1. Anti-plating photosensitive film coating is to coat the anti-plating photosensitive dry film on the two outermost copper foil layers 10 by a vacuum laminating machine.

[0083] ②Exposure and development: Exposure is to expose part of the area of ​​the resist-plating photosensitive dry film according to the operating data; development is to remove the unexposed area of ​​the resist-plating photosensitive dry film.

[0084] ③ Graphic electroplating: a copper layer is plated on the exposed area of ​​the copper foil layer 10 to form the prototype of the first inner circuit layer 21 and the prototype of the inner target.

[0085] ④ Stripping and baking: Stripping is to use a strong alkaline solution to remove the anti-plating photosensitive dry film. Baking is to dry the board to facilitate post-processing.

[0086] ⑤ Flash etching: flash etching is performed on the entire copper surface of the board to etch away the area on the copper foil layer 10 that is not covered by the copper plating layer, so as to obtain the first inner layer circuit layer 21 and the inner layer target, etc.

[0087] In addition, when the mSAP process is used in the present embodiment 2 to manufacture the second inner circuit layer 21 and the outer circuit layer 20, the mSAP process also includes a degumming and copper deposition process arranged before the lamination pre-treatment. Through the degumming and copper deposition process, a seed layer (a very thin copper layer) can be deposited in the interlayer via hole, which provides the necessary conditions for forming the connecting copper body 23 in the interlayer via hole during the subsequent process of pattern electroplating.

[0088] Note: In addition to the above-mentioned differences, the multi-layer substrate 1 structure, double-sided layer adding process, laser groove burning process, blind groove 3 bottom copper removal process, pad window opening process, blind groove opening process, pad 210 surface cleaning process, etc. used in this embodiment 2 can all adopt the same technical means as in embodiment 1, so they will not be repeated here.

[0089] Embodiment 3:

[0090] The present embodiment 3 provides a double-sided semi-embedded packaging substrate, which is manufactured by using the processing method of the double-sided semi-embedded packaging substrate described in the above embodiment 1 or embodiment 2.

[0091] Specifically, the specific structure of the double-sided semi-embedded packaging substrate described in this embodiment 3 is as follows: Fig.10 As shown, the double-sided semi-embedded packaging substrate includes a substrate body, and the substrate body is provided with two groups of symmetrical circuit structures, each of the circuit structures is provided with an outer circuit layer 20 and two inner circuit layers 21 located on the inner side of the outer circuit layer 20, the outer circuit layer 20 and the two inner circuit layers 21 are interconnected, and a pad 210 is provided on the innermost inner circuit layer 21; the substrate body is also provided with a through groove structure 4 that passes through the outer circuit layers 20 of the two groups of circuit structures respectively, and the through groove structure 4 is used for light transmission and air permeability or for component installation. In addition, the pad 210 on the circuit structure is also completely exposed in the through groove structure 4.

[0092] It can be seen from the above that the product reliability of the double-sided semi-embedded packaging substrate described in this embodiment 3 is very high.

[0093] Finally, the prefixes "first", "second", "third", etc. of the component names in this application specification (such as the first substrate, the second substrate, the third substrate, etc.), and the suffixes "A", "B", etc. of the component names (such as the middle plate A, the middle plate B, etc.) are only for the convenience of description and are not used to limit the scope of the implementation of the patent of this invention.

[0094] Many specific details are described in the above description to facilitate a full understanding of the present invention. However, the above description is only a preferred embodiment of the present invention. The present invention can be implemented in many other ways different from those described herein, so the present invention is not limited to the specific implementation disclosed above. At the same time, any person familiar with the art can make many possible changes and modifications to the technical solution of the present invention using the methods and technical contents disclosed above without departing from the scope of the technical solution of the present invention, or modify it into an equivalent embodiment of equivalent changes. Any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of protection of the technical solution of the present invention.

Claims

1. A method for processing a double-sided semi-embedded packaging substrate, characterized in that: include: A multi-layer substrate (1) is provided, which is composed of multiple copper foil layers (10) and multiple insulation layers arranged alternately. After N double-sided circuit production operations and N-1 double-sided layer addition operations are performed alternately on the multi-layer substrate (1), a working board (2) having two groups of symmetrical circuit structures is obtained; wherein N ≥ 3, each group of the circuit structures is provided with an outer circuit layer (20) and N-1 inner circuit layers (21) located inside the outer circuit layer (20), the outer circuit layer (20) and the N-1 inner circuit layers (21) are interconnected, and a soldering pad (210) is provided on the innermost inner circuit layer (21); Performing a laser groove burning operation on the working board (2) to form a blind groove (3) on each group of the circuit structures, the blind groove (3) opening at the outer circuit layer (20) and having a portion of another inner circuit layer (21) adjacent to the innermost inner circuit layer (21) as the groove bottom; Removing the copper foil on the bottom of the blind groove (3); The pads (210) in each group of the circuit structures are completely exposed in the blind grooves (3) corresponding thereto, and then the blind grooves (3) on the two groups of the circuit structures are connected to obtain a through groove structure (4) for light transmission and air permeability or for component installation; The surface of the pad (210) is cleaned to obtain the double-sided semi-embedded packaging substrate.

2. The method for processing a double-sided semi-embedded package substrate according to claim 1, characterized in that: The double-sided circuit production adopts a subtractive process or an mSAP process; wherein the subtractive process includes sequential steps of pre-coating treatment, coating with an anti-corrosion photosensitive film, exposure, development, etching and film stripping; the mSAP process includes sequential steps of pre-coating treatment, coating with an anti-plating photosensitive film, exposure, development, graphic electroplating, film stripping, baking and flash etching.

3. The method for processing a double-sided semi-embedded package substrate according to claim 2, characterized in that: When the subtractive process is used to manufacture any inner circuit layer (21) and the outer circuit layer (20) other than the innermost layer, the subtractive process further comprises a whole-board electroplating step arranged before the lamination pre-treatment; When the mSAP process is used to produce any inner circuit layer (21) and the outer circuit layer (20) other than the innermost layer, the mSAP process further comprises a degumming and copper deposition process arranged before the lamination pretreatment.

4. The method for processing a double-sided semi-embedded package substrate according to claim 1, characterized in that: The double-sided layer adding operation adopts a lamination layer adding process; The build-up layer structure obtained by the double-sided build-up operation comprises an insulating build-up layer (22) and a copper foil build-up layer which are stacked, and the insulating build-up layer (22) is made of pure glue or prepreg.

5. The method for processing a double-sided semi-embedded package substrate according to claim 1, characterized in that: After the outer layer of the working plate (2) is subjected to solder masking, a laser groove burning operation is performed.

6. The method for processing a double-sided semi-embedded package substrate according to claim 1, characterized in that: The processing parameters of the laser groove burning operation are: mask thickness is 1.8-2.1 mm, laser pulse width is 5-8 μs, laser energy is 3.2-8.5 MJ, and the number of laser shots is 2-8. In addition, one or more blind grooves (3) are processed on each group of the circuit structures, and the blind grooves (3) on the two groups of the circuit structures are arranged opposite to each other.

7. The method for processing a double-sided semi-embedded package substrate according to claim 1, characterized in that: The copper foil on the bottom of the blind groove (3) is removed by an etching process.

8. The method for processing a double-sided semi-embedded package substrate according to claim 6, characterized in that: A UV picosecond laser is used to perform laser windowing on the bottom of the blind groove (3) after copper removal to expose the pad (210), and the processing parameters of the UV picosecond laser are: output power of 4.5 to 10.5 W, repetition frequency of 1000 to 2500 Hz, laser scanning speed of 1000 to 2000 mm / s, and scanning times of 2 to 5 times; Similarly, a UV picosecond laser is used to open the two blind grooves (3) that are opposite to each other after copper removal. At that time, the processing parameters of the UV picosecond laser are: output power of 4.5 to 10.5 W, repetition frequency of 800 to 2000 Hz, laser scanning speed of 600 to 1800 mm / s, and scanning times of 3 to 15 times.

9. The method for processing a double-sided semi-embedded package substrate according to claim 1, characterized in that: The surface of the pad (210) is cleaned by a plasma cleaning process, and the processing parameters of the plasma cleaning process are: the cleaning gas is a mixed gas composed of nitrogen and oxygen, the flow rate of nitrogen is 100-500sccm, and the flow rate of oxygen is 800-2000sccm; the discharge power is 6-10KW, and the cleaning temperature is 60-90°C.

10. A double-sided semi-embedded packaging substrate, characterized in that: The double-sided semi-embedded packaging substrate is manufactured by the processing method of any one of claims 1 to 9.

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