Automatic test system and method for power driving chip based on digital test equipment

Abstract

The invention relates to the technical field of integrated circuit testing, and particularly provides a power driving chip automatic testing system and method based on digital testing equipment, the system comprises an equipment layer and a data management layer, the equipment layer comprises an upper computer, the digital testing equipment and a testing clamp; the data management layer comprises a test project planning module, a data acquisition and processing module and a test report generation module; the method comprises the following steps: S1, establishing a test environment; s2, testing the output power of the product; s3, testing the product conversion efficiency; s4, testing the waveform change of the output signal of the product; s5, testing the junction temperature of the product; s6, generating a test report; the upper computer is matched with the digital test equipment, so that automatic test can be realized, the test efficiency is remarkably improved, and the consistency of test results is ensured; after the test is completed, powerful data analysis and report generation functions can be provided, and powerful support is provided for chip performance evaluation and quality control.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit testing, and particularly to an automated testing system and method for a power driver chip based on a digital testing device. Background Art

[0002] With the wide application of power driver chips in various fields, the requirements for their performance and quality are getting higher and higher. Power driver chips have numerous performance parameters, such as output power, conversion efficiency, response time, etc. Through testing, it can be verified whether these parameters meet the design specifications, ensuring that the chip can provide stable and accurate drive signals under different working conditions to meet the requirements of various application scenarios. For example, in the power system of automotive electronics, the power driver chip needs to accurately control the speed and torque of the motor. Only through strict testing can it be ensured that its performance parameters meet the requirements of various working conditions of the vehicle. In the actual application environment, power driver chips are affected by various factors such as temperature, humidity, and electromagnetic interference. Testing can simulate these actual working conditions, evaluate the performance of the chip in a complex environment, understand its performance change law under different conditions, and provide a more accurate reference basis for system design.

[0003] The automated testing systems adopted in traditional technologies have the following deficiencies:

[0004] 1. In a semiconductor production line, for multiple products of the same batch, the same testing process needs to be carried out in batches. In traditional technologies, the automated testing system relies on technicians to input multiple test data, parameters, and other information into the upper computer each time, with low work efficiency and strong dependence on technicians, increasing the usage cost of technicians.

[0005] 2. The environmental test chamber adopted in a semiconductor production line only considers the total heat input including the heat input by heating elements and the heat introduced from the outside when regulating the test environment temperature. However, in actual testing, the chip will also generate heat under continuous high-power testing. Therefore, it will affect the accuracy of the temperature regulation of the environmental test chamber, and further affect the accuracy of the chip test results. Summary of the Invention

[0006] In view of the above-mentioned disadvantages of the prior art, the purpose of the present invention is to provide an automated testing system and method for a power driver chip based on a digital testing device, which is used to solve the problems of strong dependence on technicians and inaccurate temperature regulation of the environmental test chamber existing in the prior art.

[0007] To achieve the above purpose and other related purposes, the present invention provides an automated testing system for a power driver chip based on a digital testing device, including:

[0008] The equipment layer includes a host computer, a digital test device, and a test fixture. The host computer is installed with automated test software and configures test parameters and sets several communication interfaces. A single communication interface is configured with a communication protocol, and a single communication protocol corresponds to a communication instruction. The host computer is electrically connected to the digital test device through the communication interface, and a test function is controlled by inputting a single communication instruction.

[0009] The data management layer includes a test project planning module, which is used to formulate, edit and manage test projects according to the test requirements of the power driver chip to be tested; the upper computer can optionally send communication instructions according to the test project to control the corresponding test function of the digital test equipment to test the power driver chip to be tested; it includes a data acquisition and processing module, which is used to collect, store, process and analyze test data; it includes a test report generation module, which is used to automatically generate a test report according to the test results.

[0010] In one embodiment of the present invention, the plurality of communication interfaces are numbered according to the connection sequence of the digital test device, and a quick response symbol is set corresponding to a single communication instruction; the quick response symbol includes at least one of letters, numbers, punctuation marks, and special symbols.

[0011] In one embodiment of the present invention, the test items include output power, conversion efficiency, waveform change of output signal, and heat dissipation capability of the power driver chip.

[0012] In one embodiment of the present invention, the digital testing equipment at least includes a power supply, a digital oscilloscope, an electronic load, a digital ammeter, a digital voltmeter, and a digital power meter.

[0013] In one embodiment of the present invention, the system further comprises an environmental test chamber, the test fixture is placed in the environmental test chamber, and the power driver chip to be tested is mounted on the test fixture for testing.

[0014] In one embodiment of the present invention, at least two thermocouples are provided in the environmental test box, one of which is used to collect the set temperature of the environmental test box, and the other thermocouple is placed at the lower end of the power driver chip to test the autonomous temperature rise signal of the power driver chip during the test process; the environmental test box performs temperature compensation on the test environment based on the thermal balance principle and control theory, and the thermal balance formula used for the temperature compensation is:

[0015]

[0016] In the formula, Q in It is the total heat input in the environmental test chamber, including the heat input from the heating element, the heat input from the outside, and the heat generated by the chip under continuous high-power testing; Q outis the total heat output inside the environmental test chamber, including the heat dissipated through the chamber body and the heat removed by the refrigeration system; m is the mass of the air or the object under test inside the environmental test chamber, etc.; c is the specific heat capacity; is the rate of change of temperature with time.

[0017] In an embodiment of the present invention, the communication interfaces provided on the host computer include UART serial ports, USB, Ethernet, and WLAN; the communication protocols configured for the communication interfaces include Modbus, Profibus, CANopen, EtherCAT, and TCP / IP.

[0018] The present invention also provides an automated test method for a power driver chip based on a digital test device, using the said system; including the following steps:

[0019] S1. Install the power driver chip under test onto the test fixture and then place it in the environmental test chamber. Connect an electronic load to the output end of the power driver chip. The power driver chip is simultaneously connected to a power supply and also connected to the digital test device and the test system to build a test environment;

[0020] S2. The host computer controls a digital voltmeter to measure the output voltage U of the power driver chip, controls a digital ammeter to measure the output current I of the power driver chip, and calculates the output power P of the power driver chip according to the formula P = UI;

[0021] S3. The host computer controls a digital power meter to measure the input power Pin and the output power Pout of the power driver chip respectively, and calculates the conversion efficiency η according to the formula ;

[0022] S4. The host computer controls a digital oscilloscope to output the waveform of the output signal of the power driver chip, and directly reads the rise time t r and the fall time t f of the output signal of the power driver chip from the digital oscilloscope. Define the rise time t r as the time elapsed for the output signal to rise from a specified low level to a specified high level; the fall time t f as the time elapsed for the output signal to fall from a specified high level to a specified low level;

[0023] S5. Use a thermocouple to measure the surface temperature Ta of the power driver chip, obtain the thermal resistance R th from the chip datasheet, and calculate the junction temperature T j = Ta + P diss × R th × d to calculate the junction temperature T j to evaluate the heat dissipation performance of the power driver chip; in the formula, P dissFor the chip power consumption, d is the percentage change in thermal resistance affected by thermal coupling and thermal transient effects;

[0024] S6. During the test, the host computer obtains the data of the digital test equipment in real time through the communication protocol and analyzes the data, and then generates a test report according to the analysis results.

[0025] In an embodiment of the present invention, in step S5, the percentage change in thermal resistance represents the degree of change in the thermal resistance relative to the reference value, and the calculation formula is: In the formula, Rth0 is the initial thermal resistance, that is, the thermal resistance of the power drive chip under standard conditions; the thermal resistance value Rth is affected by thermal coupling effect and thermal transient effect, and the calculation formula is: Rth = Rth×(1 + αΔT) + ΔRth,coupling + Rth,transient. In the formula, α is the temperature coefficient of thermal resistance, ΔT = Ta - T0, Ta is the surface temperature of the power drive chip measured by the thermocouple, T0 is the test environment temperature set by the environmental test chamber, and ΔT is the chip temperature rise; ΔRth,coupling is the change in thermal resistance caused by the thermal coupling effect, and Rth,transient is the change in thermal resistance caused by the thermal transient effect.

[0026] In an embodiment of the present invention, the calculation steps of the percentage change in thermal resistance d include:

[0027] S51. Calculate the change in thermal resistance with temperature, and the calculation formula is R th (Ta) = R th0 ×(1 + αΔT);

[0028] S52. Calculate the change in thermal resistance ΔRth,coupling caused by the thermal coupling effect by solving the thermal resistance matrix. The thermal resistance matrix includes where ΔT i is the temperature rise of the i-th heat source, Ri j is the thermal resistance between the i-th heat source and the j-th heat source, and P j is the power consumption of the j-th heat source;

[0029] S53. Calculate the change in thermal resistance Rth,transient caused by the thermal transient effect, and the calculation formula is In the formula, t is the time, τ = R th0 ×C th , C th is the heat capacity, and τ is the thermal time constant;

[0030] S54. Combine the temperature dependence, thermal coupling effect and thermal transient effect to calculate the total thermal resistance, and the calculation formula is R th = R th (Ta) + ΔR th，coupling + Rth，transient ;

[0031] S55. Calculate according to the percentage formula of the change amount of thermal resistance

[0032] As described above, the power drive chip automatic test system and method based on a digital test device of the present invention have the following beneficial effects:

[0033] 1. By setting a number of communication interfaces in the host computer and corresponding configuring communication protocols, the host computer and the digital test device can communicate independently, that is, a single communication instruction can control a test function through an independent communication protocol, improving the transmission reliability of test signals; the present invention also sets a quick response symbol for each single communication instruction, and for the same function test of multiple products in the same batch, the digital test device can be quickly controlled to respond by inputting the quick response symbol, improving the test work efficiency and reducing the debugging difficulty, making the test not completely dependent on the operation of technicians, and reducing the labor cost.

[0034] 2. The present invention also sets an environmental test chamber to cooperate with the power drive chip for testing. The environmental test chamber can simulate high-temperature and low-temperature environments to detect the working performance of the chip at different temperatures; and in the process of temperature control adjustment, the environmental test chamber not only considers the total heat input including the heat input by the heating element and the heat introduced from the outside, but also considers the heat generated by the chip under continuous high-power testing. For example, the energy loss under continuous high power will cause the chip to heat up, and then better control the environmental test chamber to adjust the temperature for cooling compensation, so that the power drive chip can be tested in a reasonable test environment temperature, improving the accuracy of the test results of the power drive chip.

[0035] 3. The present invention can achieve automatic testing by using the host computer to cooperate with the digital test device, significantly improving the test efficiency, reducing the labor cost, and at the same time avoiding the influence of human factors and environmental factors, ensuring the consistency of test results; after the test is completed, it can provide powerful data analysis and report generation functions, providing strong support for chip performance evaluation and quality control; the digital test device has the advantage of high precision, which can ensure the accuracy and reliability of test results; the present invention has the advantages of high-efficiency automation, high-precision measurement, multi-functional testing, data analysis and report generation, etc., and can be widely applied to the design, production, testing and application of power drive chips, etc., and has a broad market prospect. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 It shows a block diagram of the power drive chip automatic test system based on a digital test device disclosed in the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0037] The following specific embodiments illustrate the implementation manners of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification.

[0038] Please refer to Figure 1 . It should be noted that the structures, ratios, sizes, etc. shown in the drawings of this specification are only used to cooperate with the content disclosed in the specification for those skilled in the art to understand and read, and are not used to limit the implementation conditions of the present invention. Therefore, they do not have any technical substance. Any modification of the structure, change of the ratio relationship, or adjustment of the size, without affecting the effects that the present invention can produce and the purposes that can be achieved, should still fall within the scope covered by the technical content disclosed in the present invention.

[0039] Example 1, please refer to Figure 1 . This embodiment provides a power drive chip automatic test system based on a digital test device, including a device layer and a data management layer. The device layer includes a host computer, a digital test device, and a test fixture. The digital test device at least includes a power supply, a digital oscilloscope, an electronic load, a digital ammeter, a digital voltmeter, and a digital power meter. An automatic test software is installed in the host computer, and test parameters are configured and several communication interfaces are set. The communication interfaces include UART serial ports, USB, Ethernet WLAN. A communication protocol is configured for each communication interface. The communication protocols include Modbus, Profibus, CANopen, EtherCAT, TCP / IP, etc. A communication instruction is set for each communication protocol. The host computer is electrically connected to the digital test device through the communication interface. Each communication instruction controls a test function. By setting several communication interfaces in the host computer and correspondingly configuring communication protocols, independent communication can be carried out between the host computer and the digital test device, that is, outputting a single communication instruction can control a test function through an independent communication protocol, improving the transmission reliability of test signals.

[0040] The data management layer includes a test project planning module, which is used to formulate, edit and manage test projects according to the test requirements of the power driver chip to be tested, and the test projects include the output power, conversion efficiency, waveform change of the output signal, and heat dissipation capacity of the power driver chip; the host computer can send communication instructions according to the test project to control the corresponding test function of the digital test equipment to test the power driver chip to be tested; including a data acquisition and processing module, which is used to collect, store, process and analyze test data; including a test report generation module, which is used to automatically generate a test report according to the test results; by recording and analyzing the data obtained from the test projects such as the output power, conversion efficiency, waveform change of the output signal, and heat dissipation capacity of the power driver chip, it is convenient to find out potential problems and make improvements. These test contents ensure the performance and reliability of the power driver chip under various conditions and meet the design and application requirements.

[0041] The system also includes an environmental test chamber, a test fixture is placed in the environmental test chamber, and the power driver chip to be tested is installed on the test fixture for testing; the setting of the environmental test chamber can cooperate with the power driver chip for testing, and the environmental test chamber can simulate high temperature and low temperature environments to detect the working performance of the chip at different temperatures. For example, in a high temperature environment, the chip's heat dissipation ability, stability, and whether there will be thermal noise and other problems can be examined; in a low temperature environment, the chip's startup performance, signal transmission stability, etc. can be tested. For example, automotive electronic chips need to work stably in high temperature and low temperature environments, so they need to be tested by simulating different temperatures in an environmental test chamber. At least two thermocouples are set in the environmental test chamber, one of which is used to collect the set temperature of the environmental test chamber, and the other thermocouple is placed at the lower end of the power driver chip to test the autonomous heating signal of the power driver chip during the test; the environmental test chamber performs temperature compensation on the test environment based on the thermal balance principle and control theory, and the thermal balance formula used for the temperature compensation is:

[0042]

[0043] In the formula, Q in It is the total heat input in the environmental test chamber, including the heat input from the heating element, the heat input from the outside, and the heat generated by the chip under continuous high-power testing; Q out is the total heat output in the environmental test chamber, including the heat removed by the heat dissipation and refrigeration system of the chamber; m is the mass of the air or the object being tested in the environmental test chamber; c is the specific heat capacity; is the rate of change of temperature with time. This formula fully considers the heat generated by the chip during continuous high-power testing in the testing process, and comprehensively describes the dynamic balance relationship of the heat in the environmental test chamber including the heat input from the heating element and the heat transmitted from the outside world in the environmental test chamber, that is, the difference between the input heat and the output heat will cause the change of the temperature in the chamber; furthermore, it can better control the environmental test chamber to adjust the temperature for cooling compensation, so that the power driver chip can be tested in a reasonable test environment temperature, and improve the accuracy of the test results of the power driver chip.

[0044] Embodiment 2, on the basis of Embodiment 1, in this embodiment, several of the communication interfaces are numbered according to the connection order of the digital test equipment, and a quick response symbol is set for each communication instruction; the quick response symbol includes at least one of letters, numbers, punctuation marks, and special symbols; specifically, the digital test equipment includes a digital oscilloscope, a digital ammeter, a digital voltmeter, and a digital power meter. The digital oscilloscope, the digital ammeter, the digital voltmeter, and the digital power meter are sequentially connected to four communication interfaces, and the four communication interfaces are sequentially numbered as the first communication interface, the second communication interface, the third communication interface, and the fourth communication interface. The quick response symbol set for the communication instruction configured for the first communication interface protocol is 1a, the quick response symbol set for the communication instruction configured for the second communication interface protocol is 2a, the quick response symbol set for the communication instruction configured for the third communication interface protocol is 3a, and the quick response symbol set for the communication instruction configured for the fourth communication interface protocol is 4a; in the semiconductor production line, for the same function test of multiple products in the same batch, the digital test equipment can be quickly controlled to respond by inputting the quick response symbol. For example, if the multiple products in this batch need to perform a waveform change test of the output signal, inputting 1a can trigger the communication between the first communication interface and the digital oscilloscope, and the host computer controls the digital oscilloscope to output the waveform of the output signal of the power driver chip, and reads the waveform rise time and fall time of the output signal of the power driver chip from the digital oscilloscope, so as to obtain the signal conversion speed performance of the multiple products in this batch. The setting of the quick response symbol enables the staff to no longer need to operate the host computer to adjust to the corresponding digital test equipment to start the test, improves the test work efficiency and reduces the debugging difficulty, makes the test not completely dependent on the operation of technicians, and reduces the labor cost.

[0045] Embodiment 3, this embodiment provides an automated test method for a power driver chip based on digital test equipment, using the system described in Embodiment 1; it includes the following steps:

[0046] S1. After installing the power driver chip under test onto the test fixture, place it in an environmental test chamber. Connect an electronic load to the output terminal of the power driver chip. The power driver chip is simultaneously connected to a power supply and to a digital test device and a test system to set up the test environment.

[0047] S2. The host computer controls a digital voltmeter to measure the output voltage U of the power driver chip, and controls a digital ammeter to measure the output current I of the power driver chip. Calculate the output power P of the power driver chip according to the formula P = UI; the output power is a direct indicator of the driving ability of the power driver chip, which shows how much energy the chip can provide to the load and reflects the actual efficiency of the chip when driving the load. For example, in motor drive applications, a higher output power means that the chip can drive a motor with a higher power, making its rotation speed faster, torque greater, and completing more complex mechanical tasks; by testing the output power, the maximum power output level that the chip can reach under different conditions can be determined, which helps to define the performance boundary of the chip. Engineers can understand the maximum output capacity of the chip under ideal and actual working conditions, provide key parameters for system design, and avoid exceeding the power limit of the chip during use, which may cause chip damage or system failure.

[0048] S3. The host computer controls a digital power meter to measure the input power Pin and the output power Pout of the power driver chip respectively, and calculate the conversion efficiency η according to the formula ; the conversion efficiency is one of the key performance indicators of the power driver chip, which directly reflects the ability and efficiency of the chip in converting input power into output power. A higher conversion efficiency means that the chip can utilize the input electrical energy more effectively and convert more electrical energy into useful output power, reflecting the advanced nature of the chip design and manufacturing technology; by testing the conversion efficiency, users can intuitively understand the performance of different chips in power conversion, so as to select products with better performance to meet the requirements of specific application scenarios.

[0049] S4. The host computer controls a digital oscilloscope to output the waveform of the output signal of the power driver chip, and directly read the rise time t r and the fall time t f of the output signal of the power driver chip from the digital oscilloscope. Define that the rise time t r refers to the time experienced by the output signal rising from a specified low level (such as 10% amplitude) to a specified high level (such as 90% amplitude); the fall time t f refers to the time experienced by the output signal falling from a specified high level to a specified low level; the rise time t r and the fall time t f are important parameters for measuring the signal conversion speed, which directly affect the response speed and response stability of the application of the power driver chip.

[0050] S5. Measure the surface temperature Ta of the power drive chip using a thermocouple, and obtain the thermal resistance R from the chip datasheet. th , according to the formula T j = Ta + P diss ×R th ×d to calculate the junction temperature T j , to evaluate the heat dissipation performance of the power drive chip; where P diss is the chip power consumption, and d is the percentage change in the thermal resistance affected by the thermal coupling and thermal transient effects; in this step, the percentage change in the thermal resistance represents the degree of change in the thermal resistance relative to the reference value, and the calculation formula is: In the formula, Rth0 is the initial thermal resistance, that is, the thermal resistance of the power drive chip under standard conditions; the thermal resistance value Rth is affected by the thermal coupling effect and the thermal transient effect, and the calculation formula is: Rth = Rth×(1 + αΔT) + ΔRth,coupling + Rth,transient, where α is the temperature coefficient of the thermal resistance, ΔT = Ta - T0, Ta is the surface temperature of the power drive chip measured by the thermocouple, T0 is the test environment temperature set by the environmental test chamber, and ΔT is the chip temperature rise; ΔRth,coupling is the change in the thermal resistance caused by the thermal coupling effect, and Rth,transient is the change in the thermal resistance caused by the thermal transient effect.

[0051] The calculation steps of the percentage change d in the thermal resistance described in this step include:

[0052] S51. Calculate the change in the thermal resistance value with temperature, and the calculation formula is R th (Ta) = R th0 ×(1 + αΔT);

[0053] S52. Calculate the change in the thermal resistance ΔRth,coupling caused by the thermal coupling effect;

[0054] S53. Calculate the change in the thermal resistance Rth,transient caused by the thermal transient effect, and the calculation formula is In the formula, t is the time, τ = R th0 ×C th , C th is the heat capacity, and τ is the thermal time constant;

[0055] S54. Combine the temperature dependence, thermal coupling effect, and thermal transient effect to calculate the total thermal resistance value, and the calculation formula is R th = R th (Ta) + ΔR th，coupling + R th，transient ;

[0056] S55. Calculate according to the thermal resistance change percentage formula

[0057] Specifically, it is known that the surface temperature Ta of a certain power driver chip currently measured is 25°C, the initial thermal resistance Rth0 is 10°C / W, the temperature coefficient α is 0.01, the thermal time constant τ is 5 s, and the time t is 10 s; it is known that the test environment temperature T0 set by the environmental test chamber is 20°C;

[0058] The calculation steps for the percentage d of the thermal resistance change amount are as follows: S51. Calculate the change in thermal resistance with temperature R th (Ta) = 10×(1 + 0.01×25) = 10×1.25 = 12.5°C / W; S52. Calculate the change in thermal resistance ΔRth,coupling caused by the thermal coupling effect by solving the thermal resistance matrix. The thermal resistance matrix includes where ΔT i is the temperature rise of the i-th heat source, Ri j is the thermal resistance between the i-th heat source and the j-th heat source, and P j is the power consumption of the j-th heat source; obtain the thermal resistance between the heat sources and the power consumption of the heat sources according to the chip parameters, and obtain the change in thermal resistance ΔRth,coupling = 2°C / W; S53. Calculate the change in thermal resistance caused by the thermal transient effect S54. Calculate the total thermal resistance R th = 12.5 + 2 + 8.65 = 23.15°C / W; S55. Calculate the percentage of the thermal resistance change amount

[0059] It is known that the surface temperature Ta of a certain power driver chip is 25°C, the chip power consumption P diss = 2W, and the thermal resistance R th = 30°C / W. It is known that the change in the thermal resistance value d of this power driver chip under test due to thermal coupling and thermal transient effects is 131.5%. Then, according to the formula, the chip junction temperature T j = Ta + P diss ×R th(1-d) = 25°C + 2W × 30°C / W × 131.5% = 89.42°C. Then, the junction temperature of this power driver chip is 89.42°C. According to this key junction temperature parameter, it can be used to evaluate whether the thermal state of the chip is within the safe range and further optimize the heat dissipation design. Through this step, the percentage of the thermal resistance change amount of the power driver chip under the influence of thermal coupling and thermal transient effects can be calculated, and then the junction temperature of this power driver chip can be accurately obtained, which is beneficial to accurately evaluating the heat dissipation performance of the power driver chip and improving the accuracy of the test.

[0060] S6. During the test, the host computer obtains the data of the digital test equipment in real time through the communication protocol and analyzes the data, and then generates a test report.

[0061] In summary, the present invention can achieve automated testing by using a host computer in cooperation with a digital testing device, significantly improving the testing efficiency, reducing the labor cost, and at the same time avoiding the influence of human factors and environmental factors, ensuring the consistency of test results; after the testing is completed, it can provide powerful data analysis and report generation functions, providing strong support for chip performance evaluation and quality control; the digital testing device has the advantage of high precision, ensuring the accuracy and reliability of test results; the present invention has advantages such as high-efficiency automation, high-precision measurement, multi-functional testing, data analysis and report generation, and can be widely applied to the design, production, testing, and application of power drive chips, etc., with broad market prospects. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

[0062] The above embodiments are only illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes completed by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed by the present invention should still be covered by the claims of the present invention.

Claims

1. The power driver chip automatic test system based on digital test equipment is characterized by: include: The equipment layer includes a host computer, a digital test device, and a test fixture. The host computer is installed with automated test software and configures test parameters and sets several communication interfaces. A single communication interface is configured with a communication protocol, and a single communication protocol corresponds to a communication instruction. The host computer is electrically connected to the digital test device through the communication interface, and a test function is controlled by inputting a single communication instruction. The data management layer includes a test project planning module, which is used to formulate, edit and manage test projects according to the test requirements of the power driver chip to be tested; the host computer can send communication instructions according to the test project to control the corresponding test function of the digital test equipment to test the power driver chip to be tested; and includes a data acquisition and processing module, which is used to collect, store, process and analyze test data; It includes a test report generation module for automatically generating a test report based on the test results.

2. The power driver chip automatic test system based on digital test equipment according to claim 1 is characterized in that: The communication interfaces are numbered according to the connection sequence of the digital test equipment, and a quick response symbol is set corresponding to a single communication instruction; the quick response symbol includes at least one of letters, numbers, punctuation marks, and special symbols.

3. The power driver chip automatic test system based on digital test equipment according to claim 1, characterized in that: The test items include the output power, conversion efficiency, waveform change of the output signal, and heat dissipation capacity of the power driver chip.

4. The power driver chip automatic test system based on digital test equipment according to claim 3 is characterized in that: The digital testing equipment at least includes a power supply, a digital oscilloscope, an electronic load, a digital ammeter, a digital voltmeter, and a digital power meter.

5. The power driver chip automatic test system based on digital test equipment according to claim 1, characterized in that: The system also includes an environmental test box, a test fixture is placed in the environmental test box, and the power driver chip to be tested is mounted on the test fixture for testing.

6. The power driver chip automatic test system based on digital test equipment according to claim 5, characterized in that: At least two thermocouples are provided in the environmental test box, one of which is used to collect the set temperature of the environmental test box, and the other thermocouple is placed at the lower end of the power driver chip to test the autonomous temperature rise signal of the power driver chip during the process; the environmental test box performs temperature compensation on the test environment based on the thermal balance principle and control theory, and the thermal balance formula used for the temperature compensation is: In the formula, Q in It is the total heat input in the environmental test chamber, including the heat input from the heating element, the heat input from the outside, and the heat generated by the chip under continuous high-power testing; Q out is the total heat output in the environmental test chamber, including the heat removed by the heat dissipation and refrigeration system of the chamber; m is the mass of the air or the object being tested in the environmental test chamber; c is the specific heat capacity; is the rate of change of temperature with time.

7. The power driver chip automatic test system based on digital test equipment according to claim 1, characterized in that: The communication interfaces arranged on the host computer include UART serial port, USB, Ethernet WLAN; the communication protocols configured on the communication interface include Modbus, Profibus, CANopen, EtherCAT.TCP / IP.

8. A power driver chip automated testing method based on digital testing equipment, using the system described in any one of claims 1 to 7, characterized in that: The steps include: S1. Install the power driver chip to be tested into the test fixture and place it in the environmental test chamber. Connect the electronic load to the output end of the power driver chip. Connect the power driver chip to the power supply and the digital test equipment and test system to build the test environment. S2, the host computer controls the digital voltmeter to measure the output voltage U of the power driver chip, controls the digital ammeter to measure the output current I of the power driver chip, and calculates the output power P of the power driver chip according to the formula P=UI; S3, the host computer controls the digital power meter to measure the input power Pin and output power Pout of the power driver chip respectively, according to the formula Calculate the conversion efficiency η; S4. The host computer controls the digital oscilloscope to output the waveform of the output signal of the power driver chip, and directly reads the waveform rise time t of the output signal of the power driver chip from the digital oscilloscope. r and the fall time t f , define the rise time t r It refers to the time it takes for the output signal to rise from a specified low level to a specified high level; the fall time t f It refers to the time it takes for the output signal to drop from a specified high level to a specified low level; S5. Use a thermocouple to measure the surface temperature Ta of the power driver chip and obtain the thermal resistance R from the chip datasheet. th , according to the formula T j =Ta+P diss ×R th ×dCalculate the junction temperature T j , to evaluate the heat dissipation performance of the power driver chip; where P diss is the power consumption of the chip, d is the percentage change of thermal resistance due to thermal coupling and thermal transient effects; S6. During the test, the host computer obtains the data of the digital test equipment in real time through the communication protocol and analyzes the data, and generates a test report based on the analysis results.

9. The power driver chip automatic testing method based on digital testing equipment according to claim 8, characterized in that: In step S5, the percentage of thermal resistance change indicates the degree of change of the thermal resistance value relative to the reference value, and the calculation formula is: In the formula, Rth0 is the initial thermal resistance, that is, the thermal resistance of the power driver chip under standard conditions; the thermal resistance value Rth is affected by the thermal coupling effect and the thermal transient effect. The calculation formula is: Rth = Rth × (1 + αΔT) + ΔRth, coupling + Rth, transient, where α is the temperature coefficient of thermal resistance, ΔT = Ta-T0, Ta is the surface temperature of the power driver chip measured by the thermocouple, T0 is the test environment temperature set by the environmental test chamber, and ΔT is the chip temperature rise; ΔRth, coupling is the thermal resistance change caused by the thermal coupling effect, and Rth, transient is the thermal resistance change caused by the thermal transient effect.

10. The power driver chip automatic testing method based on digital testing equipment according to claim 9, characterized in that: The calculation step of the thermal resistance change percentage d comprises: S51, calculate the thermal resistance value as the temperature changes, the calculation formula is R th (Ta)=R th0 ×(1+αΔT); S52. Calculate the thermal resistance change ΔRth caused by the thermal coupling effect by solving the thermal resistance matrix. The thermal resistance matrix includes Where ΔT i is the temperature rise of the ith heat source, Ri j is the thermal resistance between the ith heat source and the jth heat source, P j is the power consumption of the jth heat source; S53. Calculate the thermal resistance change Rth, transient caused by thermal transient effect. The calculation formula is: Where t is time, τ = R th0 ×C th , C th is the heat capacity, τ is the thermal time constant; S54. Combine the temperature dependence, thermal coupling effect and thermal transient effect to calculate the total thermal resistance value, the calculation formula is R th =R th (Ta)+ΔR th，coupling +R th，transient ; S55, calculated according to the percentage formula of thermal resistance change

Images