Digital phase-locked amplifier based on frequency adaptive technology and weak signal acquisition system and method

Abstract

The invention relates to a digital lock-in amplifier based on a frequency adaptive technology and a weak signal acquisition system and method, and the system comprises a front-end signal processing module which is used for obtaining a weak signal to be detected; the frequency self-adaptive tracking module is used for performing fast Fourier transform on the frequency of the weak signal to be measured to obtain the position of the maximum spectral line so as to synthesize a frequency control word, further generate a local reference signal and simultaneously adjust the coefficients of a low-pass filter and a loop filter and the series adjustment mode of a carrier synchronization ring; the multi-rate narrow-band low-pass filter module is used for multiplying the digital signal by a local reference signal and then carrying out filtering and down-sampling on a high-frequency signal to obtain a plurality of mutually orthogonal difference frequency components; the vector operation module is used for carrying out vector operation on the plurality of mutually orthogonal difference frequency components to obtain the phase and the amplitude in the weak signal to be measured; and the man-machine interaction module is used for displaying and storing the phase and the amplitude in the weak signal to be detected.

Description

Technical Field

[0001] The present invention relates to the technical field of weak signal detection, and in particular to a digital lock-in amplifier and a weak signal acquisition system and method based on frequency adaptive technology. Background Art

[0002] Weak signal acquisition systems are widely used in many places and environments that require high sensitivity and precise measurement. Typical application areas include medical diagnosis, environmental monitoring, physical experiments, aerospace communications, earthquake monitoring and other fields. For example, in the medical field, the acquisition of weak biological signals (such as electrocardiograms and electroencephalograms) is a common application, and weak signal acquisition systems can be used to capture these tiny bioelectric signals; in environmental monitoring, such as gas leak detection, air quality monitoring and seismic wave detection, highly sensitive weak signal acquisition systems are also required. Common weak signal acquisition methods include traditional amplifier methods, filter enhancement methods, digital signal processing methods, and phase-locked amplification technology. These methods enhance weak signals and reduce noise through different technical means, thereby improving the detection accuracy of signals.

[0003] Although the existing weak signal acquisition methods have played an important role in practical applications, they also have some defects that cannot be ignored. First, although the traditional amplifier method can amplify the signal, it is easy to amplify the noise, resulting in an imbalance in the ratio of signal to noise, affecting the reliability of the signal. Secondly, although the filter enhancement method can reduce noise, the optimization of the filter design is very complicated, and some useful signal components may be lost, especially when the signal frequency changes greatly. Digital signal processing methods (such as FFT) can effectively extract signals in specific frequency bands, but when faced with high-frequency noise or nonlinear noise, the processing algorithm may require a long calculation time, resulting in poor real-time performance. In addition, traditional phase-locked amplification technology usually relies on an external reference signal. If the reference signal is unstable or has a large error, it will also affect the signal acquisition accuracy.

[0004] As a signal acquisition technology, the digital lock-in amplifier has high sensitivity and anti-interference ability, but the current digital lock-in amplifier still has some defects. First, the performance of the digital lock-in amplifier may be limited in the face of high noise environment, especially when the signal frequency changes greatly, the phase-locking accuracy of the digital lock-in amplifier may be reduced, resulting in inaccurate measurement results; secondly, the digital lock-in amplifier requires an accurate reference signal, and if the quality of the reference signal is poor, it may introduce additional errors, or even cause the signal to fail to lock correctly; thirdly, the design and debugging of the digital lock-in amplifier is relatively complex, especially in terms of frequency adaptability. If the system fails to adaptively adjust the operating frequency, it may affect the sensitivity and stability of the system; finally, the digital lock-in amplifier has high requirements for the low-pass filter in the demodulation. If accurate results are required, the filter needs to have a very narrow bandwidth, but the order of the extremely narrow filter is very high at high sampling rates, and the required hardware resources are quite large. Therefore, how to improve the frequency adaptability of the digital lock-in amplifier, reduce the dependence on the reference signal, and improve the performance of the low-pass filter is still a technical problem at present. Summary of the invention

[0005] In order to solve the problems existing in the above-mentioned prior art, the purpose of the present invention is to provide a digital phase-locked amplifier and weak signal acquisition system and method based on frequency adaptive technology. The present invention adopts a dual tracking mechanism of frequency domain analysis and carrier synchronization loop feedback control, and an adaptive adjustment unit is adopted in the carrier synchronization loop, which can adjust the relevant coefficients according to the frequency range of the signal and the noise, greatly enhancing the weak signal detection capability of the system, so that it can show better performance and reliability in a high noise environment, and can realize fast and accurate detection of weak signals; the present invention also adopts the cascade downsampling technology in multi-rate digital signal processing to realize an extremely narrow low-pass filtering of 0.1Hz in limited FPGA resources.

[0006] To achieve the above object, the present invention provides the following solutions:

[0007] A digital lock-in amplifier and weak signal acquisition system based on frequency adaptive technology, comprising:

[0008] A front-end signal processing module is used to obtain a weak signal to be tested, process the weak signal to be tested, and convert it into a digital signal;

[0009] A frequency adaptive tracking module is used to perform a fast Fourier transform on the frequency of the digital signal, extract the main frequency components in the signal, obtain the position of the maximum spectrum line, and convert it into a direct digital frequency in the carrier synchronization loop, synthesize the direct digital frequency into a frequency control word, and generate a local reference signal with the same frequency and phase as the carrier of the weak signal to be measured according to the frequency control word, and adjust the coefficients of the low-pass filter and the loop filter and the series adjustment mode of the carrier synchronization loop at the same time;

[0010] A multi-rate narrowband low-pass filter module, used for filtering and down-sampling the high-frequency signal after multiplying the digital signal with the local reference signal, retaining key information, and obtaining a plurality of mutually orthogonal difference frequency components;

[0011] A vector operation module, used for performing vector operation on the plurality of mutually orthogonal difference frequency components to obtain the phase and amplitude of the weak signal to be measured;

[0012] The human-computer interaction module is used to display and store the phase and amplitude of the weak signal to be measured.

[0013] Optionally, the front-end signal processing module includes:

[0014] A preamplifier circuit is used to suppress noise interference and complete the preliminary amplification of the weak signal to be measured;

[0015] The post-amplification circuit is used to perform post-amplification on the weak signal to be tested after the primary amplification and provide the main gain of the system;

[0016] Anti-aliasing filter to filter out signals that exceed the target sampling frequency;

[0017] An analog-to-digital conversion circuit, used for converting the filtered signal into the digital signal;

[0018] Wherein, the preamplifier circuit, the post-amplifier circuit, the anti-aliasing filter and the analog-to-digital conversion circuit are connected in sequence.

[0019] Optionally, the frequency adaptive tracking module includes:

[0020] The adaptive notch filter submodule is used to suppress interference signals of specific frequencies by using the LMS algorithm without losing other useful signals. At the same time, when there is a significant frequency difference between the target signal and the interference signal in the spectrum, the interference frequency is removed while retaining other frequency components by adjusting the filter parameters.

[0021] A fast Fourier transform submodule is used to perform fast Fourier transform on the digital signal frequency processed by the adaptive notch filter submodule, extract the main frequency components in the signal, obtain the position of the maximum spectrum line, and convert it into a direct digital frequency in the carrier synchronization loop, and synthesize the direct digital frequency into a frequency control word;

[0022] The carrier synchronization loop submodule is used to generate a local reference signal with the same frequency and phase as the carrier of the weak signal to be measured according to the frequency control word, and to adjust the coefficients of the low-pass filter and the loop filter and the stage adjustment mode of the carrier synchronization loop.

[0023] Optionally, the fast Fourier transform submodule includes:

[0024] An FFT unit is used to perform a fast Fourier transform on the frequency of the digital signal processed by the adaptive notch filter submodule, so as to convert the signal from the time domain to the frequency domain;

[0025] A data modulus unit, used to extract the modulus value of the spectrum in the frequency domain, obtain the strongest frequency component, and infer the carrier frequency;

[0026] A maximum spectrum line value calculation unit, used to obtain the frequency point with the largest amplitude in the spectrum while inferring the carrier frequency, wherein the frequency point is the main carrier frequency corresponding to the signal;

[0027] The conversion unit converts the main carrier frequency into a frequency control word:

[0028] M0=(number-1)*2 DDS_N-N =(number-1)<<22

[0029] Among them, M0 is the DDS frequency control word, number is the position of the maximum spectrum line, DDS_N is the phase accumulation word length of DDS, and N is the number of FFT sampling points.

[0030] Optionally, the carrier synchronization loop submodule includes:

[0031] An overall performance parameter design unit, used to determine a natural angular frequency and a damping coefficient; wherein the natural angular frequency and the damping coefficient are both related to a loop filter coefficient and a low-pass filter cutoff frequency;

[0032] The expression for determining the natural angular frequency is:

[0033]

[0034] Where ζ is the damping coefficient, (S / N) i The input signal carrier power and the pre-bandwidth B of the carrier synchronization loop i The ratio of the power of the signal to the noise, (S / N)L It is the ratio of the input signal carrier power to the noise power of the single-sided noise bandwidth;

[0035] The lower limit expression for determining the natural angular frequency is:

[0036] ΔW L =2ζW n

[0037] Among them, W n is the natural angular frequency;

[0038] The adaptive adjustment unit is used to judge the frequency range of the signal through the frequency control word, and set the initial loop filter coefficient and the cut-off frequency of the low-pass filter according to the frequency range, so as to enter the first-level fast locking state, and further adopt the double threshold oscillation judgment method to detect whether the steady-state phase difference oscillates. When oscillation occurs, it is judged according to the maximum value of the steady-state phase difference. If the maximum value is less than threshold one, the loop filter coefficient is switched to the three-level adjustment mode. If the maximum value is between threshold one and threshold two, the loop filter coefficient is switched to the two-level adjustment mode; if the maximum value is greater than threshold two, the loop filter coefficient is maintained in the first-level adjustment mode. When switching to the three-level adjustment mode, the double threshold oscillation judgment method is applied again in the second-level slow tracking state to detect whether the steady-state phase difference oscillates. If the oscillation continues, it further enters the third-level precise tracking state, so as to maintain the best frequency lock.

[0039] Optionally, using a dual threshold oscillation determination method to detect a steady-state phase difference includes:

[0040] When the carrier synchronization loop captures the signal, it goes through the fast capture process and the tracking process in sequence, that is, the steady-state phase difference presents an oscillating signal that fluctuates up and down;

[0041] During the fast capture process, the maximum and minimum values ​​of the steady-state phase difference in the fast capture process are determined according to the coefficient of the steady-state phase difference. When the maximum and minimum values ​​in the fast capture process continue for a first target time, the tracking process is entered. During the tracking process, the maximum and minimum values ​​in the tracking process are determined according to the coefficient of the steady-state phase difference. After the maximum and minimum values ​​in the tracking process continue for a second target time, an oscillation enable signal is output to determine whether the steady-state phase difference oscillates.

[0042] Optionally, the carrier synchronization loop submodule further includes:

[0043] A multiplier unit, used for multiplying the received output signal of the adaptive notch filter submodule with the reference carrier signal generated by the local DDS oscillator to generate low-frequency and high-frequency signals, and obtaining a signal containing a DC component and a doubled frequency as the frequency is continuously adjusted, extracting a carrier frequency component from the input signal to be tested according to the signal containing the DC component and the doubled frequency, and converting the carrier frequency component into a baseband signal;

[0044] A low-pass filter unit, used to filter out high-frequency components in the baseband signal, retain a DC component, and obtain phase error information based on the DC component;

[0045] A loop filter unit, used for smoothing the error voltage signal of the low-pass filter, removing high-frequency noise and retaining low-frequency components;

[0046] The DDS oscillator unit is used to generate a high-precision, frequency-adjustable signal based on the low-frequency component, that is, a local reference signal with the same frequency and phase as the carrier of the weak signal to be measured.

[0047] Optionally, the multi-rate narrowband low-pass filter module includes:

[0048] An integral comb filter unit, used to extract the high sampling rate signal of the analog-to-digital conversion circuit according to a first target multiple, and reduce the original sampling rate of the integral comb filter to the first target sampling rate;

[0049] A half-band filter unit, used for decimating the signal extracted by the integral comb filter unit according to a second target multiple, and reducing the original sampling rate of the half-band filter to the second target sampling rate;

[0050] The low-pass filter unit is used to extract signal changes under the low-frequency threshold and remove high-frequency noise. At the same time, the low-pass filter sampling rate has been reduced to the third target sampling rate to achieve a narrow-band low-pass filtering function of 0.1Hz.

[0051] Optionally, the vector operation module includes:

[0052] An amplitude operation unit, used for performing a vector operation of square sum and square root on a plurality of mutually orthogonal difference frequency components to obtain a DC result proportional to the amplitude of the external modulation signal to be measured, thereby demodulating the amplitude of the weak signal to be measured;

[0053] The phase operation unit is used to divide the multiple mutually orthogonal difference frequency components and then calculate their arc tangents, and then make appropriate adjustments according to the positive and negative relationship between the internal divisor and the dividend to obtain the phase of the weak signal to be measured.

[0054] To achieve the above object, the present invention also provides a digital lock-in amplifier and a weak signal acquisition method based on frequency adaptive technology, comprising:

[0055] Acquire a weak signal to be measured, process the weak signal to be measured, and convert it into a digital signal, perform fast Fourier transform on the frequency of the digital signal, extract the main frequency component in the signal, obtain the position of the maximum spectrum line, and convert it into a direct digital frequency in a carrier synchronization loop, synthesize the direct digital frequency into a frequency control word, generate a local reference signal with the same frequency and phase as the carrier of the weak signal to be measured according to the frequency control word, and adjust the coefficients of the low-pass filter and the loop filter and the series adjustment mode of the carrier synchronization loop at the same time;

[0056] After multiplying the digital signal with the local reference signal, the high-frequency signal is filtered and down-sampled to retain key information, and multiple mutually orthogonal difference frequency components are obtained. Vector operations are performed on the multiple mutually orthogonal difference frequency components to obtain the phase and amplitude of the weak signal to be tested, and the phase and amplitude of the weak signal to be tested are displayed and stored.

[0057] The beneficial effects of the present invention are:

[0058] The frequency adaptive tracking module in the present invention improves the frequency adaptive capability and locking stability of the system. The present invention optimizes the adaptive tracking algorithm and combines the dual tracking mechanism of frequency domain analysis and carrier synchronization loop feedback control to achieve that the system can stably lock the target frequency when the noise and frequency change greatly. This overcomes the problem in the prior art that the phase-locked amplifier is prone to lose lock or the locking accuracy decreases when the frequency changes greatly. Especially in a high dynamic environment, such as when the signal frequency changes frequently, it can provide more reliable and accurate signal capture, significantly improving the robustness and reliability of the system.

[0059] The adaptive adjustment unit in the carrier synchronization loop of the present invention solves the problem that a single carrier synchronization loop cannot simultaneously meet the requirements of fast locking, high dynamics and high precision. Traditional digital phase-locked amplifiers usually rely on a single carrier synchronization loop for frequency tracking, but a single carrier synchronization loop often has limitations when fast locking and high precision are required at the same time. To address this problem, the present invention introduces an adaptive adjustment unit, which utilizes a two-level dynamic threshold judgment and a three-level coefficient adjustment mechanism to achieve frequency synchronization in a high noise environment and a wider frequency range, which not only improves the adaptability of the system, but also enables the system to achieve a good balance between high precision requirements and dynamic response, solving the bottleneck problem in traditional technologies, narrowing the system bandwidth and reducing hardware resources.

[0060] The present invention adopts the cascade downsampling technology in multi-rate digital signal processing, and effectively reduces the amount of data that the system needs to process by gradually reducing the high sampling rate of the front-end ADC. This technological innovation enables the system to implement a 0.1Hz narrowband filtering function within limited FPGA hardware resources, significantly improving the utilization efficiency of hardware resources and subsequent demodulation accuracy. Compared with the requirements for high sampling rate and high processing capability in the prior art, the present invention greatly reduces the consumption of hardware resources and system power consumption while achieving the same functions, and has higher engineering practicality and economy.

[0061] The design architecture of the present invention combines a front-end signal processing module, a frequency adaptive tracking module, a multi-rate narrowband low-pass filter module and a vector operation module, so that the system can flexibly process different types of weak signals, further improving the versatility and adaptability of the system. Especially in the face of complex signal environments, the system can adaptively adjust the working mode and stably output high-quality acquisition results. Compared with traditional systems, this flexibility and scalability enables the present invention to better cope with complex and dynamically changing application requirements.

[0062] In summary, the present invention overcomes the limitations of the prior art and improves the accuracy, robustness and resource utilization efficiency of the system by introducing frequency adaptive tracking, dynamic adjustment and multi-rate downsampling technology. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0064] Figure 1 This is an overall system block diagram of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology according to an embodiment of the present invention;

[0065] Figure 2 It is a flow chart of an adaptive oscillator in a frequency adaptive tracking module of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology according to an embodiment of the present invention;

[0066] Figure 3 It is an FPGA simulation diagram of an adaptive oscillator in a frequency adaptive tracking module of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology according to an embodiment of the present invention;

[0067] Figure 4A frequency estimation error diagram of FFT carrier frequency estimation in a frequency adaptive tracking module of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology in an embodiment of the present invention under different signal-to-noise ratios in a low frequency range;

[0068] Figure 5 A frequency estimation error diagram of FFT carrier frequency estimation in a frequency adaptive tracking module of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology according to an embodiment of the present invention under different signal-to-noise ratios in a high frequency range;

[0069] Figure 6 A table showing the relationship between the loop coefficient, the locking time and the steady-state phase difference in a conventional carrier synchronization loop of a digital lock-in amplifier based on frequency adaptive technology and a weak signal acquisition system according to an embodiment of the present invention;

[0070] Figure 7 A curve showing the relationship between the unilateral noise bandwidth and the damping coefficient of an ideal second-order carrier synchronization loop in a carrier synchronization loop of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology according to an embodiment of the present invention;

[0071] Figure 8 A table showing the relationship between the level adjustment mode and the loop coefficient change of the adaptive adjustment unit in the carrier synchronization loop of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology in different frequency ranges according to an embodiment of the present invention;

[0072] Fig. 9 It is a basic flow chart of an adaptive adjustment unit in a carrier synchronization loop of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology according to an embodiment of the present invention;

[0073] Fig.10 A basic flow chart of a dual threshold oscillation judgment method of an adaptive adjustment unit in a carrier synchronization loop of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology according to an embodiment of the present invention;

[0074] Fig.11 The amplitude-frequency response curve of an IIR filter designed with different functions in a low-pass filter unit in a carrier synchronization loop of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology according to an embodiment of the present invention;

[0075] Fig.12 It is a curve of the finite word length effect of IIR filter coefficient and output data of a low-pass filter unit in a carrier synchronization loop of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology according to an embodiment of the present invention;

[0076] Fig.13A table showing whether a loop filter in a carrier synchronization loop of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology according to an embodiment of the present invention is a causal stable system under different coefficients;

[0077] Fig.14 The error rate of a single carrier synchronization loop of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology in different frequency ranges and different signal-to-noise ratios according to an embodiment of the present invention;

[0078] Fig.15 The error rate of a frequency adaptive tracking module of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology in different frequency ranges and different signal-to-noise ratios according to an embodiment of the present invention;

[0079] Fig.16 The locking time of a frequency adaptive tracking module of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology in different frequency ranges and different signal-to-noise ratios according to an embodiment of the present invention;

[0080] Fig.17 The spectrum characteristics of the CIC filter unit at different levels in a multi-rate narrow-band low-pass filter module of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology according to an embodiment of the present invention;

[0081] Fig.18 A basic structural block diagram of a CIC filter unit in a multi-rate narrow-band low-pass filter module of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology according to an embodiment of the present invention;

[0082] Fig.19 This is a waveform diagram of FPGA and MATLAB joint simulation of a multi-rate narrow-band low-pass filter module of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology under different mixing signals according to an embodiment of the present invention;

[0083] Fig. 20 This is a waveform diagram of FPGA and MATLAB joint simulation of a phase-locked amplification process of a multi-rate narrow-band low-pass filter module of a digital phase-locked amplifier and a weak signal acquisition system based on frequency adaptive technology according to an embodiment of the present invention;

[0084] Fig.21 A test result table of the overall system of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology in an embodiment of the present invention at the MATLAB software level under a specified signal to be tested;

[0085] Fig. 22Specific test result diagrams of the overall system of a digital phase-locked amplifier and a weak signal acquisition system based on frequency adaptive technology in an embodiment of the present invention at the MATLAB software level under a specified test signal; (a) is the amplitude and phase test results of the test signal at a 100dB signal-to-noise ratio, (b) is the amplitude and phase test results of the test signal at a 40dB signal-to-noise ratio, (c) is the amplitude and phase test results of the test signal at a 0dB signal-to-noise ratio, (d) is the amplitude and phase test results of the test signal at a -6dB signal-to-noise ratio, (e) is the amplitude and phase test results of the test signal at a -20dB signal-to-noise ratio, and (f) is the amplitude and phase test results of the test signal at a -25dB signal-to-noise ratio;

[0086] Fig.23 This is a test result table of the overall system of a digital lock-in amplifier and a weak signal acquisition system based on frequency adaptive technology in an embodiment of the present invention at the FPGA hardware level under a specified signal to be tested. DETAILED DESCRIPTION

[0087] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0088] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0089] The present embodiment discloses a digital lock-in amplifier and weak signal acquisition system based on frequency adaptive technology, which includes the following steps: a front-end signal processing module, which is used for preprocessing, conditioning and filtering weak signals to be tested, so as to ensure that the input signal can be transmitted to the core part of the lock-in amplifier with the best quality; a frequency adaptive tracking module, which is used for automatically adjusting and locking the target signal frequency in a high-noise and dynamically changing signal frequency environment, so as to ensure that the reference signal inside the lock-in amplifier always keeps synchronization with the target signal, thereby maximizing the detection sensitivity and accuracy of the signal; a multi-rate narrowband low-pass filter module, which is used for gradually reducing the high sampling rate of the front-end ADC, and realizing a narrowband low-pass filtering function of 0.1 Hz in limited FPGA hardware resources, thereby effectively reducing the amount of calculation and storage in the intermediate process of signal processing; a vector operation module, which is used for mathematically processing the two-way cross-correlation function obtained by the front-end module, and using the correlation algorithm to effectively and accurately extract the phase and amplitude from the weak signals to be tested; a human-computer interaction module, which is used for displaying and storing the detection results, and completing the digital lock-in amplifier and weak signal acquisition based on frequency adaptive technology.

[0090] The front-end signal processing module is composed of a preamplifier circuit, a post-amplifier circuit, an anti-aliasing filter and an analog-to-digital conversion circuit; the preamplifier circuit is used to suppress noise interference while completing the initial amplification of the signal; the post-amplifier circuit is composed of a multi-stage amplifier and is the main gain provider of the system; the anti-aliasing filter and the analog-to-digital conversion module, one is responsible for filtering out signals greater than half of the system sampling frequency to ensure that the system does not have aliasing effects, and the other converts the analog signal into a digital signal and sends the resulting digital signal to the FPGA for further processing.

[0091] The frequency adaptive tracking module is composed of an adaptive notch filter, a fast Fourier transform (FFT) carrier frequency estimation, and a carrier synchronization loop. The adaptive notch filter is used to remove or suppress interference signals of a specific frequency, that is, to remove the 50Hz power frequency signal when acquiring, processing, and analyzing the signal. Its function is to adaptively adjust the filter coefficients based on the phase and amplitude of the interference frequency signal using the LMS algorithm, track its parameter changes, and maintain effective filtering of the interference signal. The FFT carrier frequency estimation is used to roughly estimate and analyze the frequency of the weak signal to be measured, so as to obtain the position of the maximum spectrum line and convert it into the direct digital frequency synthesis (DDS) frequency control word in the carrier synchronization loop, laying the foundation for improving the accuracy and accelerating the locking time of the subsequent carrier synchronization loop. Due to the fence effect of FFT, this method can only capture some discrete frequencies, and the frequencies between the FFT transform spectrum lines cannot be tracked, so a carrier synchronization loop is required for more precise locking; the carrier synchronization loop is used to generate a local reference signal with the same frequency and phase as the carrier of the weak signal to be measured, for subsequent demodulation by the demodulator. After the FFT points to the vicinity of the carrier frequency, the carrier synchronization loop searches and achieves the purpose of truly synchronizing the carrier frequency, effectively eliminating the influence of the frequency difference; compared with the traditional carrier synchronization loop, this carrier synchronization loop introduces an adaptive adjustment unit, which can realize real-time switching of loop coefficients under different frequencies and different noises, effectively improving the loop locking time and accuracy, and solving the problem that the traditional carrier synchronization loop is difficult to simultaneously meet the requirements of fast locking, high dynamics and high precision.

[0092] The multi-rate narrowband low-pass filter module is composed of a CIC filter, a half-band (HB) filter and a 0.1Hz narrowband low-pass filter. The CIC filter is used to decimate the high sampling rate signal of the front-end ADC by 2500 times. Because of its simple structure and no multiplier unit, it is a FIR filter based on zero cancellation, so it is suitable for working under high sampling rate conditions. The half-band (HB) filter is used to decimate the signal extracted by the CIC filter by 2 times, and a 6-stage cascade method is adopted to achieve 64 times decimate. Because its transition band is often too large for the last stage of the multi-stage filter and cannot meet the overall requirements of the filtering characteristics, it is not suitable as the last stage of the multi-stage extraction filter. The 0.1Hz narrowband low-pass filter is used to extract very low frequency (near 0.1Hz) signal changes, thereby effectively extracting the frequency components and amplitude changes of the weak signal to be measured. By filtering out high-frequency noise and other irrelevant signals, it can accurately capture the subtle changes of the target signal, especially in a low signal-to-noise ratio environment, enhance the detectability of weak signals, and improve the sensitivity and accuracy of the system.

[0093] The vector operation module is composed of an amplitude operation unit and a phase operation unit; the amplitude operation unit is used to perform vector operations such as square sum and square root extraction on two mutually orthogonal difference frequency components after passing through the multi-rate narrowband low-pass filter module, so as to eliminate the influence of the phase difference and obtain a DC result proportional to the amplitude of the external modulation signal to be measured, thereby demodulating the amplitude of the weak signal to be measured; the phase operation unit is used to divide the two mutually orthogonal difference frequency components after passing through the multi-rate narrowband low-pass filter module and then calculate their arc tangent, and then make appropriate adjustments according to the positive and negative relationship between the internal divisor and the dividend to obtain the corresponding phase result.

[0094] The human-computer interaction module is composed of the PS end of FPGA, Ethernet and QT host computer; the PS end of FPGA is used to store relevant results and configure the Ethernet port; Ethernet is used to transmit the relevant results of the lower computer to the host computer through the TCP protocol; the QT host computer is used to display the relevant output results and can transfer parameters.

[0095] The present embodiment also provides a digital phase-locked amplifier and weak signal acquisition method based on frequency adaptive technology, comprising the following steps: preprocessing, conditioning and filtering the weak signal to be measured, and filtering out the signal greater than half of the system sampling frequency to ensure that the system does not have an aliasing effect, and then using the ADC to convert the analog signal into a digital signal; under the action of the frequency adaptive tracking module, the system first performs adaptive filtering of the industrial frequency signal on the collected weak digital signal, and then combines the dual tracking mechanism of frequency domain analysis and carrier synchronization loop feedback control, as well as the algorithm control of the adaptive adjustment unit. The system can stably lock the target frequency in an environment with high noise and large frequency changes, and effectively reduce the phase error. Finally, the system can generate a local reference signal with the same frequency and phase as the carrier of the weak signal to be measured.

[0096] The local sine and cosine reference signals generated by the frequency adaptive tracking module are multiplied with the weak signal to be measured, and then filtered and downsampled through a multi-rate narrowband low-pass filter to filter the high-frequency signal, ultimately reducing the amount of data and calculation while retaining key information to obtain two mutually orthogonal difference frequency components; vector operations are performed on these two components to obtain the phase and amplitude information of the weak signal to be measured; the detection results are displayed and stored to complete the acquisition of weak signals.

[0097] The method for tracking weak signals based on the frequency adaptive tracking module and obtaining a local reference signal with the same frequency and phase as the carrier of the weak signal to be measured is as follows: first, the collected weak signal to be measured is adaptively filtered by the 50Hz industrial frequency signal using the LMS algorithm; then, a 65536-point FFT carrier frequency estimation is performed on the data, and the modulus operation is performed to obtain the maximum spectral line position, and then the correlation operation is used to convert it into a DDS frequency control word; the obtained DDS frequency control word is provided to the DDS in the carrier synchronization loop to generate a preliminary reference signal, and the initial IIR filter and loop coefficients as well as the several-level adjustment mode are determined by the adaptive adjustment unit, and the subsequent steady-state phase difference is used to adjust the frequency control word. The correlation coefficient is adjusted in real time according to the changes in the weak signal to be measured; then the reference signal is used to multiply the weak signal to be measured to obtain the error phase, and then the error voltage is obtained through the IIR filter. The error voltage passes through the loop filter to obtain the control voltage, and finally the control voltage is added to the DDS to produce a frequency offset, thereby tracking the frequency of the weak signal to be measured. If this frequency is a fixed frequency, under the action of the control voltage, the frequency of the reference signal will gradually approach the frequency of the weak signal to be measured. Once the two are equal, if certain conditions are met, the carrier synchronization loop can stabilize, thereby achieving locking, and a certain steady-state phase difference is maintained between the two, thereby generating a local reference signal with the same frequency and phase as the carrier of the weak signal to be measured.

[0098] The steps for the adaptive adjustment unit to adjust the coefficients in real time are as follows: by analyzing the DDS frequency control word output by the FFT carrier frequency estimation module, the system sets the initial IIR filter and loop filter coefficients, and selects the appropriate adjustment mode; first, the system enters the fast locking state, so that the frequency of the reference signal quickly approaches the frequency of the target signal to be measured, thereby achieving fast locking; when the signal frequency range meets the secondary adjustment mode, the system uses a dual threshold oscillation judgment method to detect whether the steady-state phase difference has an oscillation of a certain amplitude, thereby determining whether it can enter the second-level slow tracking state; at this stage, the frequencies of the reference signal and the target signal are further approached to achieve higher accuracy; if the signal frequency range meets the third-level adjustment mode, after entering the second-level slow tracking state, the system continues to use the dual threshold oscillation judgment method to determine the oscillation of the steady-state phase difference, and determines whether it can enter the third-level precise tracking state; at this stage, the frequencies of the reference signal and the target signal reach higher accuracy, achieving the final precise locking.

[0099] Among them, the first-level adjustment mode is a fast locking state, in which the natural angular frequency and loop coefficient are large, so that the carrier synchronization loop can quickly bring the phase of the reference signal close to the phase of the signal to be measured, thereby achieving fast locking; the second-level adjustment mode is a slow tracking state, in which the natural angular frequency and loop coefficient will decrease, so that the phase of the reference signal will be further close to the phase of the signal to be measured without losing lock; the third-level adjustment mode is a precise tracking state, in which the natural angular frequency and loop coefficient will be further reduced on the basis of the previous state, so that the phase of the reference signal is almost consistent with the phase of the signal to be measured, thereby achieving precise tracking.

[0100] In more detail, in the first-level adjustment mode, the error voltage signal generated by the carrier synchronization loop is large, which causes a large change in the DDS frequency control word, allowing the frequency of the reference signal to quickly approach the signal to be measured; the subsequent two adjustment modes are for more precise locking.

[0101] The steps of the dual threshold oscillation judgment method are as follows: when the carrier synchronization loop captures the signal, it will first undergo a fast capture process, that is, the steady-state phase difference changes greatly, and then after capturing the signal frequency, it will start the tracking process, that is, the steady-state phase difference presents an oscillating signal that fluctuates up and down; therefore, for each locked state, first enter the first threshold tracking (fast capture process), determine the maximum and minimum values ​​according to the coefficient of the steady-state phase difference, and when these two thresholds meet a certain duration, enter the second threshold tracking (tracking process), and output the oscillation enable signal when the same requirements are met.

[0102] The local sine and cosine reference signals generated by the frequency adaptive tracking module are multiplied with the weak signal to be measured respectively, and then the high-frequency signal is filtered and down-sampled by a multi-rate narrowband low-pass filter. First, a three-stage CIC filter cascade is used to achieve 2500 times decimation filtering, and the sampling rate of 50MHz is reduced to 20kHz. At this time, the attenuation of the first sidelobe level reaches 40.38dB, and the stopband attenuation can meet the basic practical needs, and there will be no signal distortion caused by excessive passband attenuation. The three-stage CIC filter structure implements the Hogenauer decimation filter according to the transposition theorem and the Noble identity, which greatly improves the system's computing speed and reduces resource occupation. Since the HB filter can reduce the number of multiplications per second by nearly half when performing 2 times decimation compared with the general linear phase FIR filter, the six-stage HB filter cascade is used to achieve 64 times decimation filtering, and 20kHz is reduced to 312.5Hz. Finally, a 0.1Hz FIR filter is implemented at a sampling rate of 312.5Hz.

[0103] like Figure 1As shown, this embodiment discloses a digital phase-locked amplifier and weak signal acquisition system based on frequency adaptive technology. In order to achieve the requirements of high dynamic range, high precision, high speed, strong anti-interference ability and frequency adaptability of the system, the system adopts a front-end signal processing module, a frequency adaptive tracking module, a multi-rate narrowband low-pass filter module, a vector operation module and a human-computer interaction module so that the system can provide a stable and accurate weak signal extraction function in a strong noise environment. Specifically, it includes: a front-end signal processing module, which is used for preprocessing, conditioning and filtering of weak signals to be measured, to ensure that the input signal can be transmitted to the core part of the phase-locked amplifier with the best quality. The frequency adaptive tracking module is used to automatically adjust and lock the target signal frequency in a dynamically changing signal frequency environment, ensuring that the reference signal inside the phase-locked amplifier always remains synchronized with the target signal, thereby maximizing the system's frequency tracking accuracy, anti-interference ability, adaptability and demodulation performance; and can simultaneously meet the requirements of high dynamics and high precision, and can adapt to the frequency changes of the signal in real time, especially in the case of high noise, frequency drift or drastic frequency changes, by dynamically adjusting related parameters, it can always ensure accurate tracking of the target signal; accurate carrier frequency estimation and synchronization can significantly improve the demodulation performance of the signal, especially in high noise or low signal-to-noise ratio environments, can improve the demodulation robustness and bit error rate performance.

[0104] A further implementation method is that the frequency adaptive tracking module is respectively composed of an adaptive notch filter module, an FFT carrier frequency estimation module and a carrier synchronization loop module; the adaptive notch filter module adopts an LMS algorithm to effectively suppress interference signals of a specific frequency without losing other useful signals, especially when there is an obvious frequency difference between the target signal and the interference signal in the spectrum, it can effectively remove the interference frequency and retain other frequency components by adjusting its filter parameters; Figure 2 As shown in FIG. 1 , it is a principle block diagram of an adaptive notch filter for filtering out a single-frequency power frequency signal. x(t) is an input signal superimposed with an interference signal, s(t) is a useful signal to be retained, and by using two orthogonal single-frequency signals and adjusting their weights w1 and w2, a signal that is exactly the same as the interference signal can be synthesized, thereby outputting a useful signal. In this example, it is mainly used to eliminate 50Hz power frequency interference, improve the signal-to-noise ratio of the target signal, and increase the accuracy of subsequent processing steps. Figure 3As shown, the useful signal in the input data is a 100Hz sinusoidal signal, and the interference signal is a 50Hz single-frequency signal. It can be seen from the figure that the output signal converges quickly, and the useful signal is consistent with the output signal, indicating that this module can achieve the purpose of automatically filtering out interference signals. The FFT carrier frequency estimation module is used to perform fast Fourier transform on the frequency of the weak signal to be measured, extract the main frequency components in the signal, thereby obtaining the position of the maximum spectrum line, and converting it into the direct digital frequency synthesis (DDS) frequency control word in the carrier synchronization loop, laying the foundation for improving the accuracy and accelerating the locking time of the subsequent carrier synchronization loop;

[0105] A further implementation method is that the FFT carrier frequency estimation module includes: an FFT unit for performing fast Fourier transform, which is an algorithm for converting a signal from the time domain to the frequency domain; in this embodiment, a signal can be decomposed into multiple frequency components through a 65536-point FFT transform, each frequency component is represented by a complex number, wherein the input is a 12-bit weak signal to be measured, and the output is a 12-bit real part representing the amplitude and an imaginary part representing the phase; a data modulus unit for extracting the modulus value of the spectrum data, finding the strongest frequency component, and inferring the carrier frequency; in this embodiment, the output result of the FFT unit is first transcoded, that is, the conversion from the complement code to the original code. When the binary complement code is negative, then When converting to the original code, the sign bit remains unchanged, the value bit is inverted bit by bit and one is added to the end. When the binary complement code is a positive number, the complement code is the original code; then the square root of the transcoded data is taken, and the enable signal of the square root unit needs to be processed with a beat delay; the maximum spectral line value calculation unit is used to find the frequency point with the largest amplitude in the spectrum, which usually corresponds to the main carrier frequency of the signal; in this embodiment, the effective signal of the modulo is given to the enable signal of the maximum spectral line value calculation unit, and then the counter starts counting, and the result after modulo continuously updates the maximum value. Whenever the maximum value changes, the position (number) of the maximum spectral line also changes, and the sampling frequency (F s ) is 50MHz, and the number of FFT sampling points (N) is 65536 points, that is, the output frequency (F out )for:

[0106]

[0107] The conversion unit is used to convert the main carrier frequency obtained by the maximum spectrum line value calculation unit into a DDS frequency control word, and provide it to the carrier synchronization loop for use; in this embodiment, the relationship between the DDS frequency control word (M0) and the signal frequency is:

[0108]

[0109] Where DDS_N is the phase accumulation word length of DDS, which is 38 bits. According to formulas (1) and (2), the frequency control word can be obtained as:

[0110]

[0111] Among them, the number of FFT sampling points (N) is 65536 points, which can be expressed as 2^16. In FPGA, the multiplication and division operations can be transformed into shift-and-distance operations, which reduces the corresponding resources and speeds up the operation. That is, the frequency control word becomes:

[0112] M0=(number-1)*2 DDS_N-N =(number-1)<<22 (4)

[0113] like Figure 4 , Figure 5 As shown in the figure, the frequency offset variation of the FFT carrier frequency estimation module in the low frequency and medium and high frequency ranges under different signal-to-noise ratios is shown; it can be seen from the figure that the frequency offset presents a constant value with the change of the signal-to-noise ratio in the entire frequency range, indicating that the module can maintain a relatively stable frequency estimation phase difference in a wide range of signal-to-noise ratios from 100dB to -25dB; in addition, it is further shown that the error rate of the module is almost zero within the test range, which means that the FFT carrier frequency estimation module can provide very accurate frequency estimation under this setting;

[0114] Specifically, due to the fence effect in the FFT algorithm, FFT can only capture some discrete frequencies, which will be offset from the actual frequency. After calculation, the resolution of FFT is 762.94Hz, which means that the maximum offset between the frequency estimated by FFT and the actual frequency is 762.94Hz / 2=381.47Hz, and when it is below 381.47Hz, the estimated frequency is 0. In order to solve this problem, when the estimated frequency is set to 0 in the system, the DDS frequency control word is fixed to 200Hz to reduce the error caused by this reason; Figure 4 As shown, the maximum frequency deviation in the low frequency range is 4.633%, while in Figure 5 The maximum frequency offset in the medium and high frequency range is 0.098%, which indicates that as the signal frequency decreases, the frequency estimation deviation of the FFT carrier frequency estimation module increases. In other words, the frequency offset of the low-frequency signal is large, which means that the subsequent carrier synchronization loop needs longer time to lock. On the contrary, in the high frequency range, the error of frequency estimation is small, and the impact on system performance is relatively small.

[0115] In summary, although the FFT carrier frequency estimation module shows very good stability under different signal-to-noise ratios, the accuracy of frequency estimation is still affected by the signal frequency. The offset of frequency estimation in the low-frequency signal range is higher, and the requirements for the subsequent carrier synchronization loop are also greater.

[0116] The carrier synchronization loop module is used to overcome the fence effect of the FFT carrier frequency estimation module, that is, FFT can only capture part of the discrete frequencies, and the frequencies between the FFT transformation spectrum lines cannot be tracked, which has certain defects; the carrier synchronization loop can generate a local reference signal with the same frequency and phase as the carrier of the weak signal to be measured, for subsequent demodulation by the demodulator. After the FFT points to the vicinity of the carrier frequency, the carrier synchronization loop will search and achieve the purpose of truly synchronizing the carrier frequency, overcoming the fence effect limitation of simple FFT tracking and effectively eliminating the influence of frequency difference.

[0117] like Figure 6 As shown in Figure 1, the test results of a single carrier synchronization loop at a sampling rate of 128kHz are shown. The results show that the smaller the natural angular frequency coefficient, that is, the smaller the loop filter coefficient, the smaller the steady-state phase difference after locking, the more accurate the frequency tracking, but the longer the locking time; conversely, the larger the steady-state phase difference, the shorter the locking time; when the coefficient changes, the loop first uses a large coefficient for fast locking, and then switches to a small coefficient for precise tracking. In this way, both the steady-state phase difference and the locking time can reach the minimum value, that is, the requirements of fast locking and high precision are met at the same time.

[0118] In order to solve the problem that a single carrier synchronization loop cannot meet the requirements of fast locking, high dynamics and high precision at the same time, and when facing rapidly changing signal conditions, there are often problems such as insufficient response speed and low synchronization accuracy. Especially in a high noise environment, the frequency synchronization process of the carrier synchronization loop may be affected by the internal fixed coefficient, which ultimately affects its locking accuracy or even fails to lock. In order to effectively overcome this problem, the present invention proposes a more flexible and efficient adaptive adjustment unit, which combines a two-level dynamic threshold judgment and a three-level coefficient adjustment mechanism, and can achieve precise adjustment in a changing working environment. Through this design, the system can automatically optimize and adjust in different frequency ranges, and modify the correlation coefficients of the low-pass filter and the loop filter in real time, thereby ensuring accurate frequency synchronization in high noise and a wider frequency range.

[0119] A further embodiment is that the carrier synchronization loop module comprises: an overall performance parameter design unit for determining a natural angular frequency (W n ) and the damping coefficient (ζ), because they are closely related to the loop filter coefficients (C1, C2) and the low-pass filter cutoff frequency, so these two parameters need to be confirmed first; in this embodiment, the natural angular frequency is related to the single-sided noise bandwidth (B L) is related to the input signal-to-noise ratio:

[0120] The single-sided noise bandwidth reflects the ability of the carrier synchronization loop to filter out input noise. For an ideal second-order phase-locked loop, it can be seen from expression (5) that the smaller the single-sided noise bandwidth, the smaller the output phase variance (σ) under the condition of Gaussian white noise input signal, and we have:

[0121]

[0122] The curves of these three coefficients can be obtained from expression (6), as shown in Figure 7 As shown, this curve has a minimum value, that is, when ζ = 0.5, the noise suppression ability is also optimal at this time. However, considering that the smaller ζ is, the slower the system response speed is, and the transient response is too long, ζ = 0.707 is usually selected in engineering, at which time BL = 0.53Wn, which is close to the minimum value;

[0123] The carrier synchronization loop input signal-to-noise ratio is used to measure the quality of the signal, which is the ratio of the input signal carrier power to the carrier synchronization loop pre-bandwidth (B i ) is the ratio of the noise power, that is:

[0124]

[0125] The signal-to-noise ratio of the carrier synchronization loop directly determines the magnitude of the phase jitter after locking, which can be expressed by the ratio of the input signal carrier power to the noise power of the unilateral noise bandwidth, that is:

[0126]

[0127] From expressions (7) and (8), we can derive the relationship between the carrier synchronization loop signal-to-noise ratio and the carrier synchronization loop input signal-to-noise ratio:

[0128]

[0129] From expressions (6) and (9), we can get the relationship expression of natural angular frequency:

[0130]

[0131] Since this carrier synchronization loop is a nonlinear system, there is a threshold effect (threshold signal-to-noise ratio). In the carrier synchronization loop, the output phase error is usually set to 0.25 as the unlocking threshold, that is, the carrier synchronization loop loses lock when the signal-to-noise ratio is 6dB. When the input signal-to-noise ratio is set to 1dB, the preamplifier bandwidth is 25M, and the damping coefficient is 0.707, the upper limit of the natural angular frequency is 1251.128kHz; and the lower limit of the natural angular frequency is determined by the fast capture band (W) set by the loop. L ) is determined by:

[0132] ΔWL =2ζW n (11)

[0133] Thus, the range of the natural angular frequency and the value of the damping coefficient can be obtained. The smaller the natural angular frequency is, the lower the signal-to-noise ratio required when the carrier synchronization loop is locked, the smaller the steady-state phase difference after stabilization, and the longer the capture time. Conversely, the higher the fast capture bandwidth of the carrier synchronization loop is, the faster the capture is. Therefore, in order to take into account both the steady-state phase difference and the fast capture bandwidth, a more appropriate value of the natural angular frequency needs to be selected, which is specifically adjusted during the test.

[0134] The adaptive adjustment unit is used to adjust the coefficients of the low-pass filter and the loop filter and the level adjustment mode of the carrier synchronization loop; in this embodiment, in order to adapt to the wide frequency range of 100Hz to 25MHz and enable it to achieve the requirements of fast locking, high precision and wide bandwidth when locking the input signal, its frequency is divided into 6 intervals.

[0135] like Figure 8 As shown, for different frequency ranges, the system's stage adjustment mode, loop filter coefficient and low-pass filter cutoff frequency are different in order to adapt to different operating frequencies and noise requirements; the stage adjustment state is divided into three modes: two-level fixed adjustment, two-level dynamic adjustment and three-level dynamic adjustment, each mode selects different loop coefficients according to the system's needs and current state; within each level, it is divided into fast locking state, slow tracking state and precise tracking state, in order to achieve efficient and precise synchronous control in different frequency ranges.

[0136] In the dynamic adjustment mode, the system will use the dual dynamic threshold judgment method to analyze the steady-state phase difference to determine whether it begins to have an oscillation trend of a certain amplitude; the dual dynamic threshold judgment method mainly relies on real-time monitoring of changes in phase deviation, and determines whether it is in an oscillating state based on the amplitude and change trend of the phase error.

[0137] After the dual dynamic threshold judgment method determines that the steady-state phase difference is in oscillation, it analyzes whether it meets the conditions for entering the next level based on the relevant steady-state phase difference threshold; especially in the case of high noise and large frequency changes, the system can adjust its regulation mechanism according to the real-time feedback signal to ensure that the system is always in the optimal working state.

[0138] In the low-frequency band below 5kHz, the system also conducts a special noise analysis to avoid the impact of noise interference on system performance; the state coefficient (natural angular frequency) of the first stage is the same, and the steady-state phase difference has a certain oscillation; if the highest value of the system oscillation is detected to reach the high noise threshold, it indicates that the locking effect of the system is not ideal, and the state coefficient of the second stage will be dynamically increased; increasing the state coefficient can increase the fast capture bandwidth of the system, thereby improving the locking success rate, ensuring that the system can effectively resist high noise interference, thereby maintaining a stable frequency synchronization state; otherwise, it indicates that the system locking effect is ideal, and the relevant loop coefficient can be reduced to make the loop enter a more accurate locking state.

[0139] The key to this process is to adjust the balance between fast capture bandwidth and system stability, ensuring that the system can respond quickly to frequency changes while preventing false locks or frequency deviations caused by overly aggressive adjustments. Through this multi-level adjustment mechanism and sophisticated noise control strategy, the system can provide a more stable and efficient frequency synchronization solution under different working conditions.

[0140] In this embodiment, the above-mentioned methods are divided into an adaptive three-level adjustment method and a dual threshold oscillation judgment method: the adaptive three-level adjustment method, such as Fig. 9 As shown, first, the frequency control word is obtained through the FFT carrier frequency estimation module, from which the frequency range of the signal is determined, and the initial loop filter coefficient and the cutoff frequency of the low-pass filter are set according to this frequency, so that the system enters the first-level fast locking state; next, the double threshold oscillation judgment method is used to detect whether the steady-state phase difference oscillates; when oscillation occurs, the system will judge according to the maximum value of the steady-state phase difference: if the maximum value is less than threshold one, it will switch to the three-level adjustment mode; if the maximum value is between threshold one and threshold two, it will enter the second-level adjustment mode; if the maximum value is greater than threshold two, it will maintain the first-level adjustment mode; if the signal meets the requirements for entering the third-level adjustment mode, the system will apply the double threshold oscillation judgment method again in the second-level slow tracking state to detect whether the steady-state phase difference oscillates, if the oscillation continues, the system will further enter the third-level precise tracking state to ensure accurate frequency synchronization. Through this hierarchical judgment and adjustment strategy, the system can dynamically adjust the control mode according to different frequency changes to achieve optimal frequency locking and stability.

[0141] Double threshold oscillation judgment method, such as Fig.10As shown, the capture process of the carrier synchronization loop usually includes two processes: a fast capture process and a tracking process. First, the system undergoes a fast capture process, during which the steady-state phase difference varies greatly. When the reference signal frequency approaches the target signal, the tracking process is entered, and the steady-state phase difference will present an oscillating signal that fluctuates up and down. In simple terms, the steady-state phase difference first undergoes a large fluctuation to approach the signal frequency, and then enters a smaller fluctuation stage to maintain accurate signal tracking. In the fast capture process, the system determines the maximum and minimum values ​​according to the amplitude of the steady-state phase difference, and sets the first threshold. When these two thresholds meet certain duration conditions, the system enters the second threshold tracking stage. In the tracking process, if the second threshold condition is also met, an oscillation enable signal is output. In particular, for low-frequency signals below 5kHz, when judged as high-noise signals, the system adjusts the duration points of the second threshold to reduce the risk of being unable to enter the subsequent large-coefficient capture process due to the threshold being too long, thereby optimizing the tracking performance.

[0142] The multiplier unit is used to multiply the received input signal to be tested with the reference carrier signal generated by the local DDS oscillator to generate low-frequency and high-frequency signals. As the frequency is continuously adjusted, the signal output by the multiplier will contain a DC component (related to phase synchronization) and a frequency-doubled component (which needs to be filtered out). Through this multiplication process, the carrier frequency component can be extracted from the received signal and converted into a baseband signal.

[0143] The low-pass filter unit is used to filter out the high-frequency components in the multiplier output signal and retain the DC component. The DC component is proportional to the phase offset of the carrier, so it can provide phase error information. Since this link only needs to extract a single-frequency carrier signal, the filter bandwidth does not need to have a linear phase. Under the same amplitude-frequency characteristic requirements, the use of IIR filters can reduce more hardware resources.

[0144] In this embodiment, a Butterworth filter is used as the low-pass filter of this module for the following reasons: in order to meet the performance requirements, the low-pass filter needs to ensure that the useful signal passes completely and filter out noise and interference as much as possible, especially to effectively suppress the adjacent A / D image frequency and the frequency multiplication component introduced by the digital down-conversion, and ensure that the passband width is greater than the capture bandwidth of the carrier synchronization loop; according to Fig.11 As shown in the figure, for IIR filters of the same order, the filter designed using the ellip function performs best in terms of amplitude-frequency response, filter band and stopband attenuation performance; while the IIR filter designed with the butter function has the flattest amplitude-frequency response in the passband; given that the butter function has a flat characteristic in the passband, this unit chooses to use the butter filter for design.

[0145] like Fig.12As shown in the figure, the filter coefficient and output data operation word length amplitude-frequency response curve of the butter filter when the sampling rate is 50MHz, the cutoff frequency is 70kHz, and the filter order is 2nd order. It can be seen that when the quantization coefficient of the filter is 24 bits and the output data is 34 bits, its amplitude-frequency response curve basically coincides with the ideal output curve; since the input data is 24 bits after being processed by the multiplier, when the output data of the low-pass filter is set to 34 bits, it shows that the loop gain is increased by 1024 times, which not only ensures that the IIR filter maintains the best performance, but also improves the accuracy of the filter, reduces the quantization error, and significantly improves the resolution of the subsequent DDS oscillator, so that the DDS oscillator can generate a more precise frequency modulation signal.

[0146] The loop filter unit is used to smooth the error voltage signal from the low-pass filter, remove high-frequency noise, and ensure that only low-frequency components are transmitted to the DDS oscillator unit. In this embodiment, the key to the design of the loop filter is to obtain coefficients C1 and C2, which are mainly determined by the natural angular frequency, damping coefficient and total gain (K). When the system function of the analog carrier synchronization loop is transformed into the system function of the digital carrier synchronization loop by using the bilinear transformation method and then equalized with the system function of the digital ideal second-order carrier synchronization loop, it is found that when W n When T<<1, the loop coefficients C1 and C2 can be expressed by the following expressions:

[0147]

[0148] In this embodiment, the overall performance parameter design unit has obtained the natural angular frequency and the damping coefficient. Currently, only the total gain needs to be calculated to obtain the loop coefficient. The expression of the total gain K is:

[0149]

[0150] Among them, T dds is the DDS phase accumulation word update period. Its selection principle is: the period should be greater than the total delay in the carrier synchronization loop operation process and be as short as possible to improve the correlation between the phase accumulation word and the input data. According to the simulation waveform results, T dds It is more reasonable to take 8 data sampling cycles; B lp is the effective data bit width of the loop filter output. In this example, the loop filter output bit width is the same as the input data bit width, that is, the output data bit width of the low-pass filter. Therefore, B lp =34; N is the word length of the DDS phase accumulation word. In engineering, K is usually selected to be close to 1. At this time, the carrier synchronization loop has the best effect. Based on this condition, it can be inferred that the value of N is about 37.6, that is, N can be 38 bits, at this time K≈0.7854, close to 1.

[0151] Based on these coefficients, the loop coefficients C1 and C2 can be calculated. In order to ensure the stable operation of the carrier synchronization loop, it is necessary to ensure that the digital carrier synchronization loop is a causal stable system. According to the time domain discrete system theory, the necessary and sufficient condition for the stability of the digital system is that all the poles of the closed-loop function are located within the unit circle, such as Fig.13 As shown, the left figure is the pole diagram when the natural angular frequency is 100kHz, and the right figure is the pole table of all coefficients. By analyzing the pole positions corresponding to the loop filter coefficients, it is found that they are all located within the unit circle, proving that the loop system is stable.

[0152] The DDS oscillator unit is used to generate a high-precision, frequency-adjustable signal; in this embodiment, by adjusting the input DDS frequency control word, the frequency of the output signal can be continuously changed, thereby achieving rapid frequency adjustment and phase locking;

[0153] In summary, the carrier synchronization loop can dynamically adjust the loop parameters through the adaptive adjustment unit to achieve high-precision synchronization of the carrier, which enables the system to effectively deal with problems such as signal changes and noise interference and maintain stable and reliable synchronization performance, such as Fig.14 As shown in the figure, the error rate of the carrier synchronization loop in different frequency ranges and different signal-to-noise ratios is shown, and the critical frequencies at both ends of each frequency range are selected for testing, and the SEM standard deviation is used for plotting; in the high signal-to-noise ratio range of 100dB to 0dB, the error is controlled below 0.16595%, and in the low signal-to-noise ratio range of 0dB to -25dB, the error is controlled below 0.44715%; specifically, when the frequency is 1200Hz to 25MHz, the system can achieve frequency phase locking under the condition of a signal-to-noise ratio of 100dB to -25dB, and the locking error is less than 0.04585% when the signal-to-noise ratio is 100dB to 0dB, and less than 0.44 when the signal-to-noise ratio is 0dB to -25dB. 715%; when the frequency is in the low frequency band of 400Hz to 1200Hz, the system can achieve frequency phase locking under the condition of signal-to-noise ratio of 100dB to -20dB, and the locking error is less than 0.0778% when the signal-to-noise ratio is 100dB to 0dB, and less than 0.3283% when 0dB to -25dB; when the frequency is in the low frequency band of 100Hz to 400Hz, the system can achieve frequency phase locking under the condition of signal-to-noise ratio of 100dB to -6dB, and the locking error is less than 0.16595% when the signal-to-noise ratio is 100dB to 0dB, and less than 0.2403% when 0dB to -6dB; when the frequency is below 100Hz, loss of lock will occur due to the excessively high sampling rate.

[0154] After the front-end processing of the FFT carrier frequency estimation module, the locking speed and accuracy of the entire frequency adaptive tracking module are significantly improved, and the error is reduced accordingly. Fig.15As shown in the figure, the error rate of the entire frequency adaptive tracking module in different frequency ranges and different signal-to-noise ratios is plotted. Fig.14 consistent; in the high signal-to-noise ratio range of 100dB to 0dB, the error is controlled below 0.0962%, and in the low signal-to-noise ratio range of 0dB to -25dB, the error is controlled below 0.3708%; compared with a single carrier synchronization loop, the error rate is reduced by 0.06975% and 0.07635% year-on-year, and the accuracy of the system is significantly improved.

[0155] like Fig.16 As shown in the figure, it is the time required for the entire frequency adaptive tracking module to lock in different frequency ranges and different signal-to-noise ratios. The drawing principle is similar to Fig.14 consistent; in the high signal-to-noise ratio range of 100dB to 0dB, the locking time is controlled below 20.3ms, and in the low signal-to-noise ratio range of 0dB to -25dB, the locking time is controlled below 35.3ms; the simulation time of the FFT carrier frequency estimation unit is fixed at 5.3ms, and the time of the carrier synchronization loop unit is the total time minus the time of the FFT carrier frequency estimation unit; it can be found that when the frequency is above 400Hz and in the range of 100dB to 0dB, the overall locking time is less than 10ms, which greatly improves the locking time and accuracy compared with the traditional phase-locked loop.

[0156] The multi-rate narrowband low-pass filter module is used to gradually reduce the high sampling rate of the front-end ADC and realize the narrowband filtering function of 0.1Hz in the limited FPGA hardware resources; a further implementation method is that the multi-rate narrowband low-pass filter module is composed of an integral comb filter unit, a half-band filter unit, and a low-pass filter unit: the integral comb filter unit is used to extract the high sampling rate signal of the front-end ADC by 2500 times. Because of its simple structure and no multiplier unit, it is a FIR filter based on zero-point cancellation, so it is suitable for working under high sampling rate conditions; in this embodiment, a three-stage CIC filter cascade is adopted to realize 2500-fold extraction filtering and reduce the 25MHz sampling rate to 20kHz; Fig.17 As shown in FIG. 1 , at this time, the attenuation of the first sidelobe level reaches 40.38 dB, and the stopband attenuation can meet the basic practical needs, and there will be no signal distortion caused by excessive passband attenuation; Fig.18As shown in the figure, it is the basic structure of the three-stage CIC filter, which implements the Hogenauer extraction filter according to the transposition theorem and the Noble identity, greatly improving the system's operating speed and reducing resource occupation; the half-band filter unit is used to extract the signal extracted by the CIC filter by 2 times; in this example, a 6-stage cascade method is adopted to achieve 64 times extraction, reducing 20kHz to 312.5Hz, because its transition band is often too large for the last stage of the multi-stage filter and cannot meet the overall requirements of the filtering characteristics, so it is not suitable as the last stage of the multi-stage extraction filter; the low-pass filter unit is used to extract very low-frequency (near 0.1Hz) signal changes, as well as to remove high-frequency noise and improve signal stability; in this example, the sampling rate of this unit has been reduced to 312.5Hz, and at this time, the order of the low-pass filter with a transition band of [0.1, 2]Hz and a pass-stop band ripple of 0.001 is only 1194, which greatly reduces the hardware resources of the FPGA.

[0157] In summary, MATALB is used to analyze the simulation test data of FPGA, such as Fig.19 As shown in the figure, the multi-rate narrowband low-pass filter module implements multi-rate filtering processing on 0.1, 500, 5000, and 50000Hz mixed signals at a sampling rate of 50M. Due to the huge amount of data, only half of the cycle waveform is displayed. It can be seen that this module not only has the function of reducing the sampling rate, but also can realize the filtering processing of the signal, and the final FIR output signal is a standard signal with no distortion of 0.1Hz; Fig. 20 As shown in the figure, it is the simulation data of the multi-rate narrowband low-pass filter module to simulate the operation of the phase-locked amplifier by mixing the 1MHz and its difference frequency 0.05Hz signal at a sampling rate of 50M. It can be found that the final FIR output signal presents an almost linear cross-correlation signal, so the amplitude and phase of the signal can be calculated using the vector operation module.

[0158] The vector operation module is used to perform mathematical processing on the relationship between the weak signal to be tested and the reference signal, and effectively and accurately extract the phase and amplitude from the weak signal to be tested; a further implementation method is that the vector operation module is composed of a multiplier unit, an adder unit, a square root operation unit, and a cordic operation unit: the multiplier unit is used to implement the square operation of two cross-correlated signals; in this example, the multiplier IP core of the FPGA is used to implement the signed multiplication of the data; the adder unit is used to implement the addition operation of the multiplier output result; the square root operation unit is used to implement the amplitude calculation of the input signal to be tested; the decimal place expansion of the output bit number is used to effectively improve the accuracy of the amplitude result; the cordic operation unit is used to implement the phase calculation of the input signal to be tested; in this example, the cordic IP core of the FPGA is used to implement the data operation; the human-computer interaction module is used to display and store the detection results, and complete the digital phase-locked amplifier and weak signal acquisition based on the frequency adaptive technology.

[0159] In summary, the MATLAB and FPGA code tests of the whole system are carried out, in which the weak signal to be tested is a signal with a frequency of 1Mhz and an amplitude of 2048; first, the relevant tests at the MATLAB software level are carried out, such as Fig.21 As shown, it can be seen that in the high signal-to-noise ratio range of 100dB to 0dB, the amplitude error is controlled below 0.02%, and the phase error is controlled below 0.04%, which shows that under high signal-to-noise ratio conditions, the system's accuracy is very excellent; in the low signal-to-noise ratio range of 0dB to -25dB, the amplitude error is controlled below 0.05%, and the phase error is controlled below 0.3%. Although it is larger than the high signal-to-noise ratio range, it still remains within a reasonable error range; Fig. 22 (a)-(f) further present the specific test results of amplitude and phase, thus more intuitively demonstrating the performance of the system under different signal-to-noise ratios;

[0160] Then, the relevant tests at the FPGA hardware level are performed, such as Fig.23 As shown, it can be seen that in the high signal-to-noise ratio range of 100dB to 0dB, the amplitude error is controlled below 0.03%, and the phase error is controlled below 0.7%; in the low signal-to-noise ratio range of 0dB to -25dB, the amplitude error is controlled below 0.07%, and the phase error is controlled below 1.8%; compared with the MATLAB software level test, the error at the FPGA hardware level is slightly larger, but it still performs well under high signal-to-noise ratio, but the amplitude and phase errors are more obvious under low signal-to-noise ratio, especially in terms of phase, the error increase is more significant;

[0161] The main reason for this difference is the limited word length effect of FPGA. Due to the bit width limitation of FPGA calculation, quantization error will be introduced when processing high-precision signals, thus affecting the test results. In particular, the calculation of phase is greatly affected by the limited word length, resulting in its error being significantly higher than that at the software level. In MATLAB, since its software platform can handle higher-precision floating-point operations, the error control is better.

[0162] In general, although the FPGA is limited by hardware conditions and the error becomes larger, it can still guarantee relatively accurate amplitude and phase measurement results under high signal-to-noise ratio. Under low signal-to-noise ratio, the phase result is greatly affected, but still has good accuracy. By optimizing the FPGA hardware design and further reducing the impact of the finite word length effect, it is expected to improve the system's accuracy performance under low signal-to-noise ratio.

[0163] In summary, the present invention combines the dual tracking mechanism of frequency domain analysis and carrier synchronization loop feedback control, so that the system can still stably lock the frequency of the target signal in a noisy environment and effectively reduce the phase error; and solves the limitations of the traditional system: the traditional carrier synchronization loop often faces the problem of difficulty in balancing fast locking, high dynamic range and high precision. The system introduces an adaptive adjustment unit, a two-level dynamic threshold judgment mechanism and a three-level coefficient adjustment method, which can adjust the relevant parameters in the carrier synchronization loop in real time, so that the system can still accurately lock the target signal in a wide range of noise environments (from 100dB to -25dB noise level), greatly improving the reliability and sensitivity of the system in complex environments; in order to To improve the bandwidth utilization of the system and save hardware resources, the present invention adopts the cascade downsampling technology in multi-rate digital signal processing. By gradually reducing the sampling rate of the front-end ADC, the technology effectively reduces the bandwidth requirement of the system, so that the system can achieve 0.1Hz narrowband filtering function with lower resource consumption, which not only improves the accuracy of signal processing, but also reduces the occupation of hardware resources such as FPGA, making the system more efficient; in general, the weak signal acquisition system combines advanced adaptive tracking, dynamic adjustment and multi-rate downsampling technology, has the advantages of strong anti-noise ability, high-precision locking, resource saving, etc., and can achieve efficient and accurate signal acquisition and processing in various signal environments.

[0164] The present embodiment discloses a digital phase-locked amplifier and weak signal acquisition method based on frequency adaptive technology, which is applied to the above-mentioned system and includes the following steps: Step 1: First, start the power module and initialize each module to its default setting to ensure the normal operation of the system; Step 2: The weak signal to be measured first enters the front-end signal processing module, where the signal will be preliminarily amplified and filtered through a two-stage amplification circuit to improve the strength and quality of the signal and prepare for subsequent processing; Step 3: The amplified signal then enters the anti-aliasing filter and the analog-to-digital conversion module. The anti-aliasing filter ensures that the frequency range of the signal is suitable for sampling by filtering out high-frequency signals greater than half of the system sampling frequency; The analog signal after filtering is converted into a digital signal and sent to the FPGA for further processing; Step 4: The digital signal passes through an adaptive notch filter to remove the 50Hz power frequency interference signal and improve the signal-to-noise ratio of the signal; Once the data is valid, the system will pull up the enable signal of the FFT carrier frequency estimation module to enable it to start spectrum analysis of the signal; Step 5: The FFT carrier frequency estimation module performs spectrum analysis on the useful signal after removing the power frequency interference signal, obtains the maximum spectrum line value and converts it into the DDS frequency control word, and at the same time pulls up the carrier synchronization loop enable signal; Step 6: The carrier synchronization loop uses the obtained DDS frequency control word to adaptively adjust the loop coefficient, so that the reference signal is gradually synchronized with the weak signal to be measured until the target frequency is stably locked, and then the enable signal of the multiplier module and the multi-rate narrowband low-pass filter module is pulled up; Step 7: The multi-rate narrowband low-pass filter module downsamples and low-pass filters the two-way multiplied signal (the sine and cosine reference signals are multiplied by the signal to be measured respectively), obtains the two-way cross-correlation function, and pulls up the vector operation module; Step 8: The vector operation module performs operation processing on the two-way cross-correlation function to obtain the amplitude and phase of the weak signal to be measured, and pulls up the human-computer interaction module; Step 9: The human-computer interaction module transmits the amplitude and phase information obtained by the system to the QT host computer through Ethernet for display, and finally displays the processing results to the user.

[0165] The embodiments described above are only descriptions of the preferred embodiments of the present invention and are not intended to limit the scope of the present invention. Without departing from the design spirit of the present invention, various modifications and improvements made to the technical solutions of the present invention by ordinary technicians in this field should all fall within the protection scope determined by the claims of the present invention.

Claims

1. A digital lock-in amplifier and weak signal acquisition system based on frequency adaptive technology, characterized in that: include: A front-end signal processing module is used to obtain a weak signal to be tested, process the weak signal to be tested, and convert it into a digital signal; A frequency adaptive tracking module is used to perform a fast Fourier transform on the frequency of the digital signal, extract the main frequency components in the signal, obtain the position of the maximum spectrum line, and convert it into a direct digital frequency in the carrier synchronization loop, synthesize the direct digital frequency into a frequency control word, and generate a local reference signal with the same frequency and phase as the carrier of the weak signal to be measured according to the frequency control word, and adjust the coefficients of the low-pass filter and the loop filter and the series adjustment mode of the carrier synchronization loop at the same time; A multi-rate narrowband low-pass filter module, used for filtering and down-sampling the high-frequency signal after multiplying the digital signal with the local reference signal, retaining key information, and obtaining a plurality of mutually orthogonal difference frequency components; A vector operation module, used for performing vector operation on the plurality of mutually orthogonal difference frequency components to obtain the phase and amplitude of the weak signal to be measured; The human-computer interaction module is used to display and store the phase and amplitude of the weak signal to be measured.

2. According to the digital lock-in amplifier and weak signal acquisition system based on frequency adaptive technology as described in claim 1, it is characterized in that: The front-end signal processing module comprises: A preamplifier circuit is used to suppress noise interference and complete the preliminary amplification of the weak signal to be measured; The post-amplification circuit is used to perform post-amplification on the weak signal to be tested after the primary amplification and provide the main gain of the system; Anti-aliasing filter to filter out signals that exceed the target sampling frequency; An analog-to-digital conversion circuit, used for converting the filtered signal into the digital signal; Wherein, the preamplifier circuit, the post-amplifier circuit, the anti-aliasing filter and the analog-to-digital conversion circuit are connected in sequence.

3. The digital lock-in amplifier and weak signal acquisition system based on frequency adaptive technology according to claim 1, characterized in that: The frequency adaptive tracking module comprises: The adaptive notch filter submodule is used to suppress interference signals of specific frequencies by using the LMS algorithm without losing other useful signals. At the same time, when there is a significant frequency difference between the target signal and the interference signal in the spectrum, the interference frequency is removed while retaining other frequency components by adjusting the filter parameters. A fast Fourier transform submodule is used to perform fast Fourier transform on the digital signal frequency processed by the adaptive notch filter submodule, extract the main frequency components in the signal, obtain the position of the maximum spectrum line, and convert it into a direct digital frequency in the carrier synchronization loop, and synthesize the direct digital frequency into a frequency control word; The carrier synchronization loop submodule is used to generate a local reference signal with the same frequency and phase as the carrier of the weak signal to be measured according to the frequency control word, and to adjust the coefficients of the low-pass filter and the loop filter and the stage adjustment mode of the carrier synchronization loop.

4. The digital lock-in amplifier and weak signal acquisition system based on frequency adaptive technology according to claim 3, characterized in that: The fast Fourier transform submodule comprises: An FFT unit is used to perform a fast Fourier transform on the frequency of the digital signal processed by the adaptive notch filter submodule, so as to convert the signal from the time domain to the frequency domain; A data modulus unit, used to extract the modulus value of the spectrum in the frequency domain, obtain the strongest frequency component, and infer the carrier frequency; A maximum spectrum line value calculation unit, used to obtain the frequency point with the largest amplitude in the spectrum while inferring the carrier frequency, wherein the frequency point is the main carrier frequency corresponding to the signal; The conversion unit converts the main carrier frequency into a frequency control word: M0=(number-1)*2 DDS_N-N =(number-1)<<22 Among them, M0 is the DDS frequency control word, number is the position of the maximum spectrum line, DDS_N is the phase accumulation word length of DDS, and N is the number of FFT sampling points.

5. The digital lock-in amplifier and weak signal acquisition system based on frequency adaptive technology according to claim 3, characterized in that: The carrier synchronization loop submodule comprises: An overall performance parameter design unit, used to determine a natural angular frequency and a damping coefficient; wherein the natural angular frequency and the damping coefficient are both related to a loop filter coefficient and a low-pass filter cutoff frequency; The expression for determining the natural angular frequency is: Where ζ is the damping coefficient, (S / N) i The input signal carrier power and the pre-bandwidth B of the carrier synchronization loop i The ratio of the power of the signal to the noise, (S / N) L It is the ratio of the input signal carrier power to the noise power of the single-sided noise bandwidth; The lower limit expression for determining the natural angular frequency is: ΔW L =2ζW n Among them, W n is the natural angular frequency; The adaptive adjustment unit is used to judge the frequency range of the signal through the frequency control word, and set the initial loop filter coefficient and the cut-off frequency of the low-pass filter according to the frequency range, so as to enter the first-level fast locking state, and further adopt the double threshold oscillation judgment method to detect whether the steady-state phase difference oscillates. When oscillation occurs, it is judged according to the maximum value of the steady-state phase difference. If the maximum value is less than threshold one, the loop filter coefficient is switched to the three-level adjustment mode. If the maximum value is between threshold one and threshold two, the loop filter coefficient is switched to the two-level adjustment mode; if the maximum value is greater than threshold two, the loop filter coefficient is maintained in the first-level adjustment mode. When switching to the three-level adjustment mode, the double threshold oscillation judgment method is applied again in the second-level slow tracking state to detect whether the steady-state phase difference oscillates. If the oscillation continues, it further enters the third-level precise tracking state, so as to maintain the best frequency lock.

6. The digital lock-in amplifier and weak signal acquisition system based on frequency adaptive technology according to claim 5, characterized in that: The dual threshold oscillation judgment method is used to detect the steady-state phase difference, including: When the carrier synchronization loop captures the signal, it goes through the fast capture process and the tracking process in sequence, that is, the steady-state phase difference presents an oscillating signal that fluctuates up and down; During the fast capture process, the maximum and minimum values ​​of the steady-state phase difference in the fast capture process are determined according to the coefficient of the steady-state phase difference. When the maximum and minimum values ​​in the fast capture process continue for a first target time, the tracking process is entered. During the tracking process, the maximum and minimum values ​​in the tracking process are determined according to the coefficient of the steady-state phase difference. After the maximum and minimum values ​​in the tracking process continue for a second target time, an oscillation enable signal is output to determine whether the steady-state phase difference oscillates.

7. The digital lock-in amplifier and weak signal acquisition system based on frequency adaptive technology according to claim 5, characterized in that: The carrier synchronization loop submodule also includes: A multiplier unit, used for multiplying the received output signal of the adaptive notch filter submodule with the reference carrier signal generated by the local DDS oscillator to generate low-frequency and high-frequency signals, and obtaining a signal containing a DC component and a doubled frequency as the frequency is continuously adjusted, extracting a carrier frequency component from the input signal to be tested according to the signal containing the DC component and the doubled frequency, and converting the carrier frequency component into a baseband signal; A low-pass filter unit, used to filter out high-frequency components in the baseband signal, retain a DC component, and obtain phase error information based on the DC component; A loop filter unit, used for smoothing the error voltage signal of the low-pass filter, removing high-frequency noise and retaining low-frequency components; The DDS oscillator unit is used to generate a high-precision, frequency-adjustable signal according to the low-frequency component, that is, a local reference signal with the same frequency and phase as the carrier of the weak signal to be measured.

8. The digital lock-in amplifier and weak signal acquisition system based on frequency adaptive technology according to claim 1, characterized in that: The multi-rate narrowband low-pass filter module comprises: An integral comb filter unit, used to extract the high sampling rate signal of the analog-to-digital conversion circuit according to a first target multiple, and reduce the original sampling rate of the integral comb filter to the first target sampling rate; A half-band filter unit, used for decimating the signal extracted by the integral comb filter unit according to a second target multiple, and reducing the original sampling rate of the half-band filter to the second target sampling rate; The low-pass filter unit is used to extract signal changes under the low-frequency threshold and remove high-frequency noise. At the same time, the low-pass filter sampling rate has been reduced to the third target sampling rate to achieve a narrow-band low-pass filtering function of 0.1Hz.

9. The digital lock-in amplifier and weak signal acquisition system based on frequency adaptive technology according to claim 1, characterized in that: The vector operation module comprises: An amplitude operation unit, used for performing a vector operation of square sum and square root on a plurality of mutually orthogonal difference frequency components to obtain a DC result proportional to the amplitude of the external modulation signal to be measured, thereby demodulating the amplitude of the weak signal to be measured; The phase operation unit is used to divide the multiple mutually orthogonal difference frequency components and then calculate their arc tangents, and then make appropriate adjustments according to the positive and negative relationship between the internal divisor and the dividend to obtain the phase of the weak signal to be measured.

10. A digital lock-in amplifier and weak signal acquisition method based on frequency adaptive technology, characterized in that: include: Acquire a weak signal to be measured, process the weak signal to be measured, and convert it into a digital signal, perform fast Fourier transform on the frequency of the digital signal, extract the main frequency component in the signal, obtain the position of the maximum spectrum line, and convert it into a direct digital frequency in a carrier synchronization loop, synthesize the direct digital frequency into a frequency control word, generate a local reference signal with the same frequency and phase as the carrier of the weak signal to be measured according to the frequency control word, and adjust the coefficients of the low-pass filter and the loop filter and the series adjustment mode of the carrier synchronization loop at the same time; After multiplying the digital signal with the local reference signal, the high-frequency signal is filtered and down-sampled to retain key information, and multiple mutually orthogonal difference frequency components are obtained. Vector operations are performed on the multiple mutually orthogonal difference frequency components to obtain the phase and amplitude of the weak signal to be tested, and the phase and amplitude of the weak signal to be tested are displayed and stored.

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