Avalanche pulse signal extraction circuit and photoelectric detector

Abstract

The embodiment of the invention discloses an avalanche pulse signal extraction circuit and a photoelectric detector. The extraction circuit comprises an actual photoelectric receiving module, a first reference photoelectric receiving module, a second reference photoelectric receiving module, a first differential amplification module and a second differential amplification module, one end of the actual photoelectric receiving module and one end of the first reference photoelectric receiving module are electrically connected with two input ends of the first differential amplification module respectively; the output end of the first differential amplification module and one end of the second reference photoelectric receiving module are electrically connected with two input ends of the second differential amplification module respectively; and the other end of the actual photoelectric receiving module, the other end of the first reference photoelectric receiving module and the other end of the second reference photoelectric receiving module respectively receive power supply signals. According to the circuit, sunlight noise caused by external ambient light is effectively filtered, and bottom noise caused by electrical characteristics of an avalanche diode is inhibited.

Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of lidar, and in particular, to an avalanche pulse signal extraction circuit and a photodetector. Background Art

[0002] In the photoelectric receiving module of lidar, an avalanche diode is generally used for collecting optical signals. However, during the collection process, the avalanche diode not only receives the avalanche pulses returned by the laser emission module, but also receives strong sunlight from the sun in a sunny environment and generates sunlight noise correspondingly.

[0003] Currently, the existing technology is to use a host computer and an algorithm program to process and form a point cloud map, and determine the approximate position of the sunlight noise in the point cloud map according to characteristics such as no obvious structural features locally and large changes in the depth of the point cloud. Then, the sunlight noise is screened out and filtered. However, determining the approximate position of the sunlight noise in the point cloud map may, on the one hand, result in the filtering of valid avalanche pulse signals with amplitudes similar to that of the sunlight noise due to unreasonable selection of the sunlight noise screening threshold or region, and on the other hand, requires relevant technical personnel to have excellent algorithm capabilities to achieve a good sunlight noise filtering effect. Summary of the Invention

[0004] The embodiments of the present invention provide an avalanche pulse signal extraction circuit and a photodetector, which can effectively filter out the sunlight noise caused by external ambient light, suppress the background noise caused by the electrical characteristics of the avalanche diode itself, and reduce the influence of the sunlight noise and the background noise during the collection of valid avalanche pulse signals.

[0005] In a first aspect, the embodiments of the present invention provide an avalanche pulse signal extraction circuit, including an actual photoelectric receiving module, a first reference photoelectric receiving module, a second reference photoelectric receiving module, a first differential amplification module, and a second differential amplification module;

[0006] The actual photoelectric receiving module includes a first avalanche diode, the first reference photoelectric receiving module includes a second avalanche diode, the second reference photoelectric receiving module includes a third avalanche diode. The first avalanche diode, the second avalanche diode, and the third avalanche diode have the same electrical characteristics. The first avalanche diode is located in the radar signal environment, and the second avalanche diode and the third avalanche diode are located in the ambient light signal environment;

[0007] One end of the actual photoelectric receiving module and one end of the first reference photoelectric receiving module are respectively electrically connected to two input ends of the first differential amplification module;

[0008] The first reference photoelectric receiving module is used to filter out one of the background noise and sunlight noise generated by the second avalanche diode, and define the other of the background noise and sunlight noise generated by the second avalanche diode that is not filtered out as the first noise;

[0009] The first differential amplification module is used to perform differential processing on the background noise and sunlight noise generated by the first avalanche diode, and the first noise, so as to filter out at least part of the first noise in the background noise and sunlight noise generated by the first avalanche diode;

[0010] The output end of the first differential amplification module and one end of the second reference photoelectric receiving module are respectively electrically connected to the two input ends of the second differential amplification module;

[0011] The second reference photoelectric receiving module is used to filter out one of the background noise and sunlight noise generated by the third avalanche diode, and define the other of the background noise and sunlight noise generated by the third avalanche diode that is not filtered out as the second noise; wherein, the first noise and the second noise are different types of noise;

[0012] The second differential amplification module is used to perform differential processing on the background noise and sunlight noise generated by the first avalanche diode after filtering out at least part of the first noise, and the second noise, so as to filter out at least part of the second noise in the background noise and sunlight noise generated by the first avalanche diode;

[0013] The other end of the actual photoelectric receiving module, the other end of the first reference photoelectric receiving module, and the other end of the second reference photoelectric receiving module respectively receive power supply signals.

[0014] In a second aspect, an embodiment of the present invention further provides a photodetector, including the avalanche pulse signal extraction circuit according to any one of the first aspects;

[0015] The photodetector further includes a first receiving board and a second receiving board;

[0016] The first avalanche diode is disposed on the first receiving board, and the second avalanche diode and the third avalanche diode are disposed on the second receiving board; wherein, the first receiving board and the second receiving board are not in the same plane.

[0017] An embodiment of the present invention provides an avalanche pulse signal extraction circuit and a photodetector. The extraction circuit includes an actual photoelectric receiving module, a first reference photoelectric receiving module, a second reference photoelectric receiving module, a first differential amplification module, and a second differential amplification module. The actual photoelectric receiving module includes a first avalanche diode. The first reference photoelectric receiving module includes a second avalanche diode. The second reference photoelectric receiving module includes a third avalanche diode. The first avalanche diode, the second avalanche diode, and the third avalanche diode have the same electrical characteristics. The first avalanche diode is located in a radar signal environment, and the second avalanche diode and the third avalanche diode are located in an ambient light signal environment. One end of the actual photoelectric receiving module and one end of the first reference photoelectric receiving module are respectively electrically connected to two input ends of the first differential amplification module. The first reference photoelectric receiving module is configured to filter out one of the background noise and sunlight noise generated by the second avalanche diode, and define the other of the background noise and sunlight noise generated by the second avalanche diode that is not filtered out as the first noise. The first differential amplification module is configured to perform differential processing on the background noise and sunlight noise generated by the first avalanche diode, and the first noise, so as to filter out at least part of the first noise in the background noise and sunlight noise generated by the first avalanche diode. The output end of the first differential amplification module and one end of the second reference photoelectric receiving module are respectively electrically connected to two input ends of the second differential amplification module. The second reference photoelectric receiving module is configured to filter out one of the background noise and sunlight noise generated by the third avalanche diode, and define the other of the background noise and sunlight noise generated by the third avalanche diode that is not filtered out as the second noise. Wherein, the first noise and the second noise are different types of noise. The second differential amplification module is configured to perform differential processing on the background noise and sunlight noise generated by the first avalanche diode after filtering out at least part of the first noise, and the second noise, so as to filter out at least part of the second noise in the background noise and sunlight noise generated by the first avalanche diode. The other end of the actual photoelectric receiving module, the other end of the first reference photoelectric receiving module, and the other end of the second reference photoelectric receiving module respectively receive a power signal. The avalanche pulse signal extraction circuit uses the first avalanche diode located in the radar signal environment and the second avalanche diode and the third avalanche diode located in the ambient light signal environment. The three are respectively electrically connected to the input ends of the two differential amplification modules. The two differential amplification modules perform differential processing step by step, effectively filtering out the sunlight noise caused by the external ambient light, and suppressing the background noise caused by the electrical characteristics of the avalanche diode itself, reducing the influence of the sunlight noise and the background noise on the acquisition process of the effective avalanche pulse signal, improving the acquisition accuracy of the effective avalanche pulse signal, and only need to set the position of the avalanche diode and obtain a set of the first avalanche diode, the second avalanche diode, and the third avalanche diode, avoiding the problem of re-measuring the electrical characteristics of different avalanche diodes or precisely calculating and analyzing the point cloud map subsequently. Description of the Drawings

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the accompanying drawings required for the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can be obtained based on these drawings.

[0019] Figure 1 is a schematic structural diagram of an avalanche pulse signal extraction circuit provided by an embodiment of the present invention;

[0020] Figure 2 is a schematic structural diagram of a photodetector provided by an embodiment of the present invention. Specific Embodiments

[0021] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the present invention, rather than limiting the present invention. Additionally, it should be noted that for the convenience of description, only the parts related to the present invention are shown in the accompanying drawings, rather than all the structures.

[0022] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. It should be noted that the orientation terms such as "upper", "lower", "left", and "right" described in the embodiments of the present invention are described from the perspective shown in the accompanying drawings, and should not be construed as limiting the embodiments of the present invention. In addition, in the context, it should also be understood that when it is mentioned that an element is formed "on" or "under" another element, it can not only be directly formed "on" or "under" another element, but also be indirectly formed "on" or "under" another element through an intermediate element. The terms "first", "second", etc. are only used for descriptive purposes, and do not indicate any order, quantity, or importance, but are only used to distinguish different components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0023] The term "including" and its variants used in the present invention are open-ended, that is, "including but not limited to". The term "based on" is "at least partially based on". The term "an embodiment" means "at least one embodiment".

[0024] It should be noted that the concepts such as "first" and "second" mentioned in the present invention are only used to distinguish the corresponding content, and are not used to limit the order or the interdependent relationship.

[0025] It should be noted that the modifications of "one" and "multiple" mentioned in the present invention are illustrative rather than restrictive. Those skilled in the art should understand that unless otherwise clearly specified in the context, it should be understood as "one or more".

[0026] Figure 1 is a schematic structural diagram of an avalanche pulse signal extraction circuit provided by an embodiment of the present invention. As Figure 1 shown, the avalanche pulse signal extraction circuit includes an actual photoelectric receiving module 10, a first reference photoelectric receiving module 20, a second reference photoelectric receiving module 30, a first differential amplification module 40, and a second differential amplification module 50; the actual photoelectric receiving module 10 includes a first avalanche diode APD1, the first reference photoelectric receiving module 20 includes a second avalanche diode APD2, the second reference photoelectric receiving module 30 includes a third avalanche diode APD3, and the first avalanche diode APD1, the second avalanche diode APD2, and the third avalanche diode APD3 have the same electrical characteristics. The first avalanche diode APD1 is located in a radar signal environment, and the second avalanche diode APD2 and the third avalanche diode APD3 are located in an ambient light signal environment; one end of the actual photoelectric receiving module 10 and one end of the first reference photoelectric receiving module 20 are respectively electrically connected to two input ends of the first differential amplification module 40; the first reference photoelectric receiving module 20 is used to filter out one of the background noise and sunlight noise generated by the second avalanche diode APD2, and define the other of the background noise and sunlight noise generated by the second avalanche diode APD2 that is not filtered out as the first noise; the first differential amplification module 40 is used to perform differential processing on the background noise and sunlight noise generated by the first avalanche diode APD1, and the first noise, so as to filter out at least part of the first noise in the background noise and sunlight noise generated by the first avalanche diode APD1; the output end of the first differential amplification module 40 and one end of the second reference photoelectric receiving module 30 are respectively electrically connected to two input ends of the second differential amplification module 50; the second reference photoelectric receiving module 30 is used to filter out one of the background noise and sunlight noise generated by the third avalanche diode APD3, and define the other of the background noise and sunlight noise generated by the third avalanche diode APD3 that is not filtered out as the second noise; wherein, the first noise and the second noise are different types of noise; the second differential amplification module 50 is used to perform differential processing on the background noise and sunlight noise generated by the first avalanche diode APD1 after filtering out at least part of the first noise, and the second noise, so as to filter out at least part of the second noise in the background noise and sunlight noise generated by the first avalanche diode APD1; the other end of the actual photoelectric receiving module 10, the other end of the first reference photoelectric receiving module 20, and the other end of the second reference photoelectric receiving module 30 respectively receive power supply signals.

[0027] Specifically, the actual optoelectronic receiving module 10 includes a first avalanche photodiode APD1, the first reference optoelectronic receiving module 20 includes a second avalanche photodiode APD2, and the second reference optoelectronic receiving module 30 includes a third avalanche photodiode APD3. Among them, an avalanche photodiode means that after a reverse bias voltage is applied to the PN junction, the light incident on the avalanche photodiode is absorbed by the PN junction to form a photocurrent, and when the reverse voltage on the PN junction increases to a certain value, the carriers multiply and the photocurrent also increases exponentially, reaching the avalanche breakdown state. The first avalanche photodiode APD1 is located in the radar signal environment, and the second avalanche photodiode APD2 and the third avalanche photodiode APD3 are located in the ambient light signal environment. In other words, under the radar signal environment, for the first avalanche photodiode APD1, the radar signal incident on the first avalanche photodiode APD1 can be absorbed by the PN junction to correspondingly form an optoelectronic signal, and this optoelectronic signal includes an effective avalanche pulse signal, sunlight noise, and background noise. Under the ambient light signal environment, for the second avalanche photodiode APD2 and the third avalanche photodiode APD3, the ambient light signal incident on the second avalanche photodiode APD2 and / or the third avalanche photodiode APD3 can be absorbed by the PN junction to correspondingly form an optoelectronic signal, and this optoelectronic signal only includes sunlight noise and background noise. The first avalanche photodiode APD1, the second avalanche photodiode APD2, and the third avalanche photodiode APD3 have the same electrical characteristics. Then, at the same reverse voltage value and at a similar position, the magnitudes of the background noise such as thermal noise and spike noise generated by the first avalanche photodiode APD1 and the second avalanche photodiode APD2 are similar and the polarities are the same.

[0028] The avalanche pulse signal extraction circuit includes an actual photoelectric receiving module 10, a first reference photoelectric receiving module 20, a second reference photoelectric receiving module 30, a first differential amplification module 40, and a second differential amplification module 50. Among them, one end of the actual photoelectric receiving module 10 is electrically connected to an input terminal of the first differential amplification module 40, and the other end of the actual photoelectric receiving module 10 receives a power supply signal. Then, under the action of a certain reverse bias voltage, in a radar signal environment, the photoelectric signal generated by the first avalanche diode APD1 in the actual photoelectric receiving module 10 includes an effective avalanche pulse signal, sunlight noise, and background noise. Exemplarily, the background noise may include thermal noise, spike noise, etc. One end of the first reference photoelectric receiving module 20 is electrically connected to another input terminal of the first differential amplification module 40, and the other end of the first reference photoelectric receiving module 20 receives a power supply signal. Then, under the action of the same reverse bias voltage, in an ambient light signal environment, the photoelectric signal generated by the second avalanche diode APD2 in the first reference photoelectric receiving module 20 includes sunlight noise and background noise. Exemplarily, the background noise may include thermal noise, spike noise, etc. Moreover, the first reference photoelectric receiving module 20 can also filter out one of the background noise and sunlight noise corresponding to the generated second avalanche diode APD2, and define the other of the background noise and sunlight noise corresponding to the generated second avalanche diode APD2 that is not filtered out as the first noise. Exemplarily, the first reference photoelectric receiving module 20 can filter out the background noise, and the unfiltered first noise is sunlight noise; or, the first reference photoelectric receiving module 20 can filter out the sunlight noise, and the unfiltered first noise is background noise. The first differential amplification module 40 performs subtraction by differential processing on the photoelectric signal generated by the first avalanche diode APD1 and the photoelectric signal generated by the second avalanche diode APD2. Since the background noise and sunlight noise in the corresponding photoelectric signals of the two are similar in magnitude and the same in polarity, if the first noise is sunlight noise, after the subtraction processing of the first differential amplification module 40, an effective avalanche pulse signal generated by the first avalanche diode APD1 can be obtained at the output terminal of the first differential amplification module 40, and the effective avalanche pulse signal is only doped with background noise and a small amount of sunlight noise; or, if the first noise is background noise, after the subtraction processing of the first differential amplification module 40, an effective avalanche pulse signal generated by the first avalanche diode APD1 can be obtained at the output terminal of the first differential amplification module 40, and the effective avalanche pulse signal is only doped with sunlight noise and a small amount of background noise. In this way, an effective suppression of one of the background noise and sunlight noise is achieved, so that the effective avalanche pulse signal is preliminarily extracted.

[0029] The output terminal of the first differential amplification module 40 is electrically connected to an input terminal of the second differential amplification module 50. One end of the second reference photoelectric receiving module 30 is electrically connected to the other input terminal of the second differential amplification module 50, and the other end of the second reference photoelectric receiving module 30 receives a power signal. Then, under the action of the same reverse bias voltage, in an ambient light signal environment, the photoelectric signal generated by the third avalanche photodiode APD3 in the second reference photoelectric receiving module 30 includes sunlight noise and background noise. Exemplarily, the background noise may include thermal noise, spike noise, etc. Moreover, the second reference photoelectric receiving module 30 can also filter out one of the background noise and sunlight noise generated corresponding to the third avalanche photodiode APD3, and define the other of the background noise and sunlight noise generated corresponding to the unfiltered third avalanche photodiode APD3 as the second noise. Exemplarily, the first noise may be sunlight noise, then the second noise is the background noise, that is, the second reference photoelectric receiving module 30 can filter out sunlight noise; or, the first noise may be the background noise, then the second noise is sunlight noise, that is, the second reference photoelectric receiving module 30 can filter out the background noise. The second differential amplification module 50 performs subtraction by differential processing on the photoelectric signal at the output terminal of the first differential amplification module 40 and the photoelectric signal generated by the third avalanche photodiode APD3. Since the background noise and sunlight noise in the corresponding photoelectric signals of the two are similar in magnitude and the same in polarity, if the second noise is the background noise, after the subtraction processing of the second differential amplification module 50, an effective avalanche pulse signal generated by the first avalanche photodiode APD1 can be obtained at the output terminal of the second differential amplification module 50, and the effective avalanche pulse signal is not doped with background noise and sunlight noise (or only doped with a very small amount of background noise and sunlight noise); or, if the second noise is sunlight noise, after the subtraction processing of the second differential amplification module 50, an effective avalanche pulse signal generated by the first avalanche photodiode APD1 can be obtained at the output terminal of the second differential amplification module 50, and the effective avalanche pulse signal is not doped with background noise and sunlight noise (or only doped with a very small amount of background noise and sunlight noise). In this way, the effective suppression of background noise and sunlight noise is achieved, so that the effective avalanche pulse signal can be accurately extracted. In addition, the output terminal of the second differential amplification module 50 can also be electrically connected to an analog-to-digital conversion module, a voltage-current conversion module, etc. The effective avalanche pulse signal obtained at the output terminal of the second differential amplification module 50 can be further analyzed to obtain depth information corresponding to the effective avalanche pulse signal, etc.

[0030] In the technical solution of the embodiment of the present invention, the extraction circuit includes an actual photoelectric receiving module, a first reference photoelectric receiving module, a second reference photoelectric receiving module, a first differential amplification module, and a second differential amplification module; the actual photoelectric receiving module includes a first avalanche diode, the first reference photoelectric receiving module includes a second avalanche diode, the second reference photoelectric receiving module includes a third avalanche diode, the first avalanche diode, the second avalanche diode, and the third avalanche diode have the same electrical characteristics, the first avalanche diode is located in a radar signal environment, and the second avalanche diode and the third avalanche diode are located in an ambient light signal environment; one end of the actual photoelectric receiving module and one end of the first reference photoelectric receiving module are respectively electrically connected to two input ends of the first differential amplification module; the first reference photoelectric receiving module is configured to filter out one of the background noise and sunlight noise generated by the second avalanche diode, and define the other of the background noise and sunlight noise generated by the second avalanche diode that is not filtered out as the first noise; the first differential amplification module is configured to perform differential processing on the background noise and sunlight noise generated by the first avalanche diode, and the first noise, so as to filter out at least part of the first noise in the background noise and sunlight noise generated by the first avalanche diode; the output end of the first differential amplification module and one end of the second reference photoelectric receiving module are respectively electrically connected to two input ends of the second differential amplification module; the second reference photoelectric receiving module is configured to filter out one of the background noise and sunlight noise generated by the third avalanche diode, and define the other of the background noise and sunlight noise generated by the third avalanche diode that is not filtered out as the second noise; wherein, the first noise and the second noise are different types of noise; the second differential amplification module is configured to perform differential processing on the background noise and sunlight noise generated by the first avalanche diode after filtering out at least part of the first noise, and the second noise, so as to filter out at least part of the second noise in the background noise and sunlight noise generated by the first avalanche diode; the other end of the actual photoelectric receiving module, the other end of the first reference photoelectric receiving module, and the other end of the second reference photoelectric receiving module respectively receive a power signal. The avalanche pulse signal extraction circuit uses the first avalanche diode located in the radar signal environment, the second avalanche diode and the third avalanche diode located in the ambient light signal environment, and the three are respectively electrically connected to the input ends of the two differential amplification modules. The two differential amplification modules effectively filter out the sunlight noise caused by the external ambient light and suppress the background noise caused by the electrical characteristics of the avalanche diode itself through successive differential processing, reducing the influence of sunlight noise and background noise in the acquisition process of the effective avalanche pulse signal, improving the acquisition accuracy of the effective avalanche pulse signal, and only need to set the positions of the avalanche diodes and obtain a set of the first avalanche diode, the second avalanche diode, and the third avalanche diode, avoiding the problem of re-measuring the electrical characteristics of different avalanche diodes or precisely calculating and analyzing the point cloud map subsequently.

[0031] Optionally, continue to refer toFigure 1 Specifically, the actual photoelectric receiving module 10 further includes a filtering unit 60 and a voltage dividing unit 70; the two input terminals of the first differential amplification module 40 include a first input terminal 41; the power supply signal includes a negative bias signal - HVL; one end of the filtering unit 60 is electrically connected to the negative electrode of the first avalanche diode APD1, and the other end of the filtering unit 60 receives the negative bias signal - HVL; one end of the voltage dividing unit 70 is electrically connected to the positive electrode of the first avalanche diode APD1, and the other end of the voltage dividing unit 70 is electrically connected to the first input terminal 41.

[0032] Specifically, the actual photoelectric receiving module 10 includes a filtering unit 60, a first avalanche diode APD1, and a voltage dividing unit 70. Among them, one end of the filtering unit 60 is electrically connected to the negative electrode of the first avalanche diode APD1, and the other end of the filtering unit 60 receives the negative bias signal - HVL. One end of the voltage dividing unit 70 is electrically connected to the positive electrode of the first avalanche diode APD1, and the other end of the voltage dividing unit 70 is electrically connected to the first input terminal 41. That is, between the negative bias signal - HVL and the first input terminal 41, the filtering unit 60, the first avalanche diode APD1, and the voltage dividing unit 70 are electrically connected in sequence.

[0033] Optionally, continue to refer to Figure 1 Specifically, the first reference photoelectric receiving module 20 further includes a filtering unit 60, a limiting unit 80, and a voltage dividing unit 70; the two input terminals of the first differential amplification module 40 include a second input terminal 42; the power supply signal includes a negative bias signal - HVL; one end of the filtering unit 60 is electrically connected to the negative electrode of the second avalanche diode APD2, and the other end of the filtering unit 60 receives the negative bias signal - HVL; the first terminal 81 of the limiting unit 80 is electrically connected to the positive electrode of the second avalanche diode APD2, the second terminal 82 of the limiting unit 80 is electrically connected to one end of the voltage dividing unit 70, the third terminal 83 of the limiting unit 80 is grounded, and the fourth terminal 84 of the limiting unit 80 is grounded; the other end of the voltage dividing unit 70 is electrically connected to the second input terminal 42.

[0034] Specifically, the first reference photoelectric receiving module 20 includes a filtering unit 60, a second avalanche diode APD2, a limiting unit 80, and a voltage dividing unit 70. Among them, one end of the filtering unit 60 is electrically connected to the negative electrode of the second avalanche diode APD2, and the other end of the filtering unit 60 receives the negative bias signal - HVL. The first terminal 81 of the limiting unit 80 is electrically connected to the positive electrode of the second avalanche diode APD2, and the second terminal 82 of the limiting unit 80 is electrically connected to one end of the voltage dividing unit 70. The other end of the voltage dividing unit 70 is electrically connected to the second input terminal 42. That is, between the negative bias signal - HVL and the second input terminal 42, the filtering unit 60, the second avalanche diode APD2, the limiting unit 80, and the voltage dividing unit 70 are electrically connected in sequence.

[0035] Optionally, continuing to refer to Figure 1 , the limiting unit 80 includes a first resistor R1, a first diode D1, a second diode D2, a first DC voltage source VDC1, and a second DC voltage source VDC2; one end of the first resistor R1 is electrically connected to the first terminal 81, and the other end of the first resistor R1 is electrically connected to the second terminal 82; the positive electrode of the first diode D1 is electrically connected to the second terminal 82, and the negative electrode of the first diode D1 is electrically connected to the positive electrode of the first DC voltage source VDC1; the negative electrode of the first DC voltage source VDC1 is electrically connected to the third terminal 83; the negative electrode of the second diode D2 is electrically connected to the second terminal 82, and the positive electrode of the second diode D2 is electrically connected to the negative electrode of the second DC voltage source VDC2; the positive electrode of the second DC voltage source VDC2 is electrically connected to the fourth terminal 84.

[0036] Specifically, between the negative bias voltage signal - HVL and the second input terminal 42, the filtering unit 60, the second avalanche diode APD2, the limiting unit 80, and the voltage dividing unit 70 are electrically connected in sequence. The limiting unit 80 includes a first resistor R1, a first diode D1, a second diode D2, a first DC voltage source VDC1, and a second DC voltage source VDC2. The limiting unit 80 further includes a first terminal 81, a second terminal 82, a third terminal 83, and a fourth terminal 84. Among them, one end of the first resistor R1 is electrically connected to the first terminal 81, and the other end of the first resistor R1 is electrically connected to the second terminal 82, and the first terminal 81 is electrically connected to the positive electrode of the second avalanche diode APD2, and the second terminal 82 is electrically connected to one end of the voltage dividing unit 70, that is, the first resistor R1 is used to connect the second avalanche diode APD2 and one end of the voltage dividing unit 70. The positive electrode of the first diode D1 is electrically connected to the second terminal 82, the negative electrode of the first diode D1 is electrically connected to the positive electrode of the first DC voltage source VDC1, the negative electrode of the first DC voltage source VDC1 is electrically connected to the third terminal 83, and the third terminal 83 is grounded, that is, the first diode D1 and the first DC voltage source VDC1 are electrically connected to form a branch. It can be understood that on this branch, the common connection point of the first resistor R1, the first diode D1, and the voltage dividing unit 70 is defined as point A, and the voltage of the first DC voltage source VDC1 can be V DC1 , and the one-way conduction voltage of the first diode D1 can be V D1 , then the voltage of point A is V A = V DC1 - V D1The negative electrode of the second diode D2 is electrically connected to the second terminal 82. The positive electrode of the second diode D2 is electrically connected to the negative electrode of the second DC voltage source VDC2. The positive electrode of the second DC voltage source VDC2 is electrically connected to the fourth terminal 84. Moreover, the fourth terminal 84 is grounded. That is, the second diode D2 and the second DC voltage source VDC2 are electrically connected to form another branch. It can be understood that on this branch, the common connection point of the first resistor R1, the second diode D2, and the voltage dividing unit 70 is defined as point B. The voltage of the second DC voltage source VDC2 can be V DC2 , and the forward conduction voltage of the second diode D2 can be V D2 , then the voltage of point B is V B = V DC2 - V D2 . Thus, the amplitude limiting range corresponding to the amplitude limiting unit 80 can be [V B , V A . Since the amplitudes of the sunlight noise are all greater than the amplitude of the background noise, if the amplitude limiting range [V B , V A does not include the amplitudes of the sunlight noise, the sunlight noise can be filtered out.

[0037] Optionally, continuing to refer to Figure 1 , the second reference photoelectric receiving module 30 further includes a filtering unit 60, a voltage comparison unit 90, and a voltage dividing unit 70. The two input terminals of the second differential amplification module 50 include a third input terminal 51 and a fourth input terminal 52. The output terminal of the first differential amplification module 40 is electrically connected to the third input terminal 51. The power supply signal includes a negative bias signal - HVL. One end of the filtering unit 60 is electrically connected to the negative electrode of the third avalanche diode APD3, and the other end of the filtering unit 60 receives the negative bias signal - HVL. The fifth terminal 91 of the voltage comparison unit 90 is electrically connected to the positive electrode of the third avalanche diode APD3. The sixth terminal 92 of the voltage comparison unit 90 is electrically connected to a preset voltage signal V0. The seventh terminal 93 of the voltage comparison unit 90 is electrically connected to one end of the voltage dividing unit 70. The other end of the voltage dividing unit 70 is electrically connected to the fourth input terminal 52.

[0038] Specifically, the second reference optoelectronic receiving module 30 includes a filtering unit 60, a third avalanche photodiode APD3, a voltage comparison unit 90, and a voltage dividing unit 70. One end of the filtering unit 60 is electrically connected to the negative electrode of the third avalanche photodiode APD3, and the other end of the filtering unit 60 receives a negative-polarity bias signal -HVL. The fifth terminal 91 of the voltage comparison unit 90 is electrically connected to the positive electrode of the third avalanche photodiode APD3, and the seventh terminal 93 of the voltage comparison unit 90 is electrically connected to one end of the voltage dividing unit 70. The other end of the voltage dividing unit 70 is electrically connected to the fourth input terminal 52. That is, between the negative-polarity bias signal -HVL and the fourth input terminal 52, the filtering unit 60, the third avalanche photodiode APD3, the voltage comparison unit 90, and the voltage dividing unit 70 are electrically connected in sequence. Moreover, the output terminal of the first differential amplification module 40 is electrically connected to the third input terminal 51 of the second differential amplification module 50, thereby establishing a connection between two-stage differential amplification processes.

[0039] Optionally, continuing to refer to Figure 1 , the voltage comparison unit 90 includes a voltage comparator U1. The voltage comparator U1 includes a first non-inverting input terminal, a first inverting input terminal, and a first output terminal; the first inverting input terminal serves as the fifth terminal 91 and is electrically connected to the positive electrode of the third avalanche photodiode APD3; the first non-inverting input terminal serves as the sixth terminal 92 and is electrically connected to a preset voltage signal V0; the first output terminal serves as the seventh terminal 93 and is electrically connected to one end of the voltage dividing unit 70.

[0040] Specifically, between the negative-polarity bias signal -HVL and the fourth input terminal 52, the filtering unit 60, the third avalanche photodiode APD3, the voltage comparison unit 90, and the voltage dividing unit 70 are electrically connected in sequence. The voltage comparison unit 90 includes a voltage comparator U1. The voltage comparator U1 includes a first non-inverting input terminal, a first inverting input terminal, and a first output terminal. The voltage comparison unit 90 further includes a fifth terminal 91, a sixth terminal 92, and a seventh terminal 93. Among them, the first inverting input terminal serves as the fifth terminal 91 and is electrically connected to the positive electrode of the third avalanche photodiode APD3, the first non-inverting input terminal serves as the sixth terminal 92 and is electrically connected to the preset voltage signal V0, and the first output terminal serves as the seventh terminal 93 and is electrically connected to one end of the voltage dividing unit 70. Since the amplitude of sunlight noise is greater than the amplitude of the background noise, if the preset voltage signal V0 is greater than the amplitude of the background noise, the background noise can be filtered out.

[0041] In addition, the voltage comparator U1 further includes a first power supply terminal 94 and a second power supply terminal 95. The first power supply terminal 94 receives a positive-phase power supply signal, and the second power supply terminal 95 receives a negative-phase power supply signal. Then, the voltage comparator U1 is in a normal working state under the action of the positive-phase power supply signal and the negative-phase power supply signal. Moreover, the voltage comparison unit 90 further includes a first capacitor energy storage unit and a second capacitor energy storage unit. One end of the first capacitor energy storage unit is electrically connected to the first power supply terminal 94, and the other end of the first capacitor energy storage unit is grounded. That is, one end of the first capacitor energy storage unit receives the positive-phase power supply signal, and the first capacitor energy storage unit can reasonably store and release electrical energy. Exemplarily, the first capacitor energy storage unit may include a second capacitor C2 and a third capacitor C3. Among them, the first power supply terminal 94 is respectively electrically connected to one end of the second capacitor C2 and one end of the third capacitor C3, and the other end of the second capacitor C2 and the other end of the second capacitor C2 are respectively grounded. One end of the second capacitor energy storage unit is electrically connected to the second power supply terminal 95, and the other end of the second capacitor energy storage unit is grounded. That is, one end of the second capacitor energy storage unit receives the negative-phase power supply signal, and the second capacitor energy storage unit can reasonably store and release electrical energy. Exemplarily, the second capacitor energy storage unit may include a second capacitor C2 and a third capacitor C3. Among them, the second power supply terminal 95 is respectively electrically connected to one end of the second capacitor C2 and one end of the third capacitor C3, and the other end of the second capacitor C2 and the other end of the second capacitor C2 are respectively grounded.

[0042] It should be noted that, in order to ensure that the background noise and sunlight noise in the optoelectronic signals generated by the first avalanche photodiode APD1 are similar in magnitude and the same in polarity to those in the optoelectronic signals generated by the second avalanche photodiode APD2, and are also similar in magnitude and the same in polarity to those in the optoelectronic signals generated by the third avalanche photodiode APD3, it is necessary to ensure that the reverse bias voltages applied to the first avalanche photodiode APD1, the second avalanche photodiode APD2, and the third avalanche photodiode APD3 are the same, that is, they are all electrically connected to the negative polarity bias voltage signal -HVL, and the negative polarity bias voltage signal -HVL is connected to the first avalanche photodiode APD1 / the second avalanche photodiode APD2 / the third avalanche photodiode APD3 after being filtered by the same filtering unit 60. Since the limiting unit 80 does not affect the magnitude and polarity of the optoelectronic signal, the optoelectronic signals generated by the first avalanche photodiode APD1 / the second avalanche photodiode APD2 are both connected to the two input terminals of the first differential amplification module 40 after passing through the same voltage dividing unit 70. In the first differential amplification module 40, one of the background noise or sunlight noise with similar magnitude and the same polarity can be subtracted and eliminated. Since the voltage comparison unit 90 does not affect the magnitude and polarity of the optoelectronic signal, the optoelectronic signal generated by the third avalanche photodiode APD3 is also connected to one input terminal of the second differential amplification module 50 after passing through the same voltage dividing unit 70, and the output terminal of the first differential amplification module 40 is connected to the other input terminal of the second differential amplification module 50. In the second differential amplification module 50, the other of the background noise or sunlight noise with similar magnitude and the same polarity can be subtracted and eliminated, and only the effective avalanche pulse signal is obtained at the output terminal of the second differential amplification module 50.

[0043] In a specific embodiment, optionally, continue to refer to Figure 1, the filtering unit 60 includes a second resistor R2 and a first capacitor C1; in the actual optical and electrical receiving module 10, one end of the second resistor R2 is electrically connected to the negative electrode of the first avalanche photodiode APD1, and the other end of the second resistor R2 receives a negative bias voltage signal - HVL; in the first reference optical and electrical receiving module 20, one end of the second resistor R2 is electrically connected to the negative electrode of the second avalanche photodiode APD2, and the other end of the second resistor R2 receives a negative bias voltage signal - HVL; in the second reference optical and electrical receiving module 30, one end of the second resistor R2 is electrically connected to the negative electrode of the third avalanche photodiode APD3, and the other end of the second resistor R2 receives a negative bias voltage signal - HVL; one end of the first capacitor C1 is electrically connected to one end of the second resistor R2, and the other end of the first capacitor C1 is grounded; and / or, the voltage dividing unit 70 includes a third resistor R3; in the actual optical and electrical receiving module 10, one end of the third resistor R3 is electrically connected to the positive electrode of the first avalanche photodiode APD1, and the other end of the third resistor R3 is electrically connected to the first input terminal 41; in the first reference optical and electrical receiving module 20, one end of the third resistor R3 is electrically connected to the positive electrode of the second avalanche photodiode APD2, and the other end of the third resistor R3 is electrically connected to the second input terminal 42; in the second reference optical and electrical receiving module 30, one end of the third resistor R3 is electrically connected to the positive electrode of the third avalanche photodiode APD3, and the other end of the third resistor R3 is electrically connected to the fourth input terminal 52.

[0044] Specifically, the filtering unit 60 includes a second resistor R2 and a first capacitor C1, and the filtering unit 60 is applicable to both the actual photoelectric receiving module 10, the first reference photoelectric receiving module 20, and the second reference photoelectric receiving module 30. In the actual photoelectric receiving module 10, one end of the second resistor R2 is electrically connected to the negative electrode of the first avalanche photodiode APD1, the other end of the second resistor R2 receives a negative-polarity bias signal -HVL, one end of the first capacitor C1 is electrically connected to one end of the second resistor R2, and the other end of the first capacitor C1 is grounded. Exemplarily, one end of the first capacitor C1 can be electrically connected to the end of the second resistor R2 close to the negative electrode of the first avalanche photodiode APD1, or one end of the first capacitor C1 can also be electrically connected to the end of the second resistor R2 close to the negative-polarity bias signal -HVL. In the first reference photoelectric receiving module 20, one end of the second resistor R2 is electrically connected to the negative electrode of the second avalanche photodiode APD2, the other end of the second resistor R2 receives a negative-polarity bias signal -HVL, one end of the first capacitor C1 is electrically connected to one end of the second resistor R2, and the other end of the first capacitor C1 is grounded. Exemplarily, one end of the first capacitor C1 can be electrically connected to the end of the second resistor R2 close to the negative electrode of the second avalanche photodiode APD2, or one end of the first capacitor C1 can also be electrically connected to the end of the second resistor R2 close to the negative-polarity bias signal -HVL. In the second reference photoelectric receiving module 30, one end of the second resistor R2 is electrically connected to the negative electrode of the third avalanche photodiode APD3, the other end of the second resistor R2 receives a negative-polarity bias signal -HVL, one end of the first capacitor C1 is electrically connected to one end of the second resistor R2, and the other end of the first capacitor C1 is grounded. Exemplarily, one end of the first capacitor C1 can be electrically connected to the end of the second resistor R2 close to the negative electrode of the third avalanche photodiode APD3, or one end of the first capacitor C1 can also be electrically connected to the end of the second resistor R2 close to the negative-polarity bias signal -HVL.

[0045] The voltage dividing unit 70 includes a third resistor R3, and this voltage dividing unit 70 can be applied to both the actual photoelectric receiving module 10, the first reference photoelectric receiving module 20, and the second reference photoelectric receiving module 30. In the actual photoelectric receiving module 10, one end of the third resistor R3 is electrically connected to the positive electrode of the first avalanche diode APD1, and the other end of the third resistor R3 is electrically connected to the first input terminal 41. The third resistor R3 can balance the voltage value between the first avalanche diode APD1 and the first differential amplification module 40, ensuring that both the first avalanche diode APD1 and the first differential amplification module 40 are in a normal operating state. In the first reference photoelectric receiving module 20, one end of the third resistor R3 is electrically connected to the positive electrode of the second avalanche diode APD2, and the other end of the third resistor R3 is electrically connected to the second input terminal 42. The third resistor R3 can balance the voltage value between the second avalanche diode APD2 and the first differential amplification module 40, ensuring that both the second avalanche diode APD2 and the first differential amplification module 40 are in a normal operating state. In the second reference photoelectric receiving module 30, one end of the third resistor R3 is electrically connected to the positive electrode of the third avalanche diode APD3, and the other end of the third resistor R3 is electrically connected to the fourth input terminal 52. The third resistor R3 can balance the voltage value between the third avalanche diode APD3 and the second differential amplification module 50, ensuring that both the third avalanche diode APD3 and the second differential amplification module 50 are in a normal operating state.

[0046] Optionally, continue to refer to Figure 1 , the first differential amplification module 40 includes a first differential operational amplifier U2 and a first amplification gain unit 43; the first differential operational amplifier U2 includes a second non-inverting input terminal, a second inverting input terminal, and a second output terminal; the first amplification gain unit 43 includes an eighth terminal 431, a ninth terminal 432, a tenth terminal 433, an eleventh terminal 434, a twelfth terminal 435, and a thirteenth terminal 436; one end of the actual photoelectric receiving module 10 is electrically connected to the eighth terminal 431; one end of the first reference photoelectric receiving module 20 is electrically connected to the ninth terminal 432; the tenth terminal 433 is electrically connected to the second non-inverting input terminal; the eleventh terminal 434 is electrically connected to the second inverting input terminal; the twelfth terminal 435 is grounded; the thirteenth terminal 436 is electrically connected to the second output terminal.

[0047] Furthermore, continue to refer to Figure 1, the first amplification gain unit 43 further includes a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7; one end of the fourth resistor R4 is electrically connected to the eighth terminal 431, and the other end of the fourth resistor R4 is electrically connected to the tenth terminal 433; one end of the fifth resistor R5 is electrically connected to the tenth terminal 433, and the other end of the fifth resistor R5 is electrically connected to the twelfth terminal 435; one end of the sixth resistor R6 is electrically connected to the ninth terminal 432, and the other end of the sixth resistor R6 is electrically connected to the eleventh terminal 434; one end of the seventh resistor R7 is electrically connected to the eleventh terminal 434, and the other end of the seventh resistor R7 is electrically connected to the thirteenth terminal 436.

[0048] Specifically, the first differential amplification module 40 includes a first differential operational amplifier U2 and a first amplification gain unit 43. Among them, the first differential operational amplifier U2 includes a second non-inverting input terminal, a second inverting input terminal, and a second output terminal; the first amplification gain unit 43 includes an eighth terminal 431, a ninth terminal 432, a tenth terminal 433, an eleventh terminal 434, a twelfth terminal 435, and a thirteenth terminal 436. The first amplification gain unit 43 further includes a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7. One end of the actual photoelectric receiving module 10 is electrically connected to the eighth terminal 431, the second non-inverting input terminal is electrically connected to the tenth terminal 433, and, one end of the fourth resistor R4 is electrically connected to the eighth terminal 431, and the other end of the fourth resistor R4 is electrically connected to the tenth terminal 433, that is, the fourth resistor R4 is used to connect one end of the actual photoelectric receiving module 10 to the second non-inverting input terminal of the first differential operational amplifier U2. One end of the first reference photoelectric receiving module 20 is electrically connected to the ninth terminal 432, the second inverting input terminal is electrically connected to the eleventh terminal 434, and, one end of the sixth resistor R6 is electrically connected to the ninth terminal 432, and the other end of the sixth resistor R6 is electrically connected to the eleventh terminal 434, that is, the sixth resistor R6 is used to connect one end of the first reference photoelectric receiving module 20 to the second inverting input terminal of the first differential operational amplifier U2. One end of the fifth resistor R5 is electrically connected to the tenth terminal 433, the other end of the fifth resistor R5 is electrically connected to the twelfth terminal 435, and, the twelfth terminal 435 is grounded, that is, the second non-inverting input terminal of the first differential operational amplifier U2 is grounded through the fifth resistor R5. The second inverting input terminal is electrically connected to the eleventh terminal 434, the second output terminal is electrically connected to the thirteenth terminal 436, and, one end of the seventh resistor R7 is electrically connected to the eleventh terminal 434, and the other end of the seventh resistor R7 is electrically connected to the thirteenth terminal 436, that is, the seventh resistor R7 is used to connect the second inverting input terminal of the first differential operational amplifier U2 to the second output terminal.

[0049] It can be understood that the resistance values of the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, and the seventh resistor R7 can determine the amplification gain of the first differential operational amplifier U2. Exemplarily, the voltage at the second non-inverting input terminal of the first differential operational amplifier U2 can be V1, the voltage at the second inverting input terminal of the first differential operational amplifier U2 can be V2, and the voltage at the second output terminal of the first differential operational amplifier U2 can be Vout1. Then, Vout1 = V1[(R5 / R4 + R5)(R7 / R6 + 1)] - V2(R7 / R6). To simplify the calculation and reduce the complexity of the amplification gain, the special case of R4 = R6 and R5 = R7 can be adopted. Then, Vout = R5 / R4(V1 - V2) or Vout = R7 / R6(V2 - V1). In this way, the effective avalanche pulse signal can be extracted from the background noise such as thermal noise and spike noise, or the effective avalanche pulse signal can be extracted from the sunlight noise.

[0050] In addition, the first differential operational amplifier U2 further includes a third power supply terminal 44 and a fourth power supply terminal 45. The third power supply terminal 44 receives a positive power supply signal, and the fourth power supply terminal 45 receives a negative power supply signal. Then, the first differential operational amplifier U2 is in a normal working state under the action of the positive power supply signal and the negative power supply signal. Moreover, the first differential amplification module 40 further includes a third capacitor energy storage unit and a fourth capacitor energy storage unit. One end of the third capacitor energy storage unit is electrically connected to the third power supply terminal 44, and the other end of the third capacitor energy storage unit is grounded. That is, one end of the third capacitor energy storage unit receives the positive power supply signal, and the third capacitor energy storage unit can reasonably store and release electrical energy. Exemplarily, the third capacitor energy storage unit can include a second capacitor C2 and a third capacitor C3. Among them, the third power supply terminal 44 is respectively electrically connected to one end of the second capacitor C2 and one end of the third capacitor C3, and the other end of the second capacitor C2 and the other end of the second capacitor C2 are respectively grounded. One end of the fourth capacitor energy storage unit is electrically connected to the fourth power supply terminal 45, and the other end of the fourth capacitor energy storage unit is grounded. That is, one end of the fourth capacitor energy storage unit receives the negative power supply signal, and the fourth capacitor energy storage unit can reasonably store and release electrical energy. Exemplarily, the fourth capacitor energy storage unit can include a second capacitor C2 and a third capacitor C3. Among them, the fourth power supply terminal 45 is respectively electrically connected to one end of the second capacitor C2 and one end of the third capacitor C3, and the other end of the second capacitor C2 and the other end of the second capacitor C2 are respectively grounded.

[0051] Optionally, continue to refer to Figure 1, the second differential amplification module 50 includes a second differential operational amplifier U3 and a second amplification gain unit 53; the second differential operational amplifier U3 includes a third non-inverting input terminal, a third inverting input terminal, and a third output terminal; the second amplification gain unit 53 includes a fourteenth terminal 531, a fifteenth terminal 532, a sixteenth terminal 533, a seventeenth terminal 534, an eighteenth terminal 535, and a nineteenth terminal 536; the second output terminal is electrically connected to the fourteenth terminal 531; one end of the second reference photoelectric receiving module 30 is electrically connected to the fifteenth terminal 532; the sixteenth terminal 533 is electrically connected to the third non-inverting input terminal; the seventeenth terminal 534 is electrically connected to the third inverting input terminal; the eighteenth terminal 535 is grounded; the nineteenth terminal 536 is electrically connected to the third output terminal.

[0052] Further, continue to refer to Figure 1 , the second amplification gain unit 53 further includes an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, and an eleventh resistor R11; one end of the eighth resistor R8 is electrically connected to the fourteenth terminal 531, and the other end of the eighth resistor R8 is electrically connected to the sixteenth terminal 533; one end of the ninth resistor R9 is electrically connected to the sixteenth terminal 533, and the other end of the ninth resistor R9 is electrically connected to the eighteenth terminal 535; one end of the tenth resistor R10 is electrically connected to the fifteenth terminal 532, and the other end of the tenth resistor R10 is electrically connected to the seventeenth terminal 534; one end of the eleventh resistor R11 is electrically connected to the seventeenth terminal 534, and the other end of the eleventh resistor R11 is electrically connected to the nineteenth terminal 536.

[0053] Specifically, the second differential amplification module 50 includes a second differential operational amplifier U3 and a second amplification gain unit 53. Among them, the second differential operational amplifier U3 includes a third non-inverting input terminal, a third inverting input terminal, and a third output terminal; the second amplification gain unit 53 includes a fourteenth terminal 531, a fifteenth terminal 532, a sixteenth terminal 533, a seventeenth terminal 534, an eighteenth terminal 535, and a nineteenth terminal 536. The second amplification gain unit 53 further includes an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, and an eleventh resistor R11. The second output terminal of the first differential operational amplifier U2 is electrically connected to the fourteenth terminal 531, the third non-inverting input terminal is electrically connected to the sixteenth terminal 533, and one end of the eighth resistor R8 is electrically connected to the fourteenth terminal 531, and the other end of the eighth resistor R8 is electrically connected to the sixteenth terminal 533, that is, the eighth resistor R8 is used to connect the second output terminal of the first differential operational amplifier U2 to the third non-inverting input terminal of the second differential operational amplifier U3. One end of the second reference photoelectric receiving module 30 is electrically connected to the fifteenth terminal 532, the third inverting input terminal is electrically connected to the seventeenth terminal 534, and one end of the tenth resistor R10 is electrically connected to the fifteenth terminal 532, and the other end of the tenth resistor R10 is electrically connected to the seventeenth terminal 534, that is, the tenth resistor R10 is used to connect one end of the second reference photoelectric receiving module 30 to the third inverting input terminal of the second differential operational amplifier U3. One end of the ninth resistor R9 is electrically connected to the sixteenth terminal 533, the other end of the ninth resistor R9 is electrically connected to the eighteenth terminal 535, and the eighteenth terminal 535 is grounded, that is, the third non-inverting input terminal of the second differential operational amplifier U3 is grounded through the ninth resistor R9. The third inverting input terminal is electrically connected to the seventeenth terminal 534, the third output terminal is electrically connected to the nineteenth terminal 536, and one end of the eleventh resistor R11 is electrically connected to the seventeenth terminal 534, and the other end of the eleventh resistor R11 is electrically connected to the nineteenth terminal 536, that is, the eleventh resistor R11 is used to connect the third inverting input terminal of the second differential operational amplifier U3 to the third output terminal.

[0054] It can be understood that the resistance values of the eighth resistor R8, the ninth resistor R9, the tenth resistor R10, and the eleventh resistor R11 can determine the amplification gain of the second differential operational amplifier U3. Exemplarily, the voltage at the third non-inverting input terminal of the second differential operational amplifier U3 can be V3, the voltage at the third inverting input terminal of the second differential operational amplifier U3 can be V4, and the voltage at the third output terminal of the second differential operational amplifier U3 can be Vout2. Then, Vout2 = V3[(R9 / R8 + R8)(R11 / R10 + 1)] - V4(R11 / R10). To simplify the calculation and reduce the complexity of the amplification gain, the special case of R8 = R10 and R9 = R11 can be adopted. Then, Vout = R9 / R8(V3 - V4) or Vout = R11 / R8(V4 - V3). In this way, the effective avalanche pulse signal can be extracted from the background noise such as thermal noise and spike noise, or the effective avalanche pulse signal can be extracted from the sunlight noise.

[0055] In addition, the second differential operational amplifier U3 further includes a fifth power supply terminal 54 and a sixth power supply terminal 55. The fifth power supply terminal 54 receives a positive power supply signal, and the sixth power supply terminal 55 receives a negative power supply signal. Then, the second differential operational amplifier U3 is in a normal working state under the action of the positive power supply signal and the negative power supply signal. Moreover, the second differential amplification module 50 further includes a fifth capacitor energy storage unit and a sixth capacitor energy storage unit. One end of the fifth capacitor energy storage unit is electrically connected to the fifth power supply terminal 54, and the other end of the fifth capacitor energy storage unit is grounded. That is, one end of the fifth capacitor energy storage unit receives the positive power supply signal, and the fifth capacitor energy storage unit can reasonably store and release electrical energy. Exemplarily, the fifth capacitor energy storage unit can include a second capacitor C2 and a third capacitor C3. Among them, the fifth power supply terminal 54 is respectively electrically connected to one end of the second capacitor C2 and one end of the third capacitor C3, and the other end of the second capacitor C2 and the other end of the second capacitor C2 are respectively grounded. One end of the sixth capacitor energy storage unit is electrically connected to the sixth power supply terminal 55, and the other end of the sixth capacitor energy storage unit is grounded. That is, one end of the sixth capacitor energy storage unit receives the negative power supply signal, and the sixth capacitor energy storage unit can reasonably store and release electrical energy. Exemplarily, the sixth capacitor energy storage unit can include a second capacitor C2 and a third capacitor C3. Among them, the sixth power supply terminal 55 is respectively electrically connected to one end of the second capacitor C2 and one end of the third capacitor C3, and the other end of the second capacitor C2 and the other end of the second capacitor C2 are respectively grounded.

[0056] Based on the same inventive concept, an embodiment of the present invention further provides a photodetector. Figure 2 is a schematic structural diagram of a photodetector provided by an embodiment of the present invention, as Figure 2As shown, the photodetector includes an avalanche pulse signal extraction circuit provided in any one of the embodiments of the present invention. Therefore, the photodetector provided in the embodiments of the present invention has the corresponding beneficial effects of the avalanche pulse signal extraction circuit provided in the embodiments of the present invention, which will not be elaborated here.

[0057] Continuing to refer to Figure 1 and Figure 2 , the photodetector further includes a first receiving plate B1 and a second receiving plate B2; a first avalanche diode APD1 is disposed on the first receiving plate B1, and a second avalanche diode APD2 and a third avalanche diode APD3 are disposed on the second receiving plate B2; wherein, the first receiving plate B1 and the second receiving plate B2 are not in the same plane. Optionally, the photodetector further includes a first condenser lens L1; the first condenser lens L1 and the first receiving plate B1 are sequentially located in the propagation direction of the radar signal; the first condenser lens L1 is configured to focus the radar signal and incident it on the first avalanche diode APD1 on the first receiving plate B1; and / or, further includes a second condenser lens L2; the second condenser lens L2 and the second receiving plate B2 are sequentially located in the propagation direction of the ambient light signal; the second condenser lens L2 is configured to focus the ambient light signal and incident it on the second avalanche diode APD2 and the third avalanche diode APD3 on the second receiving plate B2.

[0058] Specifically, the photodetector further includes a first receiving plate B1, a second receiving plate B2, a first condenser lens L1, and a second condenser lens L2. The photodetector may have a three-dimensional structure. Exemplarily, the three-dimensional structure may be a cuboid, a cylinder, a frustum of a cone, etc. Among them, the first avalanche photodiode APD1 is disposed on the first receiving plate B1, and the first condenser lens L1 and the first receiving plate B1 are sequentially located in the propagation direction of the radar signal. Then, the first condenser lens L1 can focus the radar signal and incident it on the first avalanche photodiode APD1 on the first receiving plate B1. The first condenser lens L1 and the first receiving plate B1 can be understood to have the same size. The second avalanche photodiode APD2 and the third avalanche photodiode APD3 are disposed on the second receiving plate B2, and the second condenser lens L2 and the second receiving plate B2 are sequentially located in the propagation direction of the ambient light signal. Then, the second condenser lens L2 can focus the ambient light signal and incident it on the second avalanche photodiode APD2 and the third avalanche photodiode APD3 on the second receiving plate B2. The second condenser lens L2 and the second receiving plate B2 can be understood to have the same size, and the positions of the second avalanche photodiode APD2 and the third avalanche photodiode APD3 are close. It can be understood that the first receiving plate B1 and the second receiving plate B2 are not in the same plane to avoid the influence of excessive ambient light signals on the radar signal receiving process of the first avalanche photodiode APD1, and also avoid the interference of signal reception between the first avalanche photodiode APD1, the second avalanche photodiode APD2, and the third avalanche photodiode APD3. Exemplarily, the first receiving plate B1 may be located on the front view surface of the three-dimensional structure, and the first receiving plate B1 may be located on the top view surface of the three-dimensional structure. In addition, there may be only the first condenser lens L1 or only the second condenser lens L2 in the photodetector. This is only an example in the embodiments of the present invention, and the number of condenser lenses is not limited.

[0059] Note that the above is only the preferred embodiment of the present invention and the applied technical principle. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described here. Various obvious changes, re-adjustments, combinations with each other, and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments. Without departing from the concept of the present invention, more other equivalent embodiments may be included, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. An avalanche pulse signal extraction circuit, characterized in that, It includes an actual photoelectric receiving module, a first reference photoelectric receiving module, a second reference photoelectric receiving module, a first differential amplification module and a second differential amplification module; The actual photoelectric receiving module includes a first avalanche diode, the first reference photoelectric receiving module includes a second avalanche diode, the second reference photoelectric receiving module includes a third avalanche diode. The first avalanche diode, the second avalanche diode and the third avalanche diode have the same electrical characteristics. The first avalanche diode is located in a radar signal environment, and the second avalanche diode and the third avalanche diode are located in an ambient light signal environment; One end of the actual photoelectric receiving module and one end of the first reference photoelectric receiving module are respectively electrically connected to two input ends of the first differential amplification module; The first reference photoelectric receiving module is used to filter out one of the background noise and sunlight noise generated by the second avalanche diode, and define the other of the background noise and sunlight noise generated by the second avalanche diode that is not filtered out as the first noise; The first differential amplification module is used to perform differential processing on the background noise and sunlight noise generated by the first avalanche diode and the first noise, so as to filter out at least part of the first noise in the background noise and sunlight noise generated by the first avalanche diode; The output end of the first differential amplification module and one end of the second reference photoelectric receiving module are respectively electrically connected to two input ends of the second differential amplification module; The second reference photoelectric receiving module is used to filter out one of the background noise and sunlight noise generated by the third avalanche diode, and define the other of the background noise and sunlight noise generated by the third avalanche diode that is not filtered out as the second noise; wherein, the first noise and the second noise are different types of noise; The second differential amplification module is used to perform differential processing on the background noise and sunlight noise generated by the first avalanche diode after filtering out at least part of the first noise and the second noise, so as to filter out at least part of the second noise in the background noise and sunlight noise generated by the first avalanche diode; The other end of the actual photoelectric receiving module, the other end of the first reference photoelectric receiving module, and the other end of the second reference photoelectric receiving module respectively receive a power supply signal.

2. The extraction circuit according to claim 1, wherein The actual photoelectric receiving module further includes a filtering unit and a voltage dividing unit; The two input ends of the first differential amplification module include a first input end; The power supply signal includes a negative polarity bias signal; One end of the filtering unit is electrically connected to the negative electrode of the first avalanche diode, and the other end of the filtering unit receives the negative polarity bias signal; One end of the voltage dividing unit is electrically connected to the positive electrode of the first avalanche diode, and the other end of the voltage dividing unit is electrically connected to the first input end.

3. The extraction circuit according to claim 1, wherein The first reference photoelectric receiving module further includes a filtering unit, a limiting unit and a voltage dividing unit; The two input ends of the first differential amplification module include a second input end; The power supply signal includes a negative polarity bias signal; One end of the filtering unit is electrically connected to the negative electrode of the second avalanche diode, and the other end of the filtering unit receives the negative-polarity bias signal; The first end of the limiting unit is electrically connected to the positive electrode of the second avalanche diode, the second end of the limiting unit is electrically connected to one end of the voltage dividing unit, the third end of the limiting unit is grounded, and the fourth end of the limiting unit is grounded; The other end of the voltage dividing unit is electrically connected to the second input terminal.

4. The extraction circuit according to claim 3, wherein The limiting unit includes a first resistor, a first diode, a second diode, a first DC voltage source and a second DC voltage source; One end of the first resistor is electrically connected to the first end, and the other end of the first resistor is electrically connected to the second end; The positive electrode of the first diode is electrically connected to the second end, and the negative electrode of the first diode is electrically connected to the positive electrode of the first DC voltage source; the negative electrode of the first DC voltage source is electrically connected to the third end; The negative electrode of the second diode is electrically connected to the second end, and the positive electrode of the second diode is electrically connected to the negative electrode of the second DC voltage source; the positive electrode of the second DC voltage source is electrically connected to the fourth end.

5. The extraction circuit according to claim 1, wherein The second reference photoelectric receiving module further includes a filtering unit, a voltage comparison unit and a voltage dividing unit; The two input terminals of the second differential amplification module include a third input terminal and a fourth input terminal; The output terminal of the first differential amplification module is electrically connected to the third input terminal; The power supply signal includes a negative-polarity bias signal; One end of the filtering unit is electrically connected to the negative electrode of the third avalanche diode, and the other end of the filtering unit receives the negative-polarity bias signal; The fifth end of the voltage comparison unit is electrically connected to the positive electrode of the third avalanche diode, the sixth end of the voltage comparison unit is electrically connected to a preset voltage signal, and the seventh end of the voltage comparison unit is electrically connected to one end of the voltage dividing unit; The other end of the voltage dividing unit is electrically connected to the fourth input terminal.

6. The extraction circuit according to claim 5, wherein The voltage comparison unit includes a voltage comparator, and the voltage comparator includes a first non-inverting input terminal, a first inverting input terminal and a first output terminal; The first inverting input terminal serves as the fifth end and is electrically connected to the positive electrode of the third avalanche diode; The first non-inverting input terminal serves as the sixth end and is electrically connected to the preset voltage signal; The first output terminal serves as the seventh end and is electrically connected to one end of the voltage dividing unit.

7. The extraction circuit according to any one of claims 2-6, characterized in that, The filtering unit includes a second resistor and a first capacitor; In the actual photoelectric receiving module, one end of the second resistor is electrically connected to the negative electrode of the first avalanche diode, and the other end of the second resistor receives the negative-polarity bias signal; In the first reference photoelectric receiving module, one end of the second resistor is electrically connected to the negative electrode of the second avalanche diode, and the other end of the second resistor receives the negative-polarity bias signal; In the second reference photoelectric receiving module, one end of the second resistor is electrically connected to the negative electrode of the third avalanche diode, and the other end of the second resistor receives the negative-polarity bias signal; One end of the first capacitor is electrically connected to one end of the second resistor, and the other end of the first capacitor is grounded; and / or The voltage dividing unit includes a third resistor; In the actual photoelectric receiving module, one end of the third resistor is electrically connected to the positive electrode of the first avalanche diode, and the other end of the third resistor is electrically connected to the first input terminal; In the first reference photoelectric receiving module, one end of the third resistor is electrically connected to the positive electrode of the second avalanche diode, and the other end of the third resistor is electrically connected to the second input terminal; In the second reference photoelectric receiving module, one end of the third resistor is electrically connected to the positive electrode of the third avalanche diode, and the other end of the third resistor is electrically connected to the fourth input terminal.

8. The extraction circuit according to claim 1, wherein The first differential amplification module includes a first differential operational amplifier and a first amplification gain unit; The first differential operational amplifier includes a second non-inverting input terminal, a second inverting input terminal, and a second output terminal; The first amplification gain unit includes an eighth terminal, a ninth terminal, a tenth terminal, an eleventh terminal, a twelfth terminal, and a thirteenth terminal; One end of the actual photoelectric receiving module is electrically connected to the eighth terminal; One end of the first reference photoelectric receiving module is electrically connected to the ninth terminal; The tenth terminal is electrically connected to the second non-inverting input terminal; The eleventh terminal is electrically connected to the second inverting input terminal; The twelfth terminal is grounded; The thirteenth terminal is electrically connected to the second output terminal.

9. The extraction circuit according to claim 8, wherein The first amplification gain unit further includes a fourth resistor, a fifth resistor, a sixth resistor, and a seventh resistor; One end of the fourth resistor is electrically connected to the eighth terminal, and the other end of the fourth resistor is electrically connected to the tenth terminal; One end of the fifth resistor is electrically connected to the tenth terminal, and the other end of the fifth resistor is electrically connected to the twelfth terminal; One end of the sixth resistor is electrically connected to the ninth terminal, and the other end of the sixth resistor is electrically connected to the eleventh terminal; One end of the seventh resistor is electrically connected to the eleventh terminal, and the other end of the seventh resistor is electrically connected to the thirteenth terminal.

10. The extraction circuit according to claim 8, wherein The second differential amplification module includes a second differential operational amplifier and a second amplification gain unit; The second differential operational amplifier includes a third non-inverting input terminal, a third inverting input terminal, and a third output terminal; The second amplification gain unit includes a fourteenth terminal, a fifteenth terminal, a sixteenth terminal, a seventeenth terminal, an eighteenth terminal, and a nineteenth terminal; The second output terminal is electrically connected to the fourteenth terminal; One end of the second reference photoelectric receiving module is electrically connected to the fifteenth terminal; The sixteenth terminal is electrically connected to the third non-inverting input terminal; The seventeenth terminal is electrically connected to the third inverting input terminal; The eighteenth terminal is grounded; The nineteenth terminal is electrically connected to the third output terminal.

11. The extraction circuit according to claim 10, wherein The second amplification gain unit further includes an eighth resistor, a ninth resistor, a tenth resistor, and an eleventh resistor; One end of the eighth resistor is electrically connected to the fourteenth terminal, and the other end of the eighth resistor is electrically connected to the sixteenth terminal; One end of the ninth resistor is electrically connected to the sixteenth terminal, and the other end of the ninth resistor is electrically connected to the eighteenth terminal; One end of the tenth resistor is electrically connected to the fifteenth terminal, and the other end of the tenth resistor is electrically connected to the seventeenth terminal; One end of the eleventh resistor is electrically connected to the seventeenth terminal, and the other end of the eleventh resistor is electrically connected to the nineteenth terminal.

12. A photodetector, characterized in that, Comprising the avalanche pulse signal extraction circuit according to any one of claims 1-11; The photodetector further comprises a first receiving plate and a second receiving plate; The first avalanche diode is disposed on the first receiving plate, and the second avalanche diode and the third avalanche diode are disposed on the second receiving plate; wherein, the first receiving plate and the second receiving plate are not in the same plane.

13. The photodetector according to claim 12, characterized in that, Further comprising a first condenser lens; The first condenser lens and the first receiving plate are sequentially located in the propagation direction of the radar signal; The first condenser lens is configured to focus the radar signal and incident on the first avalanche diode on the first receiving plate; And / or Further comprising a second condenser lens; The second condenser lens and the second receiving plate are sequentially located in the propagation direction of the ambient light signal; The second condenser lens is configured to focus the ambient light signal and incident on the second avalanche diode and the third avalanche diode on the second receiving plate.

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