Data processing method, storage medium, electronic device and program product

Abstract

The invention discloses a data processing method, a storage medium, electronic equipment and a program product, and relates to the technical field of data storage.The data processing method comprises the steps that firstly, temperature information of a flash memory storage unit, the number of erasing times corresponding to all blocks in the flash memory storage unit and historical access information of all pages corresponding to all the blocks are obtained; analyzing charge leakage risk information corresponding to each block according to the temperature information and the erasing times; analyzing access popularity information corresponding to each page according to the historical access information; on the basis of the charge leakage risk information and the access popularity information, a refreshing list is generated, and target blocks and target pages corresponding to the target blocks are stored in the refreshing list; and finally, executing a refreshing function according to the refreshing list so as to read the data of the target page into a page register of the flash memory storage unit. Compared with the prior art, the method has the advantages that the pertinence and the execution efficiency of the refreshing operation are improved, and the problem of resource waste caused by refreshing in a fixed period and a fixed position is avoided.

Description

Technical Field

[0001] The present disclosure relates to the field of data storage technologies, and in particular, to a data processing method, a storage medium, an electronic device, and a program product. Background Art

[0002] NAND flash memory is a commonly used storage technology that uses a special type of transistor, a floating-gate transistor, to store data. These transistors have an insulating layer that locks in the charge representing the data. Over time, this insulating layer may allow some charge to "leak", especially in high-temperature environments. Data that has not been read for a long time may have an increased first read bit error rate (First Read BER) due to threshold voltage drift.

[0003] To solve the above problems, in the current related technologies, a refresh function is used to periodically traverse all blocks, read the corresponding page data to the page register at a fixed read position, thereby refreshing the charge state.

[0004] However, for the page data read into the page register corresponding to a fixed read position, it is very likely that the data is not required by the host, wasting resources and increasing the time and bandwidth occupied during the execution of the refresh function. Summary of the Invention

[0005] The present disclosure provides a data processing method, a storage medium, an electronic device, and a program product. Its main purpose is to solve the problem in the related technologies that the page data read into the page register corresponding to a fixed read position may cause resource waste and increase the time and bandwidth occupied during the execution of the refresh function.

[0006] In a first aspect, the present application provides a data processing method, including: Obtaining temperature information of a flash memory storage unit, the number of erase / write cycles corresponding to each block in the flash memory storage unit, and historical access information of each page corresponding to each block; Analyzing charge leakage risk information corresponding to each block according to the temperature information and the number of erase / write cycles; Analyzing access heat information corresponding to each page according to the historical access information; Generating a refresh list based on the charge leakage risk information and the access heat information, where the refresh list stores a target block and a target page corresponding to the target block; Performing a refresh function according to the refresh list to read the data of the target page into the page register of the flash memory storage unit.

[0007] In a second aspect, the present application provides a data processing device, including: An acquisition module, configured to acquire temperature information of a flash storage unit, the number of erase / write times corresponding to each block in the flash storage unit, and historical access information of each page corresponding to each block; A first analysis module, configured to analyze charge leakage risk information corresponding to each block according to the temperature information and the number of erase / write times; A second analysis module, configured to analyze access heat information corresponding to each page according to the historical access information; A generation module, configured to generate a refresh list based on the charge leakage risk information and the access heat information, where the refresh list stores target blocks and target pages corresponding to the target blocks; An execution module, configured to execute a refresh function according to the refresh list to read data of the target page into a page register of the flash storage unit.

[0008] In a third aspect, the present application provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the method of the first aspect is implemented.

[0009] In a fourth aspect, the present application provides an electronic device, including a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, and when the processor executes the computer program, the method of the first aspect is implemented.

[0010] In a fifth aspect, the present application provides a computer program product, on which a computer program is stored, and when the computer program is executed by a processor, the method of the first aspect is implemented.

[0011] The data processing method, storage medium, electronic device, and program product provided by the present disclosure, wherein the method includes: first, obtaining the temperature information of the flash memory storage unit, the number of erasure and write cycles corresponding to each block in the flash memory storage unit, and the historical access information of each page corresponding to each block; then, analyzing the charge leakage risk information corresponding to each block according to the temperature information and the number of erasure and write cycles; then, analyzing the access heat information corresponding to each page according to the historical access information; generating a refresh list based on the charge leakage risk information and the access heat information, wherein the refresh list stores the target block and the target page corresponding to the target block; and finally, performing a refresh function according to the refresh list to read the data of the target page into the page register of the flash memory storage unit. Compared with the current existing technologies, the present application dynamically generates a refresh list and performs on-demand refreshing by comprehensively considering multi-dimensional information such as temperature, the number of erasure and write cycles, and page access heat, improving the pertinence and execution efficiency of the refresh operation, avoiding the resource waste problem caused by fixed-cycle and fixed-position refreshing, and at the same time, combining the bus state to move the high-priority page data to the page register of the flash memory storage unit after refreshing, further realizing prefetch optimization, reducing the latency and bandwidth occupation during actual reading by the host, thereby significantly improving the overall performance and energy efficiency of the storage system while ensuring data reliability.

[0012] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present application, nor is it used to limit the scope of the present application. Other features of the present application will become easily understandable through the following description. Brief Description of the Drawings

[0013] To more clearly illustrate the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0014] Figure 1 Shows a schematic flowchart of a data processing method provided by an embodiment of the present application; Figure 2 Shows a schematic flowchart of another data processing method provided by an embodiment of the present application; Figure 3 Shows a schematic diagram of an example provided by an embodiment of the present application; Figure 4 Shows a schematic structural diagram of a data processing device provided by an embodiment of the present application. Detailed Embodiments

[0015] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.

[0016] It should be noted that in the description of the present application, the terms "including", "comprising" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or further includes elements inherent to such process, method, article or device. The terms "first", "second", etc. in the present application are used to distinguish similar objects, rather than to describe a specific order or sequence.

[0017] In a NAND flash memory storage unit, the insulating layer of the floating gate transistor will have a charge leakage problem over time, resulting in an increase in the first read error rate due to the threshold voltage drift of data that has not been read for a long time. In a high-temperature environment (>55°C), the charge leakage speed accelerates, and the data retention time may be shortened to less than 30% of the original value.

[0018] Related technologies usually adopt the refresh function to traverse all Blocks regularly, and refresh the charge state by reading the data of the specified page into the page register. However, this method has limitations: after refresh, the data is only stored in the page register and not cached to the external memory. Subsequent accesses by the host still require data transfer, resulting in waste of time and bandwidth. Moreover, the fixed read position makes the probability of the host hitting this page extremely low, further reducing the efficiency of the refresh operation. Under different Program / Erase Cycle (PE) cycle counts and temperature conditions, refresh still adopts the same static strategy, lacking flexibility.

[0019] To improve the technical problem that the currently related technologies may cause resource waste by reading the page data corresponding to the fixed read position into the page register in the page register, increasing the time and bandwidth occupied during the execution of the refresh function.

[0020] This embodiment provides a data processing method, as Figure 1 shown, the method includes the following steps: Step 101, obtain the temperature information of the flash memory storage unit, the number of erase / write times corresponding to each block in the flash memory storage unit, and the historical access information of each page corresponding to each block.

[0021] In some examples, temperature information can be directly read through temperature sensors integrated on the NAND Flash chip or its controller. These sensors monitor the operating temperature of the storage device in real time and feed the data back to the monitoring module of the system.

[0022] In some examples, the number of erase / program cycles, as an important indicator to measure the wear degree of each block, is automatically tracked and recorded in the metadata by the firmware. Whenever a programming (write) or erase operation is performed, the corresponding counter is incremented to ensure that the aging status of each block can be accurately evaluated.

[0023] In some examples, historical access information is collected through the access log in the file system or the Flash Translation Layer (FTL). This log records details such as the access frequency and the most recent access time of each page.

[0024] Step 102: Analyze the charge leakage risk information corresponding to each block according to the temperature information and the number of erase / program cycles.

[0025] Exemplarily, a risk assessment model can be set to quantitatively score each block, identify high-risk blocks, and optimize the refresh strategy accordingly to ensure timely data maintenance and improve data integrity and the reliability of the storage system.

[0026] Step 103: Analyze the access popularity information corresponding to each page according to the historical access information.

[0027] In some examples, by analyzing the historical access information, the access frequency, access time interval, and access pattern of each page can be statistically analyzed to obtain the corresponding access popularity information. Access popularity is an important indicator to measure how frequently a page of data is accessed by the host, and it is usually weighted and calculated in combination with a time decay factor to reflect the importance of recent access behavior.

[0028] Step 104: Generate a refresh list based on the charge leakage risk information and the access popularity information.

[0029] Exemplarily, based on the charge leakage risk information and the access popularity information, target blocks with higher risks can be filtered out, and the target pages that need to be refreshed preferentially can be further determined from each target block. For example, for blocks with a higher charge leakage risk, the access popularity of the internal pages is further analyzed, and pages with a high access frequency or high priority are selected as the refresh targets, and then a refresh list is generated. The refresh list stores the target blocks and the target pages corresponding to the target blocks.

[0030] Step 105: Execute the refresh function according to the refresh list to read the data of the target pages into the page registers of the flash memory storage unit.

[0031] Exemplarily, according to the generated refresh list, the refresh operation can be sequentially performed on the specified target blocks and target pages in the list. By triggering the read process of the NAND Flash, the data of the target page is read from the storage unit into the page register, thereby restoring the data instability state that may be caused by charge leakage, effectively improving the integrity and reliability of the data, and at the same time preparing for subsequent possible prefetch or caching operations.

[0032] Compared with the current existing technologies, in this embodiment, by comprehensively considering multi-dimensional information such as temperature, number of erase / write cycles, and page access heat, a refresh list is dynamically generated and on-demand refresh is performed, which improves the pertinence and execution efficiency of the refresh operation, avoids the resource waste problem caused by fixed-cycle and fixed-position refreshing, and at the same time combines the bus state after refreshing to move the high-priority page data to the page register of the flash memory storage unit, further realizing prefetch optimization, reducing the latency and bandwidth occupation during actual host reading, and thus significantly improving the overall performance and energy efficiency of the storage system while ensuring data reliability.

[0033] To further illustrate the specific implementation process of the method in this embodiment, this embodiment provides a specific method as shown in Figure 2 and includes: Step 201, obtain the temperature information of the flash memory storage unit, the number of erase / write cycles corresponding to each block in the flash memory storage unit, and the historical access information of each page corresponding to each block.

[0034] Exemplarily, as shown in Figure 3 , the data processing system in this embodiment includes a refresh prefetch module, a data path optimization module, and a refresh frequency modulation module. Among them, the refresh prefetch module integrates the refresh operation and the prefetch prediction function. By comprehensively analyzing the temperature information of the flash memory storage unit (NAND Flash), the number of erase / write cycles corresponding to each block in the flash memory storage unit (such as the number of PE cycles), and the historical access information (such as historical input / output (Input / Output, IO) statistical data, etc.), a specific algorithm is used to dynamically generate the target pages that need to be refreshed, thereby effectively coping with the data retention problem and optimizing the First Read BER. This module can also make an intelligent decision based on the current occupancy rate of the system bus (bus) whether to give priority to the refresh operation or the prefetch operation: in the prefetch priority mode, it is allowed to directly move the data to the DDR memory after the refresh is executed, improving the data hit rate and reading efficiency during subsequent host access; while in the refresh priority mode, only the refresh operation is executed without data transfer, so as to save bandwidth and reduce the occupation of bus resources.

[0035] Step 202: Analyze the charge leakage risk information corresponding to each block according to the temperature information and the number of erase / write cycles.

[0036] For example, the higher the temperature, the faster the charge leakage speed of each block; the more the number of erase / write cycles, the more serious the aging of the insulating layer of the storage unit, the decline of the data retention ability, and the greater the charge leakage risk.

[0037] Exemplarily, by introducing a charge leakage risk scoring model, factors such as temperature, the number of erase / write cycles, and data retention time are calculated according to weights to quantify the risk level of each block. Furthermore, high-risk blocks are identified, and the refresh strategy is dynamically adjusted accordingly, and the refresh operation is preferentially performed on high-risk blocks, thereby effectively reducing the first read error rate and improving the data reliability and the overall stability of the storage system.

[0038] Optionally, step 202 may specifically include: obtaining a list of the durations of the first read error rate under different conditions; based on the duration list, and in combination with the temperature information and the number of erase / write cycles, calculating the charge leakage risk score corresponding to each block.

[0039] In some examples, the calculation formula of the charge leakage risk score (Retention Risk Score, RRS) is as follows: (Formula 1) Wherein, is the data retention time when the block appears the first read ber, P / E(b) is the number of erase / write cycles of the block, is the current temperature (unit: °C), is the critical temperature of 85 °C, and λ is a weight coefficient that can be adjusted through firmware configuration. For example, λ1 = 0.5, λ2 = 0.3, λ3 = 0.2.

[0040] Step 203: Analyze the access popularity information corresponding to each page according to the historical access information.

[0041] In some examples, by analyzing the historical access information, the access frequency, access time interval, and access pattern of each page can be statistically analyzed, so as to obtain the corresponding access popularity information. By analyzing the access popularity information, high-popularity pages (i.e., frequently accessed pages) and low-popularity pages can be identified, providing a basis for subsequent prefetching, caching, and refresh decisions.

[0042] Optionally, step 203 may specifically include: obtaining the historical access times and the timestamps of the last access of each page, as well as the historical access relevance of each page, according to the historical access information; obtaining the maximum access times among the historical access times of each page; calculating the access heat value corresponding to each page based on the historical access times and the timestamps of the last access of each page, the maximum access times, and in combination with the historical access relevance.

[0043] In some examples, the calculation formula of the access heat value (Hot Value, HV) is as follows: (Formula Two) Wherein, F(p) is the historical access times of page p, statistically counted according to a time window (such as the most recent 24 hours), Fmax is the maximum access times among all pages (normalization factor), tlast(p) is the timestamp of the last access of this page (temporal locality), S(p) is the spatial relevance score. If the current IO request is a continuous LBA access, then the S(p) of adjacent pages (±10 pages) = 1, otherwise it is 0. For example, α = 0.6, β = 0.3, γ = 0.1, weight coefficients, and their sum is 1.

[0044] : A smoothing coefficient to prevent division by zero.

[0045] Step 204: Screen out target blocks from each block according to the charge leakage risk score corresponding to each block.

[0046] For example, according to the charge leakage risk scores of each block, target blocks and target pages that need to be refreshed can be screened out from the NAND Flash to optimize data retention and reduce the first read error rate.

[0047] Step 205: Determine the target pages corresponding to the target block according to the access heat value corresponding to each page and the target block.

[0048] Exemplarily, the dynamic target page algorithm can be used to comprehensively evaluate through charge leakage risk information and access heat, and accordingly select the target pages. The calculation formula of the comprehensive priority is as follows: (Formula Three) Wherein, ω(p) is the page weight coefficient. The reading durations of different pages in the TLC particles are different, and specific values can be taken according to the reading durations of different pages in actual applications.

[0049] Exemplarily, in the dynamic target page algorithm, in order to balance the relationship between access heat and charge leakage risk, the HV(p) can be processed by taking the logarithm to prevent the charge leakage risk from being masked when the HV value is too large.

[0050] For example, in practical applications, a priority threshold can be set (adjustable according to system requirements, usually in the range of 0.05 to 0.83). First, calculate the priority value Prior(p) for each page. If the calculated Prior(p) exceeds this adjustable priority threshold, the page is considered to have a high refresh or prefetch priority and is thus selected for subsequent refresh operations or data transfer to the DDR memory. This ensures that both high-access-heat pages can be attended to and the potential data loss risk due to charge leakage can be effectively managed, optimizing the overall performance and reliability of the system.

[0051] Optionally, step 205 may specifically include: performing the following discrimination for the page with the most historical read times in each block respectively: if the access heat value corresponding to the page is greater than the preset heat threshold and the block where the page is located belongs to the target block, then regard the page as the target page of its target block; if the access heat value corresponding to the page is greater than the preset heat threshold and the block where the page is located does not belong to the target block, then calculate the comprehensive priority of the page, and the comprehensive priority is calculated based on the charge leakage risk score of the block where the page is located and the access heat value of the page; in the case where the comprehensive priority is greater than the preset priority threshold, regard the block where the page is located as the target block and regard the page as the target page of its target block; if the access heat value corresponding to the page is less than the preset heat threshold and the block where the page is located belongs to the target block, then obtain the page that meets the preset access heat requirement from multiple pages in the block where the page is located as the target page of its target block.

[0052] Exemplarily, through the collaborative work of multiple modules, the first read bit error rate (First Read BER) can be effectively reduced and the system performance can be improved. First, the refresh frequency modulation module dynamically calculates the optimal refresh period according to parameters such as the current temperature of the NAND Flash, the number of P / E cycles, and the data retention time through a formula and updates the timer; when the timer reaches zero, it triggers a refresh operation to achieve adaptive refresh control based on the actual operating conditions. The refresh prefetch module runs periodically, evaluates the data retention risk of each Block using the RRS algorithm, and if the RRS value of a certain Block exceeds the set threshold, it is marked as needing refresh and added to the refresh list. Subsequently, obtain the Page with the highest access frequency in each Block from the FTL and calculate its HV to determine its priority.

[0053] For example, if the HV of the Page with the most historical read times in the data block is higher than the preset heat threshold (HVThreshold) and the Block where it is located has been marked as needing refresh, then add the Page number to the refresh list.

[0054] For example, if the HV of the Page with the most historical read times in a data block is still higher than the threshold, but the Block where it is located is not included in the refresh list, then further calculate the Prior value. If Prior is greater than the Prior Threshold, add the Block to the refresh list and synchronously record the Page; otherwise, ignore it.

[0055] For example, if the HV of the Page with the most historical read times in a data block is lower than the threshold and the Block where it is located is not in the refresh list, then directly ignore it.

[0056] For example, if the HV of the Page with the most historical read times in a data block is lower than the threshold but the Block needs to be refreshed, then continue to find the Page with the second most read times in the Block, and so on. At most, check the top five high-frequency Pages. If a qualifying Page is still not found, select the one with the largest HV as the representative.

[0057] In some embodiments, the theoretical value range of RRS is 0 - 1.2, the theoretical value range of HV is 0 - 1, and the theoretical threshold of Prior is 0 - 0.83. Taking Yangtze Memory x3 - 9070 as an example, the read durations of three pages (lower, middle, upper page) are 35, 43, and 35 us respectively. The durations for first read ber at different P / E and temperatures are shown in Table 1: Table 1

[0058] Exemplarily, if page p1 is the middle page. P / E = 3000, temperature 70°C, F(p1) = 300, tlast(p1) = 2 hours ago, S(p1) = 1, then according to the data in the above table, the selection in Formula 1 can be made according to the following formula: (Formula Four) In this embodiment, since P / E < 5000, so = 1. Substitute this parameter into Formula 1, and we can get ; substitute it into Formula 2, and we can get ; further, in the calculation process of Prior, according to the read durations of the above three pages, it can be seen that the middle has a 22.8% higher delay than the other pages {(43 - 35) / 35}. Therefore, the ω(p) of lower, middle, and upper are respectively taken as 1, 1.2, 1. Substitute the above values into Formula 3 and calculate as follows: .

[0059] Exemplarily, if RRS threshold = 0.4, HV threshold = 0.3, and Prior threshold = 0.5, then the block where the exemplary page p1 is located needs to be refreshed, and this page needs to be pre-read and then moved to the DDR.

[0060] Step 206: Generate a refresh list based on the target block and the target page corresponding to the target block.

[0061] Exemplarily, after completing the charge leakage risk assessment for each block and the page-level access heat analysis, the target blocks with higher risks are screened out, and the target pages that need to be refreshed first are further determined from each target block. Based on these target blocks and their corresponding target page information, the system generates a refresh list, which contains the block numbers that need to perform the refresh operation and the corresponding page numbers. This list can be used as the basis for the subsequent refresh operation to guide the storage controller to trigger the read and charge recovery processes of the NAND Flash as needed, ensuring that high-risk data is processed in a timely manner, thereby reducing the FirstRead BER and improving data reliability.

[0062] Step 207: Execute the refresh function according to the refresh list to read the data of the target page into the page register of the flash memory storage unit.

[0063] Exemplarily, the data path optimization module can, according to the decision of the refresh pre-read module, after the refresh operation is completed, directly move the qualified data from the page register to the Double Data Rate (DDR) synchronous dynamic random access memory, and establish the mapping relationship between this data and the Logical Block Address (LBA) in the FTL. When the host initiates a read request, the system can directly respond quickly from the DDR and return the data, significantly improving the read performance and thus reducing the access latency.

[0064] Optionally, the method of this embodiment may specifically further include: determining whether the bus is idle; if the bus is idle, then move the data of the target page in the page register to the memory and add a pre-read mark, where the pre-read mark is used to indicate that the host reads the data of the target page from the memory.

[0065] In some examples, when the host initiates a read request, the FTL will first query whether the LBA is marked as "pre-read cache" and the data is still valid in the DDR. If so, it directly returns the data from the DDR; if the data is still in the page register and not expired, it reads from the page register; if neither hits, it triggers the NAND Flash array to perform a normal read and updates the relevant data status information.

[0066] Optionally, the method of this embodiment may specifically further include: obtaining the data retention time of the flash memory storage unit; calculating a retention time coefficient based on the data retention time, and calculating a temperature change coefficient based on the temperature information; dynamically determining the execution period of the refresh function based on the retention time coefficient and the temperature change coefficient, and in combination with a preset reference period corresponding to the refresh function.

[0067] Exemplarily, the refresh frequency modulation module can dynamically adjust the frequency of the refresh operation according to the real-time working state of the NAND Flash. By collecting the current temperature of the NAND and combining it with the data retention time of the flash memory storage unit, a reasonable refresh period is calculated using the dynamic refresh algorithm. The calculation formula of the dynamic refresh algorithm is as follows: (Formula Five) Where, Tbase is the reference period (such as 20 minutes), and specifically, the typical refresh frequency of enterprise-level SSDs (15 - 30 minutes) can be referred to to balance reliability and performance overhead; is the temperature change coefficient, and specifically, the typical working environment temperature (25 degrees) of NAND Flash in the JEDEC standard (JESD218B) can be referred to; is the retention time coefficient, and specifically, the definition of cold data in the JEDEC standard (JESD219) can be referred to (retention time > 30 days is high-risk data), and the probability of charge leakage increases significantly after exceeding this threshold; the weight coefficients k1 = 0.6, k2 = 0.4. Since the influence of high temperature on charge leakage is greater, the temperature weight is higher than the time weight.

[0068] In some embodiments, in the high-temperature long-retention scenario, Tcurrent = 70, Retentionavg = 60, substituting into Formula Five, .

[0069] In some embodiments, in the short-retention scenario at the working temperature, Tcurrent = 50, Retentionavg = 5, substituting into Formula Five, .

[0070] In some examples, by comprehensively calculating the two coefficients of the temperature change coefficient based on the data retention time and the temperature information, and combining the preset reference refresh period, the execution period of the next refresh operation is dynamically determined, realizing the adaptive management of the charge leakage risk of the storage unit, ensuring good data integrity under different temperatures and usage conditions, and improving system reliability and energy efficiency.

[0071] Exemplarily, when the dynamically calculated refresh operation period (T-refresh) arrives, the system performs the actual read operation of the NAND Flash according to the Block and Page information in the refresh list to complete the charge refresh. At the same time, the timestamp of this refresh is recorded, and the next refresh operation period is reset. For the Page with a Prior value higher than the PriorThreshold in the refresh list, after the refresh is completed, if the bus is in an idle state, its data is immediately moved from the page register to the DDR memory and marked as "prefetch cache" in the FTL. At the same time, the mapping relationship between the DDR cache address and the LBA is recorded.

[0072] In this embodiment, in terms of bit error rate optimization, the first read bit error rate is significantly reduced, effectively improving the reliability of data reading; in terms of performance improvement, the prefetch hit rate is increased from the original 40% to 82% in the YCSB mixed workload test, significantly enhancing the data access efficiency; at the same time, the read latency is significantly reduced. For example, the read time of the middle page of the TLC type is reduced from the original 43 μs to about 2 μs (read directly from the DDR); in addition, compared with the fixed-cycle refresh mechanism, this embodiment significantly reduces the bus occupancy rate while ensuring data integrity, further optimizing the utilization efficiency of system resources.

[0073] Compared with the prior art, this embodiment realizes charge refresh and data prefetch simultaneously through a single read operation, significantly improving the system efficiency and data reliability. This mechanism is based on the charge leakage risk-heat joint model, calculates the priority of each page using RRS and HV, and adopts a weight adaptive strategy to dynamically adjust the importance of various parameters. In addition, a dynamic refresh scheduling method is introduced. According to the actual temperature and data retention time of the NAND Flash, a specific formula and feedback control logic are used to dynamically adjust the refresh period to ensure optimal maintenance of data integrity under different working conditions, not only reducing the first read bit error rate, but also increasing the prefetch hit rate, reducing the read latency and bus occupancy rate, thus greatly improving the overall performance and energy efficiency of the storage system.

[0074] The embodiment of the present application also provides a data processing device, as Figure 1 and Figure 2 shown in FIG. 4, the specific implementation of the method shown. As shown in FIG. 4, the device includes: an acquisition module 31, a first analysis module 32, a second analysis module 33, a generation module 34, and an execution module 35.

[0075] The acquisition module 31 is configured to acquire the temperature information of the flash memory storage unit, the number of erase and write times corresponding to each block in the flash memory storage unit, and the historical access information of each page corresponding to each block; The first analysis module 32 is configured to analyze the charge leakage risk information corresponding to each block according to the temperature information and the number of erase / write cycles; The second analysis module 33 is configured to analyze the access heat information corresponding to each page according to the historical access information; The generation module 34 is configured to generate a refresh list based on the charge leakage risk information and the access heat information, where the target blocks and the target pages corresponding to the target blocks are stored in the refresh list; The execution module 35 is configured to execute a refresh function according to the refresh list to read the data of the target page into the page register of the flash memory storage unit.

[0076] In some examples of this embodiment, the first analysis module 32 is specifically configured to obtain a duration list of the first read error rate under different conditions; based on the duration list, and in combination with the temperature information and the number of erase / write cycles, calculate the charge leakage risk score corresponding to each block.

[0077] In some examples of this embodiment, the second analysis module 33 is specifically configured to obtain the historical access times, the timestamp of the last access, and the historical access correlation of each page according to the historical access information; obtain the maximum access times among the historical access times of each page; based on the historical access times, the timestamp of the last access, and the maximum access times of each page, and in combination with the historical access correlation, calculate the access heat value corresponding to each page.

[0078] In some examples of this embodiment, the generation module 34 is specifically configured to screen out the target blocks from each block according to the charge leakage risk score corresponding to each block; determine the target pages corresponding to the target blocks according to the access heat value corresponding to each page and the target blocks; generate the refresh list based on the target blocks and the target pages corresponding to the target blocks.

[0079] In some examples of this embodiment, the generating module 34 is further specifically configured to perform the following discrimination for the page with the most historical read times for each block: If the access heat value corresponding to the page is greater than a preset heat threshold and the block where the page is located belongs to the target block, then the page is used as the target page of its target block; If the access heat value corresponding to the page is greater than a preset heat threshold and the block where the page is located does not belong to the target block, then calculate the comprehensive priority of the page, and the comprehensive priority is calculated based on the charge leakage risk score of the block where the page is located and the access heat value of the page; In the case where the comprehensive priority is greater than a preset priority threshold, the block where the page is located is used as the target block, and the page is used as the target page of its target block; If the access heat value corresponding to the page is less than the preset heat threshold and the block where the page is located belongs to the target block, then obtain the page that meets the preset access heat requirement from the multiple pages of the block where the page is located, as the target page of its target block.

[0080] In some examples of this embodiment, the execution module 35 is specifically configured to determine whether the bus is idle; If the bus is idle, then transfer the data of the target page in the page register to the memory and add a prefetch mark, and the prefetch mark is used to indicate that the host reads the data of the target page from the memory.

[0081] In some examples of this embodiment, the execution module 35 is further specifically configured to obtain the data retention time of the flash memory storage unit; Calculate the retention time coefficient according to the data retention time, and calculate the temperature change coefficient according to the temperature information; Based on the retention time coefficient and the temperature change coefficient, and in combination with the preset reference period corresponding to the refresh function, dynamically determine the execution period of the refresh function.

[0082] It should be noted that for other corresponding descriptions of each functional unit involved in the data processing device provided in this embodiment, reference can be made to Figure 1 and Figure 2 the corresponding descriptions therein, which will not be elaborated here.

[0083] Based on the above methods as shown in Figure 1 and Figure 2 Accordingly, this embodiment further provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, it implements the above methods as shown in Figure 1 and Figure 2 shown.

[0084] Based on the above methods as shown in Figure 1 and Figure 2 Accordingly, this embodiment further provides a computer program product, on which a computer program is stored, and when the computer program is executed by a processor, it implements the above methods as shown in Figure 1 andFigure 2 The method shown

[0085] Based on such an understanding, the technical solution of the present application can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a USB flash drive, a mobile hard disk, etc.), and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods of various implementation scenarios of the present application.

[0086] Based on the above such as Figure 1 and Figure 2 the method shown, and Figure 4 the virtual device embodiment shown, in order to achieve the above object, the embodiment of the present application also provides an electronic device, such as a personal computer, a server, and the device includes a storage medium and a processor; the storage medium is used for storing a computer program; the processor is used for executing the computer program to implement the above such as Figure 1 and Figure 2 the method shown.

[0087] In some embodiments, the above-mentioned entity device may further include a user interface, a network interface, a camera, a radio frequency (RF) circuit, sensors, an audio circuit, a WI-FI module, and so on. The user interface may include a display screen (Display), an input unit such as a keyboard (Keyboard), etc., and optionally the user interface may further include a USB interface, a card reader interface, etc. The network interface may include a standard wired interface, a wireless interface (such as a WI-FI interface), etc. in some embodiments.

[0088] Those skilled in the art can understand that the above-mentioned entity device structure provided by this embodiment does not constitute a limitation on the entity device, and may include more or fewer components, or combine certain components, or have different component arrangements.

[0089] The storage medium may further include an operating system and a network communication module. The operating system is a program for managing the hardware and software resources of the above-mentioned entity device, and supports the operation of information processing programs and other software and / or programs. The network communication module is used to implement communication between components inside the storage medium, and communication between other hardware and software in the information processing entity device.

[0090] Through the description of the above embodiments, those skilled in the art can clearly understand that the present application can be implemented by means of software plus a necessary general hardware platform, or can also be implemented by hardware. By applying the solution of this embodiment, compared with the current existing technologies, in this embodiment, by dynamically predicting the pages that the host may access, the pages with high access probability are preferentially read when performing the refresh operation, and the charge refresh and data prefetch are combined into one data reading process. If the subsequent host IO request hits the prefetch data, the data can be directly transmitted via the bus from the page register of the NAND Flash without having to read it from the Flash array to the page register again, thus significantly reducing the latency. In addition, a dynamic prediction algorithm based on the heat value and environmental parameters is used to select the refresh target pages, and the pages located in the high error rate risk blocks and having a high access probability are preferentially processed, and the strategy of immediately moving the metadata or frequently accessed pages to the DDR memory after performing the refresh is adopted, so that the host can directly access the data in the DDR when reading, further reducing the access latency. The adaptive refresh mechanism automatically adjusts the refresh period and range according to the real-time temperature, data hot and cold distribution, and bus occupancy rate, balancing the bandwidth ratio between the refresh operation and the normal IO operation, and optimizing the system performance and resource utilization efficiency.

[0091] It should be noted that in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover a non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the existence of additional identical elements in the process, method, article or device including the element.

[0092] The above are only the specific embodiments of the present application, enabling those skilled in the art to understand or implement the present application. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments herein, but will conform to the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A data processing method, characterized in that, Including: Obtaining temperature information of a flash memory storage unit, the number of erase / write cycles corresponding to each block in the flash memory storage unit, and historical access information of each page corresponding to each block; Analyzing charge leakage risk information corresponding to each block according to the temperature information and the number of erase / write cycles; Analyzing access heat information corresponding to each page according to the historical access information; Generating a refresh list based on the charge leakage risk information and the access heat information, where the refresh list stores a target block and a target page corresponding to the target block; Performing a refresh function according to the refresh list to read data of the target page into a page register of the flash memory storage unit.

2. The method according to claim 1, characterized in that, The analyzing charge leakage risk information corresponding to each block according to the temperature information and the number of erase / write cycles includes: Obtaining a list of durations when a first read error rate appears under different conditions; Calculating a charge leakage risk score corresponding to each block based on the duration list, in combination with the temperature information and the number of erase / write cycles.

3. The method according to claim 2, wherein The analyzing access heat information corresponding to each page according to the historical access information includes: Obtaining the historical access times, the timestamp of the last access, and the historical access relevance of each page according to the historical access information; Obtaining the maximum access times among the historical access times of each page; Calculating an access heat value corresponding to each page based on the historical access times and the timestamp of the last access of each page, the maximum access times, and in combination with the historical access relevance.

4. The method according to claim 3, characterized in that, The generating a refresh list based on the charge leakage risk information and the access heat information includes: Screening out the target block from each block according to the charge leakage risk score corresponding to each block; Determining the target page corresponding to the target block according to the access heat value corresponding to each page and the target block; Generating the refresh list based on the target block and the target page corresponding to the target block.

5. The method according to claim 4, characterized in that, The determining the target page corresponding to the target block according to the access heat value corresponding to each page and the target block includes: Performing the following discrimination for the page with the most historical read times in each block respectively: If the access heat value corresponding to this page is greater than a preset heat threshold and the block where this page is located belongs to the target block, then use this page as the target page of its corresponding target block; If the access heat value corresponding to this page is greater than a preset heat threshold and the block where this page is located does not belong to the target block, then calculate the comprehensive priority of this page, where the comprehensive priority is calculated based on the charge leakage risk score of the block where this page is located and the access heat value of this page; in the case where the comprehensive priority is greater than a preset priority threshold, use the block where this page is located as the target block and use this page as the target page of its corresponding target block; If the access heat value corresponding to this page is less than a preset heat threshold and the block where this page is located belongs to the target block, then obtain a page that meets the preset access heat requirement from multiple pages of the block where this page is located as the target page of its corresponding target block.

6. The method according to claim 1, wherein After reading the data of the target page into the page register of the flash memory storage unit, the method further includes: Determine whether the bus is idle; If the bus is idle, transfer the data of the target page in the page register to the memory and add a prefetch mark, where the prefetch mark is used to indicate that the host reads from the memory when reading the data of the target page.

7. The method according to claim 1, wherein The method further includes: Obtain the data retention time of the flash memory storage unit; Calculate a retention time coefficient based on the data retention time and calculate a temperature change coefficient based on the temperature information; Dynamically determine the execution period of the refresh function based on the retention time coefficient and the temperature change coefficient and in combination with a preset reference period corresponding to the refresh function.

8. A data processing device, characterized in that, Includes: An acquisition module configured to acquire the temperature information of the flash memory storage unit, the number of erase / write times corresponding to each block in the flash memory storage unit, and the historical access information of each page corresponding to each block; A first analysis module configured to analyze the charge leakage risk information corresponding to each block according to the temperature information and the number of erase / write times; A second analysis module configured to analyze the access heat information corresponding to each page according to the historical access information; A generation module configured to generate a refresh list based on the charge leakage risk information and the access heat information, where the refresh list stores a target block and a target page corresponding to the target block; An execution module configured to execute a refresh function according to the refresh list to read the data of the target page into the page register of the flash memory storage unit.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, The computer program, when executed by a processor, implements the method according to any one of claims 1 to 7.

10. An electronic device, comprising a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, characterized in that, The processor, when executing the computer program, implements the method according to any one of claims 1 to 7.

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