Compiling method and device of PLC ladder diagram, computer equipment and medium

By optimizing and splitting the PLC ladder diagram, and using the link relationship between the identification bus and instructions, the problem of high compilation complexity in the existing technology is solved, and a more efficient compilation process is achieved.

CN120353468AActive Publication Date: 2025-07-22SHENZHEN HUICHEN AUTOMATION TECH CO LTD
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Patent Information

Application Number
CN202510846501.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-24
Publication Date
2025-07-22
Estimated Expiration
2045-06-24

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Abstract

The invention provides a compiling method and device of a PLC ladder diagram, computer equipment and a medium, and the method comprises the steps: obtaining an original PLC ladder diagram, and carrying out the graph structure optimization of the original PLC ladder diagram, and obtaining a target PLC ladder diagram; based on the link relationship between the identification buses in the target PLC ladder diagram, performing graph structure splitting on the target PLC ladder diagram to obtain a local ladder diagram between the starting node bus and the intermediate node bus and a local ladder diagram between the intermediate node bus and the ending node bus; performing program compiling on the local ladder diagram between the starting node bus and the intermediate node bus based on the flow direction branch set corresponding to the starting node bus to obtain an intermediate node compiling result; and performing program compiling on the local ladder diagram between the intermediate node bus and the end node bus based on the intermediate node compiling result and the flow direction branch set corresponding to the intermediate node bus to obtain a PLC ladder diagram compiling result. Therefore, the ladder diagram compiling efficiency is effectively improved.
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Description

Technical Field

[0001] Embodiments of the present disclosure relate to the technical field of ladder diagram compilation, and specifically, to a compilation method, device, computer device, and medium applicable to a PLC ladder diagram. Background Art

[0002] The ladder diagram of a PLC (Programmable Logic Controller) needs to be compiled into machine-executable code to run on the PLC hardware. Through an automated compilation process, the time and error rate of manual programming can be reduced, thereby improving programming efficiency.

[0003] In related technologies, most ladder diagram compilation algorithms first convert the ladder diagram into a directed acyclic graph (AVO), and then convert it into a binary tree. In the overall compilation process, only the front and back link relationships of instructions are emphasized, while the importance of the busbar is ignored.

[0004] However, using the existing technology, the compilation process is complex, resulting in low compilation efficiency. Summary of the Invention

[0005] The embodiments described herein provide a compilation method, device, computer device, and medium for a PLC ladder diagram, which overcome the above problems.

[0006] In a first aspect, according to the content of the present disclosure, a compilation method for a PLC ladder diagram is provided, including: Obtain an original PLC ladder diagram, and perform graph structure optimization on the original PLC ladder diagram to obtain a target PLC ladder diagram. The original PLC ladder diagram includes a ladder diagram busbar and ladder diagram instructions. The target PLC ladder diagram includes an identification busbar, identification instructions, and an optimization structure. The identification busbar is obtained by encoding the ladder diagram busbar, the identification instructions are obtained by encoding the ladder diagram instructions, and the optimization structure is used to describe the connection line segment between the identification busbar and the identification instructions; Based on the link relationship between the identification busbars in the target PLC ladder diagram, perform graph structure splitting on the target PLC ladder diagram to obtain a local ladder diagram between the starting node busbar and the intermediate node busbar, and a local ladder diagram between the intermediate node busbar and the ending node busbar. The starting node busbar is directly linked to the intermediate node busbar; Based on the flow branch set corresponding to the starting node busbar, perform program compilation on the local ladder diagram between the starting node busbar and the intermediate node busbar to obtain an intermediate node compilation result; Based on the compilation result of the intermediate node and the flow branch set corresponding to the bus of the intermediate node, program compilation is performed on the local ladder diagram between the bus of the intermediate node and the bus of the end node to obtain the PLC ladder diagram compilation result.

[0007] In a second aspect, according to the content of the present disclosure, a device for compiling a PLC ladder diagram is provided, including: An acquisition and optimization module, configured to acquire an original PLC ladder diagram and perform graph structure optimization on the original PLC ladder diagram to obtain a target PLC ladder diagram. The original PLC ladder diagram includes ladder diagram buses and ladder diagram instructions. The target PLC ladder diagram includes identification buses, identification instructions, and an optimization structure. The identification buses are obtained by encoding the ladder diagram buses, the identification instructions are obtained by encoding the ladder diagram instructions, and the optimization structure is used to describe the connection line segments between the identification buses and the identification instructions; A splitting module, configured to perform graph structure splitting on the target PLC ladder diagram based on the link relationship between the identification buses in the target PLC ladder diagram to obtain a local ladder diagram between the start node bus and the intermediate node bus and a local ladder diagram between the intermediate node bus and the end node bus. The start node bus is directly linked to the intermediate node bus; A first compilation module, configured to perform program compilation on the local ladder diagram between the start node bus and the intermediate node bus based on the flow branch set corresponding to the start node bus to obtain an intermediate node compilation result; A second compilation module, configured to perform program compilation on the local ladder diagram between the intermediate node bus and the end node bus based on the intermediate node compilation result and the flow branch set corresponding to the intermediate node bus to obtain the PLC ladder diagram compilation result.

[0008] In a third aspect, a computer device is provided, including a memory and a processor. A computer program is stored in the memory, and when the processor executes the computer program, the steps of the method for compiling a PLC ladder diagram in any one of the above embodiments are implemented.

[0009] In a fourth aspect, a computer-readable storage medium is provided. A computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps of the method for compiling a PLC ladder diagram in any one of the above embodiments are implemented.

[0010] The PLC ladder diagram compilation method provided by the embodiments of the present application obtains the original PLC ladder diagram, and optimizes the graph structure of the original PLC ladder diagram to obtain the target PLC ladder diagram. The original PLC ladder diagram includes: ladder diagram busbars and ladder diagram instructions. The target PLC ladder diagram includes: identification busbars, identification instructions, and an optimized structure. The identification busbars are obtained by encoding the ladder diagram busbars, and the identification instructions are obtained by encoding the ladder diagram instructions. The optimized structure is used to describe the connection line segments between the identification busbars and the identification instructions. Based on the link relationship between the identification busbars in the target PLC ladder diagram, the graph structure of the target PLC ladder diagram is split to obtain the local ladder diagram between the starting node busbar and the intermediate node busbar, and the local ladder diagram between the intermediate node busbar and the ending node busbar. The starting node busbar is directly linked to the intermediate node busbar. Based on the flow branch set corresponding to the starting node busbar, the local ladder diagram between the starting node busbar and the intermediate node busbar is compiled to obtain the intermediate node compilation result. Based on the intermediate node compilation result and the flow branch set corresponding to the intermediate node busbar, the local ladder diagram between the intermediate node busbar and the ending node busbar is compiled to obtain the PLC ladder diagram compilation result. In this way, by optimizing the structure of the original PLC ladder diagram to obtain the target PLC ladder diagram, it is convenient to directly compile on the target PLC ladder diagram without performing other structure diagram conversions on the PLC ladder diagram, effectively reducing the compilation complexity of the PLC ladder diagram and improving the ladder diagram compilation efficiency.

[0011] The above description is only an overview of the technical solutions of the embodiments of the present application. In order to be able to understand the technical means of the embodiments of the present application more clearly, it can be implemented according to the content of the specification. And in order to make the above and other purposes, features, and advantages of the embodiments of the present application more obvious and understandable, the following specifically lists the specific embodiments of the present application. Brief Description of the Drawings

[0012] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly described below. It should be understood that the following described drawings only relate to some embodiments of the present disclosure and do not limit the present disclosure, where: Figure 1 is a schematic flow chart of a PLC ladder diagram compilation method provided by the present disclosure.

[0013] Figure 2 is a schematic structural diagram of an original PLC ladder diagram provided by the present disclosure.

[0014] Figure 3 is a schematic structural diagram of a target PLC ladder diagram provided by the present disclosure.

[0015] Figure 4 is a schematic structural diagram of a PLC ladder diagram compilation device provided by the present disclosure.

[0016] Figure 5 It is a schematic structural diagram of a computer device provided by the present disclosure.

[0017] It should be noted that the elements in the drawings are schematic and not drawn to scale. Detailed implementation manners

[0018] In order to make the objectives, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings. Apparently, the described embodiments are some but not all of the embodiments of the present disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of the present disclosure without creative efforts also fall within the scope of protection of the present disclosure.

[0019] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which the subject matter of the present disclosure belongs. Further, it will be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the specification and the relevant art, and will not be interpreted in an idealized or overly formal form unless explicitly defined otherwise herein. As used herein, a statement that two or more parts are "connected" or "coupled" together shall mean that these parts are directly joined together or joined through one or more intermediate components.

[0020] Reference to "embodiment" herein means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the present application. The phrase "embodiment" appearing in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0021] The term " / and / " herein is merely a description of the association relationship of associated objects, indicating that three relationships can exist. For example, A and / or B can represent: the existence of A, the simultaneous existence of A and B, and the existence of B. In addition, the character " / " herein generally represents an "or" relationship between the associated objects before and after. Terms such as "first" and "second" are only used to distinguish one component (or a part of the component) from another component (or another part of the component).

[0022] In the description of the present application, unless otherwise specified, the meaning of "a plurality" refers to two or more (including two). Similarly, "a plurality of groups" refers to two or more groups (including two groups).

[0023] To enable those skilled in the art to better understand the solution of this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.

[0024] Figure 1 It is a schematic flowchart of a method for compiling a PLC ladder diagram provided by an embodiment of the present disclosure. As Figure 1 shown, the specific process of the method for compiling a PLC ladder diagram includes: S110. Obtain the original PLC ladder diagram and optimize the graph structure of the original PLC ladder diagram to obtain the target PLC ladder diagram.

[0025] Among them, the original PLC ladder diagram includes: ladder diagram busbars and ladder diagram instructions. As Figure 2 shown, the ladder diagram busbars are represented by long vertical lines in area 210, and the ladder diagram instructions can be represented by two short vertical lines in area 220.

[0026] The target PLC ladder diagram includes: identification busbars, identification instructions, and an optimization structure. The identification busbars are obtained by encoding the ladder diagram busbars, the identification instructions are obtained by encoding the ladder diagram instructions, and the optimization structure is used to describe the connection line segments between the identification busbars and the identification instructions. As Figure 3 shown, the identification busbars are represented by long vertical lines with numbers in area 310; the identification instructions can be represented by two short vertical lines with numbers in area 320 to distinguish different ladder diagram instructions; the optimization structure is represented by thickened line segments to supplement the missing connection line segments in the original PLC ladder diagram. Figure 3 Among them, the busbar can be regarded as a special instruction. The instructions and the busbars are associated through branches. There is a front-to-back link relationship between the instructions, and there is a branch merging relationship between the busbars.

[0027] In this embodiment, through the object-oriented programming method, the following instruction base class described by C# pseudo-code is abstracted. Each instruction is numbered and identified by a unique integer value, that is, ID (Identity Document, unique code), and at the same time, the IDs of the previous and next instructions are stored, so that the front-to-back link relationship of adjacent instructions can be known.

[0028] There are multiple input branches and output branches for the busbar, which can be responsible for branch and merge management. The input branches can be used to describe the input merging relationship, and the output branches can be used to describe the output branch relationship. The pseudo-code definition of the busbar is as follows.

[0029] --------------------------------------------------------------------- class Bus: InsBase { / / Branch class Branch { int InsID; / / The first instruction linked by the branch List <int>buslist; / / Bus list } List <branch>input; / / Input branch List <branch>output; / / Output branch } --------------------------------------------------------------------- The entire ladder diagram consists of bus bars and instructions. Since the bus bar is a special instruction, the pseudo-code description of the ladder diagram is as follows.

[0030] --------------------------------------------------------------------- class Graph{ Map<int,InsBase>InsMap; / / Mapping from ID to instruction instance } --------------------------------------------------------------------- In this embodiment, the defined ID numbering rule in the example is taken as an illustration. Specifically, the ID number of the starting bus bar of the target PLC ladder diagram is always 1; the ID number of the ending bus bar is always -1; the numbers of other instruction instances are not 0. By loading it into memory, its code structure uses the structure described above to complete the number complement and line segment complement of the original PLC ladder diagram to obtain the target PLC ladder diagram.

[0031] A complete ladder diagram link logic can complete the code data description through the above structure. Through the ID number and the mapping table, the specific instruction instance can be found, and the front and back link relationships of the instructions can also be described by the ID number.

[0032] S120. Based on the link relationship between the identification bus bars in the target PLC ladder diagram, the target PLC ladder diagram is split into a local ladder diagram between the starting node bus bar and the intermediate node bus bar and a local ladder diagram between the intermediate node bus bar and the ending node bus bar.

[0033] Among them, the graph structure splitting in this embodiment is implemented by the binary splitting idea, that is, several small ranges that meet the requirements are sequentially split from the large range until it cannot be split.

[0034] The starting node bus bar is directly linked to the intermediate node bus bar. It can be understood that the direct link means that there is no other identification bus bar between the starting node bus bar and the intermediate node bus bar. The starting node bus bar is like Figure 3 the identification bus bar 1 in Figure 3 The identification busbar 4 therein.

[0035] Based on the link relationship between the identification busbars in the target PLC ladder diagram, the target PLC ladder diagram is split into a graph structure to obtain a partial ladder diagram between the starting node busbar and the intermediate node busbar and a partial ladder diagram between the intermediate node busbar and the ending node busbar, which may include: using the first identification busbar in the target PLC ladder diagram as the starting node busbar, the last identification busbar as the ending node busbar, and using the identification busbar (i.e., the intermediate node busbar) that has a direct link relationship with the starting node busbar as the graph structure splitting line to obtain a partial ladder diagram between the starting node busbar and the intermediate node busbar and a partial ladder diagram between the intermediate node busbar and the ending node busbar.

[0036] For example, for Figure 3 the target PLC ladder diagram shown in, using identification busbar 1 as the starting node busbar, the last identification busbar -1 as the ending node busbar, and using identification busbar 4 that has a direct link relationship with the starting node busbar 1 as the graph structure splitting line to obtain a partial ladder diagram between identification busbar 1 and identification busbar 4 and a partial ladder diagram between identification busbar 4 and identification busbar -1.

[0037] In some embodiments, before program compilation of the partial ladder diagram between the starting node busbar and the intermediate node busbar based on the flow branch set corresponding to the starting node busbar, it further includes: Obtaining a busbar list corresponding to the starting node busbar for different branch flows, where the busbar list corresponding to the starting node busbar for different branch flows includes: other identification busbars that have a flow relationship with the starting node busbar; performing branch type identification on the busbar list corresponding to the starting node busbar for different branch flows to obtain the flow branch set corresponding to the starting node busbar.

[0038] Combining the above example, identification busbar 1 (i.e., the starting node busbar) includes three branches, namely: branch 1-1, branch 1-2, and branch 1-3. The busbar list corresponding to branch 1-1 flow of identification busbar 1 is <4, 13, 15, -1>; the busbar list corresponding to branch 1-2 flow of identification busbar 1 is <4>; the busbar list corresponding to branch 1-3 flow of identification busbar 1 is <-1>.

[0039] The flow branch set corresponding to the starting node busbar includes: a merged branch, and / or, a single branch. The merged branch is composed of flow branches corresponding to at least two busbar lists. For the merged branch, there are multiple branches that are merged together to form multiple branches of the final result; for the single branch, that is, a branch that does not have a merged result with other branches.

[0040] The flow branches corresponding to the identification busbar 1 include: a merged branch and a single branch. Among them, the maximum merged branch busbar of branches 1-1 and 1-2 is the identification busbar 4, so branches 1-1 and 1-2 form a merged branch; branch 1-3 is a single branch. It should be noted that the first branch in the merged branch flows to the line as the overall result of the merged branch, that is, branch 1-1 flows to the line as the overall result of the merged branch.

[0041] S130. Compile the local ladder diagram between the starting node busbar and the intermediate node busbar based on the flow branch set corresponding to the starting node busbar to obtain the intermediate node compilation result.

[0042] Among them, when compiling the program for the local ladder diagram between the starting node busbar and the intermediate node busbar, it is necessary to separately compile and process the merged branches and single branches in the flow branch set corresponding to the starting node busbar.

[0043] In some embodiments, compiling the program for the local ladder diagram between the starting node busbar and the intermediate node busbar based on the flow branch set corresponding to the starting node busbar to obtain the intermediate node compilation result includes: If the flow branch set corresponding to the starting node busbar is used to describe a merged branch, then perform logical conversion on the identification instructions corresponding to each branch in the merged branch to obtain the execution logic data of the identification instructions corresponding to each branch, and perform a first logical operation on the execution logic data of the identification instructions corresponding to each branch to obtain the intermediate node compilation result; if the flow branch set corresponding to the starting node busbar is used to describe a single branch, then perform logical conversion on the identification instruction corresponding to the single branch to obtain the intermediate node compilation result; if the flow branch set corresponding to the starting node busbar is used to describe a merged branch and a single branch, then obtain the intermediate node compilation result according to the logical conversion results of the identification instructions corresponding to each branch in the merged branch and the logical conversion result of the identification instruction corresponding to the single branch.

[0044] Among them, by converting high-level languages such as LAD to the intermediate language IR, and then analyzing and optimizing IR, it can be directly converted into bytecode or C language code. IR can be designed with reference to the STL language. In this embodiment, the identification instruction is taken as an example of the "normally open contact instruction" for IR conversion description.

[0045] --------------------------------------------------------------------- void Visit(NOC ins){ If the pre-instruction of the instruction is the busbar && (in the merged branch || the pre-instruction is the starting busbar 1) { Generate a load instruction to obtain the value of the normally open contact operand, Similar to the LD instruction in STL } Else { Generate a bitwise AND load instruction to obtain the value of the normally open contact operand, Similar to the A instruction in STL } } --------------------------------------------------------------------- Combined with the above example, the flow branches corresponding to the identification bus 1 mainly include: merged branches and single branches. Branch 1-1 and branch 1-2 form a merged branch; branch 1-3 is a single branch. When compiling the program for the local ladder diagram between the identification bus 1 and the identification bus 4, perform IR conversion on the identification instruction 2 and the identification instruction 3 respectively to obtain the IR corresponding to the identification instruction 2 (i.e., the logical conversion result of the identification instruction corresponding to branch 1-1) and the IR corresponding to the identification instruction 3 (i.e., the logical conversion result of the identification instruction corresponding to branch 1-2), and perform an "OR" operation (i.e., the first logical operation) on the IR corresponding to the identification instruction 2 and the IR corresponding to the identification instruction 3, and record the operation result as Q1; then perform IR conversion on the identification instruction 20 and the identification instruction 21 to obtain the IR corresponding to the identification instruction 20 and the IR corresponding to the identification instruction 21, and perform an "AND" operation (i.e., the second logical operation mentioned below) on the IR corresponding to the identification instruction 20 and the IR corresponding to the identification instruction 21, and record the operation result as Q2 (i.e., the logical conversion result of the identification instruction corresponding to the single branch 1-3), and the intermediate node compilation result is composed of Q1 and Q2.

[0046] S140. Based on the intermediate node compilation result and the flow branch set corresponding to the intermediate node bus, compile the program for the local ladder diagram between the intermediate node bus and the end node bus to obtain the PLC ladder diagram compilation result.

[0047] Among them, when compiling the program for the local ladder diagram between the intermediate node bus and the end node bus, it is necessary to separately compile and process the merged branches and single branches in the flow branch set corresponding to the intermediate node bus.

[0048] In some embodiments, based on the intermediate node compilation result and the flow branch set corresponding to the intermediate node bus, compile the program for the local ladder diagram between the intermediate node bus and the end node bus to obtain the PLC ladder diagram compilation result, including: If the busbar of the intermediate node is directly connected to the busbar of the end node, obtain the flow branch set corresponding to the busbar of the intermediate node; based on the flow branch set corresponding to the busbar of the intermediate node, compile the local ladder diagram between the busbar of the intermediate node and the busbar of the end node to obtain the compilation result of the end node; perform a second logical operation on the compilation result of the intermediate node and the compilation result of the end node to obtain the compilation result of the PLC ladder diagram.

[0049] In some other embodiments, based on the compilation result of the intermediate node and the flow branch set corresponding to the busbar of the intermediate node, compiling the local ladder diagram between the busbar of the intermediate node and the busbar of the end node to obtain the compilation result of the PLC ladder diagram includes: If the busbar of the intermediate node is indirectly connected to the busbar of the end node, split the graph structure of the local ladder diagram between the busbar of the intermediate node and the busbar of the end node to obtain the local ladder diagram between the busbar of the intermediate node and the busbar of the lower-level node and the local ladder diagram between the busbar of the lower-level node and the busbar of the end node, and the busbar of the intermediate node is directly connected to the busbar of the lower-level node; obtain the flow branch set corresponding to the busbar of the intermediate node, and based on the compilation result of the intermediate node and the flow branch set corresponding to the busbar of the intermediate node, compile the local ladder diagram between the busbar of the intermediate node and the busbar of the lower-level node to obtain the compilation result of the lower-level node; based on the compilation result of the lower-level node and the flow branch set corresponding to the busbar of the lower-level node, compile the local ladder diagram between the busbar of the lower-level node and the busbar of the end node to obtain the compilation result of the PLC ladder diagram.

[0050] Among them, the busbar of the intermediate node is indirectly connected to the busbar of the end node. It can be understood that the indirect connection means that there is one or more other identification busbars between the busbar of the intermediate node and the busbar of the end node. The busbar of the intermediate node is such as Figure 3 the identification busbar 4 in Figure 3 and the busbar of the end node is such as

[0051] the identification busbar -1 in

[0052] There are identification busbars 13 and 15 between the identification busbar 4 and the identification busbar -1. Figure 3 As shown, the identification busbar 4 includes three branches, namely: branch 4-1, branch 4-2, and branch 4-3. The busbar list corresponding to the flow direction of branch 4-1 of the identification busbar 4 is <13, 15, -1>; the busbar list corresponding to the flow direction of branch 4-2 of the identification busbar 4 is <19, 13>; the busbar list corresponding to the flow direction of branch 4-3 of the identification busbar 4 is <9>. The most widely merged branch busbar of branches 4-1, 4-2, and 4-3 is the identification busbar 13. Then, the flow direction branch set corresponding to the identification busbar 4 only includes: the merged branch composed of branches 4-1, 4-2, and 4-3. When compiling the program for the local ladder diagram between the identification busbar 4 and the identification busbar 13, it can be implemented by combining the flow direction branch set corresponding to the identification busbar 4 and the logic conversion result Q1 in the intermediate node compilation result.

[0053] In some embodiments, based on the intermediate node compilation result and the flow direction branch set corresponding to the intermediate node busbar, the program of the local ladder diagram between the intermediate node busbar and the lower node busbar is compiled to obtain the lower node compilation result, including: Based on the flow direction branch set corresponding to the intermediate node busbar, the program of the local ladder diagram between the intermediate node busbar and the lower node busbar is compiled to obtain the branch node compilation result; a second logical operation is performed on the intermediate node compilation result and the branch node compilation result to obtain the lower node compilation result.

[0054] Combined with the above example, when compiling the program for the local ladder diagram between the identification busbar 4 and the identification busbar 13, the IR conversion of the identification instruction 5 is performed to obtain the IR corresponding to the identification instruction 5, denoted as Q3; the IR conversion of the identification instruction 6 is performed to obtain the IR corresponding to the identification instruction 6, the IR conversion of the identification instruction 7 is performed to obtain the IR corresponding to the identification instruction 7, and the "AND" operation is performed on the IR corresponding to the identification instruction 6 and the IR corresponding to the identification instruction 7, and the operation result is denoted as Q4; the IR conversion of the identification instruction 8 is performed to obtain the IR corresponding to the identification instruction 8, denoted as Q5, and the "OR" operation is performed on Q4 and Q5, and the operation result is denoted as Q6; the IR conversion of the identification instruction 10 is performed to obtain the IR corresponding to the identification instruction 10, denoted as Q7; the IR conversion of the identification instruction 11 is performed to obtain the IR corresponding to the identification instruction 11, the IR conversion of the identification instruction 12 is performed to obtain the IR corresponding to the identification instruction 12, and the "AND" operation is performed on the IR corresponding to the identification instruction 11 and the IR corresponding to the identification instruction 12, and the operation result is denoted as Q8, and the "OR" operation is performed on Q7 and Q8, and the operation result is denoted as Q9; the "AND" operation is performed on Q6 and Q9, and the operation result is denoted as Q10; the "OR" operation is performed on Q3 and Q10, and the operation result is denoted as Q11, that is, the branch node compilation result is obtained. By performing the "AND" operation on the branch node compilation result Q11 and Q1 in the intermediate node compilation result, the operation result is denoted as Q12, that is, the lower node compilation result is obtained.

[0055] In some embodiments, based on the compilation results of the lower-level nodes and the flow branch sets corresponding to the busbars of the lower-level nodes, program compilation is performed on the local ladder diagram between the busbar of the lower-level node and the busbar of the end node to obtain the PLC ladder diagram compilation results, including: If the busbar of the lower-level node is indirectly linked to the busbar of the end node, the local ladder diagram between the busbar of the lower-level node and the busbar of the end node is further split until the busbars of the split nodes are directly linked to the busbar of the end node; according to the compilation results of the lower-level nodes, the compilation results of the intermediate nodes, and the compilation results of the local ladder diagrams of the busbar of the lower-level node and the busbar of the end node, the PLC ladder diagram compilation results are obtained.

[0056] Among them, the busbar of the lower-level node is indirectly linked to the busbar of the end node. The busbar of the lower-level node is such as Figure 3 the identification busbar 13 in, and the busbar of the end node is such as Figure 3 the identification busbar -1 in. There is an identification busbar 15 between the identification busbar 13 and the identification busbar -1. The local ladder diagram between the identification busbar 13 and the identification busbar -1 is further split to obtain the local ladder diagram between the identification busbar 13 and the identification busbar 15 and the local ladder diagram between the identification busbar 15 and the identification busbar -1. Since there is no other identification busbar between the identification busbar 15 and the identification busbar -1, the identification busbar 15 is the busbar of the split node.

[0057] The compilation results of the local ladder diagrams of the busbar of the lower-level node and the busbar of the end node are the compilation results of the local ladder diagram of the identification busbar 13 and the identification busbar -1. The compilation results of the local ladder diagram of the identification busbar 13 and the identification busbar -1 are obtained from the compilation results of the local ladder diagram of the identification busbar 13 (i.e., the busbar of the lower-level node) and the identification busbar 15 (i.e., the busbar of the split node) and the compilation results of the local ladder diagram of the identification busbar 15 and the identification busbar -1 (i.e., the busbar of the end node).

[0058] Specifically, when compiling the local ladder diagram between the identification busbar 13 and the identification busbar 15, the local ladder diagram between the identification busbar 13 and the identification busbar 15 is compiled through the flow branch set corresponding to the identification busbar 13. Among them, there are two branches for the identification busbar 13, namely: branch 13-1 and branch 13-2. The busbar list corresponding to the flow of branch 13-1 of the identification busbar 13 is <15, -1>; the busbar list corresponding to the flow of branch 13-2 of the identification busbar 13 is <-1>; both branch 13-1 and branch 13-2 are single branches.

[0059] Combined with the above example, perform IR conversion on the identification instruction 14 to obtain the IR corresponding to the identification instruction 14, denoted as Q13; perform IR conversion on the identification instruction 18 to obtain the IR corresponding to the identification instruction 18, perform IR conversion on the identification instruction 19 to obtain the IR corresponding to the identification instruction 19, and perform an "AND" operation on the IR corresponding to the identification instruction 18 and the IR corresponding to the identification instruction 19, and the operation result is denoted as Q14.

[0060] When compiling the local ladder diagram between the identification bus 15 and the identification bus -1, compile the local ladder diagram between the identification bus 15 and the identification bus -1 through the compilation result of the local ladder diagram between the identification bus 13 and the identification bus 15 and the flow branch set corresponding to the identification bus 15. Among them, there are two branches for the identification bus 15, namely: branch 15-1 and branch 15-2. The bus list corresponding to the identification bus 15 for the flow direction of branch 15-1 is <-1>; the bus list corresponding to the identification bus 15 for the flow direction of branch 15-2 is <-1>; both branch 15-1 and branch 15-2 are single branches.

[0061] Combined with the above example, perform IR conversion on the identification instruction 16 to obtain the IR corresponding to the identification instruction 16, perform IR conversion on the identification instruction 17 to obtain the IR corresponding to the identification instruction 17, and perform an "OR" operation on the IR corresponding to the identification instruction 16 and the IR corresponding to the identification instruction 17, and the operation result is denoted as Q15; then perform an "AND" operation on Q13 and Q15, and the operation result is denoted as Q16, then the compilation result of the local ladder diagram of the identification bus 15 and the identification bus -1 is obtained, that is, the compilation result of the local ladder diagram of the split node bus and the end node bus; then perform an "OR" operation on Q14 and Q16, and the operation result is denoted as Q17, then the compilation result of the local ladder diagram of the identification bus 13 and the identification bus -1 is obtained, that is, the compilation result of the local ladder diagram of the lower-level node bus and the end node bus.

[0062] According to the lower-level node compilation result, the intermediate node compilation result, and the compilation result of the local ladder diagram of the lower-level node bus and the end node bus, obtain the PLC ladder diagram compilation result, which may include: perform a second logical operation on the lower-level node compilation result and the compilation result of the local ladder diagram of the lower-level node bus and the end node bus to obtain an operation result; then perform a first logical operation on this operation result and the intermediate node compilation result to obtain the PLC ladder diagram compilation result.

[0063] Combined with the above example, perform an "AND" operation on Q12 and Q17, and the operation result is denoted as Q18; then perform an "OR" operation on Q18 and Q2 in the intermediate node compilation result, and the operation result is denoted as Q19, then the ladder diagram compilation result of the identification bus 1 and the identification bus -1 is obtained, that is, the PLC ladder diagram compilation result.

[0064] In this embodiment, the original PLC ladder diagram is obtained, and the target PLC ladder diagram is obtained by optimizing the graph structure of the original PLC ladder diagram. The original PLC ladder diagram includes a ladder diagram busbar and ladder diagram instructions. The target PLC ladder diagram includes an identification busbar, identification instructions, and an optimization structure. The identification busbar is obtained by encoding the ladder diagram busbar, and the identification instructions are obtained by encoding the ladder diagram instructions. The optimization structure is used to describe the connection line segment between the identification busbar and the identification instructions. Based on the link relationship between the identification busbars in the target PLC ladder diagram, the graph structure of the target PLC ladder diagram is split to obtain a local ladder diagram between the starting node busbar and the intermediate node busbar, and a local ladder diagram between the intermediate node busbar and the ending node busbar. The starting node busbar is directly linked to the intermediate node busbar. Based on the flow branch set corresponding to the starting node busbar, the local ladder diagram between the starting node busbar and the intermediate node busbar is compiled to obtain an intermediate node compilation result. Based on the intermediate node compilation result and the flow branch set corresponding to the intermediate node busbar, the local ladder diagram between the intermediate node busbar and the ending node busbar is compiled to obtain a PLC ladder diagram compilation result. In this way, by optimizing the structure of the original PLC ladder diagram to obtain the target PLC ladder diagram, it is convenient to directly compile on the target PLC ladder diagram without performing other structure diagram conversions on the PLC ladder diagram, effectively reducing the compilation complexity of the PLC ladder diagram and improving the ladder diagram compilation efficiency.

[0065] In summary, the method of this embodiment does not require additional conversion of the ladder diagram during the ladder diagram compilation process. Instead, it directly performs splitting and analysis on the ladder diagram description structure, effectively reducing the intermediate structure process of structure conversion. By emphasizing the role of the busbar and avoiding reconstructing the branch merging relationship during the analysis process, the compilation process is further accelerated.

[0066] Figure 4 FIG. is a schematic structural diagram of a compilation device for a PLC ladder diagram provided in this embodiment. The compilation device for the PLC ladder diagram may include: An acquisition and optimization module 410, configured to obtain the original PLC ladder diagram and optimize the graph structure of the original PLC ladder diagram to obtain a target PLC ladder diagram. The original PLC ladder diagram includes a ladder diagram busbar and ladder diagram instructions. The target PLC ladder diagram includes an identification busbar, identification instructions, and an optimization structure. The identification busbar is obtained by encoding the ladder diagram busbar, and the identification instructions are obtained by encoding the ladder diagram instructions. The optimization structure is used to describe the connection line segment between the identification busbar and the identification instructions.

[0067] The splitting module 420 is used to split the graph structure of the target PLC ladder diagram based on the link relationship between each identification busbar in the target PLC ladder diagram, so as to obtain the local ladder diagram between the starting node busbar and the intermediate node busbar and the local ladder diagram between the intermediate node busbar and the ending node busbar. The starting node busbar is directly linked to the intermediate node busbar.

[0068] The first compilation module 430 is used to compile the program of the local ladder diagram between the starting node busbar and the intermediate node busbar based on the flow branch set corresponding to the starting node busbar, so as to obtain the intermediate node compilation result.

[0069] The second compilation module 440 is used to compile the program of the local ladder diagram between the intermediate node busbar and the ending node busbar based on the intermediate node compilation result and the flow branch set corresponding to the intermediate node busbar, so as to obtain the PLC ladder diagram compilation result.

[0070] In this embodiment, optionally, it further includes: an acquisition module and an identification module.

[0071] The acquisition module is used to acquire the busbar list corresponding to the starting node busbar for different branch flows. The busbar list corresponding to the starting node busbar for different branch flows includes: other identification busbars having a flow relationship with the starting node busbar.

[0072] The identification module is used to identify the branch types of the busbar list corresponding to the starting node busbar for different branch flows, so as to obtain the flow branch set corresponding to the starting node busbar. The flow branch set corresponding to the starting node busbar includes: a merged branch, and / or, a single branch. The merged branch is composed of the flow branches corresponding to at least two busbar lists.

[0073] In this embodiment, optionally, the first compilation module 430 is specifically used for: If the flow branch set corresponding to the starting node busbar is used to describe a merged branch, then respectively perform logical conversion on the identification instructions corresponding to each branch in the merged branch to obtain the execution logic data of the identification instructions corresponding to each branch, and perform a first logical operation on the execution logic data of the identification instructions corresponding to each branch to obtain the intermediate node compilation result; if the flow branch set corresponding to the starting node busbar is used to describe a single branch, then perform logical conversion on the identification instructions corresponding to the single branch to obtain the intermediate node compilation result; if the flow branch set corresponding to the starting node busbar is used to describe a merged branch and a single branch, then obtain the intermediate node compilation result according to the logical conversion results of the identification instructions corresponding to each branch in the merged branch and the logical conversion result of the identification instructions corresponding to the single branch.

[0074] In this embodiment, optionally, the second compilation module 440 includes: a splitting component, a first compilation component, and a second compilation component.

[0075] A splitting component is used to split the graph structure of the local ladder diagram between the intermediate node busbar and the end node busbar if the intermediate node busbar is indirectly linked to the end node busbar, so as to obtain the local ladder diagram between the intermediate node busbar and the lower-level node busbar and the local ladder diagram between the lower-level node busbar and the end node busbar, and the intermediate node busbar is directly linked to the lower-level node busbar.

[0076] A first compilation component is used to obtain the flow branch set corresponding to the intermediate node busbar, and based on the intermediate node compilation result and the flow branch set corresponding to the intermediate node busbar, compile the program of the local ladder diagram between the intermediate node busbar and the lower-level node busbar to obtain the lower-level node compilation result.

[0077] A second compilation component is used to compile the program of the local ladder diagram between the lower-level node busbar and the end node busbar based on the lower-level node compilation result and the flow branch set corresponding to the lower-level node busbar to obtain the PLC ladder diagram compilation result.

[0078] In this embodiment, optionally, the first compilation component is specifically used for: Based on the flow branch set corresponding to the intermediate node busbar, compile the program of the local ladder diagram between the intermediate node busbar and the lower-level node busbar to obtain the branch node compilation result; perform a second logical operation on the intermediate node compilation result and the branch node compilation result to obtain the lower-level node compilation result.

[0079] In this embodiment, optionally, the second compilation component is specifically used for: If the lower-level node busbar is indirectly linked to the end node busbar, continue to split the local ladder diagram between the lower-level node busbar and the end node busbar until the split node busbar is directly linked to the end node busbar; obtain the PLC ladder diagram compilation result according to the lower-level node compilation result, the intermediate node compilation result, and the local ladder diagram compilation results of the lower-level node busbar and the end node busbar.

[0080] In this embodiment, optionally, the second compilation module 440 includes: an acquisition component, a third compilation component, and an operation component.

[0081] The acquisition component is used to obtain the flow branch set corresponding to the intermediate node busbar if the intermediate node busbar is directly linked to the end node busbar.

[0082] The third compilation component is used to compile the program of the local ladder diagram between the intermediate node busbar and the end node busbar based on the flow branch set corresponding to the intermediate node busbar to obtain the end node compilation result.

[0083] The operation component is used to perform a second logical operation on the intermediate node compilation result and the end node compilation result to obtain the PLC ladder diagram compilation result.

[0084] The PLC ladder diagram compilation device provided by the present disclosure can execute the above method embodiments. For its specific implementation principle and technical effects, please refer to the above method embodiments, which will not be elaborated herein by the present disclosure.

[0085] An embodiment of the present application also provides a computer device. Specifically, please refer to Figure 5 , Figure 5 , which is the basic structural block diagram of the computer device in this embodiment.

[0086] The computer device includes a memory 510 and a processor 520 that are communicatively connected to each other through a system bus. It should be noted that only the computer device with the memory 510 and the processor 520 is shown in the figure. However, it should be understood that it is not required to implement all the shown components, and more or fewer components can be implemented alternatively. Among them, those skilled in the art of the present technology can understand that the computer device here is a device that can automatically perform numerical calculations and / or information processing according to pre-set or stored instructions, and its hardware includes but is not limited to microprocessors, application specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), digital signal processors (DSPs), embedded devices, etc.

[0087] The computer device can be a desktop computer, a notebook, a palm computer, a cloud server and other computing devices. The computer device can perform human-computer interaction with the user through a keyboard, a mouse, a remote control, a touchpad or a voice control device, etc.

[0088] The memory 510 includes at least one type of readable storage medium, and the readable storage medium includes non-volatile memory or volatile memory, such as flash memory, hard disk, multimedia card, card-type memory (such as SD or DX memory, etc.), random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), programmable read-only memory (PROM), magnetic memory, magnetic disk, optical disk, etc. The RAM may include static RAM or dynamic RAM. In some embodiments, the memory 510 may be an internal storage unit of the computer device, such as the hard disk or memory of the computer device. In other embodiments, the memory 510 may also be an external storage device of the computer device, such as a plug-in hard disk, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card equipped on the computer device. Of course, the memory 510 may also include both the internal storage unit and the external storage device of the computer device. In this embodiment, the memory 510 is generally used to store the operating system and various application software installed on the computer device, such as the program code of the above method. In addition, the memory 510 may also be used to temporarily store various data that have been output or will be output.

[0089] The processor 520 is generally used to execute the overall operations of the computer device. In this embodiment, the memory 510 is used to store program code or instructions, and the program code includes computer operation instructions. The processor 520 is used to execute the program code or instructions stored in the memory 510 or process data, such as running the program code of the above method.

[0090] In this text, the bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, etc. The bus system can be divided into an address bus, a data bus, a control bus, etc. For the sake of convenience of representation, only a thick line is used in the figure, but it does not mean that there is only one bus or one type of bus.

[0091] Another embodiment of the present application further provides a computer-readable medium, which can be a computer-readable signal medium or a computer-readable storage medium. A processor in the computer reads the computer-readable program code stored in the computer-readable medium, so that the processor can perform the functional actions specified in each step or the combination of steps in the above method; and generate a device for performing the functional actions specified in each block or the combination of blocks in the block diagram.

[0092] The computer-readable medium includes but is not limited to electronic, magnetic, optical, electromagnetic, infrared memories or semiconductor systems, devices or apparatuses, or any suitable combination of the foregoing. The memory is used to store program code or instructions, and the program code includes computer operation instructions. The processor is used to execute the program code or instructions of the above method stored in the memory.

[0093] For the definitions of the memory and the processor, reference can be made to the description of the foregoing computer device embodiments, and details are not described herein again.

[0094] In several embodiments provided by the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only illustrative. For example, the division of modules or units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed coupling or direct coupling or communication connection between each other can be through some interfaces. The indirect coupling or communication connection of devices or units can be in electrical, mechanical or other forms.

[0095] In each embodiment of the present application, each functional unit or module can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit. The above integrated unit can be implemented in the form of hardware or in the form of a software functional unit.

[0096] When an integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to execute all or part of the steps of the methods of various embodiments of this application. The aforementioned storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical discs.

[0097] In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The "including" described in this application does not exclude the existence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the existence of a plurality of such elements. This application can be implemented by means of hardware including several different elements and by means of a suitably programmed computer. In the claims listing several units of a device, several of these units of the device can be embodied by the same item of hardware. The use of the first, second, and third, etc. does not indicate any order, and these words can be interpreted as names. The steps in the above embodiments, unless otherwise specified, should not be construed as limiting the order of execution.

[0098] The above embodiments are only used to illustrate the technical solutions of this application, rather than to limit them; although this application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of various embodiments of this application.< / branch> < / branch> < / int>

Claims

1. A compilation method for a PLC ladder diagram, characterized in that, Including: Obtain the original PLC ladder diagram, and optimize the graph structure of the original PLC ladder diagram to obtain the target PLC ladder diagram. The original PLC ladder diagram includes ladder diagram buses and ladder diagram instructions. The target PLC ladder diagram includes identification buses, identification instructions, and an optimized structure. The identification buses are obtained by encoding the ladder diagram buses, the identification instructions are obtained by encoding the ladder diagram instructions, and the optimized structure is used to describe the connection segments between the identification buses and the identification instructions; Based on the link relationship between the identification buses in the target PLC ladder diagram, split the graph structure of the target PLC ladder diagram to obtain a local ladder diagram between the starting node bus and the intermediate node bus, and a local ladder diagram between the intermediate node bus and the ending node bus. The starting node bus is directly linked to the intermediate node bus; Based on the flow branch set corresponding to the starting node bus, compile the local ladder diagram between the starting node bus and the intermediate node bus to obtain an intermediate node compilation result; Based on the intermediate node compilation result and the flow branch set corresponding to the intermediate node bus, compile the local ladder diagram between the intermediate node bus and the ending node bus to obtain a PLC ladder diagram compilation result.

2. The method according to claim 1, wherein Before compiling the local ladder diagram between the starting node bus and the intermediate node bus based on the flow branch set corresponding to the starting node bus, it further includes: Obtain the bus list corresponding to the starting node bus for different branch flows. The bus list corresponding to the starting node bus for different branch flows includes other identification buses having a flow relationship with the starting node bus; Identify the branch types of the bus list corresponding to the starting node bus for different branch flows to obtain the flow branch set corresponding to the starting node bus. The flow branch set corresponding to the starting node bus includes merge branches, and / or single branches. The merge branches are composed of flow branches corresponding to at least two bus lists.

3. The method according to claim 2, wherein Compiling the local ladder diagram between the starting node bus and the intermediate node bus based on the flow branch set corresponding to the starting node bus to obtain an intermediate node compilation result includes: If the flow branch set corresponding to the starting node bus is used to describe the merge branches, respectively perform logical conversions on the identification instructions corresponding to each branch in the merge branches to obtain the execution logic data of the identification instructions corresponding to each branch, and perform a first logical operation on the execution logic data of the identification instructions corresponding to each branch to obtain the intermediate node compilation result; If the flow branch set corresponding to the starting node bus is used to describe the single branch, perform a logical conversion on the identification instruction corresponding to the single branch to obtain the intermediate node compilation result; If the flow branch set corresponding to the starting node bus is used to describe the merging branch and the single branch, then according to the logical conversion results of the identification instructions corresponding to each branch in the merging branch and the logical conversion result of the identification instruction corresponding to the single branch, the intermediate node compilation result is obtained.

4. The method according to claim 3, wherein Performing program compilation on the local ladder diagram between the intermediate node bus and the end node bus based on the intermediate node compilation result and the flow branch set corresponding to the intermediate node bus to obtain the PLC ladder diagram compilation result, including: If the intermediate node bus is indirectly linked to the end node bus, then the local ladder diagram between the intermediate node bus and the end node bus is split in terms of graph structure to obtain the local ladder diagram between the intermediate node bus and the lower-level node bus and the local ladder diagram between the lower-level node bus and the end node bus, and the intermediate node bus is directly linked to the lower-level node bus; Obtain the flow branch set corresponding to the intermediate node bus, and perform program compilation on the local ladder diagram between the intermediate node bus and the lower-level node bus based on the intermediate node compilation result and the flow branch set corresponding to the intermediate node bus to obtain the lower-level node compilation result; Performing program compilation on the local ladder diagram between the lower-level node bus and the end node bus based on the lower-level node compilation result and the flow branch set corresponding to the lower-level node bus to obtain the PLC ladder diagram compilation result.

5. The method according to claim 4, wherein Performing program compilation on the local ladder diagram between the intermediate node bus and the lower-level node bus based on the intermediate node compilation result and the flow branch set corresponding to the intermediate node bus to obtain the lower-level node compilation result, including: Performing program compilation on the local ladder diagram between the intermediate node bus and the lower-level node bus based on the flow branch set corresponding to the intermediate node bus to obtain the branch node compilation result; Performing a second logical operation on the intermediate node compilation result and the branch node compilation result to obtain the lower-level node compilation result.

6. The method according to claim 4, characterized in that, Performing program compilation on the local ladder diagram between the lower-level node bus and the end node bus based on the lower-level node compilation result and the flow branch set corresponding to the lower-level node bus to obtain the PLC ladder diagram compilation result, including: If the lower-level node bus is indirectly linked to the end node bus, then continue to split the local ladder diagram between the lower-level node bus and the end node bus until the split node bus is directly linked to the end node bus; Obtain the PLC ladder diagram compilation result according to the lower-level node compilation result, the intermediate node compilation result, and the local ladder diagram compilation results of the lower-level node bus and the end node bus.

7. The method according to claim 3, characterized in that, Performing program compilation on the local ladder diagram between the intermediate node bus and the end node bus based on the intermediate node compilation result and the flow branch set corresponding to the intermediate node bus to obtain the PLC ladder diagram compilation result, including: If the intermediate node bus directly links to the end node bus, obtain the flow branch set corresponding to the intermediate node bus; Based on the flow branch set corresponding to the intermediate node bus, perform program compilation on the local ladder diagram between the intermediate node bus and the end node bus to obtain an end node compilation result; Perform a second logical operation on the intermediate node compilation result and the end node compilation result to obtain the PLC ladder diagram compilation result.

8. A compilation device for a PLC ladder diagram, characterized in that, It includes: An acquisition and optimization module, configured to acquire an original PLC ladder diagram and perform graph structure optimization on the original PLC ladder diagram to obtain a target PLC ladder diagram. The original PLC ladder diagram includes ladder diagram buses and ladder diagram instructions. The target PLC ladder diagram includes identification buses, identification instructions, and an optimization structure. The identification buses are obtained by encoding the ladder diagram buses, the identification instructions are obtained by encoding the ladder diagram instructions, and the optimization structure is used to describe the connection line segments between the identification buses and the identification instructions; A splitting module, configured to perform graph structure splitting on the target PLC ladder diagram based on the link relationship between the identification buses in the target PLC ladder diagram to obtain a local ladder diagram between the start node bus and the intermediate node bus and a local ladder diagram between the intermediate node bus and the end node bus. The start node bus directly links to the intermediate node bus; A first compilation module, configured to perform program compilation on the local ladder diagram between the start node bus and the intermediate node bus based on the flow branch set corresponding to the start node bus to obtain an intermediate node compilation result; A second compilation module, configured to perform program compilation on the local ladder diagram between the intermediate node bus and the end node bus based on the intermediate node compilation result and the flow branch set corresponding to the intermediate node bus to obtain a PLC ladder diagram compilation result.

9. A computer device, characterized in that, It includes a memory and a processor. A computer program is stored in the memory. When the processor executes the computer program, it implements the PLC ladder diagram compilation method according to any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the PLC ladder diagram compilation method according to any one of claims 1 to 7.

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