Transconductance amplifier, signal processing circuit and communication equipment

Abstract

The invention provides a transconductance amplifier, a signal processing circuit and communication equipment. The transconductance amplifier comprises a first-stage amplifier, a second-stage amplifier and a third-stage amplifier, the first-stage amplifier comprises an input differential tube assembly and a first load assembly, the second-stage amplifier comprises a first pseudo-differential input tube assembly and a cascode tube assembly, and the third-stage amplifier comprises a second pseudo-differential input tube assembly, a first Miller compensation assembly, a second Miller compensation assembly, a second load assembly and a third load assembly. The first-stage amplifier is low in gain, and the Miller effect of an input tube can be relieved. The second-stage amplifier adopts a cascode structure to improve the gain, and the third-stage amplifier adopts a Miller compensation technology to obtain higher gain.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit design, and particularly to a transconductance amplifier, a signal processing circuit, and a communication device. Background Art

[0002] In recent years, with the rapid development of integrated circuit design technology, transconductance amplifiers have been applied in signal processing circuits such as analog-to-digital conversion circuits (ADC) and filter circuits. The performance of the transconductance amplifier directly affects the performance of the overall integrated circuit. Although the traditional single-stage transconductance amplifier structure has the advantages of low power consumption, high speed, and low noise, due to the Miller effect in the input transistor, the gain is relatively low. Summary of the Invention

[0003] The present invention provides a transconductance amplifier, a signal processing circuit, and a communication device to solve the defect in the prior art that the gain of the single-stage transconductance amplifier is relatively low due to the Miller effect in the input transistor. The first-stage amplifier of the present invention has a low gain, which can alleviate the Miller effect of the input transistor. The second-stage amplifier adopts a cascode structure to increase the gain, and the third-stage amplifier uses Miller compensation technology to obtain a higher gain.

[0004] The present invention provides a transconductance amplifier, which includes a first-stage amplifier, a second-stage amplifier, and a third-stage amplifier; the first-stage amplifier includes an input differential transistor component and a first load component, the second-stage amplifier includes a first pseudo-differential input transistor component and a cascode transistor component, and the third-stage amplifier includes a second pseudo-differential input transistor component, a first Miller compensation component, a second Miller compensation component, a second load component, and a third load component; the input differential transistor component, the first pseudo-differential input transistor component, and the second pseudo-differential input transistor component are all arranged between a first power supply and the ground; a first control end of the input differential transistor component is connected to a second power supply access node, a second control end of the input differential transistor component is connected to a third power supply access node, a first output end of the input differential transistor component is respectively connected to a first control end of the first pseudo-differential input transistor component and a first end of the first load component, a second output end of the input differential transistor component is respectively connected to a second control end of the first pseudo-differential input transistor component and a second end of the first load component, and a third end of the first load component is grounded; a first end of the first pseudo-differential input transistor component is connected to a first end of the cascode transistor component, a second end of the first pseudo-differential input transistor component is connected to a second end of the cascode transistor component, a third end of the first pseudo-differential input transistor component is connected to a third end of the cascode transistor component, and a fourth end of the first pseudo-differential input transistor is connected to a fourth end of the cascode transistor component; a first output end of the cascode transistor component is respectively connected to a first control end of the second pseudo-differential input transistor component and a first end of the first Miller compensation component, a second output end of the cascode transistor component is respectively connected to a second control end of the second pseudo-differential input transistor component and a first end of the second Miller compensation component, a first output end of the second pseudo-differential input transistor component is respectively connected to a second end of the first Miller compensation component and a first end of the second load component, a second output end of the second pseudo-differential input transistor component is respectively connected to a second end of the second Miller compensation component and a first end of the third load component, and a second end of the second load component and a second end of the third load component are both grounded, so as to determine a final amplification result according to an output result of a first output end of the second pseudo-differential input transistor component and an output result of a second output end of the second pseudo-differential input transistor component.

[0005] A transconductance amplifier provided according to the present invention, wherein the input differential transistor assembly includes a first transistor, a second transistor, a third transistor, and a fourth transistor; a common terminal where the source electrode of the first transistor is connected to the source electrode of the second transistor is connected to the first power supply, a common terminal where the drain electrode of the first transistor is connected to the drain electrode of the third transistor serves as the first output terminal of the input differential transistor assembly, a common terminal where the gate electrode of the first transistor is connected to the gate electrode of the third transistor serves as the first control terminal of the input differential transistor assembly, a common terminal where the drain electrode of the second transistor is connected to the drain electrode of the fourth transistor serves as the second output terminal of the input differential transistor assembly, a common terminal where the gate electrode of the second transistor is connected to the gate electrode of the fourth transistor serves as the second control terminal of the first pseudo-differential input transistor assembly, and a common terminal where the source electrode of the third transistor is connected to the source electrode of the fourth transistor is grounded.

[0006] A transconductance amplifier provided according to the present invention, wherein the first load assembly includes a first resistor, a second resistor, and a first capacitor; a first end of the first resistor serves as the first end of the first load assembly, a second end of the first resistor is respectively connected to a first end of the second resistor and a first end of the first capacitor, a second end of the second resistor serves as the second end of the first load assembly, and a second end of the first capacitor serves as the third end of the first load assembly.

[0007] A transconductance amplifier provided according to the present invention, wherein the first pseudo-differential input transistor assembly includes a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor; a common terminal where the source electrode of the fifth transistor is connected to the source electrode of the sixth transistor is connected to the first power supply, a drain electrode of the fifth transistor serves as the first end of the first pseudo-differential input transistor assembly, a common terminal where the gate electrode of the fifth transistor is connected to the gate electrode of the seventh transistor serves as the first control terminal of the first pseudo-differential input transistor assembly, a drain electrode of the sixth transistor serves as the second end of the first pseudo-differential input transistor assembly, a common terminal where the gate electrode of the sixth transistor is connected to the gate electrode of the eighth transistor serves as the second control terminal of the first pseudo-differential input transistor assembly, a drain electrode of the seventh transistor serves as the third end of the first pseudo-differential input transistor assembly, a drain electrode of the eighth transistor serves as the fourth end of the first pseudo-differential input transistor assembly, and a common terminal where the source electrode of the seventh transistor is connected to the source electrode of the eighth transistor is grounded.

[0008] A transconductance amplifier provided according to the present invention, wherein the cascode transistor assembly includes a ninth transistor, a tenth transistor, an eleventh transistor, and a twelfth transistor; the source of the ninth transistor serves as the first end of the cascode transistor assembly, the common terminal where the drain of the ninth transistor is connected to the drain of the eleventh transistor serves as the first output end of the cascode transistor assembly, the gate of the ninth transistor is connected to the gate of the tenth transistor, the source of the tenth transistor serves as the second end of the cascode transistor assembly, the common terminal where the drain of the tenth transistor is connected to the drain of the twelfth transistor serves as the second output end of the cascode transistor assembly, the source of the eleventh transistor serves as the third end of the cascode transistor assembly, the gate of the eleventh transistor is connected to the gate of the twelfth transistor, and the source of the twelfth transistor serves as the fourth end of the cascode transistor assembly.

[0009] A transconductance amplifier provided according to the present invention, wherein the second pseudo-differential input transistor assembly includes a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, and a sixteenth transistor; the common terminal where the source of the thirteenth transistor is connected to the source of the fourteenth transistor is connected to the first power supply, the common terminal where the drain of the thirteenth transistor is connected to the drain of the fifteenth transistor serves as the first output end of the second pseudo-differential input transistor assembly, the common terminal where the gate of the thirteenth transistor is connected to the gate of the fifteenth transistor serves as the first control end of the second pseudo-differential input transistor assembly, the common terminal where the drain of the fourteenth transistor is connected to the drain of the sixteenth transistor serves as the second output end of the second pseudo-differential input transistor assembly, the common terminal where the gate of the fourteenth transistor is connected to the gate of the sixteenth transistor serves as the second control end of the second pseudo-differential input transistor assembly, and the common terminal where the source of the fifteenth transistor is connected to the source of the sixteenth transistor is grounded.

[0010] A transconductance amplifier provided by the present invention, wherein the first Miller compensation component includes a second capacitor and a third resistor, the second Miller compensation component includes a third capacitor and a fourth resistor, the second load component is a fourth capacitor, and the third load component is a fifth capacitor; a first end of the second capacitor serves as a first end of the first Miller compensation component, a second end of the second capacitor is connected to a first end of the third resistor, a second end of the third resistor serves as a second end of the first Miller compensation component, a first end of the fourth capacitor serves as a first end of the second load component, and a second end of the fourth capacitor serves as a second end of the second load component; a first end of the third capacitor serves as a first end of the second Miller compensation component, a second end of the third capacitor is connected to a first end of the fourth resistor, a second end of the fourth resistor serves as a second end of the second Miller compensation component, a first end of the fifth capacitor serves as a first end of the third load component, and a second end of the fifth capacitor serves as a second end of the third load component.

[0011] A transconductance amplifier provided by the present invention, wherein the transconductance amplifier is reset by a switching circuit, and the working timing of the transconductance amplifier is as follows: in the amplification phase, the switching circuit is in an off state so that the transconductance amplifier enters the amplification state; in the reset phase, the switching circuit is in a conducting state so that the transconductance amplifier enters the reset state.

[0012] The present invention also provides a signal processing circuit, including the above-mentioned transconductance amplifier.

[0013] The present invention also provides a communication device, including the above-mentioned signal processing circuit.

[0014] A transconductance amplifier, a signal processing circuit, and a communication device provided by the present invention include a first-stage amplifier, a second-stage amplifier, and a third-stage amplifier. The first-stage amplifier includes an input differential transistor component and a first load component. The second-stage amplifier includes a first pseudo-differential input transistor component and a cascode transistor component. The third-stage amplifier includes a second pseudo-differential input transistor component, a first Miller compensation component, a second Miller compensation component, a second load component, and a third load component. The first-stage amplifier of the present invention has a low gain, which can alleviate the Miller effect of the input transistors. The second-stage amplifier uses a cascode structure to increase the gain, and the third-stage amplifier uses Miller compensation technology to obtain a higher gain. Description of the Drawings

[0015] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0016] Figure 1 It is a schematic structural diagram of a transconductance amplifier provided by the present invention.

[0017] Figure 2 It is a specific circuit diagram of a transconductance amplifier provided by the present invention.

[0018] Figure 3 It is a schematic principle diagram of the switch circuit provided by the present invention. Detailed implementation manners

[0019] To make the objectives, technical solutions and advantages of the present invention clearer, the technical solutions in the present invention will be clearly and completely described below with reference to the accompanying drawings in the present invention. Apparently, the described embodiments are some but not all of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art without making creative efforts based on the embodiments in the present invention belong to the scope of protection of the present invention.

[0020] Please refer to Figure 1 , Figure 1 which is a schematic structural diagram of a transconductance amplifier provided by the present invention.

[0021] To solve the problem in the prior art that the gain of a single-stage transconductance amplifier is low due to the Miller effect of the input transistor, the present invention provides a transconductance amplifier, which includes a first-stage amplifier A1, a second-stage amplifier A2 and a third-stage amplifier A3; the first-stage amplifier A1 includes an input differential transistor component and a first load component, the second-stage amplifier A2 includes a first pseudo-differential input transistor component and a cascode transistor component, and the third-stage amplifier A3 includes a second pseudo-differential input transistor component, a first Miller compensation component, a second Miller compensation component, a second load component and a third load component; the input differential transistor component, the first pseudo-differential input transistor component and the second pseudo-differential input transistor component are all arranged between the first power supply and the ground; the first control end v inp of the input differential transistor component is connected to the second power supply access node, the second control end v inn of the input differential transistor component is connected to the third power supply access node, the first output end v outn1 of the input differential transistor component is respectively connected to the first control end of the first pseudo-differential input transistor component and the first end of the first load component, and the second output end v outp1They are respectively connected to the second control end of the first pseudo-differential input transistor component and the second end of the first load component, and the third end of the first load component is grounded; the first end of the first pseudo-differential input transistor component is connected to the first end of the cascode transistor component, the second end of the first pseudo-differential input transistor component is connected to the second end of the cascode transistor component, the third end of the first pseudo-differential input transistor component is connected to the third end of the cascode transistor component, and the fourth end of the first pseudo-differential input transistor is connected to the fourth end of the cascode transistor component; the first output end of the cascode transistor component v outp2 They are respectively connected to the first control end of the second pseudo-differential input transistor component and the first end of the first Miller compensation component, and the second output end of the cascode transistor component v outn2 They are respectively connected to the second control end of the second pseudo-differential input transistor component and the first end of the second Miller compensation component, and the first output end of the second pseudo-differential input transistor component v outn3 They are respectively connected to the second end of the first Miller compensation component and the first end of the second load component, and the second output end of the second pseudo-differential input transistor component v outp3 They are respectively connected to the second end of the second Miller compensation component and the first end of the third load component, and the second ends of the second load component and the third load component are both grounded to determine the final amplification result according to the output result of the first output end of the second pseudo-differential input transistor component and the result of the second output end of the second pseudo-differential input transistor component.

[0022] The present invention proposes a three-stage high-performance transconductance amplifier with Miller compensation, including a first-stage amplifier A1, a second-stage amplifier A2, and a third-stage amplifier A3. The first-stage amplifier A1, the second-stage amplifier A2, and the third-stage amplifier A3 are all differential complementary inputs to maximize the current amplification efficiency. Among them, the first-stage amplifier A1 can be a pseudo-differential or true-differential structure, and the second-stage amplifier A2 and the third-stage amplifier A3 can be pseudo-differential structures. The output of the first-stage amplifier A1 is a non-dominant pole, and it is designed with low gain to push up the pole and alleviate the Miller effect of the input transistor. The output of the second-stage amplifier A2 is the dominant pole, so a cascode structure can be used to increase the gain. The third-stage amplifier A3 is set as the sub-dominant pole. After using the Miller compensation technology to push the sub-dominant pole to a higher frequency, the third-stage amplifier A3 can obtain a higher gain. When all three-stage amplifiers are in pseudo-differential structures, the common-mode feedback loop can share with the differential-mode feedback loop, reducing the overhead of the common-mode feedback circuit; the bias circuit is simple. The transconductance amplifier of the present invention has the advantages of high gain, low power consumption, large bandwidth, and good process scalability.

[0023] Please refer to Figure 2 , Figure 2 which is a specific circuit diagram of a transconductance amplifier provided by the present invention.

[0024] As a preferred embodiment, the input differential tube assembly includes a first transistor M P1 , a second transistor M P2 , a third transistor M N1 and a fourth transistor M N2 ; the common terminal where the source of the first transistor M P1 is connected to the source of the second transistor M P2 is connected to the first power supply. The common terminal where the drain of the first transistor M P1 is connected to the drain of the third transistor M N1 serves as the first output terminal of the input differential tube assembly. The common terminal where the gate of the first transistor M P1 is connected to the gate of the third transistor M N1 serves as the first control terminal of the input differential tube assembly. The common terminal where the drain of the second transistor M P2 is connected to the drain of the fourth transistor M N2 serves as the second output terminal of the input differential tube assembly. The common terminal where the gate of the second transistor M P2 is connected to the gate of the fourth transistor M N2 serves as the second control terminal of the first pseudo-differential input tube assembly. The common terminal where the source of the third transistor M N1 is connected to the source of the fourth transistor M N2 is grounded.

[0025] As a preferred embodiment, the first load assembly includes a first resistor R x1 , a second resistor R x2 and a first capacitor C x ; the first end of the first resistor R x1 serves as the first end of the first load assembly. The second end of the first resistor R x1 is respectively connected to the first end of the second resistor R x2 and the first end of the first capacitor C x . The second end of the second resistor R x2 serves as the second end of the first load assembly. The second end of the first capacitor C x serves as the third end of the first load assembly.

[0026] In this embodiment, the output of the first-stage amplifier A1 is a non-dominant pole. In order to push it to a higher frequency, the differential-mode gain of the first stage cannot be set too large. Therefore, the first load assembly uses the first resistor R x1 and the second resistor R x2 to control the differential-mode gain and the position of the non-dominant pole. The first capacitor C x provides a common-mode virtual ground function, and its size does not affect the differential-mode gain.

[0027] Among them, the first transistor M P1and the second transistor M P2 is a PMOS transistor, and the third transistor M N1 and the fourth transistor M N2 are NMOS transistors.

[0028] As a preferred embodiment, the first pseudo-differential input transistor assembly includes a fifth transistor M P3 , a sixth transistor M P4 , a seventh transistor M N3 and an eighth transistor M N4 ; the source of the fifth transistor M P3 is connected to the common terminal where the source of the sixth transistor M P4 is connected, and this common terminal is connected to the first power supply. The drain of the fifth transistor M P3 serves as the first end of the first pseudo-differential input transistor assembly. The gate of the fifth transistor M P3 is connected to the common terminal where the gate of the seventh transistor M N3 is connected, and this common terminal serves as the first control end of the first pseudo-differential input transistor assembly. The drain of the sixth transistor M P4 is the second end of the first pseudo-differential input transistor assembly. The gate of the sixth transistor M P4 is connected to the common terminal where the gate of the eighth transistor M N4 is connected, and this common terminal serves as the second control end of the first pseudo-differential input transistor assembly. The drain of the seventh transistor M N3 serves as the third end of the first pseudo-differential input transistor assembly. The drain of the eighth transistor M N4 serves as the fourth end of the first pseudo-differential input transistor assembly. The source of the seventh transistor M N3 is connected to the common terminal where the source of the eighth transistor M N4 is connected, and this common terminal is grounded.

[0029] As a preferred embodiment, the cascode transistor assembly includes a ninth transistor M P5 , a tenth transistor M P6 , an eleventh transistor M N5 and a twelfth transistor M N6 ; the source of the ninth transistor M P5 serves as the first end of the cascode transistor assembly. The common terminal where the drain of the ninth transistor M P5 is connected to the drain of the eleventh transistor M N5 serves as the first output end of the cascode transistor assembly. The gate of the ninth transistor M P5 is connected to the gate of the tenth transistor M P6 . The source of the tenth transistor M P6 serves as the second end of the cascode transistor assembly. The common terminal where the drain of the tenth transistor M P6 is connected to the drain of the twelfth transistor M N6 serves as the second output end of the cascode transistor assembly. The eleventh transistor MN5 The source of N5 is connected to the gate of the twelfth transistor M N6 The source of the twelfth transistor M N6 is used as the fourth terminal of the cascode transistor assembly.

[0030] In this embodiment, the output of the second-stage amplifier A2 is set as the main pole. Since the output swing of the second stage is small, a cascode structure can be used to increase the gain.

[0031] In the first pseudo-differential input transistor assembly, the fifth transistor M P3 and the sixth transistor M P4 are PMOS transistors, and the seventh transistor M N3 and the eighth transistor M N4 are NMOS transistors.

[0032] In the cascode transistor assembly, the ninth transistor M P5 and the tenth transistor M P6 are PMOS transistors, and the eleventh transistor M N5 and the twelfth transistor M N6 are NMOS transistors.

[0033] As a preferred embodiment, the second pseudo-differential input transistor assembly includes a thirteenth transistor M P7 , a fourteenth transistor M P8 , a fifteenth transistor M N7 and a sixteenth transistor M N8 ; the common terminal where the source of the thirteenth transistor M P7 is connected to the source of the fourteenth transistor M P8 is connected to the first power supply. The common terminal where the drain of the thirteenth transistor M P7 is connected to the drain of the fifteenth transistor M N7 is used as the first output terminal of the second pseudo-differential input transistor assembly. The common terminal where the gate of the thirteenth transistor M P7 is connected to the gate of the fifteenth transistor M N7 is used as the first control terminal of the second pseudo-differential input transistor assembly. The common terminal where the drain of the fourteenth transistor M P8 is connected to the drain of the sixteenth transistor M N8 is used as the second output terminal of the second pseudo-differential input transistor assembly. The common terminal where the gate of the fourteenth transistor M P8 is connected to the gate of the sixteenth transistor M N8 is used as the second control terminal of the second pseudo-differential input transistor assembly. The common terminal where the source of the fifteenth transistor M N7 is connected to the source of the sixteenth transistor M N8 is grounded.

[0034] As a preferred embodiment, the first Miller compensation component includes a second capacitor C c1 and a third resistor R z1 . The second Miller compensation component includes a third capacitor C c2 and a fourth resistor R z2 . The second load component is a fourth capacitor C L , and the third load component is a fifth capacitor; the first end of the second capacitor C c1 serves as the first end of the first Miller compensation component, and the second end of the second capacitor C c1 is connected to the first end of the third resistor R z1 . The second end of the third resistor R z1 serves as the second end of the first Miller compensation component. The first end of the fourth capacitor C L serves as the first end of the second load component, and the second end of the fourth capacitor C L serves as the second end of the second load component; the first end of the third capacitor C c2 serves as the first end of the second Miller compensation component, and the second end of the third capacitor C c2 is connected to the first end of the fourth resistor R z2 . The second end of the fourth resistor R z2 serves as the second end of the second Miller compensation component. The first end of the fifth capacitor serves as the first end of the third load component, and the second end of the fifth capacitor serves as the second end of the third load component.

[0035] In this embodiment, the output of the third-stage amplifier A3 is set as the sub-main pole. After separating the main pole and the sub-main pole by using the Miller compensation technology, the third-stage amplifier A3 can obtain high gain. To achieve the maximum output swing, the third-stage amplifier A3 adopts a pseudo-differential complementary output, consuming only two overdrive voltages.

[0036] All three-stage amplifiers of the transconductance amplifier provided by the present invention adopt a pseudo-differential complementary input structure, which has very low requirements for the voltage domain, and the slew rate is not limited by the tail current source. While saving power consumption, it has a faster settling speed. Only the cascode transistor of the second-stage amplifier A2 in the three-stage transconductance amplifier needs to be biased, greatly simplifying the bias network and saving power consumption. All three-stage amplifiers adopt a pseudo-differential structure without common-mode rejection. Therefore, the common-mode feedback of the proposed transconductance amplifier can share a loop with the differential-mode feedback, reducing the overhead of the common-mode feedback network and simplifying the design.

[0037] Please refer to Figure 3 , Figure 3 , which is a schematic diagram of the principle of the switching circuit provided by the present invention.

[0038] As a preferred embodiment, the transconductance amplifier is reset by a switching circuit. The working timing of the transconductance amplifier is as follows: in the amplification phase, the switching circuit is in the off state to enable the transconductance amplifier to enter the amplification state; in the reset phase, the switching circuit is in the on state to enable the transconductance amplifier to enter the reset state.

[0039] In this embodiment, the transconductance amplifier is reset by the switching circuit B1.

[0040] In the amplification phase (for example, when CLK is high), v outn1 The transistor between v inp is turned off, v outp1 The transistor between v inn is turned off, v outn3 The transistor between v outp2 is turned off, v outp3 The transistor between v outn2 is turned off, v outn1 The transistor between v outp1 is turned off, v outn3 The transistor between v outp3 is turned off, and the transconductance amplifier enters the amplification state.

[0041] In the reset phase (for example, when / CLK is high), v outn1 The transistor between v inp is turned on, v outp1 The transistor between v inn is turned on, v outn3 The transistor between v outp2 is turned on, v outp3 The transistor between v outn2 is turned on, v outn1 The transistor between v outp1 is turned on, v outn3 The transistor between v outp3When the transistor therebetween conducts, the transconductance amplifier enters the reset state, the inputs and outputs of the first-stage amplifier A1 and the third-stage amplifier A3 are short-circuited, and each node of the transconductance amplifier is reset to approximately half of the power supply voltage.

[0042] The signal processing circuit provided by the present invention will be described below. The signal processing circuit described below can be correspondingly referred to the transconductance amplifier described above.

[0043] The present invention also provides a signal processing circuit, including the above-mentioned transconductance amplifier.

[0044] The communication device provided by the present invention will be described below. The communication device described below can be correspondingly referred to the transconductance amplifier described above.

[0045] The present invention also provides a communication device, including the above-mentioned signal processing circuit.

[0046] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A transconductance amplifier, characterized in that, It includes a first-stage amplifier, a second-stage amplifier, and a third-stage amplifier; the first-stage amplifier includes an input differential transistor component and a first load component, the second-stage amplifier includes a first pseudo-differential input transistor component and a cascode transistor component, and the third-stage amplifier includes a second pseudo-differential input transistor component, a first Miller compensation component, a second Miller compensation component, a second load component, and a third load component; The input differential transistor component, the first pseudo-differential input transistor component, and the second pseudo-differential input transistor component are all disposed between a first power supply and ground; a first control terminal of the input differential transistor component is connected to a second power supply access node, a second control terminal of the input differential transistor component is connected to a third power supply access node, a first output terminal of the input differential transistor component is respectively connected to a first control terminal of the first pseudo-differential input transistor component and a first end of the first load component, a second output terminal of the input differential transistor component is respectively connected to a second control terminal of the first pseudo-differential input transistor component and a second end of the first load component, and a third end of the first load component is grounded; a first end of the first pseudo-differential input transistor component is connected to a first end of the cascode transistor component, a second end of the first pseudo-differential input transistor component is connected to a second end of the cascode transistor component, a third end of the first pseudo-differential input transistor component is connected to a third end of the cascode transistor component, and a fourth end of the first pseudo-differential input transistor is connected to a fourth end of the cascode transistor component; a first output terminal of the cascode transistor component is respectively connected to a first control terminal of the second pseudo-differential input transistor component and a first end of the first Miller compensation component, a second output terminal of the cascode transistor component is respectively connected to a second control terminal of the second pseudo-differential input transistor component and a first end of the second Miller compensation component, a first output terminal of the second pseudo-differential input transistor component is respectively connected to a second end of the first Miller compensation component and a first end of the second load component, a second output terminal of the second pseudo-differential input transistor component is respectively connected to a second end of the second Miller compensation component and a first end of the third load component, and a second end of the second load component and a second end of the third load component are both grounded to determine a final amplification result according to an output result of the first output terminal of the second pseudo-differential input transistor component and an output result of the second output terminal of the second pseudo-differential input transistor component.

2. The transconductance amplifier according to claim 1, wherein The input differential transistor component includes a first transistor, a second transistor, a third transistor, and a fourth transistor; The common terminal where the source of the first transistor is connected to the source of the second transistor is connected to the first power supply. The common terminal where the drain of the first transistor is connected to the drain of the third transistor serves as the first output terminal of the input differential transistor assembly. The common terminal where the gate of the first transistor is connected to the gate of the third transistor serves as the first control terminal of the input differential transistor assembly. The common terminal where the drain of the second transistor is connected to the drain of the fourth transistor serves as the second output terminal of the input differential transistor assembly. The common terminal where the gate of the second transistor is connected to the gate of the fourth transistor serves as the second control terminal of the first pseudo-differential input transistor assembly. The common terminal where the source of the third transistor is connected to the source of the fourth transistor is grounded.

3. The transconductance amplifier according to claim 1, wherein The first load component includes a first resistor, a second resistor, and a first capacitor; The first end of the first resistor serves as the first end of the first load component. The second end of the first resistor is respectively connected to the first end of the second resistor and the first end of the first capacitor. The second end of the second resistor serves as the second end of the first load component. The second end of the first capacitor serves as the third end of the first load component.

4. The transconductance amplifier according to claim 1, wherein The first pseudo-differential input transistor assembly includes a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor; The common terminal where the source of the fifth transistor is connected to the source of the sixth transistor is connected to the first power supply. The drain of the fifth transistor serves as the first end of the first pseudo-differential input transistor assembly. The common terminal where the gate of the fifth transistor is connected to the gate of the seventh transistor serves as the first control terminal of the first pseudo-differential input transistor assembly. The drain of the sixth transistor serves as the second end of the first pseudo-differential input transistor assembly. The common terminal where the gate of the sixth transistor is connected to the gate of the eighth transistor serves as the second control terminal of the first pseudo-differential input transistor assembly. The drain of the seventh transistor serves as the third end of the first pseudo-differential input transistor assembly. The drain of the eighth transistor serves as the fourth end of the first pseudo-differential input transistor assembly. The common terminal where the source of the seventh transistor is connected to the source of the eighth transistor is grounded.

5. The transconductance amplifier according to claim 1, wherein The cascode transistor assembly includes a ninth transistor, a tenth transistor, an eleventh transistor, and a twelfth transistor; The source of the ninth transistor serves as the first end of the cascode transistor assembly. The common terminal where the drain of the ninth transistor is connected to the drain of the eleventh transistor serves as the first output terminal of the cascode transistor assembly. The gate of the ninth transistor is connected to the gate of the tenth transistor. The source of the tenth transistor serves as the second end of the cascode transistor assembly. The common terminal where the drain of the tenth transistor is connected to the drain of the twelfth transistor serves as the second output terminal of the cascode transistor assembly. The source of the eleventh transistor serves as the third end of the cascode transistor assembly. The gate of the eleventh transistor is connected to the gate of the twelfth transistor. The source of the twelfth transistor serves as the fourth end of the cascode transistor assembly.

6. The transconductance amplifier according to claim 1, characterized in that The second pseudo-differential input transistor assembly includes a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, and a sixteenth transistor; The common terminal where the source of the thirteenth transistor is connected to the source of the fourteenth transistor is connected to the first power supply. The common terminal where the drain of the thirteenth transistor is connected to the drain of the fifteenth transistor serves as the first output terminal of the second pseudo-differential input transistor assembly. The common terminal where the gate of the thirteenth transistor is connected to the gate of the fifteenth transistor serves as the first control terminal of the second pseudo-differential input transistor assembly. The common terminal where the drain of the fourteenth transistor is connected to the drain of the sixteenth transistor serves as the second output terminal of the second pseudo-differential input transistor assembly. The common terminal where the gate of the fourteenth transistor is connected to the gate of the sixteenth transistor serves as the second control terminal of the second pseudo-differential input transistor assembly. The common terminal where the source of the fifteenth transistor is connected to the source of the sixteenth transistor is grounded.

7. The transconductance amplifier according to claim 1, wherein The first Miller compensation assembly includes a second capacitor and a third resistor. The second Miller compensation assembly includes a third capacitor and a fourth resistor. The second load assembly is a fourth capacitor. The third load assembly is a fifth capacitor; The first end of the second capacitor serves as the first end of the first Miller compensation assembly. The second end of the second capacitor is connected to the first end of the third resistor. The second end of the third resistor serves as the second end of the first Miller compensation assembly. The first end of the fourth capacitor serves as the first end of the second load assembly. The second end of the fourth capacitor serves as the second end of the second load assembly; The first end of the third capacitor serves as the first end of the second Miller compensation assembly. The second end of the third capacitor is connected to the first end of the fourth resistor. The second end of the fourth resistor serves as the second end of the second Miller compensation assembly. The first end of the fifth capacitor serves as the first end of the third load assembly. The second end of the fifth capacitor serves as the second end of the third load assembly.

8. The transconductance amplifier according to any one of claims 1 to 7, characterized in that, The transconductance amplifier is reset using a switching circuit. The operating timing of the transconductance amplifier is as follows: During the amplification phase, the switching circuit is in the off state to enable the transconductance amplifier to enter the amplification state; during the reset phase, the switching circuit is in the on state to enable the transconductance amplifier to enter the reset state.

9. A signal processing circuit, characterized in that, Comprising the transconductance amplifier according to any one of claims 1 to 8.

10. A communication device, characterized in that, Comprising the signal processing circuit according to claim 9.

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