Multi-waveform magnetic field generating device for magnetic hyperthermia

Abstract

The invention provides a multi-waveform magnetic field generating device for magnetic hyperthermia. The multi-waveform magnetic field generating device comprises a power supply module, a BUCK voltage regulating circuit, a multi-waveform signal generating circuit, a power amplifying circuit, a series resonance inverter circuit, an induction coil, a water cooling module, a temperature acquisition module, a DSP microprocessor and a TFT display screen. The power supply module is combined with BUCK to supply power to the device; the multi-waveform signal generation circuit, the power amplification circuit and the series resonance inverter circuit are used for generating an alternating magnetic field to act on a magnetic medium to generate a heat effect and realize magnetic hyperthermia; the water cooling module is used for reducing the temperature of the induction coil; the temperature acquisition module acquires temperature data of a treatment area and performs output control on the Buck voltage regulation circuit by using the DSP microprocessor so as to regulate the output power of the power amplification circuit powered by the BUCK voltage regulation circuit and realize intelligent temperature control of the magnetofluid; the problems that in the prior art, a magnetic field generation device is single in induction waveform and poor in heat generation effect are solved.

Description

Technical Field

[0001] The present invention relates to the technical field of induction heating, and particularly relates to a multi-waveform magnetic field generating device for magnetic hyperthermia. Background Art

[0002] Most traditional magnetic field generating devices rely on a single electromagnetic structure design and can often only generate magnetic field waveforms of a fixed form, which limits their flexibility in scientific research and industrial applications. With the continuous in-depth research, the application of pulsed magnetic fields is no longer limited to sine waveforms, and higher requirements are put forward for the flexibility and diversity of magnetic field waveforms.

[0003] In order to more comprehensively explore the influence of different waveforms on magnetic field effects, this research is not only of great significance for promoting the development of related fields, but also in practical applications, the influence of different waveforms on the heat generation effect is also different, which further highlights the urgency of developing a multi-waveform magnetic field device. Therefore, we adopt a digital magnetic field generating device controlled by DSP, which significantly improves the flexibility of waveform adjustment, realizes rapid waveform switching and dynamic superposition of multi-band magnetic fields, provides a more flexible and changeable experimental environment for magnetic field experiments, and meets different research needs. Summary of the Invention

[0004] The object of the present invention is to provide a multi-waveform magnetic field generating device for magnetic hyperthermia, which can solve the problems of low frequency, single waveform and insufficient heating effect of existing magnetic field generating devices. At the same time, a closed-loop feedback control is innovatively introduced, and the output power is dynamically adjusted by a fuzzy control algorithm to understand the instant temperature rise situation, so as to more effectively achieve the heating target and improve the heating efficiency.

[0005] To achieve the above object, the technical solution of the present invention is: a multi-waveform magnetic field generating device for magnetic hyperthermia, the device includes: a power supply module, a BUCK voltage regulating circuit, a multi-waveform signal generating circuit, a power amplification circuit, a series resonance inverter circuit, an induction coil, a water cooling module, a temperature acquisition module, a DSP microprocessor and a TFT display screen;

[0006] The power supply module combines with the BUCK voltage regulating circuit to achieve wide-range voltage adaptive output and supply power to the device;

[0007] The multi-waveform signal generating circuit is used to generate different waveform signals and then amplify them through the power amplification circuit; the amplified signal is converted into a high-frequency AC signal through the series resonance inverter circuit, and the induction coil converts the high-frequency AC signal into an alternating magnetic field to act on the magnetic medium to generate a thermal effect and realize magnetic hyperthermia;

[0008] The water cooling module is used to reduce the temperature of the induction coil;

[0009] The temperature acquisition module acquires the temperature data of the treatment area and inputs it into the DSP microprocessor. The DSP microprocessor uses a fuzzy control algorithm based on the input temperature data to output PWM waves with different duty cycles for controlling the output of the Buck voltage regulation circuit, so as to adjust the output power of the power amplifier circuit powered by the BUCK voltage regulation circuit and achieve intelligent temperature control of the magnetic fluid;

[0010] The TFT display screen is connected to the DSP microprocessor for human-computer interaction.

[0011] Preferably, the power supply module includes a ±12V DC linear power supply and a 48V 20A switching power supply; the ±12V DC linear power supply powers the water cooling module; the ±12V DC linear power supply is transformed into a 3.3V power supply to power the temperature acquisition module, the DSP microprocessor and the TFT display screen; the 48V 20A switching power supply powers the multi-waveform signal generation circuit, the power amplifier circuit and the series resonance inverter circuit after passing through the BUCK voltage regulation circuit.

[0012] Preferably, the different waveform signals generated by the multi-waveform signal generation circuit include triangular waves, square waves and sine waves.

[0013] Preferably, the induction coil is a hollow pure copper coil; the water cooling module includes a small water pump for circulating cold water into the hollow pure copper coil to reduce the temperature during induction heating and achieve stable operation of the system.

[0014] Preferably, the model of the DSP microprocessor is DSP28335.

[0015] Preferably, the temperature acquisition module includes a temperature sensor, and the model of the temperature sensor is the waterproof DS18B20.

[0016] Preferably, the BUCK voltage regulation circuit uses the IR2109 drive chip to drive the switch tube IRF3205, and outputs the adjustable voltage required from 0 to 48V by changing the conduction time of the switch tube:

[0017] V o =V i ×D×η

[0018] Where, Vo is the output voltage of the BUCK voltage regulation circuit; Vi is the input voltage of the BUCK voltage regulation circuit; D is the duty cycle of the PWM control wave; η is the efficiency factor.

[0019] Preferably, the multi-waveform signal generation circuit includes an anti-reverse connection circuit, a power supply circuit, an ICL8038 core circuit, and a post-stage amplification circuit; the input power supply of the multi-waveform signal generation circuit is input to the power supply circuit through the anti-reverse connection circuit. The power supply circuit generates stable ±12V voltages to supply power to the ICL8038 core circuit and the post-stage amplification circuit. After different waveform signals are generated by the ICL8038 core circuit, the selected waveform signals are amplified by the post-stage amplification circuit and used as the output of the multi-waveform signal generation circuit.

[0020] Preferably, the anti-reverse connection circuit includes MOS transistor Q1, resistors R1, R2, R3, light-emitting diode D5, and capacitors C3, C6;

[0021] Among them, the drain of Q1 is connected to the input voltage of the multi-waveform signal generation circuit. The gate of Q1 is connected to the first ends of R1 and R3. The source of Q1 is connected to the second end of R1, the first end of R2, the first end of C3, and the first end of C6. The second end of R2 is connected to the anode of D5. The second ends of R3, the cathode of D5, the second end of C3, and the second end of C6 are all grounded; the first end of C6 in the anti-reverse connection circuit is used as the input Vin of the power supply circuit;

[0022] The power supply circuit includes diodes D1, D2, D3, D4, D6, capacitors C1, C2, C4, C5, C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, resistors R4, R5, inductor L1, and chips U1, U2, U3; D1 and D2 use BAT54S, D3 uses 1N5819, D4 uses ZMM15V, chip U1 uses 78L12, chip U2 uses 79L12, and chip U3 uses TPS61040;

[0023] Among them, the VIN terminal of U3 is connected to the first end of C6, the first end of L1, the EN terminal of U3, and the first end of C13. The SW terminal of U3 is connected to the second end of L1, the anode of D6, the first end of C2, and the first end of C4. The FB terminal of U3 is connected to the first ends of R4, R5, and C18. The cathode of D6 is connected to the second end of R4, the second end of C18, the first end of C11, the first end of C12, the pin 1 of D2, and the first end of C5. The second end of C2 is connected to the pin 3 of D1. The pin 1 of D1 is connected to the first end of C1 and the anode of D3. The cathode of D3 is the negative power supply VSS_16V terminal. The second end of C4 is connected to the pin 3 of D2. The pin 2 of D2 is connected to the second end of C5 and the cathode of D4. The anode of D4 is the positive power supply VCC_16V terminal; the GND terminal of U3, the second end of C13, the second end of R5, the second end of C11, the second end of C12, the pin 2 of D1, and the second end of C1 are all grounded;

[0024] The Vin terminal of U1 is connected to the positive power supply VCC_16V terminal, the first terminal of C7, and the first terminal of C8. The +Vo terminal of U1 is the positive power supply VCC_12V terminal and is connected to the first terminal of C9 and the first terminal of C10. The GND terminal of U1, the second terminal of C7, the second terminal of C8, the second terminal of C9, and the second terminal of C10 are grounded;

[0025] The IN terminal of U2 is connected to the negative power supply VSS_16V terminal, the first terminal of C14, and the first terminal of C15. The OUT terminal of U2 is the negative power supply VSS_12V terminal and is connected to the first terminal of C16 and the first terminal of C17. The GND terminal of U2, the second terminal of C14, the second terminal of C15, the second terminal of C16, and the second terminal of C17 are grounded;

[0026] The ICL8038 core circuit includes the chip U4, resistors R8, R9, R11, R12, R13, R14, R15, R16, potentiometers RW1, RW2, RW3, RW5, capacitors C20, C21, C22, C23, C24, C25, C26, C27, C28, C29, C30, C31, C32, C33, and the multi-channel DIP switches S1, S2; the chip U4 uses ICL8038N;

[0027] Among them, pin 1 of U4 is connected to the active end of RW1. The first fixed end of RW1 is connected to the positive power supply VCC_12V, the second fixed end of RW1 is connected to the first end of R8, the second end of R8 is connected to the negative power supply VSS_12V terminal. Pin 9 of U4 is connected to the first end of C33 and the first end of R14. The second end of R14 is connected to the positive power supply VCC_12V. The second end of C33, pin 2 and pin 3 of U4 are connected to the input end of S2 to perform waveform switching through S2. Pin 4 of U4 is connected to the first end of R11, pin 5 of U4 is connected to the first end of R13. The second ends of R11 and R13 are respectively connected to the two fixed ends of RW3. The active end of RW3 is connected to the positive power supply VCC_12V. Pin 6 of U4 is connected to the first end of R15. The second end of R15 is connected to the first end of C27 and the positive power supply VCC_12V. Pin 8 of U4 is connected to the active end of RW5. The first fixed end of RW5 is connected to the positive power supply VCC_12V and the first end of C28. The second fixed end of RW5 is connected to the first end of R16. Pin 10 of U4 is connected to the output end of S1. The input end of S1 is respectively connected to the first ends of capacitors C20, C21, C22, C23, C24, C26 with different sizes. The second ends of C20, C21, C22, C23, C24, C26 are all connected to the negative power supply VSS_12V to perform switching of different capacitors through S1. Pin 11 of U4 is connected to the first end of R12. The second end of R12 is connected to the first end of C25 and the negative power supply VSS_12V. Pin 12 of U4 is connected to the active end of RW2. The first fixed end of RW2 is connected to the negative power supply VSS_12V. The second fixed end of RW2 is connected to the first end of R9. The second end of R9 is connected to the positive power supply VCC_12V. The positive power supply VCC_12V is connected to the first ends of C29 and C30. The negative power supply VSS_12V is connected to the first ends of C31 and C32. The second end of C25, the second end of C27, the second end of R16, the second end of C28, the second end of C29, the second end of C30 are grounded. The second end of C31 and the second end of C32 are all grounded;

[0028] The post-stage amplifier circuit includes a potentiometer RW6, resistors R17, R18, R19, R20, R21, R22, R23, an operational amplifier TL082 and an interface S3;

[0029] Among them, the first fixed end of RW6 is connected to the output end of S2, the movable end of RW6 is connected to the first end of R17, the second end of R17 is connected to pin 5 of TL082, pin 4 of TL082 is connected to the negative power supply VSS_12V, pin 8 of TL082 is connected to the positive power supply VCC_12V, pin 6 of TL082 is connected to the first ends of R20 and R21, the second end of R21 is connected to pin 7 of TL082 and the first end of R18, the second end of R18 is connected to pin 3 of TL082, pin 2 of TL082 is connected to the first ends of R22 and R23, the second end of R23 is connected to pin 1 of TL082 and the first end of R19, the second end of R19 is connected to interface S3 as the output end of the multi-waveform signal generation circuit, and the second fixed end of RW6, the second end of R20 and the second end of R22 are all grounded.

[0030] Preferably, the DSP microprocessor outputs PWM waves with different duty cycles according to the input temperature data by using the PID fuzzy control algorithm; specifically, it includes the following steps:

[0031] S1. Calculate the temperature deviation and the temperature change rate as the input variables of the PID fuzzy control, and define the output variable as the parameter of the PID controller; among them, the temperature deviation is the difference between the actual temperature and the target temperature, the target temperature is 42–46 °C, and the temperature change rate is the change rate of the temperature deviation over time;

[0032] S2. Convert the temperature deviation and the temperature change rate into membership degrees in the fuzzy set through the triangular membership function to realize the fuzzification of the input variables;

[0033] S3. Perform fuzzy inference based on the fuzzified temperature deviation and temperature change rate and the fuzzy rule base to determine the fuzzy set of the control action, defuzzify, obtain the parameters of the PID controller and calculate the control quantity, map the control quantity to the PWM wave duty cycle range and output it to realize the adjustment of the PWM wave duty cycle.

[0034] Compared with the prior art, the present invention has the following beneficial effects:

[0035] The present invention makes up for the deficiencies of the current magnetic field generation device for induction heating, such as low frequency and single waveform; and this device uniquely adopts the temperature feedback control technology, which can dynamically adjust the output power in real time according to the heating effect to ensure better heating effect and higher heating efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 It is the structural block diagram of the embodiment of the present invention;

[0037] Figure 2 It is the BUCK voltage regulating circuit diagram of the embodiment of the present invention;

[0038] Figure 3Anti-reverse connection circuit diagram of the multi-waveform signal generation circuit according to an embodiment of the present invention;

[0039] Figure 4 Power supply circuit diagram of the multi-waveform signal generation circuit according to an embodiment of the present invention;

[0040] Figure 5 ICL8038 core circuit and post-stage amplification circuit diagram of the multi-waveform signal generation circuit according to an embodiment of the present invention;

[0041] Figure 6 Schematic diagram of the power amplification circuit according to an embodiment of the present invention;

[0042] Figure 7 Measured result waveform diagram according to an embodiment of the present invention. Detailed implementation manners

[0043] Next, in combination with the attached Figures 1-7 , the technical solution of the present invention will be specifically described.

[0044] The present invention proposes a multi-waveform magnetic field generation device for magnetic hyperthermia. Referring to Figure 1 , the device includes: a power supply module, a BUCK voltage regulation circuit, a multi-waveform signal generation circuit, a power amplification circuit, a series resonance inverter circuit, an induction coil, a water cooling module, a temperature acquisition module, a DSP microprocessor, and a TFT display screen;

[0045] The power supply module combines with the BUCK voltage regulation circuit to achieve wide-range voltage adaptive output and supply power to the device;

[0046] The multi-waveform signal generation circuit is used to generate different waveform signals and then amplify them through the power amplification circuit; the amplified signal is converted into a high-frequency AC signal through the series resonance inverter circuit, and the induction coil converts the high-frequency AC signal into an alternating magnetic field to act on the magnetic medium to generate a thermal effect and achieve magnetic hyperthermia;

[0047] The water cooling module is used to reduce the temperature of the induction coil;

[0048] The temperature acquisition module acquires the temperature data of the treatment area and inputs it into the DSP microprocessor. The DSP microprocessor outputs PWM waves with different duty cycles according to the input temperature data using a fuzzy control algorithm to control the output of the Buck voltage regulation circuit, so as to adjust the output power of the power amplification circuit powered by the BUCK voltage regulation circuit and achieve intelligent temperature control of the magnetic fluid;

[0049] The TFT display screen is connected to the DSP microprocessor for human-computer interaction. Through the 2.8-inch TFT display module, the working frequency, working waveform, temperature, etc. of the system are displayed in real time.

[0050] In this embodiment, the power supply module includes a ±12V DC linear power supply and a 48V 20A switching power supply; the ±12V DC linear power supply powers the water cooling module; the ±12V DC linear power supply is transformed into a 3.3V power supply to power the temperature acquisition module, the DSP microprocessor, and the TFT display screen; the 48V 20A switching power supply powers the multi-waveform signal generation circuit, the power amplification circuit, and the series resonance inverter circuit after passing through a BUCK voltage regulation circuit.

[0051] In this embodiment, the different waveform signals generated by the multi-waveform signal generation circuit include triangular waves, square waves, and sine waves.

[0052] In this embodiment, the induction coil is a hollow pure copper coil; the water cooling module includes a small water pump for circulating cold water into the hollow pure copper coil to reduce the temperature during induction heating and achieve stable operation of the system.

[0053] In this embodiment, the model of the DSP microprocessor is DSP28335. The DSP28335 chip is equipped with a 32-bit floating-point processing unit (FPU) with a main frequency of up to 150MHz. Compared with traditional fixed-point DSPs (such as TMS320F2812 and STM32F103), its floating-point operation performance is improved by more than 50%. It is especially suitable for the rapid implementation of complex algorithms (such as FFT and PID control). There is no need to manually process decimal operations, which significantly simplifies code development. In addition, its single instruction cycle is 6.67ns, which can meet the requirements of high real-time control.

[0054] In this embodiment, the temperature acquisition module includes a temperature sensor, and the model of the temperature sensor is the waterproof DS18B20. The temperature sensor is connected to the external I / O port of the DSP to obtain the dynamic of the instant heating-up condition using a fuzzy control algorithm, adjust the duty cycle of different PWM waves output, control the Buck voltage regulation circuit, and thus achieve closed-loop control of the output power.

[0055] In this embodiment, refer to Figure 2The BUCK voltage regulator circuit diagram mainly includes an input filter circuit, a PWM drive circuit, and a buck circuit; the BUCK voltage regulator circuit uses an IR2109 drive chip to drive the switching transistor IRF3205. When a high-level signal is input to the IN pin of the IR2109 drive chip, the IR2109 starts to work and outputs a low-level signal; PWM signals are output through the HO and LO pins to control the on-time and off-time of the switching transistor. When a high-level signal is input to IN, the HO pin of the IR2109 outputs a PWM signal to turn on the switching transistor; when a low-level signal is input to IN, the LO pin of the IR2109 outputs a PWM signal to turn off the switching transistor. By changing the on-time of the switching transistor, an adjustable voltage required from 0 to 48V can be output; considering the conduction loss of the switching transistor and the equivalent resistance of components such as inductors and capacitors, an efficiency factor η also needs to be introduced to obtain the following modified relational expression:

[0056] V o = V i × D × η

[0057] Among them, Vo is the output voltage of the BUCK voltage regulator circuit; Vi is the input voltage of the BUCK voltage regulator circuit; D is the duty cycle of the PWM control wave; η is the efficiency factor, usually between 0.8 and 0.95.

[0058] Among them, the function of inductor L1 is to store electrical energy, so that the current changes smoothly during the switching process. When selecting an inductor, the minimum value of the inductor can be calculated according to the output current of the circuit:

[0059] L min = (V o × (1 - D) × T on ) / ΔI

[0060] Among them, T on is the switching time, and ΔI is the inductor current fluctuation range; generally, ΔI can be selected to be about 5% - 20% of the output current.

[0061] The functions of capacitors C1, C7, and C8 are to smooth the output voltage and reduce the ripple of the output voltage. When selecting a capacitor, the minimum value of the capacitor can be calculated according to the load current and the output voltage ripple coefficient:

[0062] C min = I out × (ΔV / V out ) × (1 - D) × T / ΔV

[0063] Among them, I out is the load current, ΔV is the output voltage ripple amplitude, and T is the switching period.

[0064] The BUCK voltage regulator circuit operates in the CCM mode (Continuous Conduction Mode). When the power switch transistor is closed (T on ), the current in the inductor rises at a certain rate; when the power switch transistor is open (T off ), the current in the inductor drops at a certain rate; the current remains in the conducting state throughout the switching cycle, satisfying the volt-second balance principle, ensuring that the inductor will not saturate. Specifically, the voltage integral of the inductor when the switch is on should be equal to the voltage integral when the switch is off, that is:

[0065] V in *T on =(V out -V in )*T off .

[0066] In this embodiment, referring to Figures 3-5 , the multi-waveform signal generation circuit includes an anti-reverse connection circuit, a power supply circuit, an ICL8038 core circuit, and a post-stage amplification circuit; the input power supply of the multi-waveform signal generation circuit is input to the power supply circuit through the anti-reverse connection circuit, and a stable ±12V voltage is generated by the power supply circuit to supply power to the ICL8038 core circuit and the post-stage amplification circuit. After different waveform signals are generated by the ICL8038 core circuit, the selected waveform signals are amplified by the post-stage amplification circuit and used as the output of the multi-waveform signal generation circuit.

[0067] In this embodiment, the anti-reverse connection circuit includes MOS transistor Q1, resistors R1, R2, R3, light-emitting diode D5, and capacitors C3, C6; MOS transistor Q1 uses AO3401A; light-emitting diode D5 uses a red light-emitting diode LED-R;

[0068] Among them, the drain of Q1 is connected to the input voltage of the multi-waveform signal generation circuit, the gate of Q1 is connected to the first ends of R1 and R3, the source of Q1 is connected to the second end of R1, the first end of R2, the first end of C3, and the first end of C6. The second end of R2 is connected to the anode of D5, and the second ends of R3, the cathode of D5, the second end of C3, and the second end of C6 are all grounded; the first end of C6 of the anti-reverse connection circuit is used as the input Vin of the power supply circuit;

[0069] The power supply circuit includes diodes D1, D2, D3, D4, D6, capacitors C1, C2, C4, C5, C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, resistors R4, R5, inductor L1, and chips U1, U2, U3; D1 and D2 use BAT54S, D3 uses 1N5819, D4 uses ZMM15V, chip U1 uses 78L12, chip U2 uses 79L12, chip U3 uses TPS61040; D6 uses MBR0520;

[0070] Among them, the VIN terminal of U3 is connected to the first terminal of C6, the first terminal of L1, the EN terminal of U3, and the first terminal of C13. The SW terminal of U3 is connected to the second terminal of L1, the anode of D6, the first terminal of C2, and the first terminal of C4. The FB terminal of U3 is connected to the first terminal of R4, the first terminal of R5, and the first terminal of C18. The cathode of D6 is connected to the second terminal of R4, the second terminal of C18, the first terminal of C11, the first terminal of C12, pin 1 of D2, and the first terminal of C5. The second terminal of C2 is connected to pin 3 of D1. Pin 1 of D1 is connected to the first terminal of C1 and the anode of D3. The cathode of D3 is the negative power supply VSS_16V terminal. The second terminal of C4 is connected to pin 3 of D2. Pin 2 of D2 is connected to the second terminal of C5 and the cathode of D4. The anode of D4 is the positive power supply VCC_16V terminal; the GND terminal of U3, the second terminal of C13, the second terminal of R5, the second terminal of C11, the second terminal of C12, pin 2 of D1, and the second terminal of C1 are all grounded;

[0071] The Vin terminal of U1 is connected to the positive power supply VCC_16V terminal, the first terminal of C7, and the first terminal of C8. The +Vo terminal of U1 is the positive power supply VCC_12V terminal and is connected to the first terminal of C9 and the first terminal of C10. The GND terminal of U1, the second terminal of C7, the second terminal of C8, the second terminal of C9, and the second terminal of C10 are grounded;

[0072] The IN terminal of U2 is connected to the negative power supply VSS_16V terminal, the first terminal of C14, and the first terminal of C15. The OUT terminal of U2 is the negative power supply VSS_12V terminal and is connected to the first terminal of C16 and the first terminal of C17. The GND terminal of U2, the second terminal of C14, the second terminal of C15, the second terminal of C16, and the second terminal of C17 are grounded;

[0073] The ICL8038 core circuit includes chip U4, resistors R8, R9, R11, R12, R13, R14, R15, R16, potentiometers RW1, RW2, RW3, RW5, capacitors C20, C21, C22, C23, C24, C25, C26, C27, C28, C29, C30, C31, C32, C33, and multiple DIP switches S1, S2; Chip U4 uses ICL8038N;

[0074] Among them, pin 1 of U4 is connected to the active end of RW1. The first fixed end of RW1 is connected to the positive power supply VCC_12V, the second fixed end of RW1 is connected to the first end of R8, the second end of R8 is connected to the negative power supply VSS_12V end. Pin 9 of U4 is connected to the first end of C33 and the first end of R14. The second end of R14 is connected to the positive power supply VCC_12V. The second end of C33, pin 2 and pin 3 of U4 are connected to the input end of S2 to perform waveform switching through S2. Pin 4 of U4 is connected to the first end of R11, pin 5 of U4 is connected to the first end of R13. The second ends of R11 and R13 are respectively connected to the two fixed ends of RW3. The active end of RW3 is connected to the positive power supply VCC_12V. Pin 6 of U4 is connected to the first end of R15. The second end of R15 is connected to the first end of C27 and the positive power supply VCC_12V. Pin 8 of U4 is connected to the active end of RW5. The first fixed end of RW5 is connected to the positive power supply VCC_12V and the first end of C28. The second fixed end of RW5 is connected to the first end of R16. Pin 10 of U4 is connected to the output end of S1. The input end of S1 is respectively connected to the first ends of capacitors C20, C21, C22, C23, C24, C26 with different sizes. The second ends of C20, C21, C22, C23, C24, C26 are all connected to the negative power supply VSS_12V to perform switching of different capacitors through S1. Pin 11 of U4 is connected to the first end of R12. The second end of R12 is connected to the first end of C25 and the negative power supply VSS_12V. Pin 12 of U4 is connected to the active end of RW2. The first fixed end of RW2 is connected to the negative power supply VSS_12V. The second fixed end of RW2 is connected to the first end of R9. The second end of R9 is connected to the positive power supply VCC_12V. The positive power supply VCC_12V is connected to the first ends of C29 and C30. The negative power supply VSS_12V is connected to the first ends of C31 and C32. The second ends of C25, C27, R16, C28, C29, C30 are grounded. The second ends of C31 and C32 are all grounded.

[0075] The ICL8038 core circuit can change the charge and discharge time constant through a potentiometer and an external capacitor, adjust the slopes of the rising edge and the falling edge, and thus change the output of different waveforms. If the forward and reverse of the rise and the forward and reverse of the fall are both symmetric, that is, an asymmetric triangular wave, that is, a sawtooth wave, control the reverse of the trigger output, output positive and negative voltages through a voltage comparator, and thus generate a square wave. By changing the duty cycle, the square wave can become a pulse wave. Using a sine converter, convert the triangular wave into a sine wave.

[0076] The post-stage amplifier circuit includes a potentiometer RW6, resistors R17, R18, R19, R20, R21, R22, R23, an operational amplifier TL082, and an interface S3.

[0077] Among them, the first fixed end of RW6 is connected to the output end of S2, the movable end of RW6 is connected to the first end of R17, the second end of R17 is connected to pin 5 of TL082, pin 4 of TL082 is connected to the negative power supply VSS_12V, pin 8 of TL082 is connected to the positive power supply VCC_12V, pin 6 of TL082 is connected to the first ends of R20 and R21, the second end of R21 is connected to pin 7 of TL082 and the first end of R18, the second end of R18 is connected to pin 3 of TL082, pin 2 of TL082 is connected to the first ends of R22 and R23, the second end of R23 is connected to pin 1 of TL082 and the first end of R19, the second end of R19 is connected to interface S3 as the output end of the multi-waveform signal generation circuit, and the second fixed end of RW6, the second end of R20 and the second end of R22 are all grounded.

[0078] The internal constant current source of the multi-waveform signal generation circuit chip charges and discharges the external capacitor, thereby forming an oscillation circuit and generating a triangular wave signal. The voltage comparator changes its state according to the change of the capacitor voltage, and then triggers the flip of the flip-flop. The change of the working state of the flip-flop determines the type of the output waveform (such as sine wave, triangular wave or rectangular wave). The sine converter is used to convert the triangular wave signal into a sine wave signal.

[0079] A plurality of potentiometers are installed in the circuit, and their functions are to adjust the peak and valley distortion of the sine wave, the output signal frequency, and the duty cycle of the output square wave respectively.

[0080] If a single capacitor is used, the frequency adjustment range will be too small, so a DIP switch form is adopted, and six external capacitors with different capacitance values are used for frequency range matching. The overall signal frequency coverage range is from 0.01 Hz to 350 kHz.

[0081] In this embodiment, the DSP microprocessor outputs PWM waves with different duty cycles according to the input temperature data by using the PID fuzzy control algorithm; specifically, it includes the following steps:

[0082] S1. Calculate the temperature deviation and the temperature change rate as the input variables of the PID fuzzy control, and define the output variables as the parameters of the PID controller (proportional P, integral I, differential D); among them, the temperature deviation is the difference between the actual temperature and the target temperature, the target temperature is 42 - 46 °C, and the temperature change rate is the change rate of the temperature deviation with time;

[0083] S2. Convert the temperature deviation and the temperature change rate into membership degrees in the fuzzy set through the triangular membership function to realize the fuzzification of the input variables;

[0084] S3. Perform fuzzy inference based on the fuzzified temperature deviation, temperature change rate, and fuzzy rule base to determine the fuzzy set of control actions, defuzzify, obtain the parameters of the PID controller, calculate the control quantity, map the control quantity to the PWM wave duty cycle range, and output it to achieve the adjustment of the PWM wave duty cycle.

[0085] The following lists the fuzzy instructions. Here, E represents the temperature deviation, EC represents the temperature change rate, and NB, NM, NS, ZE, PS, PM, PB are fuzzy subsets, representing Negative Big, Negative Medium, Negative Small, Zero, Positive Small, Positive Medium, and Positive Big respectively;

[0086] 1. If (E is NB) and (EC is NB) then (P is PB)(I is NB)(D is PS)(1)

[0087] 2. If (E is NB) and (EC is NM) then (P is PB)(I is NB)(D is NS)(1)

[0088] 3. If (E is NB) and (EC is NS) then (P is PM)(I is NM)(D is NB)(1)

[0089] 4. If (E is NB) and (Ec is ZE) then (P is PM)(I is NM)(D is NB)(1)

[0090] 5. If (E is NB) and (EC is PS) then (P is Ps)(I is NS)(D is NB)(1)

[0091] 6. If (E is NB) and (EC is PM) then (P is ZE)(I is ZE)(D is NM)(1)

[0092] 7. If (E is NB) and (EC is PB) then (P is ZE)(I is ZE)(D is PS)(1)

[0093] 8. If (E is NM) and (EC is NB) then (P is PB)(I is NB)(D is PS)(1)

[0094] 9. If (E is NM) and (Ec is NM) then (P is PB)(I is NB)(D is NS)(1)

[0095] 10. If (E is NM) and (Ec is NS), then (P is PM) (is NM) (D is NB) (1)

[0096] 11. If (E is NM) and (EC is ZE), then (P is Ps) (is NS) (D is NM) (1)

[0097] 12. If (E is NM) and (EC is PS), then (P is PS) (l is NSyD is NM) (1)

[0098] 13. If (E is NM) and (EC is PM), then (P is 2E) (is 2E) (D is NS) (1)

[0099] 14. If (E is NM) and (EC is PB), then (P is NS) (I is ZE) (D is ZE) (1)

[0100] 15. If (E is NS) and (EC is NB), then (P is PM) (I is NB) (D is ZE) (1)

[0101] 16. If (E is NS) and (EC is NM), then (P is PM) (I is NM) (D is NS) (1)

[0102] 17. If (E is NS) and (EC is NS), then (P is PM) (I is NS) (D is NM) (1)

[0103] 18. If (E is NS) and (EC is ZE), then (P is PS) (I is NS) (D is NM) (1)

[0104] 19. If (E is NS) and (EC is PS), then (P is ZE) (I is ZE) (D is NS) (1)

[0105] 20. If (E is NS) and (EC is PM), then (P is NS) (I is PS) (D is NS) (1)

[0106] 21. If (E is NS) and (EC is PB), then (P is NS), (I is PS), (D is ZE) (1)

[0107] 22. If (E is ZE) and (EC is NB), then (P is PM), (I is NM), (D is ZE) (1)

[0108] 23. If (E is ZE) and (EC is NM), then (P is PM), (I is NM), (D is NS) (1)

[0109] 24. If (E is ZE) and (EC is NS), then (P is PS), (I is NS), (D is NS) (1)

[0110] 25. If (E is ZE) and (EC is ZE), then (P is ZE), (I is ZE), (D is NS) (1)

[0111] 26. If (E is ZE) and (EC is PS), then (P is NS), (I is PS), (D is NS) (1)

[0112] 27. If (E is ZE) and (EC is PM), then (P is NM), (I is PM), (D is NS) (1)

[0113] 28. If (E is ZE) and (EC is PB), then (P is NM), (I is PM), (D is ZE) (1)

[0114] 29. If (E is PS) and (EC is NB), then (P is PS), (I is NM), (D is ZE) (1)

[0115] 30. If (E is PS) and (EC is NM), then (P is PS), (I is PS), (D is ZE) (1)

[0116] 31. If (E is PS) and (EC is NS), then (P is ZE), (I is ZE), (D is ZE) (1)

[0117] 32.If(E is PS)and(EC is ZE)then(P is NS)(I is PS)(D is ZE)(1)

[0118] 33.If(E is PS)and(EC is PS)then(P is NS)(I is NS)(D is ZE)(1)

[0119] 34.If(E is PS)and(EC is PM)then(P is NM)(I is PM)(D is ZE)(1)

[0120] 35.If(E is PS)and(EC is PB)then(P is NM)(I is PB)(D is ZE)(1)

[0121] 36.If(E is PM)and(EC is NB)then(P is PS)(I is ZE)(D is PB)(1)

[0122] 37.If(E is PM)and(EC is NM)then(P is ZE)(I is ZE)(D is NS)(1)

[0123] 38.If(E is PM)and(EC is NS)then(P is NS)(I is PS)(D is PS)(1)

[0124] 39.If(E is PM)and(EC is ZE)then(P is NM)(I is PS)(D is PS)(1)

[0125] 40.If(E is PM)and(EC is PS)then(P is NM)(I is PM)(D is PS)(1)

[0126] 41.If(E is PM)and(EC is PM)then(P is NM)(I is PB)(D is PS)(1)

[0127] 42.If(E is PM)and(EC is PB)then(P is NB)(I is PB)(D is PB)(1)

[0128] 43. If (E is PB) and (EC is NB), then (P is ZE), (I is ZE), (D is PB)(1)

[0129] 44. If (E is PB) and (EC is NM), then (P is ZE), (I is ZE), (D is PM)(1)

[0130] 45. If (E is PB) and (EC is NS), then (P is NM), (I is PS), (D is PM)(1)

[0131] 46. If (E is PB) and (EC is ZE), then (P is NM), (I is PM), (D is PM)(1)

[0132] 47. If (E is PB) and (EC is PS), then (P is NM), (I is PM), (D is PS)(1)

[0133] 48. If (E is PB) and (EC is PM), then (P is NB), (I is PB), (D is PS)(1)

[0134] 49. If (E is PB) and (EC is PB), then (P is NB), (I is PB), (D is PB)(1)

[0135] Reference Figure 6 , the power amplifier circuit uses an OPA541 power operational amplifier combined with a two-stage operational amplifier. Its supply voltage can reach ±40V. The internal current limiting circuit of the chip uses a single external resistor to protect the amplifier and the load from faults, and at the same time, two-stage cascaded amplification is adopted to ensure that the output waveform is distortion-free.

[0136] By using an OPA541 power operational amplifier and setting a rectangular opening to install a heat sink, a continuous output current of up to 5A (peak up to 10A) can be provided. The maximum output current can be determined by modifying the value of the non-inductive cement resistor. The module gain is adjustable by a potentiometer, controlled between 5 times and 110 times, and is suitable for power amplification occasions with large voltage and large current requirements.

[0137] The internal current limiting circuit is controlled by a single external resistor R cl Control (i.e., Figure 6R9) in the figure. The output load current flows through this external resistor, and when the voltage across the resistor is approximately the base-emitter voltage, the current limit is activated. The value of the current limiting resistor is calculated by the formula:

[0138] R CL = 0.813 / |I lim |- 0.02

[0139] Due to the temperature coefficient of the base junction voltage, the current limit value decreases as the temperature increases. Therefore, the current limit value will have slight differences at different temperatures. So, proper heat dissipation work should be done when the module is in use. In addition, since the current flowing through R cl (i.e., R9) will be very large, R cl needs to use a resistor with sufficient power. The value of R cl in this circuit is 0.1 Ω. According to the current limiting formula, the current limiting value is calculated to be 6.78 A (peak-to-peak). So, the power of R cl should be at least 4.59 watts. The maximum power of R cl (R9) used in this circuit is 5 watts.

[0140] Reference Figure 7 , from the measured results of the multi-waveform magnetic field generating device according to the embodiment of the present invention, it can be seen that this device can effectively generate multi-waveform alternating magnetic fields of the expected sine wave, triangular wave, and square wave. Due to the frequency selection characteristic of the series resonant inverter circuit itself, the resonant circuit will only resonate at the fundamental wave. The resonant frequency f of the inductor and capacitor is:

[0141]

[0142] According to Faraday's law of electromagnetic induction, an alternating magnetic field with the same frequency as the resonant signal will be generated in the air gap of the magnetic ring.

[0143] In summary, the present invention adopts a composite power supply architecture, combines a power supply module and a BUCK voltage regulating circuit to achieve wide-range voltage adaptive output; adopts a multi-waveform signal generation circuit, uses the dynamic regulation technology of the RC parameters of the programmable chip peripheral circuit, and can generate various pulse signals such as low-distortion sine waves, triangular waves, and rectangular waves with a frequency range between 0.01 Hz and 350 kHz. The output frequency is switched by changing the oscillation capacitance value of the peripheral circuit in combination with a DIP switch, the duty cycle and amplitude of the output waveform are adjusted by changing the resistance value, and the switching between output waveforms is achieved by an output DIP switch; thus, the μs-level switching of basic waveforms such as triangular waves, square waves, and sine waves is realized (the rising / falling edge slope adjustment range is 0.1 - 50 V / μs); a power amplification module is used to amplify the different waveform drive signals generated at the front end; a temperature acquisition module is combined with a fuzzy control algorithm to innovatively design a closed-loop intelligent temperature control system, and the temperature rise state is monitored in real time through a temperature sensor and a PID fuzzy control algorithm, and the duty cycle of the PWM wave is dynamically adjusted; a series resonance inverter circuit is adopted, and the front-end drive signal can generate an alternating magnetic field with the same frequency through an induction coil; a water circulation module is used to cool the induction coil, and the heat is taken away from the heat source through circulating flow so that the system works stably. It can solve the problems of single induction waveform and poor heat generation effect of the magnetic field generation device in the prior art.

[0144] The above are the preferred embodiments of the present invention. All changes made according to the technical solutions of the present invention, when the functions and effects produced do not exceed the scope of the technical solutions of the present invention, shall fall within the protection scope of the present invention.

Claims

1. A multi-waveform magnetic field generating device for magnetic hyperthermia, characterized in that, The device includes: a power supply module, a BUCK voltage regulating circuit, a multi-waveform signal generation circuit, a power amplification circuit, a series resonant inverter circuit, an induction coil, a water cooling module, a temperature acquisition module, a DSP microprocessor, and a TFT display screen; The power supply module combines with the BUCK voltage regulating circuit to achieve wide-range voltage adaptive output and supply power to the device; The multi-waveform signal generation circuit is used to generate different waveform signals, which are amplified by the power amplification circuit; the amplified signals are converted into high-frequency AC signals through the series resonant inverter circuit, and the induction coil converts the high-frequency AC signals into an alternating magnetic field to act on the magnetic medium to generate a thermal effect and achieve magnetic hyperthermia treatment; The water cooling module is used to reduce the temperature of the induction coil; The temperature acquisition module acquires the temperature data of the treatment area and inputs it into the DSP microprocessor. The DSP microprocessor uses a fuzzy control algorithm to output PWM waves with different duty cycles according to the input temperature data, which is used to control the output of the Buck voltage regulating circuit to adjust the output power of the power amplification circuit powered by the BUCK voltage regulating circuit and achieve intelligent temperature control of the magnetic fluid; The TFT display screen is connected to the DSP microprocessor for human-computer interaction.

2. The multi-waveform magnetic field generating device for magnetic hyperthermia according to claim 1, wherein The power supply module includes a ±12V DC linear power supply and a 48V 20A switching power supply; the ±12V DC linear power supply supplies power to the water cooling module; the ±12V DC linear power supply is transformed into a 3.3V power supply to supply power to the temperature acquisition module, the DSP microprocessor, and the TFT display screen; the 48V 20A switching power supply supplies power to the multi-waveform signal generation circuit, the power amplification circuit, and the series resonant inverter circuit after passing through the BUCK voltage regulating circuit.

3. The multi-waveform magnetic field generating device for magnetic hyperthermia according to claim 1, characterized in that The different waveform signals generated by the multi-waveform signal generation circuit include triangular waves, square waves, and sine waves.

4. The multi-waveform magnetic field generating device for magnetic thermotherapy according to claim 1, wherein The induction coil is a hollow pure copper coil; the water cooling module includes a small water pump, which is used to circulate cold water into the hollow pure copper coil to reduce the temperature during induction heating and achieve stable operation of the system.

5. A multi-waveform magnetic field generating device for magnetic hyperthermia according to claim 1, characterized in that, The model of the DSP microprocessor is DSP28335.

6. The multi-waveform magnetic field generating device for magnetic hyperthermia according to claim 1, wherein The temperature acquisition module includes a temperature sensor, and the model of the temperature sensor is the waterproof DS18B20.

7. A multi-waveform magnetic field generating device for magnetic hyperthermia according to claim 1, characterized in that, The BUCK voltage regulating circuit uses an IR2109 driver chip to drive the switching tube IRF3205, and outputs the adjustable voltage required from 0 to 48V by changing the conduction time of the switching tube: V o = V i × D × η Among them, Vo is the output voltage of the BUCK voltage regulating circuit; Vi is the input voltage of the BUCK voltage regulating circuit; D is the duty cycle of the PWM control wave; η is the efficiency factor.

8. A multi-waveform magnetic field generating device for magnetic thermotherapy according to claim 1, characterized in that, The multi-waveform signal generation circuit includes an anti-reverse connection circuit, a power supply circuit, an ICL8038 core circuit, and a post-stage amplification circuit; the input power supply of the multi-waveform signal generation circuit is input into the power supply circuit through the anti-reverse connection circuit. The power supply circuit generates a stable ±12V voltage to supply power to the ICL8038 core circuit and the post-stage amplification circuit. After different waveform signals are generated by the ICL8038 core circuit, the post-stage amplification circuit amplifies the selected waveform signals as the output of the multi-waveform signal generation circuit.

9. A multi-waveform magnetic field generating device for magnetic hyperthermia according to claim 8, characterized in that, The reverse connection prevention circuit includes MOS transistor Q1, resistors R1, R2, R3, light-emitting diode D5, and capacitors C3, C6; Among them, the drain of Q1 is connected to the input voltage of the multi-waveform signal generation circuit, the gate of Q1 is connected to the first ends of R1 and R3, the source of Q1 is connected to the second end of R1, the first end of R2, the first end of C3, and the first end of C6, the second end of R2 is connected to the anode of D5, and the second ends of R3, the cathode of D5, the second end of C3, and the second end of C6 are all grounded; the first end of C6 of the reverse connection prevention circuit is used as the input Vin of the power supply circuit; The power supply circuit includes diodes D1, D2, D3, D4, D6, capacitors C1, C2, C4, C5, C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, resistors R4, R5, inductor L1, and chips U1, U2, U3; D1 and D2 use BAT54S, D3 uses 1N5819, D4 uses ZMM15V, chip U1 uses 78L12, chip U2 uses 79L12, and chip U3 uses TPS61040; Among them, the VIN terminal of U3 is connected to the first end of C6, the first end of L1, the EN terminal of U3, and the first end of C13, the SW terminal of U3 is connected to the second end of L1, the anode of D6, the first end of C2, and the first end of C4, the FB terminal of U3 is connected to the first ends of R4, R5, and C18, the cathode of D6 is connected to the second end of R4, the second end of C18, the first end of C11, the first end of C12, pin 1 of D2, and the first end of C5, the second end of C2 is connected to pin 3 of D1, pin 1 of D1 is connected to the first end of C1 and the anode of D3, the cathode of D3 is the negative power supply VSS_16V terminal, the second end of C4 is connected to pin 3 of D2, pin 2 of D2 is connected to the second end of C5 and the cathode of D4, the anode of D4 is the positive power supply VCC_16V terminal; the GND terminal of U3, the second end of C13, the second end of R5, the second end of C11, the second end of C12, pin 2 of D1, and the second end of C1 are all grounded; The Vin terminal of U1 is connected to the positive power supply VCC_16V terminal, the first end of C7, and the first end of C8, the +Vo terminal of U1 is the positive power supply VCC_12V terminal and is connected to the first ends of C9 and C10, and the GND terminal of U1, the second ends of C7, C8, C9, and C10 are grounded; The IN terminal of U2 is connected to the negative power supply VSS_16V terminal, the first end of C14, and the first end of C15, the OUT terminal of U2 is the negative power supply VSS_12V terminal and is connected to the first ends of C16 and C17, and the GND terminal of U2, the second ends of C14, C15, C16, and C17 are grounded; The ICL8038 core circuit includes chip U4, resistors R8, R9, R11, R12, R13, R14, R15, R16, potentiometers RW1, RW2, RW3, RW5, capacitors C20, C21, C22, C23, C24, C25, C26, C27, C28, C29, C30, C31, C32, C33 and multi-channel DIP switches S1, S2; Chip U4 uses ICL8038N; Among them, pin 1 of U4 is connected to the movable end of RW1, the first fixed end of RW1 is connected to the positive power supply VCC_12V, the second fixed end of RW1 is connected to the first end of R8, the second end of R8 is connected to the negative power supply VSS_12V end, pin 9 of U4 is connected to the first end of C33 and the first end of R14, the second end of R14 is connected to the positive power supply VCC_12V, the second end of C33, pin 2 and pin 3 of U4 are connected to the input end of S2 for waveform switching through S2; Pin 4 of U4 is connected to the first end of R11, pin 5 of U4 is connected to the first end of R13, the second ends of R11 and R13 are respectively connected to the two fixed ends of RW3, the movable end of RW3 is connected to the positive power supply VCC_12V, pin 6 of U4 is connected to the first end of R15, the second end of R15 is connected to the first end of C27 and the positive power supply VCC_12V, pin 8 of U4 is connected to the movable end of RW5, the first fixed end of RW5 is connected to the positive power supply VCC_12V and the first end of C28, the second fixed end of RW5 is connected to the first end of R16, pin 10 of U4 is connected to the output end of S1, the input end of S1 is respectively connected to the first ends of capacitors C20, C21, C22, C23, C24, C26 with different sizes, and the second ends of C20, C21, C22, C23, C24, C26 are all connected to the negative power supply VSS_12V to perform switching of different capacitors through S1, pin 11 of U4 is connected to the first end of R12, the second end of R12 is connected to the first end of C25 and the negative power supply VSS_12V, pin 12 of U4 is connected to the movable end of RW2, the first fixed end of RW2 is connected to the negative power supply VSS_12V, the second fixed end of RW2 is connected to the first end of R9, and the second end of R9 is connected to the positive power supply VCC_12V; The positive power supply VCC_12V is connected to the first ends of C29 and C30, the negative power supply VSS_12V is connected to the first ends of C31 and C32, the second ends of C25, C27, R16, C28, C29, C30, C31, C32 are all grounded; The post-stage amplification circuit includes potentiometer RW6, resistors R17, R18, R19, R20, R21, R22, R23, operational amplifier TL082 and interface S3; Among them, the first fixed end of RW6 is connected to the output end of S2, the movable end of RW6 is connected to the first end of R17, the second end of R17 is connected to pin 5 of TL082, pin 4 of TL082 is connected to the negative power supply VSS_12V, pin 8 of TL082 is connected to the positive power supply VCC_12V, pin 6 of TL082 is connected to the first ends of R20 and R21, the second end of R21 is connected to pin 7 of TL082 and the first end of R18, the second end of R18 is connected to pin 3 of TL082, pin 2 of TL082 is connected to the first ends of R22 and R23, the second end of R23 is connected to pin 1 of TL082 and the first end of R19, the second end of R19 is connected to interface S3 as the output end of the multi-waveform signal generation circuit, and the second fixed end of RW6, the second end of R20 and the second end of R22 are all grounded.

10. A multi-waveform magnetic field generating device for magnetic hyperthermia according to claim 1, characterized in that, The DSP microprocessor outputs PWM waves with different duty cycles according to the input temperature data by using the PID fuzzy control algorithm; specifically, it includes the following steps: S1. Calculate the temperature deviation and the temperature change rate as the input variables of the PID fuzzy control, and define the output variable as the parameter of the PID controller; among them, the temperature deviation is the difference between the actual temperature and the target temperature, the target temperature is 42–46 °C, and the temperature change rate is the change rate of the temperature deviation over time; S2. Convert the temperature deviation and the temperature change rate into membership degrees in the fuzzy set through the triangular membership function to realize the fuzzification of the input variables; S3. Perform fuzzy inference based on the fuzzified temperature deviation and temperature change rate and the fuzzy rule base to determine the fuzzy set of the control action, defuzzify, obtain the parameters of the PID controller and calculate the control quantity, map the control quantity to the PWM wave duty cycle range and output it to realize the adjustment of the PWM wave duty cycle.

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