Modeling method and device of semiconductor device, electronic equipment and storage medium

Abstract

The invention discloses a modeling method and device of a semiconductor device, electronic equipment and a storage medium, and belongs to the technical field of semiconductors. The method comprises the following steps: determining static parameters and dynamic parameters of the LDMOS transistor; the static parameters represent static characteristics of the LDMOS transistor, and the dynamic parameters represent dynamic characteristics of the LDMOS transistor under different working conditions; constructing an initial model of the LDMOS transistor according to the static parameters and the dynamic parameters; defining the structure of the sub-circuit according to the working effect to be simulated; the structure of the sub-circuit comprises a connection mode of a connection port and an electrical element; and connecting the initial model with the sub-circuit to simulate the working effect of the LDMOS transistor. According to the embodiment of the invention, by combining the sub-circuit structure, the internal characteristics of the device and the influence of an external circuit can be comprehensively considered in the simulation process, the complex behavior of the LDMOS transistor under a specific working condition can be effectively simulated, and the modeling efficiency and precision of the semiconductor device are improved.

Description

Technical Field

[0001] This application belongs to the field of semiconductor technology, and particularly relates to a modeling method, device, electronic device and storage medium for semiconductor devices. Background Art

[0002] With the rapid development of fields such as automotive electronics, communication equipment, smart grid systems, and new energy systems, power integrated circuits with low power consumption, high density, high speed, and small volume play an increasingly important role in all aspects of national economic life. The high-voltage laterally diffused metal oxide semiconductor transistor (LDMOS) has a high breakdown voltage, low on-resistance, and is easy to integrate with the standard complementary metal oxide semiconductor (CMOS) process, and has become one of the cores of power semiconductor devices.

[0003] In related technologies, the LDMOS is mainly modeled based on an inherent commercial model. By adjusting parameters and iterating repeatedly for fitting, in order to better describe and predict the electrical characteristics of the LDMOS device and provide support for circuit design. However, different from CMOS, the LDMOS has a higher modeling voltage, a larger current, and a more complex structure, and it is difficult for traditional commercial models to accurately fit, and the modeling difficulty is significantly increased. Summary of the Invention

[0004] This application aims to solve at least one of the technical problems existing in the prior art. For this reason, this application proposes a modeling system, method and device for semiconductor devices to improve the efficiency and accuracy of semiconductor device modeling.

[0005] In a first aspect, this application provides a modeling method for semiconductor devices, including:

[0006] Determine the static parameters and dynamic parameters of the LDMOS transistor; the static parameters characterize the static characteristics of the LDMOS transistor, and the dynamic parameters characterize the dynamic characteristics of the LDMOS transistor under different working conditions;

[0007] Construct an initial model of the LDMOS transistor according to the static parameters and the dynamic parameters;

[0008] Define the structure of the sub-circuit according to the working effect to be simulated; the structure of the sub-circuit includes the connection ports and the connection manner of electrical components;

[0009] Connect the initial model with the sub-circuit to simulate the working effect of the LDMOS transistor.

[0010] A modeling system for a semiconductor device according to the present application determines static parameters and dynamic parameters of an LDMOS transistor; the static parameters characterize the static characteristics of the LDMOS transistor, and the dynamic parameters characterize the dynamic characteristics of the LDMOS transistor under different operating conditions; constructs an initial model of the LDMOS transistor according to the static parameters and the dynamic parameters; defines the structure of a sub-circuit according to the operating effect to be simulated; the structure of the sub-circuit includes connection ports and the connection manner of electrical components; connects the initial model with the sub-circuit to simulate the operating effect of the LDMOS transistor. In an embodiment of the present application, the electrical characteristics of the LDMOS transistor are captured through static parameters and dynamic parameters, and the initial model constructed by combining the static parameters and dynamic parameters provides an accurate basic framework. Combining the sub-circuit structure enables the simulation process to comprehensively consider the internal characteristics of the device and the influence of the external circuit, and can effectively simulate the complex behavior of the LDMOS transistor under specific operating conditions, improving the efficiency and accuracy of semiconductor device modeling.

[0011] According to an embodiment of the present application, the static parameters include process parameters and capacitance parameters of the LDMOS transistor; the dynamic parameters include at least one of mobility-related parameters, sub-threshold swing-related parameters, and output impedance-related parameters.

[0012] In this embodiment, the static characteristics of the device are reflected by process parameters and capacitance parameters, and the dynamic characteristics of the device are reflected by parameters such as mobility-related parameters, sub-threshold swing-related parameters, and output impedance-related parameters. The initial model constructed by combining these parameters can provide an accurate basic framework for subsequent simulations.

[0013] According to an embodiment of the present application, the determining of the static parameters and dynamic parameters of the LDMOS transistor includes:

[0014] Obtaining test data obtained by performing electrical tests on the LDMOS transistor;

[0015] Determining the static parameters and dynamic parameters of the LDMOS transistor according to the test data.

[0016] In this embodiment, through the test data obtained by performing electrical tests on the LDMOS transistor, these test data reflect various electrical characteristics of the LDMOS transistor under actual operating conditions, so that the static parameters and dynamic parameters of the LDMOS transistor can be accurately determined.

[0017] According to an embodiment of the present application, the test data includes capacitance-voltage characteristic data and DC characteristic data.

[0018] According to an embodiment of the present application, the operating effects include quasi-saturation effect, self-heating effect or impact ionization effect.

[0019] According to an embodiment of the present application, defining the structure of the sub-circuit according to the operating effect to be simulated includes:

[0020] When the operating effect is the quasi-saturation effect, the sub-circuit includes a first connection port and a voltage-controlled resistor. The first connection port is used to connect to the drain of the LDMOS transistor in the initial model through the voltage-controlled resistor; the resistance value of the voltage-controlled resistor changes with at least one of the drain-source voltage, gate-source voltage, size, and operating temperature of the LDMOS transistor.

[0021] In this embodiment, by setting the first connection port in the sub-circuit to be connected to the drain and introducing a voltage-controlled resistor, the resistance value of the voltage-controlled resistor changes with factors such as the drain-source voltage, gate-source voltage, device size, and operating temperature. By changing the resistance value of the voltage-controlled resistor, the voltage range at which the drift region carrier velocity reaches saturation can be controlled, so as to accurately simulate the quasi-saturation effect of the LDMOS transistor and provide support for the optimization of the LDMOS transistor.

[0022] According to an embodiment of the present application, connecting the initial model to the sub-circuit to simulate the operating effect of the LDMOS transistor includes:

[0023] Connect the first connection port of the sub-circuit to the drain of the LDMOS transistor in the initial model through the voltage-controlled resistor;

[0024] Adjust the resistance value of the voltage-controlled resistor according to at least one of the drain-source voltage, gate-source voltage, size, and operating temperature of the LDMOS transistor to simulate the quasi-saturation effect of the LDMOS transistor.

[0025] According to an embodiment of the present application, according to the formula

[0026]

[0027] Adjust the resistance value of the voltage-controlled resistor;

[0028] Among them, rdvd0 represents the base resistance value of the voltage-controlled resistor, r0 represents the initial resistance value, dwumover represents the width change amount of the LDMOS transistor, wum represents the width of the LDMOS transistor, wwnover represents the exponential factor of the width change, rdtemp represents the temperature adjustment factor, pt1 and pt2 represent the coefficients related to temperature, pt1w and pt2w represent the coefficients related to temperature and width, tdelta represents the temperature change amount, rdvg11 represents the coefficient related to the gate-source voltage, v(g,s) represents the gate-source voltage, v(d,s) represents the drain-source voltage, vdshift and vdnorm represent the coefficients related to the drain-source voltage, and rdvd represents the resistance value of the voltage-controlled resistor.

[0029] In this embodiment, by combining the sub-circuit with the initial model, the first connection port of the sub-circuit is connected to the drain of the LDMOS transistor through a voltage-controlled resistor. This connection method enables the sub-circuit to directly affect the drain current characteristics of the LDMOS transistor. By adjusting the resistance value of the voltage-controlled resistor through parameters such as the drain-source voltage, gate-source voltage, size, and operating temperature of the LDMOS transistor, the quasi-saturation effect of the LDMOS transistor can be accurately simulated. For example, when the drain-source voltage is relatively high, the electric field distribution in the drift region will change, resulting in the emergence of the saturation characteristic of the resistor. By dynamically adjusting the value of the voltage-controlled resistor, this resistor saturation behavior can be accurately simulated, so that the model can more realistically reflect the electrical characteristics of the LDMOS transistor under actual working conditions.

[0030] According to an embodiment of the present application, defining the structure of the sub-circuit according to the working effect to be simulated includes:

[0031] When the working effect is the self-heating effect, the sub-circuit includes a second port and a third port, and a first voltage-controlled current source and a thermistor are located between the second port and the third port; the current value of the first voltage-controlled current source changes with the potential difference between the second port and the third port.

[0032] In this embodiment, by adding a thermistor to the sub-circuit, the resistance value can be dynamically adjusted according to the change in temperature. The potential difference fed back by the thermistor provides a variable current through the voltage-controlled current source to simulate the heat generated under different working conditions, so as to reflect the self-heating behavior in actual applications. Therefore, the self-heating effect of the LDMOS transistor can be accurately simulated, which helps to optimize the heat dissipation structure and working conditions of the LDMOS transistor and improve the reliability and performance of the LDMOS transistor.

[0033] According to an embodiment of the present application, connecting the initial model to the sub-circuit to simulate the working effect of the LDMOS transistor includes:

[0034] Connect the sub - circuit between the drain and source of the LDMOS transistor in the initial model;

[0035] Adjust the resistance value of the thermistor according to the temperature, so that the potential difference between the second port and the third port changes to adjust the current value of the first voltage - controlled current source, so as to simulate the heat generated by the LDMOS transistor under different working conditions according to the change of the current value of the first voltage - controlled current source, and to simulate the self - heating effect of the LDMOS transistor.

[0036] According to an embodiment of the present application, according to the formula

[0037]

[0038] Adjust the current value of the first voltage - controlled current source;

[0039] wherein, Igrth1 represents the current value of the first voltage - controlled current source, v(t1,0) represents the potential difference between the second port and the third port, tempk represents the temperature constant, k represents the exponential factor, and i(rdmacro) represents the drain current.

[0040] In this embodiment, by connecting the sub - circuit between the drain and source of the LDMOS transistor, the resistance value of the thermistor is adjusted according to the temperature change, and the change of the electrical characteristics of the LDMOS transistor under different temperature conditions can be simulated. When the temperature changes, the change of the resistance value of the thermistor will cause the change of the potential difference between the second port and the third port, which in turn affects the current value of the first voltage - controlled current source. The change of the current value of the first voltage - controlled current source can accurately reflect the heat generated by the LDMOS transistor under different working conditions, so as to simulate the influence of the self - heating effect on the device performance, which helps to optimize the heat dissipation structure and working conditions of the LDMOS transistor and improve the reliability and performance of the LDMOS transistor.

[0041] According to an embodiment of the present application, defining the structure of the sub - circuit according to the working effect to be simulated includes:

[0042] When the working effect is the impact ionization effect, the sub - circuit includes a first connection end and a second voltage - controlled current source; the current value of the second voltage - controlled current source changes with at least one of the gate - source voltage, body - region voltage of the LDMOS transistor, and the voltage difference from the first connection end to the drain.

[0043] In this embodiment, by precisely controlling the current level provided by the second voltage-controlled current source, which is used to actually reflect the process in which carriers obtain sufficient energy to trigger avalanche breakdown and cause an increase in current under a high electric field strength, the impact ionization effect of the LDMOS transistor can be simulated, thereby helping designers better understand and predict the behavior of the LDMOS transistor in high-voltage applications and improving the design reliability and performance optimization ability of the LDMOS transistor.

[0044] According to an embodiment of the present application, the connecting the initial model with the sub-circuit to simulate the working effect of the LDMOS transistor includes:

[0045] Connecting the first connection port of the sub-circuit to the drain of the LDMOS transistor in the initial model, and connecting the second voltage-controlled current source between the drain and the body region of the LDMOS transistor;

[0046] Adjusting the current value of the second voltage-controlled current source according to at least one of the gate-source voltage, body-region voltage of the LDMOS transistor, and the voltage difference from the first connection end to the drain to simulate the impact ionization effect of the LDMOS transistor.

[0047] According to an embodiment of the present application, according to the formula

[0048]

[0049] wherein, igid represents the base current value of the second voltage-controlled current source, igid0 represents the initial current value, dwumgid represents the width change amount of the LDMOS transistor, wum represents the width of the LDMOS transistor, wwngid represents the exponential factor of the width change, gid represents the current value of the second voltage-controlled current source, f(v(d,s)) represents a function of the drain-source voltage v(d,s), vdgidp represents the influence exponent of v(d,s), f(v(d,n11)) represents a function of the voltage difference v(d,n11) from the first connection end to the drain, vd1gidp represents the influence exponent of v(d,n11), f(v(g,s)) represents a function of the gate-source voltage v(g,s), vggidp represents the influence exponent of v(g,s), v(b,s) represents the voltage difference from the body region to the source, vbgid and vggidp represent the influence coefficients of v(g,s), ptg1 and ptg2 represent temperature-related coefficients, ptg1w and ptg2w represent temperature- and width-related coefficients, and tdelta represents the temperature change amount.

[0050] In this embodiment, by combining the sub-circuit with the initial model of the LDMOS transistor, the first connection port of the sub-circuit is connected to the drain of the transistor, and the second voltage-controlled current source is connected between the drain and the body region. This structural design enables the current value of the second voltage-controlled current source to be dynamically adjusted according to the gate-source voltage, the body region voltage, and the voltage difference between the drain and the first connection end, thereby effectively simulating the impact of ionization effect on the current under different voltage conditions, helping designers better understand and predict the behavior of the LDMOS transistor in high-voltage applications, and improving the design reliability and performance optimization ability of the LDMOS transistor.

[0051] According to an embodiment of the present application, simulating the operating effect of the LDMOS transistor includes:

[0052] Defining linear region parameters to describe the voltage and current characteristics of the LDMOS transistor in the linear region, and defining saturation region parameters to describe the voltage and current characteristics of the LDMOS transistor in the saturation region; wherein, the linear region is the region where the drain current is linearly related to the drain-source voltage, and the saturation region is the region where the drain current no longer increases with the increase of the drain-source voltage.

[0053] In this embodiment, by defining the linear region parameters, the current-voltage relationship in this region can be accurately described, providing reliable linear amplification characteristics for circuit design. By defining the saturation region parameters, the current saturation characteristics of the transistor under high-voltage conditions can be accurately simulated, thereby accurately simulating its voltage and current characteristics under different operating conditions and improving the accuracy of semiconductor device modeling.

[0054] According to an embodiment of the present application, the method further includes:

[0055] Obtaining the static parameters and dynamic parameters of the LDMOS transistor to be tested with different voltage levels;

[0056] Adjusting the parameters of the initial model according to the static parameters and dynamic parameters of the LDMOS transistor to be tested to obtain the initial model corresponding to the LDMOS transistor to be tested;

[0057] Connecting the initial model corresponding to the LDMOS transistor to be tested with the sub-circuit to simulate the operating effect of the LDMOS transistor to be tested.

[0058] In this embodiment, by using the initial model as the basic model of LDMOS transistors with different voltage levels, by adjusting the parameters of the initial model, the modeling of LDMOS transistors with different voltage levels can be achieved, improving the reusability of the model and greatly reducing the modeling time.

[0059] Second aspect, the present application provides a modeling device for a semiconductor device, including:

[0060] A determination module, configured to determine static parameters and dynamic parameters of an LDMOS transistor; the static parameters characterize the static characteristics of the LDMOS transistor, and the dynamic parameters characterize the dynamic characteristics of the LDMOS transistor under different working conditions;

[0061] A construction module, configured to construct an initial model of the LDMOS transistor according to the static parameters and the dynamic parameters;

[0062] A definition module, configured to define the structure of a sub-circuit according to the working effect to be simulated; the structure of the sub-circuit includes connection ports and connection manners of electrical components;

[0063] An analog module, configured to connect the initial model with the sub-circuit to simulate the working effect of the LDMOS transistor.

[0064] According to the modeling device for a semiconductor device of the present application, by determining the static parameters and dynamic parameters of the LDMOS transistor; the static parameters characterize the static characteristics of the LDMOS transistor, and the dynamic parameters characterize the dynamic characteristics of the LDMOS transistor under different working conditions; constructing the initial model of the LDMOS transistor according to the static parameters and the dynamic parameters; defining the structure of the sub-circuit according to the working effect to be simulated; the structure of the sub-circuit includes connection ports and connection manners of electrical components; connecting the initial model with the sub-circuit to simulate the working effect of the LDMOS transistor. The embodiments of the present application capture the electrical characteristics of the LDMOS transistor through static parameters and dynamic parameters. The initial model constructed by combining the static parameters and dynamic parameters provides an accurate basic framework. Combining with the sub-circuit structure, the simulation process can comprehensively consider the internal characteristics of the device and the influence of the external circuit, and can effectively simulate the complex behavior of the LDMOS transistor under specific working conditions, improving the efficiency and accuracy of semiconductor device modeling.

[0065] Third aspect, the present application provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, it implements the modeling method for a semiconductor device as described in the first aspect above.

[0066] Fourth aspect, the present application provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it implements the modeling method for a semiconductor device as described in the first aspect above.

[0067] Fifth aspect, the present application provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor, and the processor is configured to run programs or instructions to implement the modeling method of the semiconductor device as described in the first aspect above.

[0068] Sixth aspect, the present application provides a computer program product, including a computer program, which when executed by a processor implements the modeling method of the semiconductor device as described in the first aspect above.

[0069] One or more of the above technical solutions in the embodiments of the present application have at least one of the following technical effects:

[0070] According to the modeling method of the semiconductor device of the present application, by determining the static parameters and dynamic parameters of the LDMOS transistor; the static parameters characterize the static characteristics of the LDMOS transistor, and the dynamic parameters characterize the dynamic characteristics of the LDMOS transistor under different working conditions; constructing an initial model of the LDMOS transistor according to the static parameters and the dynamic parameters; defining the structure of the sub-circuit according to the working effect to be simulated; the structure of the sub-circuit includes the connection ports and the connection manner of the electrical components; connecting the initial model with the sub-circuit to simulate the working effect of the LDMOS transistor. The embodiments of the present application capture the electrical characteristics of the LDMOS transistor through static parameters and dynamic parameters. The initial model constructed by combining static parameters and dynamic parameters provides an accurate basic framework. Combining with the sub-circuit structure, the simulation process can comprehensively consider the internal characteristics of the device and the influence of the external circuit, and can effectively simulate the complex behavior of the LDMOS transistor under specific working conditions, improving the efficiency and accuracy of semiconductor device modeling.

[0071] Further, in some embodiments, by setting a first connection port in the sub-circuit to be connected to the drain electrode and introducing a voltage-controlled resistor, the resistance value of the voltage-controlled resistor changes with factors such as drain-source voltage, gate-source voltage, device size, and working temperature. By changing the resistance value of the voltage-controlled resistor, the voltage range at which the carrier velocity in the drift region reaches saturation can be controlled, so as to accurately simulate the quasi-saturation effect of the LDMOS transistor and provide support for the optimization of the LDMOS transistor.

[0072] Further, in some embodiments, by adding a thermistor in the sub-circuit, the resistance value can be dynamically adjusted according to the change of temperature. The potential difference fed back by the thermistor provides a variable current through a voltage-controlled current source to simulate the heat generated under different working conditions, so as to reflect the self-heating behavior in actual applications, and thus can accurately simulate the self-heating effect of the LDMOS transistor, which helps to optimize the heat dissipation structure and working conditions of the LDMOS transistor and improve the reliability and performance of the LDMOS transistor.

[0073] Further, in some embodiments, by precisely controlling the current level provided by the second voltage-controlled current source, which is used to actually reflect the process where carriers obtain sufficient energy to trigger avalanche breakdown and cause an increase in current under high electric field strength, the impact ionization effect of the LDMOS transistor can be simulated, thereby helping designers better understand and predict the behavior of the LDMOS transistor in high-voltage applications and improving the design reliability and performance optimization ability of the LDMOS transistor.

[0074] Furthermore, in some embodiments, by defining the linear region parameters, the current-voltage relationship in this region can be accurately described, providing reliable linear amplification characteristics for circuit design. By defining the saturation region parameters, the current saturation characteristics of the transistor under high-voltage conditions can be accurately simulated, enabling accurate simulation of its voltage and current characteristics under different operating conditions and improving the accuracy of semiconductor device modeling.

[0075] Still further, in some embodiments, by using the initial model as the basic model for LDMOS transistors of different voltage levels and adjusting the parameters of the initial model, the modeling of LDMOS transistors of different voltage levels can be achieved, improving the reusability of the model and greatly reducing the modeling time.

[0076] Additional aspects and advantages of the present application will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0077] To more clearly illustrate the technical solutions of the embodiments of the present application, the accompanying drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present application and should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0078] Figure 1 is a schematic flowchart of a method for modeling a semiconductor device provided by an embodiment of the present application;

[0079] Figure 2 is a schematic structural diagram of a device for modeling a semiconductor device provided by an embodiment of the present application;

[0080] Figure 3 is a schematic structural diagram of an electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0081] The technical solutions in the embodiments of the present application will be clearly described below in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art belong to the scope of protection of the present application.

[0082] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, rather than to describe a specific order or sequence. It should be understood that such used data may be interchanged under appropriate circumstances so that the embodiments of the present application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally of the same category, and the number of objects is not limited. For example, the first object may be one or multiple. In addition, "and / or" in the specification and claims means at least one of the connected objects, and the character " / " generally means an "or" relationship between the associated objects before and after.

[0083] LDMOS is a power semiconductor device with a lateral diffusion structure, which is widely used in high-power and high-frequency circuit systems, such as radio frequency power amplifiers, switching power supplies, etc. Compared with the traditional MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), LDMOS has better performance and reliability under high voltage and high power. Its unique device structure enables LDMOS to have high breakdown voltage, low on-resistance, and good thermal management characteristics.

[0084] The super-integrated silicon gate process BCD (Bipolar-CMOS-DMOS (Double-diffused Metal Oxide Semiconductor)) platform usually develops LDMOSs with different voltages, such as 12V, 14V, 16V, 20V, 24V, 30V, 40V, 50V, 60V, 80V, etc., to meet the usage requirements of customers for various voltage devices. During the application process of LDMOS, engineers usually rely on modeling to predict and optimize its performance. Different from CMOS, LDMOS has a higher modeling voltage, a larger current, and a more complex structure, and it is difficult for traditional commercial models to accurately fit, resulting in a significantly increased modeling difficulty.

[0085] To solve the above at least one technical problem, the embodiments of the present application provide a modeling method, device, electronic device, and storage medium for semiconductor devices.

[0086] The following will, in conjunction with the accompanying drawings, explain in detail the method, apparatus, electronic device, and storage medium for modeling a semiconductor device provided by the embodiments of the present application through specific embodiments and their application scenarios.

[0087] Among them, the method for modeling a semiconductor device can be applied to a terminal, and specifically can be executed by hardware or software in the terminal.

[0088] The terminal includes, but is not limited to, portable communication devices such as mobile phones or tablet computers having a touch-sensitive surface (e.g., a touch screen display and / or a touchpad). It should also be understood that in some embodiments, the terminal may not be a portable communication device, but a desktop computer having a touch-sensitive surface (e.g., a touch screen display and / or a touchpad).

[0089] In the following various embodiments, terminals including a display and a touch-sensitive surface are described. However, it should be understood that the terminal may include one or more other physical user interface devices such as a physical keyboard, a mouse, and a joystick.

[0090] The method for modeling a semiconductor device provided by the embodiments of the present application, the execution subject of the method for modeling a semiconductor device can be an electronic device or a functional module or functional entity in the electronic device that can implement the method for modeling a semiconductor device. The electronic devices mentioned in the embodiments of the present application include, but are not limited to, mobile phones, tablet computers, computers, cameras, and wearable devices, etc. The following takes the electronic device as the execution subject to illustrate the method for modeling a semiconductor device provided by the embodiments of the present application.

[0091] As Figure 1 shown, the method for modeling a semiconductor device includes: Step 110, Step 120, Step 130, and Step 140.

[0092] Step 110, determine the static parameters and dynamic parameters of the LDMOS transistor; the static parameters characterize the static characteristics of the LDMOS transistor, and the dynamic parameters characterize the dynamic characteristics of the LDMOS transistor under different operating conditions.

[0093] The basic structure of an LDMOS transistor may include a bulk region: usually an N-type silicon substrate, providing the basic support for the transistor; a drift region: located between the drain and the source, which is a high-resistance N-type region. The length and doping concentration of the drift region have important effects on the breakdown voltage and switching speed of the transistor; a drain: usually an N-type heavily doped region, connected to an external circuit, which is the current outflow terminal; a source: also an N-type heavily doped region, opposite to the drain, which is the current inflow terminal; a channel region: located between the source and the drift region, which is a P-type region. The width and length of the channel directly affect the on-resistance and switching speed of the transistor; a gate: composed of polysilicon or metal material, covering the channel region, isolated from the channel region by an oxide layer. The gate controls the conduction and cutoff of the channel, thus controlling the flow of current; an oxide layer: located between the gate and the channel region, playing an insulating and protective role, and also being the medium for the gate electric field to act on the channel.

[0094] In the embodiments of the present application, the static parameters of the LDMOS transistor characterize the static characteristics of the LDMOS transistor. The static parameters may include the process parameters and capacitance parameters of the LDMOS transistor. The process parameters may include the epitaxial layer thickness, doping concentration, gate-source oxide layer thickness, etc.; the capacitance parameters may include the parameters of the gate-source capacitance, gate-drain capacitance, source-drain capacitance, etc.

[0095] The dynamic parameters of the LDMOS transistor characterize the dynamic characteristics of the LDMOS transistor under different working conditions. The dynamic parameters include at least one of the mobility-related parameters, subthreshold swing-related parameters, and output impedance-related parameters. The mobility-related parameters may include mobility, saturation velocity, etc.; the subthreshold swing-related parameters may include subthreshold swing, subthreshold swing slope, etc.; the output impedance-related parameters may include output resistance, output conductance, etc.

[0096] In this embodiment, the static characteristics of the device are reflected by the process parameters and capacitance parameters, and the dynamic characteristics of the device are reflected by parameters such as the mobility-related parameters, subthreshold swing-related parameters, and output impedance-related parameters. The initial model constructed by combining these parameters can provide an accurate basic framework for subsequent simulations.

[0097] In the embodiments of the present application, the static parameters and dynamic parameters of the LDMOS transistor can be obtained by testing the LDMOS transistor.

[0098] Step 120: Construct an initial model of the LDMOS transistor according to the static parameters and dynamic parameters.

[0099] In some embodiments, an initial model of an LDMOS transistor can be constructed in simulation software based on static parameters and dynamic parameters.

[0100] SPICE (Simulation Program with Integrated Circuit Emphasis) is a widely used circuit simulation software. The SPICE model describes the electrical characteristics of electronic components through mathematical equations. For MOSFETs, common SPICE models include the BSIM (Berkeley Short-channel IGFET (Insulated Gate Field-Effect Transistor) Model) series of models, such as BSIM3 and BSIM4.

[0101] The SPICE model contains a series of parameters, such as the threshold voltage (Vth), mobility (μ), capacitance, etc. These parameters can be adjusted according to the test data of the actual device.

[0102] In some embodiments, since the BSIM4 model can better describe the short-channel effect, narrow-channel effect, etc. of MOSFETs, the BSIM4 model can be selected as the basis. Adjust the parameters in the BSIM4 model according to the static parameters and dynamic parameters so that the model can accurately reflect the characteristics of the LDMOS transistor. For example, adjust the threshold voltage and mobility parameters to match the actual current-voltage characteristics.

[0103] Step 130: Define the structure of the sub-circuit according to the working effect to be simulated; the structure of the sub-circuit includes the connection ports and the connection manner of electrical components.

[0104] In the embodiments of the present application, the working effect of the LDMOS transistor refers to the key characteristic changes generated by the LDMOS transistor in a specific working environment. The working effect of the LDMOS transistor is a physical effect, which is a phenomenon that due to the influence of physical mechanisms during the operation of the LDMOS transistor, its performance deviates from the ideal state. The working effect of the LDMOS transistor can include the quasi-saturation effect, self-heating effect or impact ionization effect. Among them, the quasi-saturation effect means that under a high gate voltage bias, after the drain current of the LDMOS transistor reaches the saturation state, it becomes insensitive to the increase in the gate voltage, the current increases slowly, showing a high output conductance and a low output impedance. The self-heating effect means that the heat generated during the operation of the device cannot be effectively dissipated, resulting in an increase in the device temperature, thereby reducing the carrier mobility and affecting its electrical characteristics. The impact ionization effect means that under a high electric field, carriers obtain sufficient energy, causing lattice atoms to ionize and generate new carriers, resulting in an increase in the leakage current.

[0105] In the embodiments of the present application, different sub - circuit structures can be defined according to different working effects to be simulated, so as to simulate different working effects of the LDMOS transistor by combining the sub - circuit structures. For example, it can be achieved by adding a sub - circuit (SUBCKT) in the SPICE model. The sub - circuit can include additional components such as resistors, capacitors, or current sources to simulate these effects.

[0106] In some embodiments, for the quasi - saturation effect, the sub - circuit structure can include a resistance element to simulate the non - linear characteristics of the drain current in the quasi - saturation state; for the self - heating effect, the sub - circuit structure can include a thermistor to simulate the resistance change caused by the temperature rise. For the impact ionization effect, the sub - circuit structure can include a voltage - controlled current source to simulate the additional current generated under high electric fields.

[0107] Step 140: Connect the initial model to the sub - circuit to simulate the working effects of the LDMOS transistor.

[0108] In the embodiments of the present application, after connecting the initial model to the sub - circuit, the working effects of the LDMOS transistor can be simulated.

[0109] In some embodiments, the MOSFET can be instantiated by calling the previously defined BSIM4 model, ensuring that the ports (source, gate, drain, body region) of the MOSFET are correctly connected to other components in the sub - circuit, and then the working effects of the LDMOS transistor are simulated in the simulation software.

[0110] According to the semiconductor device modeling system of the present application, by determining the static parameters and dynamic parameters of the LDMOS transistor; the static parameters characterize the static characteristics of the LDMOS transistor, and the dynamic parameters characterize the dynamic characteristics of the LDMOS transistor under different working conditions; constructing an initial model of the LDMOS transistor according to the static parameters and dynamic parameters; defining the structure of the sub - circuit according to the working effects to be simulated; the structure of the sub - circuit includes the connection ports and the connection manner of electrical components; connecting the initial model to the sub - circuit to simulate the working effects of the LDMOS transistor. The embodiments of the present application capture the electrical characteristics of the LDMOS transistor through static parameters and dynamic parameters. The initial model constructed by combining static parameters and dynamic parameters provides an accurate basic framework. Combining the sub - circuit structure enables the simulation process to comprehensively consider the internal characteristics of the device and the influence of the external circuit, and can effectively simulate the complex behavior of the LDMOS transistor under specific working conditions, improving the efficiency and accuracy of semiconductor device modeling.

[0111] In some embodiments, determining the static parameters and dynamic parameters of the LDMOS transistor includes:

[0112] Obtain the test data obtained from the electrical test of the LDMOS transistor;

[0113] Determine the static parameters and dynamic parameters of the LDMOS transistor according to the test data.

[0114] In some embodiments, the test data includes capacitance-voltage characteristic data (Capacitance-Voltage, CV data) and direct current characteristic data (Direct Current, DC data).

[0115] The CV data may include Cgg (gate-gate capacitance) and Cgc (gate-drain capacitance). By applying an alternating voltage between the gate and source of the LDMOS transistor and measuring its capacitance value simultaneously, a curve of capacitance varying with voltage can be obtained. By analyzing the CV data, the static parameters of the LDMOS transistor can be determined.

[0116] The DC data may include Id-Vd data, Id-Vg data, and Ib-Vg data. The Id-Vd data represents the relationship between the drain current and the drain-source voltage, and is used to analyze the on and breakdown characteristics of the LDMOS transistor; the Id-Vg data represents the relationship between the drain current and the gate-source voltage, and is used to determine the threshold voltage and sub-threshold characteristics. The Ib-Vg data represents the relationship between the body region current and the gate-source voltage, and is used to analyze the body effect. By analyzing the DC data, the dynamic parameters of the LDMOS transistor can be determined.

[0117] In this embodiment, through the test data obtained from the electrical test of the LDMOS transistor, these test data reflect various electrical characteristics of the LDMOS transistor under actual working conditions, so that the static parameters and dynamic parameters of the LDMOS transistor can be accurately determined.

[0118] In some embodiments, define the structure of the sub-circuit according to the working effect to be simulated, including:

[0119] When the working effect is the quasi-saturation effect, the sub-circuit includes a first connection port and a voltage-controlled resistor. The first connection port is used to connect to the drain of the LDMOS transistor in the initial model through the voltage-controlled resistor; the resistance value of the voltage-controlled resistor changes with at least one of the drain-source voltage, gate-source voltage, size, and operating temperature of the LDMOS transistor.

[0120] In this embodiment, the first connection port is used to connect to the drain of the LDMOS transistor. The resistance value of the voltage-controlled resistor changes with at least one of the drain-source voltage, gate-source voltage, size, and operating temperature of the LDMOS transistor.

[0121] Specifically, the voltage-controlled resistor can be designed as a controlled resistor element, and its control signal can be the drain-source voltage, gate-source voltage, size parameter, or temperature signal. As the drain-source voltage increases, the resistance value of the voltage-controlled resistor may change to reflect the behavior of the drain current in the quasi-saturation region; the change in the gate-source voltage affects the conductivity of the channel, thereby changing the resistance value of the voltage-controlled resistor; the size of the transistor (such as the channel length and width) affects the current distribution and electric field distribution, and thus affects the resistance value of the voltage-controlled resistor; the change in the operating temperature affects the carrier mobility and electric field distribution, thereby changing the resistance value of the voltage-controlled resistor.

[0122] In this embodiment, by setting a first connection port in the sub-circuit to be connected to the drain and introducing a voltage-controlled resistor, the resistance value of the voltage-controlled resistor changes with factors such as the drain-source voltage, gate-source voltage, device size, and operating temperature. By changing the resistance value of the voltage-controlled resistor, the voltage range at which the carrier velocity in the drift region reaches saturation can be controlled, so as to accurately simulate the quasi-saturation effect of the LDMOS transistor and provide support for the optimization of the LDMOS transistor.

[0123] In some embodiments, the initial model is connected to the sub-circuit to simulate the operating effect of the LDMOS transistor, including:

[0124] Connect the first connection port of the sub-circuit to the drain of the LDMOS transistor in the initial model through a voltage-controlled resistor;

[0125] Adjust the resistance value of the voltage-controlled resistor according to at least one of the drain-source voltage, gate-source voltage, size, and operating temperature of the LDMOS transistor to simulate the quasi-saturation effect of the LDMOS transistor.

[0126] In this embodiment, the connection method between the initial model and the sub-circuit can be set through a circuit simulation tool, such as SPICE, and the quasi-saturation effect of the LDMOS transistor can be simulated by adjusting the resistance value of the voltage-controlled resistor.

[0127] In some embodiments, the resistance value of the voltage-controlled resistor can be adjusted according to the formula

[0128]

[0129] Adjust the resistance value of the voltage-controlled resistor;

[0130] Among them, rdvd0 represents the base resistance value of the voltage-controlled resistor, r0 represents the initial resistance value, dwumover represents the width change amount of the LDMOS transistor, wum represents the width of the LDMOS transistor, wwnover represents the exponential factor of the width change, rdtemp represents the temperature adjustment factor, pt1 and pt2 represent the coefficients related to temperature, pt1w and pt2w represent the coefficients related to temperature and width, tdelta represents the temperature change amount, rdvg11 represents the coefficient related to the gate-source voltage, v(g,s) represents the gate-source voltage, v(d,s) represents the drain-source voltage, vdshift and vdnorm represent the coefficients related to the drain-source voltage, and rdvd represents the resistance value of the voltage-controlled resistor.

[0131] In this embodiment, by combining the sub-circuit with the initial model, the first connection port of the sub-circuit is connected to the drain of the LDMOS transistor through a voltage-controlled resistor. This connection method enables the sub-circuit to directly affect the drain current characteristics of the LDMOS transistor. By adjusting the resistance value of the voltage-controlled resistor through parameters such as the drain-source voltage, gate-source voltage, size, and operating temperature of the LDMOS transistor, the quasi-saturation effect of the LDMOS transistor can be accurately simulated. For example, when the drain-source voltage is relatively high, the electric field distribution in the drift region will change, resulting in the emergence of the saturation characteristic of the resistor. By dynamically adjusting the value of the voltage-controlled resistor, this resistor saturation behavior can be accurately simulated, so that the model can more realistically reflect the electrical characteristics of the LDMOS transistor under actual working conditions.

[0132] In some embodiments, the structure of the sub-circuit is defined according to the working effect to be simulated, including:

[0133] When the working effect is the self-heating effect, the sub-circuit includes a second port and a third port, a first voltage-controlled current source and a thermistor between the second port and the third port; the current value of the first voltage-controlled current source changes with the potential difference between the second port and the third port.

[0134] In this embodiment, the thermistor can be connected in parallel or in series with the first voltage-controlled current source. When the temperature changes, the resistance value of the thermistor will change, thereby affecting the potential difference between the second port and the third port.

[0135] The first voltage-controlled current source can be designed as a controlled current element, and its control signal is the potential difference between the second port and the third port. The current value of the first voltage-controlled current source will change with the potential difference between the second port and the third port. In this way, the heat generated by the LDMOS transistor under different working conditions can be simulated, so that the self-heating effect of the LDMOS transistor can be accurately simulated.

[0136] In this embodiment, by adding a thermistor to the sub - circuit, the resistance value can be dynamically adjusted according to the temperature change. The potential difference fed back by the thermistor is used to provide a variable current through a voltage - controlled current source to simulate the heat generated under different working conditions, so as to reflect the self - heating behavior in actual applications, thereby accurately simulating the self - heating effect of the LDMOS transistor, which helps to optimize the heat dissipation structure and working conditions of the LDMOS transistor and improve the reliability and performance of the LDMOS transistor.

[0137] In some embodiments, the initial model is connected to the sub - circuit to simulate the working effect of the LDMOS transistor, including:

[0138] Connect the sub - circuit between the drain and source of the LDMOS transistor in the initial model;

[0139] Adjust the resistance value of the thermistor according to the temperature, so that the potential difference between the second port and the third port changes to adjust the current value of the first voltage - controlled current source, in order to simulate the heat generated by the LDMOS transistor under different working conditions according to the change of the current value of the first voltage - controlled current source, so as to simulate the self - heating effect of the LDMOS transistor.

[0140] In this embodiment, the connection mode of the initial model and the sub - circuit can be set through a circuit simulation tool, such as SPICE. Connect the second port and the third port to the drain and source of the LDMOS transistor respectively, and use the variable current provided by the voltage - controlled current source to simulate the heat generated under different working conditions, so as to accurately fit the self - heating effect of the LDMOS.

[0141] In some embodiments, the current value of the first voltage - controlled current source can be adjusted according to the formula

[0142]

[0143] Adjust the current value of the first voltage - controlled current source;

[0144] where Igrth1 represents the current value of the first voltage - controlled current source, v(t1,0) represents the potential difference between the second port and the third port, tempk represents the temperature constant, k represents the exponential factor, and i(rdmacro) represents the drain current.

[0145] In this embodiment, by connecting the sub - circuit between the drain and source of the LDMOS transistor, the resistance value of the thermistor is adjusted with the change of temperature, and the electrical characteristic changes of the LDMOS transistor under different temperature conditions can be simulated. When the temperature changes, the change in the resistance value of the thermistor will cause a change in the potential difference between the second port and the third port, which in turn affects the current value of the first voltage - controlled current source. The change in the current value of the first voltage - controlled current source can accurately reflect the heat generated by the LDMOS transistor under different working conditions, thereby simulating the influence of self - heating effect on the device performance, helping to optimize the heat dissipation structure and working conditions of the LDMOS transistor, and improving the reliability and performance of the LDMOS transistor.

[0146] In some embodiments, the structure of the sub - circuit is defined according to the working effect to be simulated, including:

[0147] When the working effect is the impact ionization effect, the sub - circuit includes a first connection terminal and a second voltage - controlled current source; the current value of the second voltage - controlled current source changes with at least one of the gate - source voltage, body - region voltage, and voltage difference between the first connection terminal and the drain of the LDMOS transistor.

[0148] In this embodiment, the current value of the second voltage - controlled current source changes with at least one of the gate - source voltage, body - region voltage, and voltage difference between the first connection terminal and the drain of the LDMOS transistor.

[0149] Specifically, the second voltage - controlled current source can be designed as a controlled current element, and its control signals can be the gate - source voltage, body - region voltage, and voltage difference between the first connection terminal and the drain, etc. The change in the gate - source voltage will affect the conductivity of the channel, thereby changing the current value of the voltage - controlled current source; the change in the body - region voltage will affect the electric - field distribution and the movement of carriers in the device, and thus affect the current value of the voltage - controlled current source; the voltage difference between the first connection terminal and the drain reflects the electric - field intensity at the drain. When the electric - field intensity is high enough, the current value of the voltage - controlled current source will increase to simulate the additional current generated by impact ionization.

[0150] In this embodiment, by precisely controlling the current level provided by the second voltage - controlled current source, which is used to actually reflect the process that under high - electric - field intensity, carriers obtain enough energy to trigger avalanche breakdown and cause an increase in current, the impact ionization effect of the LDMOS transistor can be simulated, which helps designers better understand and predict the behavior of the LDMOS transistor in high - voltage applications, and improves the design reliability and performance optimization ability of the LDMOS transistor.

[0151] In some embodiments, connecting the initial model with the sub - circuit to simulate the working effect of the LDMOS transistor includes:

[0152] Connect the first connection port of the sub-circuit to the drain of the LDMOS transistor in the initial model, and connect the second voltage-controlled current source between the drain and the body region of the LDMOS transistor.

[0153] Adjust the current value of the second voltage-controlled current source according to at least one of the gate-source voltage, body region voltage, and voltage difference from the first connection terminal to the drain of the LDMOS transistor to simulate the impact ionization effect of the LDMOS transistor.

[0154] In this embodiment, the connection mode of the initial model and the sub-circuit can be set through a circuit simulation tool, such as SPICE. Connect the first connection port of the sub-circuit to the drain of the LDMOS transistor in the initial model, and connect the second voltage-controlled current source between the drain and the body region of the LDMOS transistor. By adjusting the current value of the second voltage-controlled current source, the impact ionization effect of the LDMOS transistor is simulated.

[0155] In some embodiments, the formula

[0156]

[0157] can be used to adjust the current value of the second voltage-controlled current source;

[0158] where igid represents the base current value of the second voltage-controlled current source, igid0 represents the initial current value, dwumgid represents the width change amount of the LDMOS transistor, wum represents the width of the LDMOS transistor, wwngid represents the exponential factor of width change, gid represents the current value of the second voltage-controlled current source, f(v(d,s)) represents a function of the drain-source voltage v(d,s), vdgidp represents the influence exponent of v(d,s), f(v(d,n11)) represents a function of the voltage difference v(d,n11) from the first connection terminal to the drain, vd1gidp represents the influence exponent of v(d,n11), f(v(g,s)) represents a function of the gate-source voltage v(g,s), vggidp represents the influence exponent of v(g,s), v(b,s) represents the voltage difference from the body region to the source, vbgid and vggidp represent the influence coefficients of v(g,s), ptg1 and ptg2 represent coefficients related to temperature, ptg1w and ptg2w represent coefficients related to temperature and width, and tdelta represents the temperature change amount.

[0159] In this embodiment, by combining the sub-circuit with the initial model of the LDMOS transistor, the first connection port of the sub-circuit is connected to the drain of the transistor, and the second voltage-controlled current source is connected between the drain and the body region. This structural design enables the current value of the second voltage-controlled current source to be dynamically adjusted according to the gate-source voltage, the body-region voltage, and the voltage difference between the drain and the first connection terminal, thereby effectively simulating the impact of impact ionization effects on the current under different voltage conditions, helping designers better understand and predict the behavior of LDMOS transistors in high-voltage applications, and improving the design reliability and performance optimization ability of LDMOS transistors.

[0160] In some embodiments, simulating the operating effects of an LDMOS transistor includes:

[0161] Defining linear-region parameters to describe the voltage and current characteristics of the LDMOS transistor in the linear region, and defining saturation-region parameters to describe the voltage and current characteristics of the LDMOS transistor in the saturation region; wherein, the linear region is the region where the drain current is linearly related to the drain-source voltage, and the saturation region is the region where the drain current no longer increases as the drain-source voltage increases.

[0162] In this embodiment, linear-region parameters can be defined in the initial model to describe the voltage and current characteristics of the LDMOS transistor in the linear region, and saturation-region parameters can be defined to describe the voltage and current characteristics of the LDMOS transistor in the saturation region, thereby simulating the operating effects of the LDMOS transistor under different operating conditions.

[0163] The linear-region parameters can include the linear threshold voltage (Vtlin) and the linear drain current (Idlin). The linear threshold voltage can include vtlin1, vtlin2, vtlin3, and the linear drain current can include idlin1, idlin2, idlin3. Among them, Vtlin1 represents the linear threshold voltage applicable to the low gate-source voltage region; Vtlin2 represents the linear threshold voltage applicable to the medium gate-source voltage region; Vtlin3 represents the linear threshold voltage applicable to the high gate-source voltage region. Idlin1 represents the linear drain current corresponding to the Vtlin1 region; Idlin2 represents the linear drain current corresponding to the Vtlin2 region; Idlin3 corresponds to the linear drain current in the Vtlin3 region.

[0164] The saturation region parameters may include the saturation threshold voltage (Vtsat) and the saturation drain current (Idsat). The saturation threshold voltage may include vtsat1, vtsat2, vtsat3, and the saturation drain current may include idsat1, idsat2, idsat3. Among them, Vtsat1 represents the saturation threshold voltage applicable to the low gate-source voltage region; Vtsat2 represents the saturation threshold voltage applicable to the medium gate-source voltage region; Vtsat3 represents the saturation threshold voltage applicable to the high gate-source voltage region; Idsat1 represents the saturation drain current corresponding to the Vtsat1 region; Idsat2 represents the saturation drain current corresponding to the Vtsat2 region; Idsat3 represents the saturation drain current corresponding to the Vtsat3 region.

[0165] In this embodiment, by defining the linear region parameters, the current-voltage relationship in this region can be accurately described, providing reliable linear amplification characteristics for circuit design. By defining the saturation region parameters, the current saturation characteristics of the transistor under high voltage conditions can be accurately simulated, so that the voltage and current characteristics under different working conditions can be accurately simulated, improving the accuracy of semiconductor device modeling.

[0166] In some embodiments, the method further includes:

[0167] Obtaining the static parameters and dynamic parameters of the LDMOS transistor to be tested with different voltage levels of the LDMOS transistor;

[0168] Adjusting the parameters of the initial model according to the static parameters and dynamic parameters of the LDMOS transistor to be tested to obtain the initial model corresponding to the LDMOS transistor to be tested;

[0169] Connecting the initial model corresponding to the LDMOS transistor to be tested to the sub-circuit to simulate the working effect of the LDMOS transistor to be tested.

[0170] In this embodiment, the LDMOS transistors with different voltage levels refer to that the LDMOS transistors are designed for different voltage working environments. The LDMOS transistors with different voltage levels will be different in terms of structural design, manufacturing process, electrical characteristics, etc. to adapt to different application environments. For example, the low-voltage LDMOS transistor requires a thinner N-doped drift region, while the high-voltage LDMOS requires a thicker N-doped drift region to withstand high voltages. These differences in voltage levels directly affect the performance indicators and usage scenarios of the LDMOS transistor.

[0171] In the related art, for LDMOS transistors with multiple different voltages on the same platform, it is necessary to test multiple device units according to the characteristics of LDMOS transistors with different voltage levels, establish multiple models respectively, with one model corresponding to one voltage level. This makes the cycle longer, time-consuming and laborious, and significantly increases the modeling time.

[0172] In this embodiment, the initial model can be used as the basic model for LDMOS transistors with different voltage levels, and the parameters of the initial model are adjusted according to the static parameters and dynamic parameters of the LDMOS transistor to be measured. For example, parameters such as the linear threshold voltage (Vtlin), linear drain current (Idlin), saturation threshold voltage (Vtsat), and saturation drain current (Idsat) are adjusted, so as to obtain the initial model corresponding to the LDMOS transistor to be measured.

[0173] In some embodiments, the sub-circuit parameters can also be adjusted. For example, the resistance-related parameters are adjusted, such as the initial resistance value r0 of the voltage-controlled resistor; the voltage-related parameters are adjusted, such as the coefficient rdvg11 related to the gate-source voltage, the coefficients vdshift and vdnorm related to the drain-source voltage; the size-related parameters are adjusted, such as the width change amount dwumover of the LDMOS transistor and the exponential factor wwnover of the width change; the temperature-related coefficients are adjusted, such as pt1, pt2, pt1w, pt2w, etc.

[0174] The working effect of the LDMOS transistor to be measured is simulated according to the adjusted initial model and sub-circuit.

[0175] In this embodiment, by using the initial model as the basic model for LDMOS transistors with different voltage levels and adjusting the parameters of the initial model, the modeling of LDMOS transistors with different voltage levels can be realized, improving the reusability of the model and greatly reducing the modeling time.

[0176] In the modeling method of the semiconductor device provided by the embodiment of the present application, the execution subject can be a modeling device of the semiconductor device. In the embodiment of the present application, taking the modeling device of the semiconductor device executing the modeling method of the semiconductor device as an example, the modeling device of the semiconductor device provided by the embodiment of the present application is described.

[0177] The embodiment of the present application also provides a modeling device of a semiconductor device.

[0178] As Figure 2 shown, the modeling device of the semiconductor device includes:

[0179] A determination module 210, configured to determine the static parameters and dynamic parameters of the LDMOS transistor; the static parameters characterize the static characteristics of the LDMOS transistor, and the dynamic parameters characterize the dynamic characteristics of the LDMOS transistor under different working conditions;

[0180] A building block 220 for constructing an initial model of an LDMOS transistor according to static parameters and dynamic parameters;

[0181] A defining module 230 for defining the structure of a sub-circuit according to the working effects to be simulated; the structure of the sub-circuit includes the connection ports and the connection manners of electrical components;

[0182] A simulation module 240 for connecting the initial model with the sub-circuit to simulate the working effects of the LDMOS transistor.

[0183] According to the modeling device of the semiconductor device of the present application, by determining the static parameters and dynamic parameters of the LDMOS transistor; the static parameters characterize the static characteristics of the LDMOS transistor, and the dynamic parameters characterize the dynamic characteristics of the LDMOS transistor under different working conditions; constructing an initial model of the LDMOS transistor according to the static parameters and dynamic parameters; defining the structure of the sub-circuit according to the working effects to be simulated; the structure of the sub-circuit includes the connection ports and the connection manners of electrical components; connecting the initial model with the sub-circuit to simulate the working effects of the LDMOS transistor. In the embodiments of the present application, the electrical characteristics of the LDMOS transistor are captured by the static parameters and dynamic parameters, and the initial model constructed by combining the static parameters and dynamic parameters provides an accurate basic framework. Combining with the sub-circuit structure, the simulation process can comprehensively consider the internal characteristics of the device and the influence of the external circuit, and can effectively simulate the complex behavior of the LDMOS transistor under specific working conditions, improving the efficiency and accuracy of semiconductor device modeling.

[0184] In some embodiments, the static parameters include the process parameters and capacitance parameters of the LDMOS transistor; the dynamic parameters include at least one of mobility-related parameters, sub-threshold swing-related parameters, and output impedance-related parameters.

[0185] In some embodiments, the determining module 210 is further configured to:

[0186] Obtain test data obtained by performing electrical tests on the LDMOS transistor;

[0187] Determine the static parameters and dynamic parameters of the LDMOS transistor according to the test data.

[0188] In some embodiments, the test data includes capacitance-voltage characteristic data and DC characteristic data.

[0189] In some embodiments, the working effects include quasi-saturation effect, self-heating effect, or impact ionization effect.

[0190] In some embodiments, the defining module 230 is further configured to:

[0191] In the case where the working effect is the quasi-saturation effect, the sub-circuit includes a first connection port and a voltage-controlled resistor. The first connection port is used to connect to the drain of the LDMOS transistor in the initial model through the voltage-controlled resistor. The resistance value of the voltage-controlled resistor changes with at least one of the drain-source voltage, gate-source voltage, size, and operating temperature of the LDMOS transistor.

[0192] In some embodiments, the definition module 230 is further configured to:

[0193] Connect the first connection port of the sub-circuit to the drain of the LDMOS transistor in the initial model through a voltage-controlled resistor;

[0194] Adjust the resistance value of the voltage-controlled resistor according to at least one of the drain-source voltage, gate-source voltage, size, and operating temperature of the LDMOS transistor to simulate the quasi-saturation effect of the LDMOS transistor.

[0195] In some embodiments, the definition module 230 is further configured to:

[0196] According to the formula

[0197]

[0198] Adjust the resistance value of the voltage-controlled resistor;

[0199] wherein, rdvd0 represents the base resistance value of the voltage-controlled resistor, r0 represents the initial resistance value, dwumover represents the width change amount of the LDMOS transistor, wum represents the width of the LDMOS transistor, wwnover represents the exponential factor of the width change, rdtemp represents the temperature adjustment factor, pt1 and pt2 represent the coefficients related to temperature, pt1w and pt2w represent the coefficients related to temperature and width, tdelta represents the temperature change amount, rdvg11 represents the coefficient related to the gate-source voltage, v(g,s) represents the gate-source voltage, v(d,s) represents the drain-source voltage, vdshift and vdnorm represent the coefficients related to the drain-source voltage, and rdvd represents the resistance value of the voltage-controlled resistor.

[0200] In some embodiments, the definition module 230 is further configured to:

[0201] In the case where the working effect is the self-heating effect, the sub-circuit includes a second port and a third port, a first voltage-controlled current source and a thermistor located between the second port and the third port; the current value of the first voltage-controlled current source changes with the potential difference between the second port and the third port.

[0202] In some embodiments, the definition module 230 is further configured to:

[0203] Connect the sub - circuit between the drain and source of the LDMOS transistor in the initial model;

[0204] Adjust the resistance value of the thermistor according to the temperature, so that the potential difference between the second port and the third port changes to adjust the current value of the first voltage - controlled current source, in order to simulate the heat generated by the LDMOS transistor under different operating conditions according to the change of the current value of the first voltage - controlled current source, so as to simulate the self - heating effect of the LDMOS transistor.

[0205] In some embodiments, the defining module 230 is further configured to:

[0206] According to the formula

[0207]

[0208] Adjust the current value of the first voltage - controlled current source;

[0209] Wherein, Igrth1 represents the current value of the first voltage - controlled current source, v(t1,0) represents the potential difference between the second port and the third port, tempk represents the temperature constant, k represents the exponential factor, and i(rdmacro) represents the drain current.

[0210] In some embodiments, the defining module 230 is further configured to:

[0211] In the case where the working effect is the impact ionization effect, the sub - circuit includes a first connection end and a second voltage - controlled current source; the current value of the second voltage - controlled current source changes with at least one of the gate - source voltage, body - region voltage of the LDMOS transistor, and the voltage difference from the first connection end to the drain.

[0212] In some embodiments, the defining module 230 is further configured to:

[0213] Connect the first connection port of the sub - circuit to the drain of the LDMOS transistor in the initial model, and connect the second voltage - controlled current source between the drain and the body region of the LDMOS transistor;

[0214] Adjust the current value of the second voltage - controlled current source according to at least one of the gate - source voltage, body - region voltage of the LDMOS transistor, and the voltage difference from the first connection end to the drain, so as to simulate the impact ionization effect of the LDMOS transistor.

[0215] In some embodiments, the defining module 230 is further configured to:

[0216] According to the formula

[0217]

[0218] Adjust the current value of the second voltage - controlled current source;

[0219] Among them, igid represents the base current value of the second voltage-controlled current source, igid0 represents the initial current value, dwumgid represents the width variation of the LDMOS transistor, wum represents the width of the LDMOS transistor, wwngid represents the exponential factor of width variation, gid represents the current value of the second voltage-controlled current source, f(v(d,s)) represents a function of the drain-source voltage v(d,s), vdgidp represents the influence exponent of v(d,s), f(v(d,n11)) represents a function of the voltage difference v(d,n11) from the first connection terminal to the drain, vd1gidp represents the influence exponent of v(d,n11), f(v(g,s)) represents a function of the gate-source voltage v(g,s), vggidp represents the influence exponent of v(g,s), v(b,s) represents the voltage difference from the body region to the source, vbgid and vggidp represent the influence coefficients of v(g,s), ptg1 and ptg2 represent coefficients related to temperature, ptg1w and ptg2w represent coefficients related to temperature and width, and tdelta represents the temperature variation.

[0220] In some embodiments, the simulation module 240 is further configured to:

[0221] Define linear region parameters to describe the voltage and current characteristics of the LDMOS transistor in the linear region, and define saturation region parameters to describe the voltage and current characteristics of the LDMOS transistor in the saturation region; wherein, the linear region is the region where the drain current is linearly related to the drain-source voltage, and the saturation region is the region where the drain current no longer increases with the increase of the drain-source voltage.

[0222] In some embodiments, the simulation module 240 is further configured to:

[0223] Obtain the static parameters and dynamic parameters of the LDMOS transistor to be measured at different voltage levels of the LDMOS transistor;

[0224] Adjust the parameters of the initial model according to the static parameters and dynamic parameters of the LDMOS transistor to be measured to obtain the initial model corresponding to the LDMOS transistor to be measured;

[0225] Connect the initial model corresponding to the LDMOS transistor to be measured to the sub-circuit to simulate the working effect of the LDMOS transistor to be measured.

[0226] The modeling device of the semiconductor device in the embodiments of the present application can be an electronic device or a component in an electronic device, such as an integrated circuit or a chip. The electronic device can be a terminal or other devices other than terminals. Exemplarily, the electronic device can be a mobile phone, a tablet computer, a laptop computer, a handheld computer, a vehicle-mounted electronic device, a Mobile Internet Device (MID), an augmented reality (AR) / virtual reality (VR) device, a robot, a wearable device, an ultra-mobile personal computer (UMPC), a netbook, or a personal digital assistant (PDA), etc. It can also be a server, a Network Attached Storage (NAS), a personal computer (PC), a television (TV), a teller machine, or a self-service machine, etc. The embodiments of the present application do not make specific limitations.

[0227] The modeling device of the semiconductor device in the embodiments of the present application can be a device with an operating system. The operating system can be the Microsoft (Windows) operating system, the Android operating system, the IOS operating system, or other possible operating systems. The embodiments of the present application do not make specific limitations.

[0228] In some embodiments, as Figure 3 shown, the embodiments of the present application further provide an electronic device 300, including a processor 301, a memory 302, and a computer program stored on the memory 302 and executable on the processor 301. When the program is executed by the processor 301, it implements each process of the above-mentioned embodiment of the modeling method of the semiconductor device and can achieve the same technical effect. To avoid repetition, it will not be elaborated here.

[0229] It should be noted that the electronic devices in the embodiments of the present application include the above-mentioned mobile electronic devices and non-mobile electronic devices.

[0230] The embodiments of the present application further provide a non-transitory computer-readable storage medium. A computer program is stored on the non-transitory computer-readable storage medium. When the computer program is executed by a processor, it implements each process of the above-mentioned embodiment of the modeling method of the semiconductor device and can achieve the same technical effect. To avoid repetition, it will not be elaborated here.

[0231] Among them, the processor is the processor in the electronic device in the above embodiment. The readable storage medium includes computer-readable storage media such as computer read-only memory ROM, random access memory RAM, magnetic disk or optical disc, etc.

[0232] The embodiment of the present application also provides a computer program product, including a computer program, which when executed by a processor implements the above-mentioned modeling method of semiconductor devices.

[0233] Among them, the processor is the processor in the electronic device in the above embodiment. The readable storage medium includes computer-readable storage media such as computer read-only memory ROM, random access memory RAM, magnetic disk or optical disc, etc.

[0234] The embodiment of the present application further provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor. The processor is used to run programs or instructions to implement each process of the above-mentioned embodiment of the modeling method of semiconductor devices, and can achieve the same technical effect. To avoid repetition, it will not be elaborated here.

[0235] It should be understood that the chip mentioned in the embodiment of the present application may also be referred to as a system-on-chip, system chip, chip system, or system-on-chip, etc.

[0236] It should be noted that in this article, the term "including", "comprising" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including one..." does not exclude the existence of additional identical elements in the process, method, article or device including that element. In addition, it should be pointed out that the methods and devices in the embodiments of the present application are not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in a reverse order according to the functions involved. For example, the described methods may be performed in an order different from that described, and various steps may be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0237] Through the description of the above embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus a necessary general hardware platform. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art can be embodied in the form of a computer software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions for causing a terminal (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in various embodiments of the present application.

[0238] The embodiments of the present application have been described above in conjunction with the accompanying drawings. However, the present application is not limited to the above specific embodiments. The above specific embodiments are merely illustrative and not restrictive. Under the inspiration of the present application, those of ordinary skill in the art can also make many forms without departing from the purpose of the present application and the scope protected by the claims, and all of them belong to the protection scope of the present application.

[0239] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0240] Although the embodiments of the present application have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and purposes of the present application. The scope of the present application is defined by the claims and their equivalents.

Claims

1. A modeling method for a semiconductor device, characterized in that, Including: Determine the static parameters and dynamic parameters of the LDMOS transistor; The static parameters characterize the static characteristics of the LDMOS transistor, and the dynamic parameters characterize the dynamic characteristics of the LDMOS transistor under different working conditions; Construct an initial model of the LDMOS transistor according to the static parameters and the dynamic parameters; Define the structure of the sub-circuit according to the working effect to be simulated; the structure of the sub-circuit includes the connection ports and the connection manner of electrical components; Connect the initial model with the sub-circuit to simulate the working effect of the LDMOS transistor.

2. The method according to claim 1, characterized in that, The static parameters include the process parameters and capacitance parameters of the LDMOS transistor; the dynamic parameters include at least one of the mobility-related parameters, subthreshold swing-related parameters, and output impedance-related parameters.

3. The method according to claim 1, wherein The determining the static parameters and dynamic parameters of the LDMOS transistor includes: Obtain the test data obtained by performing electrical tests on the LDMOS transistor; Determine the static parameters and dynamic parameters of the LDMOS transistor according to the test data.

4. The method according to claim 3, wherein The test data includes capacitance-voltage characteristic data and DC characteristic data.

5. The method according to claim 1, characterized in that, The working effect includes quasi-saturation effect, self-heating effect or impact ionization effect.

6. The method according to claim 1, characterized in that The defining the structure of the sub-circuit according to the working effect to be simulated includes: When the working effect is the quasi-saturation effect, the sub-circuit includes a first connection port and a voltage-controlled resistor. The first connection port is used to connect to the drain of the LDMOS transistor in the initial model through the voltage-controlled resistor; the resistance value of the voltage-controlled resistor changes with at least one of the drain-source voltage, gate-source voltage, size, and working temperature of the LDMOS transistor.

7. The method according to claim 6, characterized in that, The connecting the initial model with the sub-circuit to simulate the working effect of the LDMOS transistor includes: Connect the first connection port of the sub-circuit to the drain of the LDMOS transistor in the initial model through the voltage-controlled resistor; Adjust the resistance value of the voltage-controlled resistor according to at least one of the drain-source voltage, gate-source voltage, size, and working temperature of the LDMOS transistor to simulate the quasi-saturation effect of the LDMOS transistor.

8. The method according to claim 7, wherein According to the formula Adjust the resistance value of the voltage-controlled resistor; Where, rdvd0 represents the base resistance value of the voltage-controlled resistor, r0 represents the initial resistance value, dwumover represents the width change amount of the LDMOS transistor, wum represents the width of the LDMOS transistor, wwnover represents the exponential factor of the width change, rdtemp represents the temperature adjustment factor, pt1 and pt2 represent the coefficients related to temperature, pt1w and pt2w represent the coefficients related to temperature and width, tdelta represents the temperature change amount, rdvg11 represents the coefficient related to the gate-source voltage, v(g,s) represents the gate-source voltage, v(d,s) represents the drain-source voltage, vdshift and vdnorm represent the coefficients related to the drain-source voltage, and rdvd represents the resistance value of the voltage-controlled resistor.

9. The method according to claim 1, characterized in that The defining the structure of the sub-circuit according to the working effect to be simulated includes: When the operating effect is the self-heating effect, the sub-circuit includes a second port and a third port, a first voltage-controlled current source and a thermistor located between the second port and the third port; the current value of the first voltage-controlled current source changes with the potential difference between the second port and the third port.

10. The method according to claim 9, wherein Connecting the initial model to the sub-circuit to simulate the operating effect of the LDMOS transistor includes: Connecting the sub-circuit between the drain and the source of the LDMOS transistor in the initial model; Adjusting the resistance value of the thermistor according to the temperature, so that the potential difference between the second port and the third port changes to adjust the current value of the first voltage-controlled current source, so as to simulate the heat generated by the LDMOS transistor under different operating conditions according to the change of the current value of the first voltage-controlled current source, so as to simulate the self-heating effect of the LDMOS transistor.

11. The method according to claim 10, wherein According to the formula Adjust the current value of the first voltage-controlled current source; where Igrth1 represents the current value of the first voltage-controlled current source, v(t1,0) represents the potential difference between the second port and the third port, tempk represents the temperature constant, k represents the exponential factor, and i(rdmacro) represents the drain current.

12. The method according to claim 1, wherein Defining the structure of the sub-circuit according to the operating effect to be simulated includes: When the operating effect is the impact ionization effect, the sub-circuit includes a first connection end and a second voltage-controlled current source; the current value of the second voltage-controlled current source changes with at least one of the gate-source voltage, body region voltage of the LDMOS transistor, and the voltage difference from the first connection end to the drain.

13. The method according to claim 12, wherein Connecting the initial model to the sub-circuit to simulate the operating effect of the LDMOS transistor includes: Connecting the first connection port of the sub-circuit to the drain of the LDMOS transistor in the initial model, and connecting the second voltage-controlled current source between the drain and the body region of the LDMOS transistor; Adjusting the current value of the second voltage-controlled current source according to at least one of the gate-source voltage, body region voltage of the LDMOS transistor, and the voltage difference from the first connection end to the drain, so as to simulate the impact ionization effect of the LDMOS transistor.

14. The method according to claim 13, wherein According to the formula Adjust the current value of the second voltage-controlled current source; Wherein, igid represents the base current value of the second voltage-controlled current source, igid0 represents the initial current value, dwumgid represents the width variation of the LDMOS transistor, wum represents the width of the LDMOS transistor, wwngid represents the exponential factor of the width variation, gid represents the current value of the second voltage-controlled current source, f(v(d,s)) represents a function of the drain-source voltage v(d,s), vdgidp represents the influence exponent of v(d,s), f(v(d,n11)) represents a function of the voltage difference v(d,n11) from the first connection terminal to the drain, vd1gidp represents the influence exponent of v(d,n11), f(v(g,s)) represents a function of the gate-source voltage v(g,s), vggidp represents the influence exponent of v(g,s), v(b,s) represents the voltage difference from the body region to the source, vbgid and vggidp represent the influence coefficients of v(g,s), ptg1 and ptg2 represent coefficients related to temperature, ptg1w and ptg2w represent coefficients related to temperature and width, and tdelta represents the temperature variation.

15. The method according to claim 1, wherein The simulating the operating effect of the LDMOS transistor includes: Defining linear region parameters to describe the voltage and current characteristics of the LDMOS transistor in the linear region, and defining saturation region parameters to describe the voltage and current characteristics of the LDMOS transistor in the saturation region; wherein, the linear region is the region where the drain current is linearly related to the drain-source voltage, and the saturation region is the region where the drain current no longer increases with the increase of the drain-source voltage.

16. The method according to claim 1, wherein The method further includes: Obtaining the static parameters and dynamic parameters of the LDMOS transistor to be tested with different voltage levels of the LDMOS transistor; Adjusting the parameters of the initial model according to the static parameters and dynamic parameters of the LDMOS transistor to be tested to obtain the initial model corresponding to the LDMOS transistor to be tested; Connecting the initial model corresponding to the LDMOS transistor to be tested with the sub-circuit to simulate the operating effect of the LDMOS transistor to be tested.

17. A modeling device for a semiconductor device, characterized in that, Including: A determination module for determining the static parameters and dynamic parameters of the LDMOS transistor; The static parameters characterize the static characteristics of the LDMOS transistor, and the dynamic parameters characterize the dynamic characteristics of the LDMOS transistor under different operating conditions; A construction module for constructing the initial model of the LDMOS transistor according to the static parameters and the dynamic parameters; A definition module for defining the structure of the sub-circuit according to the operating effect to be simulated; the structure of the sub-circuit includes connection ports and the connection manner of electrical components; A simulation module for connecting the initial model with the sub-circuit to simulate the operating effect of the LDMOS transistor.

18. An electronic device, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the method according to any one of claims 1-16.

19. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the method according to any one of claims 1-16.

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