Charge-coupled device with multi-well structure and preparation method thereof
Through the multi-well structure design, the charge-coupled device solves the problem of halo in strong light of CCD devices, effectively discharge of excess charge, maintains imaging quality, and is suitable for devices such as frame transfer CCD and inter-row transfer CCD.
Patent Information
- Application Number
- CN202510529909.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-25
- Publication Date
- 2025-07-25
AI Technical Summary
Existing CCD devices are prone to halo when they are exposed to strong light or photointegration time too long, resulting in a decrease in imaging quality. The existing longitudinal anti-halo structure design is complex and difficult to optimize.
Using a multi-well structure design, weak doped channels are formed through the composite well regions of the first, second and third wells, and combined with the groove resistance and dielectric layer, the excess charge leakage of the charge-coupled device is achieved to avoid affecting adjacent pixels.
Effectively venting excess charge, maintaining imaging quality, and not affecting the storage of adjacent pixel signals. It is suitable for different types of CCD devices, especially when working under local strong light, and does not affect the imaging effect.
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Figure CN120379369A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a charge - coupled device with a multi - well structure and a method for preparing the same, belonging to the field of semiconductor technology. Background Art
[0002] The core of a charge - coupled device (CCD) is a register composed of MOS capacitors, including a photosensitive area shift register (pixel unit) for collecting signals, a storage shift register for temporarily storing signals, and a horizontal register for serially outputting signals. These registers are all controlled by gate voltages, enabling signal charges to be generated, stored, and transferred within the register, that is, the charge transfer channel of the CCD.
[0003] The pixel unit is the core structure for the CCD device to achieve optoelectronic signal conversion. The converted charges are stored in the MOS capacitor. When the charge amount stored in this capacitor exceeds the upper limit, the charges will overflow from this pixel, affecting the optoelectronic conversion of adjacent pixels.
[0004] Under the condition of reaching the limited charge capacity of a single photosensitive unit or the maximum charge transfer capacity of the CCD, all CCD image sensors will reach saturation, thereby generating a blooming phenomenon. Once saturation occurs at the charge collection position, such as the photosensitive unit or the storage unit, the accumulation of other photo - generated charges will cause excess to overflow into adjacent device structures. When the CCD device is used for imaging detection, there are blooming phenomena caused by strong light irradiation or relatively long light integration time, resulting in reduced image clarity or even abnormal imaging. These phenomena will seriously affect the imaging quality of the CCD. Therefore, an anti - blooming structure is designed in the CCD device so that excess photo - generated charges can be discharged without affecting adjacent units.
[0005] The basic method for suppressing blooming is to absorb excess photo - generated carriers through a discharge channel when they overflow from the pixel, so as to prevent diffusion to adjacent pixels. There are two common anti - blooming structures. The first is a lateral structure, which adds an anti - blooming gate in the CCD pixel to allow excessive charges to laterally overflow into adjacent overflow drains. The other is a vertical structure, which vertically absorbs excess photo - charges into the substrate of the sensor. Compared with the lateral anti - blooming structure, the vertical anti - blooming has the advantages of a compact structure, without occupying photosensitive area on the image sensor; high efficiency, directly discharging excess charges to the device substrate; and being beneficial to reducing dark signals. However, it is necessary to construct a potential barrier under the photosensitive pixel and adjust it through the substrate potential. Its structure is relatively complex and difficult to optimize. It is necessary to construct a weakly doped well region under the photosensitive unit, which is a technical difficulty. Summary of the Invention
[0006] The object of the present invention is to overcome the deficiencies in the prior art and provide a charge-coupled device with a multi-well structure and a preparation method thereof. A composite well region is formed through the design of the multi-well structure of the first well, the second well, and the third well. By means of multiple well region implantations with different mask patterns, the doping distribution in the well region is precisely controlled.
[0007] To achieve the above object, the present invention is implemented by the following technical solutions: In a first aspect, the present invention provides a charge-coupled device with a multi-well structure, including: An epitaxial layer disposed on a substrate; A composite well region disposed on the epitaxial layer, the composite well region including a first well, a second well, and a third well, and a saddle point is formed at the pixel center by the first well and the third well, so that the well doping below the CCD pixel unit is weaker than that on both sides, forming a weakly doped channel in the composite well region for the charge-coupled device to discharge excess charges; A CCD charge channel disposed on the composite well region; A channel stopper disposed on the composite well region and located on both sides of the CCD charge channel for isolating the CCD charge channels between different unit columns of the charge-coupled device; A dielectric layer disposed on the upper surfaces of the CCD charge channel and the channel stopper; A polysilicon gate disposed on the upper surface of the dielectric layer as a functional electrode of the charge-coupled device.
[0008] In some embodiments, the charge-coupled device with a multi-well structure further includes a passivation layer disposed on the upper surface of the polysilicon gate for protecting the charge-coupled device.
[0009] In some embodiments, the upper surface of the channel stopper is flush with the upper surface of the CCD charge channel.
[0010] In some embodiments, the dielectric layer includes a silicon dioxide dielectric layer and a silicon nitride dielectric layer disposed in sequence from bottom to top; The silicon dioxide dielectric layer is disposed on the upper surfaces of the CCD charge channel and the channel stopper to form electrical isolation between the polysilicon gate and the silicon surface and buffer the stress of the silicon nitride dielectric layer; The silicon nitride dielectric layer is disposed between the silicon dioxide dielectric layer and the polysilicon gate to increase the breakdown voltage between the polysilicon gate and the silicon surface.
[0011] In some embodiments, the substrate uses a wafer.
[0012] In a second aspect, the present invention provides a preparation method of the charge-coupled device with a multi-well structure according to any one of the foregoing, including: Forming an epitaxial layer on a substrate; Control the saddle point position of the composite well region using the first mask pattern, perform boron ion implantation, and conduct thermal push well to form the doping distribution of the first well; Use the second mask pattern to dope with the maximum energy to obtain a reverse boron distribution under the buried channel, thereby reducing the anti-halo operating voltage and forming the doping distribution of the second well; Use the third mask pattern to perform boron ion implantation again, adjust the doping distribution, and form the doping distribution of the third well. The first well, the second well, and the third well constitute the composite well region; Use the fourth mask pattern, perform phosphorus ion implantation and annealing to form a CCD charge channel, and a depletion region is formed between the CCD charge channel and the composite well region; Use the fifth mask pattern, perform boron ion implantation to form channel stoppers on both sides of the CCD charge channel; Form a dielectric layer on the upper surface of the CCD charge channel and the channel stoppers; Form a polysilicon gate on the dielectric layer through a deposition process.
[0013] In some embodiments, the dielectric layer includes a silicon dioxide dielectric layer and a silicon nitride dielectric layer arranged in sequence from bottom to top. Then, forming a dielectric layer on the upper surface of the CCD charge channel and the channel stoppers includes: Form a silicon dioxide dielectric layer on the upper surface of the CCD charge channel and the channel stoppers through an oxidation process; Form a silicon nitride dielectric layer on the upper surface of the silicon dioxide dielectric layer through a deposition process.
[0014] In some embodiments, the charge-coupled device further includes a passivation layer disposed on the upper surface of the polysilicon gate. Then, after forming the polysilicon gate, it further includes: Form a passivation layer on the upper surface of the polysilicon gate.
[0015] Compared with the prior art, the beneficial effects achieved by the present invention: The present invention provides a charge-coupled device with a multi-well structure and a preparation method thereof. Through the multi-well structure design of the first well, the second well, and the third well, a weakly doped channel of the composite well region is formed below the CCD pixel unit, so that when the signal charges of the CCD device are in excess, they can be discharged to the substrate from here without affecting the storage of the signal charges of the adjacent pixels of the CCD. This structure does not change the working mode and timing of the device itself. Therefore, this structure is applicable to different types of devices such as frame transfer CCDs and interline transfer CCDs. It enables the CCD device to have the ability to discharge excess charges and can work under local strong light in the picture without affecting the imaging effect. Description of the Drawings
[0016] Figure 1 It is a schematic structural diagram of the charge-coupled device in the embodiment of the present invention.
[0017] Figure 2Schematic diagram of the formation of a multi-well structure in a charge-coupled device according to an embodiment of the present invention.
[0018] Figure 3 Schematic diagram of the formation of the first well according to an embodiment of the present invention.
[0019] Figure 4 Schematic diagram of the formation of the second well according to an embodiment of the present invention.
[0020] Figure 5 Schematic diagram of the formation of the third well according to an embodiment of the present invention. Detailed implementation manners
[0021] The present invention will be further described below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solutions of the present invention and should not be used to limit the protection scope of the present invention.
[0022] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation of the present invention. In addition, the terms "first", "second", etc. are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, the features defined with "first", "second", etc. may explicitly or implicitly include one or more of such features. In the description of the present invention, unless otherwise specified, the meaning of "a plurality" is two or more.
[0023] In the description of the present invention, it should be noted that unless otherwise clearly defined and limited, the terms "installed", "connected", "connected" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood through specific situations.
[0024] Embodiment 1, as Figure 1 shown, this embodiment introduces a charge-coupled device with a multi-well structure, including: An epitaxial layer 7, disposed on the substrate; The composite well region 6 is disposed on the epitaxial layer 7. The composite well region 6 includes a first well 6-1, a second well 6-2, and a third well 6-3. The first well and the third well form saddle points at the pixel center, such that the doping of the well below the CCD pixel unit needs to be weaker than that on both sides, forming a weakly doped channel in the composite well region for the charge-coupled device to discharge excess charges; The CCD charge channel 5 is disposed on the composite well region 6; The channel stopper 8 is disposed on the composite well region 6 and on both sides of the CCD charge channel 5, for isolating the CCD charge channels 5 between different unit columns of the charge-coupled device; The dielectric layer is disposed on the upper surfaces of the CCD charge channel 5 and the channel stopper 8; The polysilicon gate 2 is disposed on the upper surface of the dielectric layer and serves as a functional electrode of the charge-coupled device.
[0025] In some embodiments, the charge-coupled device having a multi-well structure further includes a passivation layer 1. The passivation layer 1 is disposed on the upper surface of the polysilicon gate 2 for protecting the charge-coupled device.
[0026] In some embodiments, the upper surface of the channel stopper 8 is flush with the upper surface of the CCD charge channel 5.
[0027] In some embodiments, the dielectric layer includes a silicon dioxide dielectric layer 4 and a silicon nitride dielectric layer 3 disposed in sequence from bottom to top; The silicon dioxide dielectric layer 4 is disposed on the upper surfaces of the CCD charge channel 5 and the channel stopper 8, forming electrical isolation between the polysilicon gate 2 and the silicon surface (including the CCD charge channel 5 and the channel stopper 8), and playing a role in buffering the stress of the silicon nitride dielectric layer 3; The silicon nitride dielectric layer 3 is disposed between the silicon dioxide dielectric layer 4 and the polysilicon gate 2 for increasing the breakdown voltage between the polysilicon gate 2 and the silicon surface.
[0028] In some embodiments, the substrate uses a wafer.
[0029] In some embodiments, the doping distribution of the first well presents a composite well doping distribution that bulges upward, and the doping distribution of the third well presents a composite well doping distribution that depresses downward. Figure 1 In the shown cross-sectional view, the boron ion doping concentration on both sides below the CCD pixel is large and is distributed in a relatively large area from the wafer to the deep layer, while the doping concentration in the middle part is relatively low and the doping area is small. In the working state of applying a specific voltage to the CCD substrate, a channel more conducive to discharging the excess charges of the CCD can be formed. This composite well structure forms a weakly doped region at a specific position.
[0030] It should be noted that, in order to better discharge the excess charge of the CCD device, in this application, by adopting different mask patterns and performing multiple well region implantations, the doping distribution of the well region is precisely controlled. As Figure 1 , Figure 2 shown, the well doping under the finally formed CCD pixel needs to be weaker than that on both sides, and its upper and lower doping distributions are similar to a sine or saddle shape, forming a saddle point at the pixel center. The weakly doped region in the well is exactly located in the middle of the CCD channel. When the CCD device is working, the well is biased with a low voltage and the substrate is biased with a high voltage.
[0031] In order to reduce the substrate voltage, the well region layer under the CCD charge channel should be thinner. In order to form a thin composite well region under the CCD charge channel 5, generally a mask is prepared before implanting the composite well, so that there is no boron ion impurity under the buried channel storage phase, and then through a long-time high-temperature well pushing, the boron ion impurity diffuses to the lower part of the N buried channel storage phase, thereby forming a thin composite well layer.
[0032] After the composite well implantation, the wafer undergoes a long-time high-temperature annealing to make the implanted boron ions diffuse deep into the silicon. The outward diffusion of ions occurs not only in depth but also laterally.
[0033] In order to enable the photosensitive unit to have good optoelectronic performance while precisely achieving the designed doping distribution and achieving the goal of discharging excess charge, the present invention adopts a three-time implantation method to better achieve the designed doping distribution, that is, a double composite well structure.
[0034] Example 2, this example provides a method for manufacturing a charge-coupled device with a multi-well structure according to any one of the embodiments in Example 1, including: S1. Form an epitaxial layer 7 on the substrate; S2. Adopt a three-time implantation method to form a composite well region 6 on the epitaxial layer 7; specifically including the following steps: S21. As Figure 3 shown, use the first mask pattern 9-1 to control the saddle point position of the composite well region, implant boron ions, and perform a high-temperature thermal well push for about 10 hours to form the doping distribution of the first well 6-1; S22. Do a thin p-type layer as deep as possible under the N channel (it can be doped in the whole pixel). As Figure 4 shown, this step needs to use the second mask pattern 9-2 to dope with the maximum energy to obtain a reverse boron distribution under the buried channel, thereby reducing the anti-halo operating voltage and forming the doping distribution of the second well 6-2; S23. As Figure 5 shown, use the third mask pattern 9-3 to implant boron ions again to adjust the doping distribution and form the doping distribution of the third well 6-3. The first well, the second well, and the third well constitute the composite well region 6; Through the three processes of S21 - S23, a Figure 1 type doping distribution of the composite well region 6 as shown is formed.
[0035] S3. Using the fourth mask pattern, phosphorus ion implantation and annealing are carried out to form the CCD charge channel 5. A depletion region is formed between the CCD charge channel 5 and the composite well region 6, which is the region where the optical charge of the CCD device is generated.
[0036] S4. Using the fifth mask pattern, a large dose of boron ion implantation is carried out to form channel stoppers 8 on both sides of the CCD charge channel 5 (that is, the meaning of the CCD charge channel blocking layer, realizing the isolation between different unit columns of the CCD device). S5. A dielectric layer is formed on the upper surfaces of the CCD charge channel 5 and the channel stoppers 8. S6. A polysilicon gate 2 is formed on the dielectric layer through a deposition process.
[0037] In some embodiments, the dielectric layer includes a silicon dioxide dielectric layer 4 and a silicon nitride dielectric layer 3 arranged in sequence from bottom to top. Then, forming a dielectric layer on the upper surfaces of the CCD charge channel 5 and the channel stoppers 8 includes: S51. A silicon dioxide dielectric layer 4 is formed on the upper surfaces of the CCD charge channel 5 and the channel stoppers 8 through an oxidation process. S52. A silicon nitride dielectric layer 3 is formed on the upper surface of the silicon dioxide dielectric layer 4 through a deposition process.
[0038] In some embodiments, the charge - coupled device further includes a passivation layer 1 provided on the upper surface of the polysilicon gate 2. Then, after forming the polysilicon gate 2, it further includes: S7. A passivation layer 1 is formed on the upper surface of the polysilicon gate 2.
[0039] Furthermore, the material of the passivation layer 1 can be silicon dioxide.
[0040] In summary, the present invention provides a charge - coupled device with a multi - well structure and a preparation method thereof. Through the multi - well structure design of the first well, the second well, and the third well, a weakly doped channel of the composite well region is formed below the CCD pixel unit. When the signal charge of the CCD device is excessive, it can be discharged to the substrate from here without affecting the storage of the signal charge of adjacent pixels of the CCD. This structure does not change the working mode and timing of the device itself. Therefore, this structure is applicable to different types of devices such as frame - transfer CCDs and inter - line transfer CCDs. The CCD device has the ability to discharge excessive charges and can work under local strong light in the picture without affecting the imaging effect.
[0041] The above - mentioned are only the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the technical principle of the present invention, several improvements and deformations can be made, and these improvements and deformations should also be regarded as the protection scope of the present invention.
Claims
1. A charge-coupled device having a multi-well structure, characterized in that, Comprising: An epitaxial layer disposed on a substrate; A composite well region disposed on the epitaxial layer, the composite well region including a first well, a second well, and a third well, and the first well and the third well forming a saddle point at the pixel center, such that the doping of the well below the CCD pixel unit needs to be weaker than that on both sides, forming a weakly doped channel in the composite well region for the charge-coupled device to discharge excess charges; A CCD charge channel disposed on the composite well region; A channel stopper disposed on the composite well region and located on both sides of the CCD charge channel for isolating the CCD charge channels between different unit columns of the charge-coupled device; A dielectric layer disposed on the upper surfaces of the CCD charge channel and the channel stopper; A polysilicon gate disposed on the upper surface of the dielectric layer as a functional electrode of the charge-coupled device.
2. The charge-coupled device with a multi-well structure according to claim 1, wherein, Further comprising a passivation layer disposed on the upper surface of the polysilicon gate for protecting the charge-coupled device.
3. The charge-coupled device with a multi-well structure according to claim 1, wherein The upper surface of the channel stopper is flush with the upper surface of the CCD charge channel.
4. The charge-coupled device with a multi-well structure according to claim 1, characterized in that, The dielectric layer includes a silicon dioxide dielectric layer and a silicon nitride dielectric layer disposed in sequence from bottom to top; The silicon dioxide dielectric layer is disposed on the upper surfaces of the CCD charge channel and the channel stopper to form electrical isolation between the polysilicon gate and the silicon surface and to buffer the stress of the silicon nitride dielectric layer; The silicon nitride dielectric layer is disposed between the silicon dioxide dielectric layer and the polysilicon gate for increasing the breakdown voltage between the polysilicon gate and the silicon surface.
5. The charge-coupled device with a multi-well structure according to claim 1, characterized in that, The substrate uses a wafer.
6. The charge-coupled device with a multi-well structure according to claim 1, characterized in that, The doping distribution of the first well presents a composite well doping distribution that bulges upward, and the doping distribution of the third well presents a composite well doping distribution that depresses downward.
7. The charge-coupled device with a multi-well structure according to claim 2, characterized in that, The passivation layer is silicon dioxide.
8. A method for manufacturing a charge-coupled device having a multi-well structure according to any one of claims 1 to 7, characterized in that, Comprising: Forming an epitaxial layer on a substrate; Using a first mask pattern to control the saddle point position of the composite well region, implanting boron ions, and performing thermal pushing of the well to form the doping distribution of the first well; Using a second mask pattern to dope with the maximum energy to obtain a boron reverse distribution below the buried channel, thereby reducing the anti-halo operating voltage to form the doping distribution of the second well; Using a third mask pattern to implant boron ions again to adjust the doping distribution to form the doping distribution of the third well, and the first well, the second well, and the third well constitute the composite well region; Using a fourth mask pattern, implanting phosphorus ions and annealing to form a CCD charge channel, and a depletion region is formed between the CCD charge channel and the composite well region; Using a fifth mask pattern, implanting boron ions to form channel stoppers on both sides of the CCD charge channel; Forming a dielectric layer on the upper surfaces of the CCD charge channel and the channel stopper; Forming a polysilicon gate on the dielectric layer through a deposition process.
9. The control method of a charge-coupled device having a multi-well structure according to claim 8, characterized in that, The dielectric layer includes a silicon dioxide dielectric layer and a silicon nitride dielectric layer disposed in sequence from bottom to top; then forming a dielectric layer on the upper surfaces of the CCD charge channel and the channel stopper includes: Forming a silicon dioxide dielectric layer on the upper surfaces of the CCD charge channel and the channel stopper through an oxidation process; Forming a silicon nitride dielectric layer on the upper surface of the silicon dioxide dielectric layer through a deposition process.
10. The control method of a charge-coupled device having a multi-well structure according to claim 8, characterized in that, The charge-coupled device further includes a passivation layer disposed on the upper surface of the polysilicon gate, then after forming the polysilicon gate, further including: Forming a passivation layer on the upper surface of the polysilicon gate.
