Circuit board interlayer connection detection method, device and equipment

Abstract

The invention relates to the technical field of circuit boards, and discloses a circuit board interlayer connection detection method, device and equipment, and the method comprises the steps: carrying out the electrical characteristic parameter measurement of a multilayer flexible circuit board, and obtaining the characteristic parameter data of the circuit board; designing and arranging a multi-test-point detection structure on the multi-layer flexible circuit board, and performing signal excitation to obtain test point position information; applying a differential excitation signal, and collecting a differential response waveform between the test points to obtain a time domain reflection signal feature; impedance spectrum conversion and parameter extraction are carried out on the time domain reflection signal features, and an interlayer connection impedance distribution diagram is obtained; and establishing an interlayer connection defect characteristic model aiming at nickel-based alloy wire fracture, interface cracking and liquid metal fiber felt delamination in various bending states by utilizing the interlayer connection impedance distribution diagram, so that accurate classification of defect types and severity is realized, and interlayer connection faults and surface welding quality problems can be distinguished; and the misjudgment rate is greatly reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit boards, and in particular to a method, device and equipment for detecting interlayer connections of circuit boards. Background Art

[0002] Traditional methods for detecting interlayer connections of circuit boards mainly rely on bed-of-nails testing, optical inspection or X-ray imaging technology. These methods have obvious limitations when dealing with flexible circuit boards, especially for structures with interlayer connections between liquid metal fiber mats and copper foils. They cannot effectively capture the characteristic changes in the bent state. In addition, traditional single-point impedance measurement technology often can only provide information on the static connection state, and it is difficult to comprehensively evaluate the integrity and reliability of interlayer connections under dynamic bending conditions.

[0003] Another significant problem of the prior art in flexible circuit detection is insufficient resolution. In particular, it is difficult to detect early faults such as microcracks, partial detachment or oxidation in the nickel-based alloy wire and copper foil connection in a timely manner. Traditional time-domain reflectometry (TDR) technology faces challenges such as overlapping reflection signals and large noise interference in the application of flexible circuit boards, resulting in unstable detection results and being easily affected by environmental factors. At the same time, due to the special physical properties of liquid metal fiber mats, it is difficult to accurately evaluate the interface connection quality between them and traditional metal conductors, especially the state changes after multiple bends are more difficult to capture. Summary of the Invention

[0004] The present invention provides a method, device and equipment for detecting interlayer connections of circuit boards. The present invention realizes accurate classification of the types and severity of defects, and can distinguish interlayer connection faults from surface soldering quality problems, greatly reducing the misjudgment rate.

[0005] In a first aspect, the present invention provides a method for detecting interlayer connections of circuit boards, and the method for detecting interlayer connections of circuit boards includes: Measuring the electrical characteristic parameters of a multi-layer flexible circuit board to obtain circuit board characteristic parameter data; Designing and arranging a multi-test point detection structure on the multi-layer flexible circuit board according to the circuit board characteristic parameter data and performing signal excitation to obtain test point position information; Applying a differential excitation signal to the test points corresponding to the test point position information, collecting the differential response waveforms between the test points, and processing the differential response waveforms through an adaptive deconvolution algorithm to obtain time-domain reflection signal characteristics; Performing impedance spectrum conversion and parameter extraction on the time-domain reflection signal characteristics to obtain an interlayer connection impedance distribution map; Create an interlayer connection defect feature model for the fracture of nickel-based alloy wires, interface cracking, and delamination of liquid metal fiber mats under various bending states by using the interlayer connection impedance distribution map.

[0006] In a second aspect, the present invention provides a device for detecting interlayer connection of a circuit board. The device for detecting interlayer connection of a circuit board includes: A parameter measurement module for measuring electrical characteristic parameters of a multi-layer flexible circuit board to obtain circuit board characteristic parameter data; A signal excitation module for designing and arranging a multi-test point detection structure on the multi-layer flexible circuit board according to the circuit board characteristic parameter data and performing signal excitation to obtain test point position information; A processing module for applying a differential excitation signal to the test points corresponding to the test point position information, collecting the differential response waveforms between the test points, and processing the differential response waveforms through an adaptive deconvolution algorithm to obtain time-domain reflection signal characteristics; A conversion module for performing impedance spectrum conversion and parameter extraction on the time-domain reflection signal characteristics to obtain an interlayer connection impedance distribution map; A creation module for creating an interlayer connection defect feature model for the fracture of nickel-based alloy wires, interface cracking, and delamination of liquid metal fiber mats under various bending states by using the interlayer connection impedance distribution map.

[0007] In a third aspect of the present invention, there is provided a computer device, including: a memory and at least one processor, wherein instructions are stored in the memory; the at least one processor calls the instructions in the memory to enable the computer device to execute the above-mentioned method for detecting interlayer connection of a circuit board.

[0008] In the technical solution provided by the present invention, by establishing a multi-layer PCB distributed parameter network model, combining the differential time domain reflection technology and the adaptive deconvolution algorithm, the fault location of the interlayer connection can be accurately located, and various defect types including the fracture of nickel-based alloy wires, interface cracking, and delamination of liquid metal fiber mats can be effectively identified. The bending deformation parameter is introduced and the defect feature library under different bending angles is constructed, so that the detection system can effectively evaluate the interlayer connection reliability of the flexible printed circuit board during actual use, overcoming the limitation that the traditional detection method is only applicable to the static planar state. By adopting the multi-test point signal synthesis technology and the adaptive deconvolution algorithm, the overlapping reflection signals can be separated, and the detection sensitivity to the joints of special materials such as nickel-based alloy wires and liquid metal fiber mats can be significantly improved, effectively solving the problem that it is difficult to comprehensively evaluate the interlayer connection integrity by traditional single-point impedance measurement. By performing impedance spectrum conversion and parameter extraction on the time domain reflection signal, this method not only obtains static parameters such as DC resistance, but also analyzes dynamic characteristics such as the high-frequency impedance limit value and impedance bandwidth, providing a more comprehensive basis for evaluating the interlayer connection quality. Based on the defect feature model constructed by the standardized eigenvector, combined with the Mahalanobis distance metric and the k-nearest neighbor algorithm, this method realizes the accurate classification of the defect type and severity, and can distinguish the interlayer connection fault from the surface soldering quality problem, greatly reducing the misjudgment rate. It maintains stable detection performance within the range of process parameter changes such as copper foil thickness and rubber slip ring elastic coefficient, has excellent resistance to manufacturing process variations and environmental disturbances, and is applicable to the detection of flexible printed circuit boards under different manufacturing process conditions. Description of the Drawings

[0009] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0010] Figure 1 It is a schematic diagram of the steps of the method for detecting the interlayer connection of the circuit board in the embodiment of the present invention; Figure 2 It is a schematic diagram of the structure of the device for detecting the interlayer connection of the circuit board in the embodiment of the present invention; Figure 3 It is a schematic block diagram of the structure of the computer device in the embodiment of the present invention. Detailed Embodiments

[0011] An embodiment of the present invention provides a method, device, and equipment for detecting interlayer connection of a circuit board. The terms "first", "second", "third", "fourth", etc. (if any) in the specification, claims, and the above-mentioned drawings of the present invention are used to distinguish similar objects, and do not necessarily describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so that the embodiments described here can be implemented in an order other than those illustrated or described here. In addition, the term "comprising" or "having" and any variation thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or equipment that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or are inherent to these processes, methods, products, or equipment.

[0012] For ease of understanding, the specific process of the embodiment of the present invention will be described below. Please refer to Figure 1 , an embodiment of the method for detecting interlayer connection of a circuit board in the embodiment of the present invention includes: Step S1: Measure the electrical characteristic parameters of the multi-layer flexible circuit board to obtain the circuit board characteristic parameter data; It can be understood that the execution subject of the present invention can be a device for detecting interlayer connection of a circuit board, or a terminal or a server. Specifically, it is not limited here. The embodiment of the present invention takes the server as the execution subject as an example for illustration.

[0013] Specifically, the multi-layer flexible printed circuit board is divided into units, and the PCB structure is divided into several tiny units. The length of each unit is set at the level of 0.1 mm to obtain the PCB micro-unit structure data that can fully reflect the spatial distribution characteristics of the printed circuit board. On this basis, a high-precision thickness measuring instrument is used to measure the key material structure parameters in each micro-unit, and the copper foil thickness, dielectric layer thickness, nickel-based alloy wire diameter, and liquid metal fiber felt thickness of each unit are respectively recorded to form a PCB unit material parameter set. According to the PCB unit material parameter set and combined with relevant electromagnetic theory formulas, the distributed resistance, distributed inductance, distributed capacitance, and distributed conductance values of each micro-unit are derived to obtain a group of PCB unit electrical characteristic parameters reflecting electrical characteristics. For the surface copper foil layer, an equivalent model is established for it through the transmission line theory model of unit length. The distributed resistance is expressed by the resistivity of copper and the geometric parameters of the copper foil. The distributed inductance is calculated through empirical formulas such as the Wheeler formula. The distributed capacitance is solved in combination with the dielectric constant and structural thickness of the dielectric layer. The distributed conductance is determined in combination with the frequency and dielectric loss parameters. At the same time, for different structural parts of the interlayer connection, a differentiated equivalent circuit modeling idea is adopted. For example, at the connection between the nickel-based alloy wire and the copper foil, an equivalent circuit composed of a series resistance and a parallel capacitance is used to reflect its electrical coupling characteristics; while the longitudinal transmission characteristics of the nickel-based alloy wire itself are expressed by a series of distributed resistance and distributed inductance; for the liquid metal fiber felt, a π-type network model composed of distributed resistance, distributed inductance, and distributed capacitance is constructed to accurately model the electrical performance of this flexible high-conductor layer. The electrical models of the above-mentioned structural units are cascaded and combined according to the actual PCB topology, and the bending deformation parameters commonly encountered in the actual use of the flexible printed circuit board are introduced. Parameters such as the amount of deformation and the bending angle are used to dynamically correct the electrical characteristics at the connection points to form a bending-sensitive interlayer connection equivalent circuit model. Based on the complete equivalent circuit structure, the electromagnetic field distribution of the entire model in a wide frequency band is numerically solved through the finite element simulation algorithm to obtain the printed circuit board characteristic parameter data that can accurately characterize the electrical performance change trends of the overall and local regions of the printed circuit board under different structures and different working conditions (including different bending angles).

[0014] Step S2: Design and arrange a multi-test point detection structure on the multi-layer flexible printed circuit board according to the printed circuit board characteristic parameter data and perform signal excitation to obtain the test point position information; Specifically, based on the S-parameter matrix in the characteristic parameter data of the circuit board, simulated annealing calculation of test points is performed on the multi-layer flexible circuit board. Using intelligent optimization algorithms such as simulated annealing, a global optimization search is carried out on the S-parameter matrix. Combining the physical constraints of the circuit board structure and the actual test requirements, an optimized distribution function of test points is constructed. The goal of this function is to maximize the identifiability and test sensitivity of the system test matrix, thereby ensuring the accuracy and resolution of subsequent signal injection and defect inversion. N test points are determined according to the optimized distribution function of test points to form an initial test point layout plan. Based on the initial test point layout plan, high-precision test probes are installed one by one at the surface of the circuit board and the positions of key interlayer structures. Each probe needs to ensure low contact resistance and strong mechanical stability to construct a multi-test-point detection structure. A differential time-domain reflectometer measurement system is configured around this detection structure. The system consists of a high-performance pulse generator, a differential signal converter, a high-speed data acquisition unit, and a high-precision signal processor. Among them, the pulse generator generates narrow pulses or multi-frequency superimposed excitation signals. The differential signal converter converts the signals into differential signal pairs suitable for multi-point detection. The data acquisition unit captures the reflected and transmitted signals at an extremely high sampling rate. The signal processor is responsible for signal pre-filtering, denoising, and synchronization control. For each test point of this system, a dedicated excitation signal sequence is designed. Each group of signal sequences is composed of multiple groups of sine signals with different frequencies superimposed and combined, so that its spectral distribution can cover the expected detection bandwidth, thereby enhancing the response ability to different spatial resolutions and defect types. At the same time, in order to improve the complementarity between multiple test points and the information decoupling ability of the overall system, a specific phase difference control is introduced into the excitation signals used for different test points. For example, a progressive phase shift is set according to the signal sequence number, so that the excitation signals between each point have clear separability and timing identification, improving the spatial resolution and error suppression ability of signal injection and defect response. Through systematic integration and collaborative calibration of the above multi-test-point detection structure and its signal configuration, high-precision test point position information and signal configuration data are obtained.

[0015] Step S3: Apply a differential excitation signal to the test points corresponding to the test point position information, collect the differential response waveforms between the test points, and process the differential response waveforms through an adaptive deconvolution algorithm to obtain the time-domain reflection signal characteristics; Specifically, in combination with the test point position information and the signal configuration data customized for each point, a dedicated differential excitation signal is injected into each test point in sequence. During each excitation, all the remaining test points serve as the response ends, and the received differential response waveforms are recorded in real time. In this way, based on multi-point mutual measurement, the time-domain coupling relationships between all test point pairs are systematically obtained, forming a global set of original differential response waveforms. The original differential response waveforms collected for each group are sampled repeatedly multiple times, and the average value of the repeated data is calculated to improve the signal-to-noise ratio and stability, obtaining representative differential response waveform data. The differential response waveform data is subjected to wavelet decomposition to decompose the original signal into wavelet coefficients with different frequencies and time resolutions. Then, through a soft threshold denoising processing strategy, high-frequency noise and atypical perturbations are adaptively weakened based on the noise standard deviation, and only the main structural reflection features and intrinsic signal components are retained. Based on the purified set of wavelet coefficients, a system transfer function model is established for the differential response waveform of each test point pair, and it is transformed into the frequency domain through the fast Fourier transform (FFT) to obtain the frequency-domain transfer characteristic data of the connections between points. An adaptive deconvolution algorithm is adopted, based on Wiener filtering, to automatically adjust parameters such as the noise-signal ratio, and through iterative optimization, the result of convolution removal converges to the true system response, obtaining optimized frequency-domain response characteristic data. The optimized frequency-domain data is transformed back to the time domain through the inverse fast Fourier transform (IFFT) to generate a time-domain impulse response signal. On this basis, through the scanning correlation method and a specific reflection feature extraction algorithm, various overlapping reflection signals are identified and separated to achieve reflection positioning and feature discrimination within a millimeter-level space, and finally, the time-domain reflection signal features are obtained.

[0016] Step S4: Perform impedance spectrum conversion and parameter extraction on the time-domain reflection signal features to obtain an interlayer connection impedance distribution map; Specifically, for each interlayer connection point, a time-domain reflection signal segment corresponding to the spatial position of the connection point is extracted from the high-resolution time-domain reflection signal feature data. This process relies on the previous test point layout scheme and the theoretical time-delay position calibration of the interlayer connection structure, so as to ensure that the signal segments extracted from each connection point truly reflect its local connection state. Perform a fast Fourier transform (FFT) or other efficient frequency-domain transformation method on the reflection signal segment of the interlayer connection point, map it to the frequency domain, and combine the reflection coefficient calculation formula. With ρ=(Z-Z0) / (Z+Z0) as the core, where Z is the impedance of the point to be measured and Z0 is the system reference impedance. By solving the reflection coefficient at each frequency point, the characteristic impedance of each interlayer connection point at different frequencies is deduced inversely, forming the interlayer connection characteristic impedance data. In order to perform a more physically meaningful parameterization of the impedance data, a second-order Foster network model is used to perform multi-parameter fitting on the above-mentioned characteristic impedance curve. The Foster model can effectively approximate the frequency response characteristics of the actual impedance through the combination of series and parallel resistors, inductors, and capacitors. After optimization by algorithms such as the least squares method, the impedance spectrum feature vector of each interlayer connection point is obtained. Key indicators including DC resistance, high-frequency impedance limit value, impedance bandwidth, resonant frequency, and quality factor are extracted from the impedance spectrum feature vector to reflect the conduction ability, radio frequency characteristics, and potential defect types and severity of the connection point in multiple dimensions. At the same time, combined with the theoretical impedance spectrum calculated by the distributed parameter network model, the measured parameters are compared with the theoretical model to reflect the absolute characteristics of the detection object and highlight the deviations and abnormalities of each connection point under actual manufacturing or service conditions. In order to achieve a global spatial connection impedance mapping, based on the impedance characteristic parameter set of all interlayer connection points, combined with the spatial position information of the previous test points and the topological structure of the actual PCB wiring, a spatial interpolation algorithm (such as Kriging interpolation, polynomial interpolation, etc.) is used to perform high-precision filling and transition on the discrete measurement point data, generating an interlayer connection impedance distribution map with continuous spatial resolution.

[0017] Step S5: Use the interlayer connection impedance distribution map to create an interlayer connection defect characteristic model for the fracture of nickel-based alloy wires, interface cracking, and delamination of liquid metal fiber mats under various bending states.

[0018] Specifically, a standard sample set including the fracture of nickel-based alloy wires, the cracking at the connection between nickel-based alloy wires and copper foils, the delamination at the interface between liquid metal fiber mats and copper foils, the uneven density of liquid metal fiber mats, the oxidation of nickel-based alloy wires, and the micro-cracks of copper foils is created based on the interlayer connection impedance distribution map. For each standard defect, grading criteria for mild, moderate, and severe levels are respectively set to ensure that the model covers different severity levels of defects. The impedance distribution of the standard samples is systematically measured and analyzed at multiple preset bending angles. By using the high-precision multi-point detection and spectral analysis methods consistent with the conventional detection process, the impedance characteristic spectrum data of the standard defects under different bending states are obtained, reflecting the electrical response essence and morphological change trend of the defects under actual deformation conditions. From the impedance characteristic spectrum data of the standard defects, multi-dimensional parameter indicators including DC resistance, high-frequency limit impedance, impedance bandwidth, resonance frequency, quality factor, impedance slope, mean square error of impedance, phase shift, group delay, and the first derivative of group delay are extracted. These parameters directly quantify the connection state and reveal the subtle changes in the influence of defects under different frequencies and deformation conditions. All parameters are normalized and standardized into a unified feature vector expression for subsequent pattern recognition and distance measurement. On this basis, based on the standardized feature vectors, feature distance calculations are performed using methods such as Euclidean distance and Mahalanobis distance, and the optimal weight coefficients of each feature in defect discrimination are determined through statistical learning algorithms such as Fisher discriminant analysis, constructing a feature metric standard that can maximize the discrimination of different types and grades of defects. Combining the above discrimination metric standard with the impedance characteristic spectrum data of the standard defects, through methods such as high-dimensional data visualization, clustering, and tensor decomposition, the three-dimensional elements of impedance, frequency, and bending angle are fused to establish a three-dimensional defect characterization space of impedance-frequency-bending angle, forming a three-dimensional, quantifiable, process-adaptive, and engineering-popularizable interlayer connection defect feature model.

[0019] In this embodiment, a full-process interlayer connection test is performed on the circuit board to be tested. By using the aforementioned multi-test-point excitation and high-precision response acquisition system, interlayer connection test data covering the entire board space is obtained. After noise suppression, deconvolution processing, and spectral analysis of these test data, a series of key parameters reflecting the connection health status, such as DC resistance, high-frequency limit impedance, impedance bandwidth, resonance frequency, and quality factor, are extracted from each test point to be measured. Combining with the previously established normalization standard, each test point to be measured can be digitally expressed through a unified standardized feature vector. Based on this, the Mahalanobis distance is calculated between the standardized feature vector and various typical defect standard feature vectors included in the interlayer connection defect feature model. As a measure of the similarity of multi-dimensional features between samples, the Mahalanobis distance quantifies the matching degree between the test point to be measured and various types of defects on the premise of fully considering the correlation of feature parameters. Through the Mahalanobis distance calculated between the standardized feature vector of each test point to be measured and the defect feature vectors of various types in the model, the similarity ranking of this point under different defect types is obtained, and thus the optimal defect type matching result is output. The k-nearest neighbor algorithm is used to classify the above preliminary matching results. The k-nearest neighbor algorithm realizes a comprehensive quantitative evaluation of the type and severity of the current test point to be measured by retrieving the k standard defect samples closest to the test point in the feature space and counting their distribution and category. The defect quantitative evaluation result is spatially fused with the wiring topology information of the circuit board, and through interpolation and spatial distribution modeling, an interlayer connection defect distribution map covering the entire board to be tested is generated. Multiple groups of tests are performed on the flexible board under different bending angles and stress states. By comparing the change trends of the defect distribution maps in each state, the bending sensitive areas, potential failure points, and structural optimization directions are effectively identified. Based on the above distribution analysis and state comparison, the interlayer connection defect analysis result of the circuit board to be tested is output, including defect type distribution, severity statistics, structural sensitivity evaluation, and engineering repair suggestions.

[0020] In the embodiments of the present invention, by establishing a multi-layer PCB distributed parameter network model, combining the differential time domain reflection technology and the adaptive deconvolution algorithm, the fault location of the interlayer connection can be accurately positioned, and various defect types including the fracture of nickel-based alloy wires, interface cracking, and delamination of liquid metal fiber mats can be effectively identified. By introducing the bending deformation parameter and constructing a defect feature library under different bending angles, the detection system can effectively evaluate the interlayer connection reliability of the flexible printed circuit board during actual use, overcoming the limitation that traditional detection methods are only applicable to the static planar state. By adopting the multi-test point signal synthesis technology and the adaptive deconvolution algorithm, the overlapping reflection signals can be separated, significantly improving the detection sensitivity at the joints of special materials such as nickel-based alloy wires and liquid metal fiber mats, and effectively solving the problem that it is difficult to comprehensively evaluate the integrity of the interlayer connection by traditional single-point impedance measurement. By performing impedance spectrum conversion and parameter extraction on the time domain reflection signal, this method not only obtains static parameters such as DC resistance, but also analyzes dynamic characteristics such as the high-frequency impedance limit value and impedance bandwidth, providing a more comprehensive basis for evaluating the quality of the interlayer connection. Based on the defect feature model constructed by the standardized eigenvector, combined with the Mahalanobis distance metric and the k-nearest neighbor algorithm, this method realizes the accurate classification of the defect type and severity, and can distinguish the interlayer connection fault from the surface soldering quality problem, greatly reducing the misjudgment rate. It maintains stable detection performance within the range of process parameter changes such as copper foil thickness and rubber slip ring elastic coefficient, has excellent resistance to manufacturing process variations and environmental disturbances, and is applicable to the detection of flexible printed circuit boards under different manufacturing process conditions.

[0021] In a specific embodiment, the process of executing step S1 may specifically include the following steps: Divide the multi-layer flexible printed circuit board into units to obtain the PCB micro-unit structure data; Measure the copper foil thickness, dielectric layer thickness, nickel-based alloy wire diameter, and liquid metal fiber mat thickness of each unit in the PCB micro-unit structure data to obtain the PCB unit material parameter set; Calculate the distributed resistance, distributed inductance, distributed capacitance, and distributed conductance values of each unit according to the PCB unit material parameter set to obtain the PCB unit electrical characteristic parameter group; Based on the PCB unit electrical characteristic parameter group, establish a unit-length transmission line model of the surface copper foil layer in the multi-layer flexible printed circuit board, establish a series-parallel equivalent circuit model at the connection of the nickel-based alloy wire and the copper foil, and establish a π-type network model of the liquid metal fiber mat to obtain the interlayer connection equivalent circuit structure; Introduce the bending deformation parameter through the interlayer connection equivalent circuit structure to obtain the bending-sensitive interlayer connection model, and solve the electromagnetic field distribution of the bending-sensitive interlayer connection model by the finite element algorithm to obtain the circuit board characteristic parameter data.

[0022] Specifically, according to the actual size, number of layers, structural complexity of the PCB, and the required spatial resolution, the flexible printed circuit board is divided into several tiny structural units. Each conduction path, each interlayer connection point, and each key structural turning point are meshed. Through this division, the originally continuous and complex structure is digitized and discretized, forming PCB micro-unit structure data that is highly controllable, easy to model and simulate. Each micro-unit is marked with spatial coordinate identification and adjacency relationships, thus reflecting the physical topology and interlayer connection distribution of the entire circuit board. Measure the material parameters of each micro-unit. Combine various instruments such as an optical thickness gauge, an X-ray thickness measurement system, and a precision caliper to detect and record item by item the copper foil thickness, dielectric layer thickness, nickel-based alloy wire diameter, and liquid metal fiber mat thickness inside the unit. The copper foil thickness directly affects the current-carrying capacity and loss, the dielectric layer thickness is related to the insulation performance and capacitance coupling, the nickel-based alloy wire diameter affects the conduction impedance and mechanical reliability of the interlayer connection channel, and the thickness of the liquid metal fiber mat affects the low-frequency electrical continuity and the integrity and immunity of high-frequency signals. All these measured parameters constitute the PCB unit material parameter set. According to the PCB unit material parameter set, based on the electromagnetic field theory and the component equivalent modeling formula, calculate the distributed resistance, distributed inductance, distributed capacitance, and distributed conductance values for each unit. The distributed resistance of the copper foil is calculated according to its resistivity, unit length, width, and thickness. The distributed inductance is obtained by using approximate expressions such as the Wheeler formula based on the geometric structure and adjacent dielectric conditions. The distributed capacitance is solved using the dielectric constant, thickness, and effective copper foil area of the dielectric layer. The distributed conductance is described in the frequency domain by combining parameters such as the dielectric loss tangent and frequency. This series of electrical parameters are serially superimposed for each unit to form a set of PCB unit electrical characteristic parameters that describe the local and global electromagnetic behaviors. Based on the set of PCB unit electrical characteristic parameters, conduct electrical modeling on the key structures of the multi-layer flexible printed circuit board. For the surface copper foil layer, use the unit-length transmission line model to obtain a continuous transmission model. At the connection between the nickel-based alloy wire and the copper foil, due to the presence of contact resistance and parasitic capacitance in the actual structure, an equivalent circuit composed of a series resistance and a parallel capacitance is used to reflect its electrical coupling characteristics. This model can capture the impedance changes caused by minor cracking, poor contact, or even microscopic oxidation at the connection point. For the liquid metal fiber mat, due to its special high conductivity and structural complexity, an equivalent modeling is carried out using a π-type network composed of distributed resistance, distributed inductance, and distributed capacitance. This structure can describe the energy loss and coupling of signals propagating in the liquid metal mat and reflect its sensitive response to external disturbances (such as bending and vibration). All the above structural models are cascaded spatially according to the actual multi-layer topology of the PCB to form an interlayer connection equivalent circuit structure that reflects the local and global connection relationships of the entire board.On this basis, considering that the flexible printed circuit board is in a dynamic environment of repeated bending, winding, and deformation in the real application scenario, the bending deformation parameters are introduced into the above equivalent circuit model. Bending will cause phenomena such as copper foil microcracks, mechanical stretching or compression of alloy wires, and local changes in the density of liquid metal fiber mats. These changes will essentially cause fluctuations in the electrical parameters of related micro-units. By introducing parameters such as the bending angle and deformation amount, the resistance at the connection is dynamically corrected, combining mechanical deformation with changes in electrical performance, and obtaining a bending-sensitive interlayer connection model. To quantify and visualize the propagation and coupling distribution of electromagnetic fields in the multi-layer structure, the equivalent circuit parameters of all the above units are integrated and input into the finite element simulation platform. By constructing a three-dimensional finite element model of the electromagnetic field, the full-space electromagnetic field distribution of the entire bending-sensitive interlayer connection structure is solved under the conditions of multi-field coupling and multi-scenario changes from low frequency to high frequency. During the simulation process, the voltage and current distributions inside different units are output, and key indicators such as the coupling impedance, reflection coefficient, and signal transmission loss between layers are calculated. Based on the characteristic parameter data of the printed circuit board obtained by the finite element algorithm, it is presented in multi-dimensional forms such as spatial distribution diagrams, spectral characteristics, and dynamic responses.

[0023] In a specific embodiment, the process of executing step S2 may specifically include the following steps: Based on the S-parameter matrix in the characteristic parameter data of the printed circuit board, perform simulated annealing calculation on the test points of the multi-layer flexible printed circuit board to obtain an optimized distribution function of the test points; Determine N test points according to the optimized distribution function of the test points, obtain an initial test point layout scheme, and install probes at each test point in the initial test point layout scheme to obtain a multi-test point detection structure; Configure a differential time-domain reflectometer measurement system including a pulse generator, a differential signal converter, a high-speed data acquisition unit, and a signal processor based on the multi-test point detection structure; Design an excitation signal sequence including the superposition of multi-frequency sine signals for different test points in the differential time-domain reflectometer measurement system, and set the phase difference of the excitation signals between the test points to obtain the test point position information and signal configuration data.

[0024] Specifically, perform preliminary electrical modeling and high-precision parameter testing on the circuit board to obtain the S-parameter matrix reflecting the electromagnetic response characteristics of the multi-layer flexible circuit board. The S-parameter matrix, namely the scattering parameter matrix, is a standard characterization method for describing how the excitation signals are transmitted and coupled among various ports in a multi-port network. Through the aforementioned element division, equivalent modeling, and finite element solution, the S-parameter matrix data between each potential test point is obtained. The condition number, determinant, and the characteristics of its sub-matrices of this matrix reflect the local and global interconnection complexity of the circuit board. Input the S-parameter matrix into the intelligent optimization algorithm process, and use the simulated annealing algorithm for global search and optimization. The simulated annealing algorithm is inspired by the energy minimization process of a thermodynamic system, jumps out of the local optimal trap, and approaches the global optimal solution in the multi-peak function space. In the actual test point layout optimization, define an evaluation function with the goals of maximizing the recognizability of the test system, increasing the reciprocal of the condition number of the measurement matrix, and enhancing the local defect resolution ability. Take the reciprocal of the condition number of the test sub-matrix of the S-parameter matrix (i.e., the sub-matrix generated by the combination of candidate test points) as the optimization goal, and evaluate the improvement effect of each test point scheme on the overall measurement sensitivity and complementary information volume. Through the simulated annealing algorithm, repeatedly perturb the possible test point layouts, regulate the acceptance probability, and evaluate the objective function, converge to a set of optimal test point distribution functions, and determine the positions of N test points accordingly to form the initial test point layout scheme. After the layout scheme is determined, combine the physical structure of the circuit board and the pad space distribution to implement the probe installation. Select a micro high-precision probe with good impedance matching, stable mechanical performance, and extremely low contact resistance for each test point. The diameter of the probe tip is controlled within the design requirements to ensure the consistency and repeatability of signal injection and acquisition, and prevent systematic errors in the test results caused by minor poor contacts. After the probe installation is completed, a multi-test point detection structure is formed on the entire board. On this basis, configure a differential time-domain reflectometer measurement system around this multi-test point detection structure. The measurement system includes a high-performance pulse generator, a differential signal converter, a high-speed data acquisition unit, and an intelligent signal processor. Among them, the pulse generator can output a pulse signal with an extremely fast rising edge and adjustable amplitude, and supports the superposition output of multi-frequency sine signals to meet the test requirements for the defect sensitivity of different frequency bands. The differential signal converter converts the original excitation signal into a differential signal pair suitable for multi-point distributed measurement, improving the ability to suppress common-mode noise and enhancing the spatial resolution of the signal. The high-speed data acquisition unit has the capabilities of sampling dozens to hundreds of gigasamples per second, large-depth caching, and synchronous multi-channel, and can capture the transient characteristics of reflected and transmitted signals. The signal processor integrates functions such as band-pass filtering, pre-noise reduction, real-time signal synchronization, window truncation, and deconvolution to form an integrated platform for front-end signal acquisition, digital processing, and defect discrimination. In order to ensure the data timing decoupling and spatial response separability between different test points, design an excitation signal sequence for each test point respectively.These excitation signals are composed of the superposition of multiple groups of sine signals, enabling each group of test excitations to have the ability of high-frequency resolution and wide-band response. At the same time, an appropriate phase difference design is introduced into the signal sequence. For example, a gradually increasing phase shift is assigned according to the point number, or an orthogonal coding structure is adopted to ensure that all test points can effectively distinguish signals in the time domain, frequency domain, and phase domain, preventing response coupling and error propagation caused by signal aliasing. The test point position information and excitation signal configuration data are synchronously stored in the system database and associated with the PCB schematic diagram and actual physical coordinates for spatial mapping during subsequent signal acquisition, data decoding, and defect location processes.

[0025] In a specific embodiment, the process of executing step S3 may specifically include the following steps: According to the test point position information and signal configuration data, inject the corresponding differential excitation signals into each test point in sequence, and record the differential response waveforms at other test points simultaneously; Construct a set of original differential response waveforms based on the differential response waveforms of each test point, and calculate the average value of the set of original differential response waveforms to obtain differential response waveform data; Perform wavelet decomposition and soft-threshold denoising processing on the differential response waveform data to obtain differential response waveform wavelet coefficients; Calculate the system transfer function based on the differential response waveform wavelet coefficients and obtain the frequency-domain transfer characteristic data of the interlayer connection of the circuit board through FFT transformation; Process the frequency-domain transfer characteristic data using an adaptive deconvolution algorithm to obtain optimized frequency-domain response characteristic data; Convert the optimized frequency-domain response characteristic data back to the time domain through inverse FFT transformation and identify overlapping reflection signals to obtain time-domain reflection signal characteristics.

[0026] Specifically, according to the test point position information and signal configuration data, excitation operations are sequentially performed on all test points. In each round of testing, one test point is selected as the excitation source, and differential excitation signals are injected into this point according to the established excitation sequence. At the same time, all the remaining test points are used as response ends to synchronously collect the differential response waveforms they receive, forming a set of original differential response waveforms with extremely high spatial resolution. During the actual acquisition process, to improve the signal-to-noise ratio, suppress accidental interference and measurement fluctuations, multiple response waveforms under the same excitation condition are averaged in real-time or batch to obtain differential response waveform data. Wavelet decomposition and soft-threshold denoising processing are performed on the differential response waveform data. As a multi-scale signal analysis tool, wavelet decomposition unfolds the time-domain waveform under different frequencies and time windows, effectively distinguishing the high-frequency noise, sudden interference and structural reflections hidden in the original signal. Using wavelet bases suitable for the characteristics of electromagnetic signals (such as db4, sym8, etc.) for multi-layer decomposition, local defect reflections, high-order structure echoes and overall signal trends are respectively mapped to different wavelet coefficient channels. To eliminate background noise and non-structural disturbances, a soft-threshold denoising algorithm is adopted to apply a threshold operation adaptively adjusted based on the noise standard deviation to the set of wavelet coefficients, effectively retaining the structural reflections and the main components of the signal, while suppressing the noise coefficients with small amplitudes and significantly different statistical characteristics from the target echoes. Subsequently, based on the denoised wavelet coefficients, the system transfer function is constructed. By performing convolution decoupling on the excitation signal and the response signal, and using the fast Fourier transform (FFT) to map the time-domain signal to the frequency domain, the frequency-domain transfer characteristic data of each test point and its connection path are obtained. Frequency-domain analysis can reveal the reflection, transmission and loss laws of signals at different frequencies, making it possible for defects such as tiny impedance mismatches, oxidation at connection points, cracking, and local short circuits to exhibit unique characteristics in the spectral response. An adaptive deconvolution algorithm is used to process the frequency-domain transfer characteristic data. The adaptive deconvolution algorithm is based on methods such as Wiener filtering, and uses the system transfer characteristics and the noise-signal ratio parameters between the excitation and response to optimize the deconvolution kernel through an iterative method, so that the inverse convolution operation can restore the true physical reflection structure to the greatest extent. In actual implementation, adaptive deconvolution not only needs to dynamically adjust the noise-signal ratio parameter, but also needs to perform multi-dimensional constraints and verification in combination with the spectral energy distribution, the flatness of the transfer function and the spatial correlation of the test points, so as to avoid overfitting or information loss and obtain optimized frequency-domain response characteristic data. After the frequency-domain optimization is completed, through the inverse FFT (IFFT) operation, the optimized frequency-domain response characteristic data are restored to the time domain, redistributing various reflection events on the time axis, and improving the distinguishability and positioning ability of signal components. Combining high-resolution sampling and precise time window setting, methods such as the scanning correlation method and the pulse arrival time difference positioning method are used to identify and separate various overlapping reflection signals in the time domain, extract the reflection characteristics of each connection point and its adjacent structure under different test conditions, and obtain the time-domain reflection signal characteristics.

[0027] In a specific embodiment, the process of executing step S4 may specifically include the following steps: Extract the corresponding time-domain reflection signal segment from the time-domain reflection signal characteristics for each interlayer connection point to obtain the interlayer connection point reflection signal segment data; Calculate the frequency-domain transformation based on the interlayer connection point reflection signal segment data, and determine the characteristic impedance of each interlayer connection point through the reflection coefficient calculation formula to obtain the interlayer connection characteristic impedance data; Use the second-order Foster network model to perform parameter fitting on the interlayer connection characteristic impedance data to obtain the impedance spectrum feature vector of each interlayer connection point; Extract the DC resistance, high-frequency impedance limit value, impedance bandwidth, resonance frequency, and quality factor from the impedance spectrum feature vector, and calculate the theoretical impedance spectrum in combination with the distributed parameter network model to obtain the impedance characteristic parameter set; Perform interpolation processing based on the impedance characteristic parameter set in combination with the test point position information and the PCB wiring topology information to obtain the interlayer connection impedance distribution map.

[0028] Specifically, based on theoretical modeling and actual layout, the theoretical or empirical time-delay positions of the connection points between layers on the time axis are calibrated. Combining the spatial coordinates of the test points, the propagation path of the excitation response, the electromagnetic wave velocity of the material, and the physical dimensions of the structure, signal segment positioning with millimeter-level or even higher precision is achieved. Through this step, in the time-domain reflection signal, each connection point corresponds to a signal segment with high correlation that can reflect its local reflection characteristics. By intercepting an appropriate time window, the reflection signal segment data of the inter-layer connection points is obtained. Calculate the frequency-domain transformation based on the reflection signal segment data of the inter-layer connection points. The fast Fourier transform is used to map the time-domain reflection signal segment to the frequency domain, forming a complex frequency spectrum that reflects the electromagnetic responses of each connection point at different frequencies. Based on the calculation formula of the reflection coefficient, with ρ(f) = (Z(f) - Z0) / (Z(f) + Z0) as the mathematical basis, where Z(f) is the impedance to be calculated at the target connection point at frequency f, and Z0 is the system reference impedance. By taking the ratio and calibration of the collected reflection signal spectrum and the excitation signal spectrum, and combining the known excitation amplitude and reference impedance of the system, the characteristic impedance Z(f) of the connection point at each frequency point is inversely deduced using the reflection coefficient, forming a data sequence of the inter-layer connection characteristic impedance that reflects the broadband characteristics of the connection point. Use the second-order Foster network model to fit the parameters of the inter-layer connection characteristic impedance data. As a classic scheme for impedance modeling, the mathematical form of the second-order Foster network model comprehensively reflects phenomena such as series resistance, inductance, parallel capacitance, impedance poles, and zero-point distributions in the actual interconnection structure. The measured characteristic impedance curve of each inter-layer connection point is least-squares fitted with the second-order Foster network model to obtain a set of Foster network parameters that characterize the intrinsic characteristics of the connection point. These parameters respectively correspond to physical quantities such as resistance, length, and capacitance in the equivalent circuit, and are summarized as an impedance spectrum feature vector. Extract multiple core parameters from the impedance spectrum feature vector, including: the direct current resistance (RDC) reflects the low-frequency conduction ability and fracture hazard, the high-frequency limit impedance (RHF) reveals the integrity of high-frequency signal transmission and local stray losses, the impedance bandwidth (BW) measures the adaptability of the connection point to broadband signals, the resonance frequency (fres) locates the resonance mismatch interval, and the quality factor (Q) quantitatively describes the sharpness and loss level of the signal resonance peak. Compare the above parameters with the theoretical impedance spectrum results of the distributed parameter network model. The distributed parameter network model performs electromagnetic field numerical solution on the connection points in the theoretically ideal state based on the distributed resistance, distributed inductance, distributed capacitance, distributed conductance, and structure distribution obtained from the previous modeling, and obtains a theoretical impedance spectrum that is consistent with the measured data in terms of structure, frequency spectrum range, and boundary conditions. Through the comparison between the measurement and the theory, the performance deviations caused by process fluctuations, material inconsistencies, or local hidden defects are revealed, thereby generating impedance characteristic parameters. Based on the impedance characteristic parameter set, combined with the test point position information and the PCB wiring topology information, spatial interpolation processing is performed on the parameters of each discrete sampling point.By using algorithms such as Kriging interpolation, inverse distance weighting, polynomial fitting, or neural network regression, the characteristic parameters of finite test points are extended to any position on the entire board to generate an interlayer connection impedance distribution map with higher resolution, wider coverage, and better spatial continuity.

[0029] In a specific embodiment, the process of executing step S5 may specifically include the following steps: Create a standard sample set including nickel-based alloy wire fracture, cracking at the connection between nickel-based alloy wire and copper foil, delamination at the interface between liquid metal fiber mat and copper foil, uneven density of liquid metal fiber mat, oxidation of nickel-based alloy wire, and microcracks in copper foil based on the interlayer connection impedance distribution map; Measure and analyze the standard sample set under the state of a preset bending angle to obtain standard defect impedance characteristic spectrum data; Extract direct current resistance, high-frequency limit impedance, impedance bandwidth, resonant frequency, quality factor, impedance slope, impedance mean square error, phase shift, group delay, and their first-order derivatives from the standard defect impedance characteristic spectrum data to construct a standardized feature vector; Perform characteristic distance calculation based on the standardized feature vector and determine the optimal weight coefficient through Fisher discriminant analysis to obtain a defect characteristic discrimination metric standard; Perform three-dimensional characterization of impedance-frequency-bending angle according to the defect characteristic discrimination metric standard and the standard defect impedance characteristic spectrum data to obtain an interlayer connection defect characteristic model.

[0030] Specifically, based on the preliminary impedance distribution map and the investigation of the actual printed circuit board process and failure mechanism, a standard sample set containing typical defects is constructed, including common interconnection structure failures such as nickel-based alloy wire fracture, cracking at the connection between nickel-based alloy wire and copper foil, delamination at the interface between liquid metal fiber mat and copper foil, as well as latent defects that are prone to occur at high frequencies, have complex physical mechanisms and affect reliability, such as uneven density of liquid metal fiber mat, oxidation of nickel-based alloy wire and micro-cracks in copper foil. For each defect type, according to industrial actual standards, multiple levels of mild, moderate and severe are designed. At the same time, combined with the common usage scenarios and reliability assessment requirements of flexible circuit boards, a series of different bending angles are applied to each standard sample to simulate the stress state under actual service conditions and its impact on the structural electrical performance. After sample preparation and physical modeling are completed, a multi-test-point layout and differential excitation signal system consistent with the conventional batch detection process are used to measure the impedance characteristics and analyze the spectral response of each group of standard defect samples at all bending angles. Through processing steps such as high-sampling-rate time-domain response acquisition, wavelet denoising and convolutional inversion, a high-resolution impedance characteristic spectrum of each defect sample is obtained. From the impedance characteristic spectrum data, multi-dimensional characteristic parameters such as DC resistance, high-frequency limit impedance, impedance bandwidth, resonant frequency, quality factor, impedance slope, impedance mean square deviation, phase shift, group delay and its first derivative are extracted. The DC resistance is used to reflect the low-frequency conduction ability and the hidden danger of structural fracture, while the high-frequency limit impedance reveals the integrity of the signal under high-speed transmission. The impedance bandwidth and resonant frequency respectively indicate the structural mismatch and resonance interval caused by defects. The quality factor quantifies the sharpness of resonance and energy loss. The impedance slope reflects the local frequency sensitivity. The impedance mean square deviation reflects the full-spectrum volatility. The phase shift, group delay and their change rates reveal the signal delay, phase shift and dispersion characteristics. To achieve data-driven intelligent classification and quantitative discrimination, the above multi-parameter characteristics are normalized to construct a standardized feature vector. These standardized feature vectors will be used for quantitative analysis of the similarity and distinguishability between samples by measuring distances in the feature space in an equal-weight or weighted manner. In terms of distance measurement, methods such as Euclidean distance and Mahalanobis distance are used to characterize the differences between multi-dimensional vectors. To improve the discrimination ability of different types and grades of defects, statistical learning tools such as Fisher discriminant analysis (linear discriminant analysis LDA) are used to optimize the feature weights to obtain the optimal weight coefficients that can maximize the distance between classes and minimize the variance within classes. Through the weighted combination of feature distance and optimal weight, a highly adaptive defect feature discrimination metric standard is formed. Based on the above discrimination metric standard and the impedance characteristic spectrum data of standard defects, the three core dimensions of impedance, frequency and bending angle are fused into a high-dimensional representation space. Methods such as tensor modeling, principal component analysis, clustering and multiple regression are used to perform three-dimensional mapping and decomposition on the impedance characteristics of various defects at different bending angles.Through this step, data with different defect types, different bending angles, and different frequency points can be visually distinguished, and the bending sensitivity, spectral sensitivity, and similarities and differences in physical mechanisms of various types of defects can be quantified, obtaining a characteristic model of interlayer connection defects.

[0031] In a specific embodiment, the method for detecting the interlayer connection of a circuit board further includes the following steps: Obtain the interlayer connection test data of the circuit board to be tested, and construct a standardized feature vector of the point to be tested according to the interlayer connection test data; Calculate the Mahalanobis distance between the standardized feature vector of the point to be tested and each defect feature in the interlayer connection defect characteristic model, and determine the similarity between the point to be tested and various types of defects according to the Mahalanobis distance, obtaining a defect type matching result; Use the k-nearest neighbor algorithm to classify the defect type matching result to obtain a defect quantitative evaluation result; Combine the defect quantitative evaluation result with the wiring topology information of the circuit board to be tested to generate a distribution map of interlayer connection defects, and output the analysis result of the interlayer connection defects of the circuit board to be tested by comparing the defect distribution differences in different bending states.

[0032] Specifically, through experimental design and high-resolution multi-point detection means, interlayer connection test data covering the entire space of the circuit board to be tested are obtained. Based on the optimized test point layout, differential excitation signal configuration, and high-frequency and high-speed acquisition system, the detection system alternately excites all key interconnect points and collects multi-point responses. After data processing processes such as wavelet denoising, adaptive deconvolution, and frequency-domain parameter extraction, the complete impedance spectrum curves and their multi-dimensional physical parameters of each test point under different frequencies and different bending states are obtained. For each test point, the original impedance curve is summarized into a standardized feature vector, which specifically includes key parameters such as DC resistance, high-frequency limit impedance, impedance bandwidth, resonance frequency, quality factor, impedance slope, mean square deviation of impedance, phase shift, group delay, and its first derivative. All parameters are normalized to eliminate the influence of physical dimensions and test fluctuations, ensuring the comparability of feature vectors in the high-dimensional space and the accuracy of subsequent distance metrics. To achieve intelligent defect type matching and multi-dimensional discrimination of complex defects, multi-dimensional distance calculations are systematically performed between the standardized feature vectors of the test points to be measured and the interlayer connection defect feature models constructed from standard defect samples in the early stage. In this process, the Mahalanobis distance, as the core index for measuring similarity, can fully consider the covariance and statistical correlation between various feature parameters, improve the separability between different types of defects, and enhance the refinement ability of discrimination. Specifically, when implementing, the Mahalanobis distance is calculated between the standardized feature vector of each test point to be measured and all standard defect feature vectors in the model library, and the optimal matching type of the test point to be measured in various defect categories, different bending states, and multiple severity levels is determined through the minimum distance principle. This process identifies a highly similar relationship between the test point to be measured and a certain typical defect type, and reveals potential multi-defect coupling characteristics through distance sorting. Each test point outputs a set of defect type matching results, including the optimal matching defect category, the corresponding distance score, and the sub-optimal alternatives. The k-nearest neighbor algorithm is used to classify the defect type matching results. The k-nearest neighbor algorithm is a non-parametric statistical discrimination tool. Based on the diversity of the feature space and the category distribution characteristics, it comprehensively uses the type distribution of the nearest k standard defect samples to achieve type discrimination and severity assessment of the current test point to be measured. In the specific process, k standard defect samples closest to the test point to be measured are retrieved in the feature space according to the Mahalanobis distance, and the final quantitative defect assessment result is output through mechanisms such as weighted voting, average distance, and category weights. The quantitative defect assessment results of all test points are spatially fused with the wiring topology information of the circuit board and interpolated to generate a high-resolution interlayer connection defect distribution map. The wiring topology information provides the true spatial coordinates and interconnection relationships of each test point on the board, and reflects the distribution characteristics of complex structural areas, stress concentration areas, and key signal chains. During the generation of the distribution map, algorithms such as spatial interpolation, regional clustering, and trend surface fitting are used to extend the defect type, severity, and multi-category probability of discrete points to a continuous spatial distribution, realizing the visualization expression of the connection health of the entire board.If the detection process involves multiple sets of bending states or repeated acquisitions under different working conditions, by comparing the defect distribution maps under different states, the bending sensitive areas, fatigue accumulation areas, and design weak links are revealed. The system analyzes the variation differences between multiple sets of distribution maps, real-time tracks the evolution trajectory of structural health, and realizes dynamic failure monitoring and precise life management of flexible circuit boards in actual application scenarios. After summarizing all data processing and analysis results, the analysis results of the interlayer connection defects of the circuit board to be tested are output.

[0033] The above describes the method for detecting interlayer connections of circuit boards in the embodiments of the present invention. Next, the device for detecting interlayer connections of circuit boards in the embodiments of the present invention will be described. Please refer to Figure 2 , an embodiment of the device for detecting interlayer connections of circuit boards in the embodiments of the present invention includes: A parameter measurement module for measuring the electrical characteristic parameters of a multi-layer flexible circuit board to obtain circuit board characteristic parameter data; A signal excitation module for designing and arranging a multi-test point detection structure on the multi-layer flexible circuit board according to the circuit board characteristic parameter data and performing signal excitation to obtain test point position information; A processing module for applying a differential excitation signal to the test points corresponding to the test point position information, collecting the differential response waveforms between the test points, and processing the differential response waveforms through an adaptive deconvolution algorithm to obtain the time-domain reflection signal characteristics; A conversion module for performing impedance spectrum conversion and parameter extraction on the time-domain reflection signal characteristics to obtain an interlayer connection impedance distribution map; A creation module for creating an interlayer connection defect feature model for nickel-based alloy wire fracture, interface cracking, and liquid metal fiber mat delamination under multiple bending states by using the interlayer connection impedance distribution map.

[0034] Through the collaborative cooperation of the above-mentioned various components, by establishing a multi-layer PCB distributed parameter network model, combining the differential time domain reflectometry technology and the adaptive deconvolution algorithm, it is possible to accurately locate the position of interlayer connection faults and effectively identify various defect types including the fracture of nickel-based alloy wires, interface cracking, and delamination of liquid metal fiber mats. By introducing the bending deformation parameter and constructing a defect feature library under different bending angles, the detection system can effectively evaluate the interlayer connection reliability of flexible printed circuit boards during actual use, overcoming the limitation that traditional detection methods are only applicable to the static planar state. By adopting the multi-test point signal synthesis technology and the adaptive deconvolution algorithm, it is possible to separate overlapping reflection signals, significantly improve the detection sensitivity at the joints of special materials such as nickel-based alloy wires and liquid metal fiber mats, and effectively solve the problem that it is difficult to comprehensively evaluate the integrity of interlayer connections by traditional single-point impedance measurement. By performing impedance spectrum conversion and parameter extraction on the time domain reflection signal, this method not only obtains static parameters such as DC resistance, but also analyzes dynamic characteristics such as high-frequency impedance limit values and impedance bandwidths, providing a more comprehensive basis for evaluating the quality of interlayer connections. Based on the defect feature model constructed by the standardized eigenvector, combined with the Mahalanobis distance metric and the k-nearest neighbor algorithm, this method realizes the accurate classification of defect types and severity levels, and can distinguish interlayer connection faults from surface soldering quality problems, significantly reducing the misjudgment rate. It maintains stable detection performance within the range of process parameter variations such as copper foil thickness and rubber slip ring elastic coefficient, has excellent resistance to manufacturing process variations and environmental disturbances, and is applicable to the detection of flexible printed circuit boards under different manufacturing process conditions.

[0035] Referring to Figure 3 , in the embodiments of the present invention, a computer device is further provided. This computer device can be a server, and its internal structure can be as Figure 3 shown. The computer device includes a processor, a memory, a display screen, an input device, a network interface, and a database connected through a system bus. Among them, the processor of this computer design is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store the corresponding data in this embodiment. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, the above method is implemented.

[0036] Those skilled in the art can understand that Figure 3 the structure shown in

[0037] Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the systems, systems, and units described above can refer to the corresponding processes in the foregoing method embodiments, and will not be elaborated herein.

[0038] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The foregoing storage medium includes: various media that can store program codes such as USB flash drives, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs.

[0039] The above is the case. The above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements for some of the technical features. These modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A method for detecting interlayer connection of a circuit board, characterized in that, Including: Measuring the electrical characteristic parameters of a multi-layer flexible printed circuit board to obtain the characteristic parameter data of the circuit board; Designing and arranging a multi-test point detection structure on the multi-layer flexible printed circuit board according to the circuit board characteristic parameter data and performing signal excitation to obtain the test point position information; Applying a differential excitation signal to the test points corresponding to the test point position information, collecting the differential response waveforms between the test points, and processing the differential response waveforms through an adaptive deconvolution algorithm to obtain the time-domain reflection signal characteristics; Performing impedance spectrum conversion and parameter extraction on the time-domain reflection signal characteristics to obtain an interlayer connection impedance distribution map; Creating an interlayer connection defect characteristic model for the fracture of nickel-based alloy wires, interface cracking, and delamination of liquid metal fiber mats under various bending states by using the interlayer connection impedance distribution map.

2. The method for detecting the interlayer connection of a circuit board according to claim 1, wherein The measuring the electrical characteristic parameters of a multi-layer flexible printed circuit board to obtain the characteristic parameter data of the circuit board includes: Dividing the multi-layer flexible printed circuit board into units to obtain PCB micro-unit structure data; Measuring the copper foil thickness, dielectric layer thickness, nickel-based alloy wire diameter, and liquid metal fiber mat thickness of each unit in the PCB micro-unit structure data to obtain a PCB unit material parameter set; Calculating the distributed resistance, distributed inductance, distributed capacitance, and distributed conductance values of each unit according to the PCB unit material parameter set to obtain a PCB unit electrical characteristic parameter group; Based on the PCB unit electrical characteristic parameter group, establishing a unit-length transmission line model for the surface copper foil layer in the multi-layer flexible printed circuit board, establishing a series-parallel equivalent circuit model at the connection between the nickel-based alloy wire and the copper foil, and establishing a π-type network model for the liquid metal fiber mat to obtain an interlayer connection equivalent circuit structure; Introducing a bending deformation parameter through the interlayer connection equivalent circuit structure to obtain a bending-sensitive interlayer connection model, and solving the electromagnetic field distribution of the bending-sensitive interlayer connection model through a finite element algorithm to obtain the circuit board characteristic parameter data.

3. The method for detecting the interlayer connection of a circuit board according to claim 1, wherein, The designing and arranging a multi-test point detection structure on the multi-layer flexible printed circuit board according to the circuit board characteristic parameter data and performing signal excitation to obtain the test point position information includes: Performing a test point simulated annealing calculation on the multi-layer flexible printed circuit board based on the S-parameter matrix in the circuit board characteristic parameter data to obtain a test point optimization distribution function; Determining N test points according to the test point optimization distribution function to obtain an initial test point layout scheme, and installing probes on each test point in the initial test point layout scheme to obtain a multi-test point detection structure; Configuring a differential time-domain reflectometer measurement system including a pulse generator, a differential signal converter, a high-speed data acquisition unit, and a signal processor based on the multi-test point detection structure; Designing an excitation signal sequence including the superposition of multi-frequency sine signals for different test points in the differential time-domain reflectometer measurement system respectively, and setting the phase difference of the excitation signals between the test points to obtain the test point position information and the signal configuration data.

4. The method for detecting interlayer connection of a circuit board according to claim 3, wherein Applying a differential excitation signal to the test points corresponding to the test point position information, collecting the differential response waveforms between the test points, and processing the differential response waveforms through an adaptive deconvolution algorithm to obtain the time-domain reflection signal characteristics, including: According to the test point position information and the signal configuration data, injecting the corresponding differential excitation signal into each test point in sequence, and recording the differential response waveforms at other test points simultaneously; Constructing a set of original differential response waveforms based on the differential response waveforms of each test point, and calculating the average value of the set of original differential response waveforms to obtain differential response waveform data; Performing wavelet decomposition and soft threshold denoising processing on the differential response waveform data to obtain differential response waveform wavelet coefficients; Calculating the system transfer function based on the differential response waveform wavelet coefficients and obtaining the frequency-domain transfer characteristic data of the interlayer connection of the circuit board through FFT transformation; Processing the frequency-domain transfer characteristic data by using an adaptive deconvolution algorithm to obtain optimized frequency-domain response characteristic data; Converting the optimized frequency-domain response characteristic data back to the time domain through inverse FFT transformation and identifying overlapping reflection signals to obtain the time-domain reflection signal characteristics.

5. The method for detecting interlayer connection of a circuit board according to claim 1, characterized in that, Performing impedance spectrum conversion and parameter extraction on the time-domain reflection signal characteristics to obtain an interlayer connection impedance distribution map, including: Extracting the corresponding time-domain reflection signal segments from the time-domain reflection signal characteristics for each interlayer connection point to obtain the reflection signal segment data of the interlayer connection points; Calculating the frequency-domain transformation based on the reflection signal segment data of the interlayer connection points and determining the characteristic impedance of each interlayer connection point through the reflection coefficient calculation formula to obtain the interlayer connection characteristic impedance data; Performing parameter fitting on the interlayer connection characteristic impedance data by using a second-order Foster network model to obtain the impedance spectrum characteristic vector of each interlayer connection point; Extracting the DC resistance, high-frequency impedance limit value, impedance bandwidth, resonant frequency, and quality factor from the impedance spectrum characteristic vector, and calculating the theoretical impedance spectrum in combination with the distributed parameter network model to obtain an impedance characteristic parameter set; Performing interpolation processing based on the impedance characteristic parameter set in combination with the test point position information and the PCB wiring topology information to obtain the interlayer connection impedance distribution map.

6. The method for detecting the interlayer connection of a circuit board according to claim 1, wherein Creating an interlayer connection defect characteristic model for the fracture of nickel-based alloy wires, interface cracking, and delamination of liquid metal fiber mats under various bending states by using the interlayer connection impedance distribution map, including: Creating a standard sample set including the fracture of nickel-based alloy wires, cracking at the connection between nickel-based alloy wires and copper foils, delamination at the interface between liquid metal fiber mats and copper foils, uneven density of liquid metal fiber mats, oxidation of nickel-based alloy wires, and microcracks in copper foils based on the interlayer connection impedance distribution map; Measuring and analyzing the standard sample set under a preset bending angle state to obtain standard defect impedance characteristic spectrum data; Extracting the DC resistance, high-frequency limit impedance, impedance bandwidth, resonant frequency, quality factor, impedance slope, impedance mean square deviation, phase shift, group delay, and its first derivative from the standard defect impedance characteristic spectrum data to construct a standardized characteristic vector; Perform feature distance calculation based on the standardized feature vectors and determine the optimal weight coefficients through Fisher discriminant analysis to obtain the defect feature discrimination metric standard; Perform three-dimensional characterization of impedance-frequency-bending angle based on the defect feature discrimination metric standard and the standard defect impedance characteristic spectrum data to obtain the interlayer connection defect feature model.

7. The method for detecting the interlayer connection of a circuit board according to claim 1, wherein The method for detecting interlayer connection of the circuit board further includes: Obtain the interlayer connection test data of the circuit board to be tested, and construct the standardized feature vectors of the points to be tested according to the interlayer connection test data; Calculate the Mahalanobis distance between the standardized feature vectors of the points to be tested and each defect feature in the interlayer connection defect feature model, and determine the similarity between the points to be tested and each type of defect according to the Mahalanobis distance to obtain the defect type matching result; Use the k-nearest neighbor algorithm to classify the defect type matching result to obtain the defect quantitative evaluation result; Combine the defect quantitative evaluation result with the wiring topology information of the circuit board to be tested to generate an interlayer connection defect distribution map, and output the interlayer connection defect analysis result of the circuit board to be tested by comparing the defect distribution differences under different bending states.

8. A circuit board interlayer connection detection device, characterized in that, For performing the method for detecting interlayer connection of the circuit board according to any one of claims 1-7, the device for detecting interlayer connection of the circuit board includes: A parameter measurement module for measuring the electrical characteristic parameters of a multi-layer flexible circuit board to obtain the circuit board characteristic parameter data; A signal excitation module for designing and arranging a multi-test point detection structure on the multi-layer flexible circuit board according to the circuit board characteristic parameter data and performing signal excitation to obtain the test point position information; A processing module for applying a differential excitation signal to the test points corresponding to the test point position information, collecting the differential response waveforms between the test points, and processing the differential response waveforms through an adaptive deconvolution algorithm to obtain the time-domain reflection signal characteristics; A conversion module for performing impedance spectrum conversion and parameter extraction on the time-domain reflection signal characteristics to obtain an interlayer connection impedance distribution map; A creation module for creating an interlayer connection defect feature model for nickel-based alloy wire fracture, interface cracking, and liquid metal fiber mat delamination under various bending states by using the interlayer connection impedance distribution map.

9. A computer device, characterized in that, Comprising a memory and a processor, the memory stores a computer program that can be run on the processor, and the processor implements the method for detecting interlayer connection of the circuit board according to any one of claims 1 to 7 when executing the computer program.

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