I2C bus expansion method supporting dynamic address

Abstract

The invention discloses an I2C (Inter-Integrated Circuit) bus expansion method supporting a dynamic address, the expansion method is used for a system for realizing communication through an I2C bus, the system comprises a host and a plurality of expansion modules, communication connection is established between the host and the expansion modules through the I2C bus, an address bus, a power line and a ground line, and communication connection is established between every two adjacent expansion modules through the I2C bus, the address bus, the power line and the ground line. The extension module is used for connecting different external devices; the extension method comprises the following steps: a host accesses a flag register of the last extension module at regular time through an I2C bus, judges whether the numerical value of the flag register is 0 * 01 or not so as to judge whether a new extension module is accessed or not, and decides whether the address of each extension module needs to be adjusted or not; and after all the extension modules are adjusted to effective addresses, the host communicates with each extension module through the I2C bus. Dynamic address adjustment of the external equipment is realized through the address bus, so that expansion of the external equipment is more convenient, control is simple and flexible, and deployment cost is reduced.

Description

Technical Field

[0001] The present invention relates to the field of communication technologies, and particularly to an I2C bus expansion method supporting dynamic addresses. Background Art

[0002] For traditional expansion cards, such as the SPI interface on a PLC (programmable logic controller), due to the point-to-point connection method, an additional IO line is required for chip selection every time an expansion card is added, which is inconvenient to use. As the number of expansion cards increases, the signal lines of the expansion interface become extremely complex, which not only increases the complexity of the system but also may lead to an increase in cost, especially when using the daisy-chain connection method, the cost increase is particularly significant. If communication methods such as EtherCAT are used, although the wiring problem can be solved, the high IC cost and complex protocols are not conducive to daily use. Summary of the Invention

[0003] The purpose of the present invention is to provide an I2C bus expansion method supporting dynamic addresses, which can effectively increase the number of external devices communicating with the host through the I2C bus, with simpler and more flexible control and reduced deployment costs.

[0004] To achieve the above purpose, the solution of the present invention is: an I2C bus expansion method supporting dynamic addresses, which is used for a system that realizes communication through the I2C bus. The system includes a host and multiple expansion modules. Communication connections are established between the host and the expansion modules, and between adjacent two expansion modules through the I2C bus, address bus, power line, and ground line. The expansion modules are used to connect different external devices;

[0005] The I2C bus expansion method supporting dynamic addresses is as follows:

[0006] The default address of each expansion module is 0x01. When the host detects the first expansion module connected to the back end of the host through the address bus, the host supplies power to the first expansion module through the power line. At this time, the host and the first expansion module with the address of 0x01 communicate through the I2C bus;

[0007] When several extension modules are connected to the back end of the first extension module, the penultimate extension module adjusts the value of its flag register to 0x01. The host detects through the address bus that the value of the flag register of the penultimate extension module with the address of 0x01 is 0x01. At this time, the host queries the addresses of all extension modules through the address bus and arranges them in descending order, and increments the address of the extension module with the largest address by 1. After the address adjustment is successful, the host continues to increment the address of the extension module with the second largest address by 1 until the address adjustment of all extension modules is completed. At this time, the address of the penultimate extension module is 0x02, and the penultimate extension module supplies power to the last extension module through the power line;

[0008] The host regularly accesses the flag register of the last extension module with the address of 0x01 through the I2C bus, determines whether the value of the flag register is 0x01, thereby determining whether a new extension module is connected, and decides whether it is necessary to adjust the address of each extension module;

[0009] After all extension modules are adjusted to valid addresses, the host communicates with each extension module through the I2C bus.

[0010] In a preferred solution, a main control MCU is provided on the host, and a slave control MCU is provided on each extension module. Communication connections are established between the main control MCU and the slave control MCU, and between adjacent two slave control MCUs through the I2C bus and the address bus.

[0011] In a preferred solution, a power supply module is further included. The power supply module is provided on the host and is connected to the main control MCU.

[0012] In a preferred solution, the output voltage of the power supply module is 24V.

[0013] In a preferred solution, a first switch, a first sampling resistor, a second switch, and a second sampling resistor are further included. The first switch is respectively connected to the power supply module and the main control MCU, the first sampling resistor is respectively connected to the first switch and the main control MCU, the second switch is respectively connected to the slave control MCU and the second sampling resistor, and the second sampling resistor is connected to the slave control MCU; A power line is connected between the first sampling resistor of the host and the second switch of the extension module, and a power line is connected between the second sampling resistors and the second switches of adjacent two extension modules.

[0014] After adopting the above solution, the beneficial effects of the present invention are as follows: A communication connection is established between the host of the present invention and the expansion module, and between two adjacent expansion modules, through the I2C bus. The host regularly accesses the flag register of the last expansion module with the address of 0x01 through the I2C bus, determines whether the value of the flag register is 0x01, thereby determining whether a new expansion module is connected, and decides whether to adjust the address of each expansion module. The dynamic address adjustment of external devices can be realized through one IO interface of the address bus, making the expansion of external devices more convenient, the control simpler and more flexible, and effectively reducing the deployment cost. Description of the Drawings

[0015] Figure 1 is a schematic diagram of establishing a communication connection between the host and multiple expansion modules in an embodiment of the present invention;

[0016] Figure 2 is a flowchart of dynamically adjusting the address of the expansion module in an embodiment of the present invention.

[0017] Label Description:

[0018] 1. Host; 11. Main control MCU; 12. Power supply module; 13. First switch; 14. First sampling resistor; 2. Expansion module; 21. Slave control MCU; 22. Second switch; 23. Second sampling resistor; 3. I2C bus; 4. Address bus; 5. Power line; 6. Ground wire. Detailed Embodiment

[0019] The present invention will be further described below in conjunction with the drawings and specific embodiments.

[0020] This embodiment provides an I2C bus expansion method supporting dynamic addresses. This expansion method is used for a system that realizes communication through the I2C bus, such as Figure 1 shown. This system includes a host 1 and multiple expansion modules 2. A communication connection is established between the host 1 and the expansion modules 2, and between two adjacent expansion modules 2, through the I2C bus 3, the address bus 4, the power line 5, and the ground wire 6. The expansion module 2 is used to connect different external devices;

[0021] Since the I2C interface is adopted, the structure is simple, only two signal lines SCL and SDA are required, which facilitates the wiring between the host 1 and the expansion modules 2, and between two adjacent expansion modules 2, and can also reduce the pins of the hardware. For the I2C protocol, it adopts the standard 7-bit address mode, supports 128 theoretical addresses, and actually 112 valid addresses can be used. Therefore, the host 1 can connect up to 112 external devices at most, which is convenient to use.

[0022] Specifically, as Figure 1As shown in the figure, a communication connection is established between the host 1 and the expansion module 2, and between adjacent expansion modules 2 through the I2C bus 3SCL and SDA, the address bus 4Insert_IO, the power supply line 5VCC and the ground wire 6GND. Among them, the address bus 4Insert_IO is a newly added IO line, and its purpose is to detect whether there is a new external device connected to the backend. The host 1 dynamically adjusts the valid address of each external device through the address bus 4Insert_IO, and then communicates with each external device through the I2C bus 3.

[0023] The following further elaborates on the expansion method in combination with Figure 2 The I2C bus expansion method that supports dynamic addresses is as follows:

[0024] The default address of each expansion module 2 is 0x01. When the host 1 detects the first expansion module 2 connected to the backend of the host 1 through the address bus 4, the host 1 supplies power to the first expansion module 2 through the power supply line 5. At this time, the host 1 and the first expansion module 2 with the address 0x01 communicate through the I2C bus 3;

[0025] When several expansion modules 2 are connected to the backend of the first expansion module 2, the penultimate expansion module 2 adjusts the value of its own IN_Flag flag register to 0x01. The host 1 detects that the value of the IN_Flag flag register of the penultimate expansion module 2 with the address 0x01 is 0x01 through the address bus 4. At this time, the host 1 queries the addresses of all expansion modules 2 through the address bus 4 and arranges them in descending order. After communicating with the expansion module 2 with the largest address, the address Add_Max of the expansion module 2 with the largest address is incremented by 1, and a new address is returned to the host 1. Then the host 1 communicates with the expansion module 2 with the largest address and incremented by 1 again to ensure that the address adjustment is successful. After the address adjustment is successful, the host 1 continues to communicate with the expansion module 2 with the second largest address. After that, the address Add_Max - 1 of the expansion module 2 with the second largest address is incremented by 1, and a new address is returned to the host 1. Then the host 1 communicates with the expansion module 2 with the second largest address and incremented by 1 again to ensure that the address adjustment is successful. Repeat this process until all expansion modules 2 complete the address adjustment. At this time, the address of the penultimate expansion module 2 is 0x02, and the penultimate expansion module 2 supplies power to the last expansion module 2 through the power supply line 5;

[0026] The host 1 accesses the flag register of the last expansion module 2 with the address 0x01 through the I2C bus 3 every 10 ms to determine whether the value of the IN_Flag flag register is 0x01, so as to determine whether there is a new expansion module 2 connected and decide whether to adjust the address of each expansion module 2;

[0027] After all the expansion modules 2 are adjusted to valid addresses, the host 1 communicates with each expansion module 2 via the I2C bus 3.

[0028] The expansion method provided in this embodiment supports dynamic address allocation. The system can easily access new expansion modules 2. Through dynamic address allocation, the resources of the I2C bus 3 can be utilized more efficiently. Each expansion module 2 can be assigned a unique address, thus enabling effective communication and data transmission between multiple external devices, improving the utilization rate of resources, and operating more efficiently.

[0029] As Figure 1 shown, the host 1 is provided with a main control MCU 11, and each expansion module 2 is provided with a slave control MCU 21. Communication connections are established between the main control MCU 11 and the slave control MCU 21, and between adjacent slave control MCUs 21 via the I2C bus 3 and the address bus 4.

[0030] Since each slave control MCU 21 is connected to the main control MCU 11 via the address bus 4, the main control MCU 11 can easily identify and manage the addresses of each slave control MCU 21, thereby performing flexible dynamic address adjustment. Of course, the slave control MCU 21 in this embodiment can be correspondingly set according to different required external devices to meet the functional requirements of different external devices.

[0031] As Figure 1 shown, it further includes a power supply module 12. The power supply module 12 is arranged on the host 1 and is connected to the main control MCU 11. In this embodiment, the power supply module 12 is centrally arranged on the host 1, which can uniformly provide stable and reliable power supply for external devices and is also convenient for later maintenance.

[0032] Further, the output voltage of the power supply module 12 in this embodiment is 24V, which has strong compatibility during industrial use and can supply power to a variety of different external devices. Of course, the output voltage can also be adjusted in other embodiments.

[0033] As Figure 1 shown, it further includes a first switch 13, a first sampling resistor 14, a second switch 22, and a second sampling resistor 23. The first switch 13 is respectively connected to the power supply module 12 and the main control MCU 11. The first sampling resistor 14 is respectively connected to the first switch 13 and the main control MCU 11. The second switch 22 is respectively connected to the slave control MCU 21 and the second sampling resistor 23. The second sampling resistor 23 is connected to the slave control MCU 21; there is a power line 5 between the first sampling resistor 14 of the host 1 and the second switch 22 of the expansion module 2, and there is a power line 5 between the second sampling resistors 23 and the second switches 22 of adjacent two expansion modules 2.

[0034] In this embodiment, by setting the first switch 13 and the second switch 22, the master MCU 11 and the slave MCU 21 can control the on / off of the power supply, realizing precise management of the power supply. At the same time, by setting the first sampling resistor 14 and the second sampling resistor 23, the power supply circuit can be protected, which can be achieved by those skilled in the art and will not be elaborated here.

[0035] The above are only the preferred embodiments of the present invention, and do not limit the design of this case. All equivalent changes made according to the key design of this case fall within the protection scope of this case.

Claims

1. An I2C bus expansion method supporting dynamic addresses, characterized in that: This extended method is used for a system that realizes communication through the I2C bus. The system includes a host and multiple extended modules. Communication connections are established between the host and the extended modules, and between adjacent extended modules, through the I2C bus, address bus, power line, and ground line. The extended modules are used to connect different external devices; The I2C bus extension method that supports dynamic addresses is as follows: The default address of each extended module is 0x01. When the host detects through the address bus that the first extended module is connected to the back end of the host, the host powers the first extended module through the power line. At this time, the host and the first extended module with the address of 0x01 communicate through the I2C bus; When several extended modules are connected to the back end of the first extended module, the penultimate extended module adjusts the value of its flag register to 0x01. The host detects through the address bus that the value of the flag register of the penultimate extended module with the address of 0x01 is 0x01. At this time, the host queries the addresses of all extended modules through the address bus and arranges them in descending order, and increments the address of the extended module with the largest address by 1. After the address adjustment is successful, the host continues to increment the address of the second largest extended module by 1 until all extended modules complete the address adjustment. At this time, the address of the penultimate extended module is 0x02, and the penultimate extended module powers the last extended module through the power line; The host periodically accesses the flag register of the last extended module with the address of 0x01 through the I2C bus, judges whether the value of the flag register is 0x01, thereby judging whether a new extended module is connected, and decides whether to adjust the addresses of each extended module; After all extended modules are adjusted to valid addresses, the host communicates with each extended module through the I2C bus.

2. The I2C bus expansion method supporting dynamic addresses according to claim 1, wherein: A master MCU is provided on the host, and a slave MCU is provided on each extended module. Communication connections are established between the master MCU and the slave MCU, and between adjacent slave MCUs, through the I2C bus and address bus.

3. The I2C bus expansion method supporting dynamic addresses according to claim 2, wherein: It also includes a power module. The power module is provided on the host and is connected to the master MCU.

4. The I2C bus expansion method supporting dynamic addresses according to claim 3, wherein: The output voltage of the power module is 24V.

5. The I2C bus expansion method supporting dynamic addresses according to claim 3, wherein: It also includes a first switch, a first sampling resistor, a second switch, and a second sampling resistor. The first switch is respectively connected to the power module and the master MCU. The first sampling resistor is respectively connected to the first switch and the master MCU. The second switch is respectively connected to the slave MCU and the second sampling resistor. The second sampling resistor is connected to the slave MCU; The first sampling resistor of the host and the second switch of the extended module are connected through the power line. The second sampling resistors and second switches between adjacent extended modules are connected through the power line.

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