Preparation method of back contact solar cell and back contact solar cell
The film layer that comes into contact with the solar cell by the back is removed through wet etching of acid solution, which solves the problem of silicon matrix damage caused by laser etching, improves passivation performance and carrier transmission capabilities, simplifies the process flow and reduces costs, and improves the photoelectric conversion efficiency.
Patent Information
- Application Number
- CN202510637769.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-16
- Publication Date
- 2025-08-08
AI Technical Summary
In the prior art, when preparing back contact solar cells, high-energy or high-power laser etching to remove doped silicon glass layer can easily damage the silicon matrix, resulting in poor surface passivation effect and poor carrier transmission, affecting battery performance.
The film layers of the isolation area and the second functional area are removed by wet etching method of acid solution corrosion, and the different etching rates of the silicon dioxide absorbing source layer and doped silicon glass layer are used to reduce damage to the silicon matrix, and the shallow junction diffusion layer is pushed into a deep junction diffusion layer and a silicon dioxide absorbing source layer under an oxidation environment.
It effectively reduces damage to the surface of the silicon matrix, improves passivation performance, improves carrier transmission capabilities, simplifies process flow, reduces costs, and improves photoelectric conversion efficiency and process stability.
Smart Images

Figure CN120456646A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a preparation method of a back-contact solar cell and a back-contact solar cell. Background Art
[0002] Since there is no grid line blocking the front side, the light utilization rate and photoelectric conversion efficiency of the interdigitated back contact (IBC) solar cell (especially the TBC solar cell combining the IBC with the tunnel passivation structure) can be effectively improved.
[0003] The current process for producing back-contact solar cells generally requires first forming a doped diffusion layer and a doped silica glass layer stacked on the outside of the doped diffusion layer on the entire main surface of the silicon substrate. High-energy or high-power laser etching is then used to remove the doped diffusion layer and doped silica glass layer corresponding to the isolation region and a functional region (such as a P-type functional region or an N-type functional region). However, due to the dense structure of doped silica glass layers, such as boron-doped silica glass (BSG) layers, only high-energy or high-power laser etching can remove the dense doped silica glass layer. Therefore, laser etching can easily damage the silicon substrate when removing the doped silica glass layer, resulting in poor surface passivation of the silicon substrate. This is also detrimental to carrier transport and affects the performance of back-contact solar cells. Summary of the Invention
[0004] In view of this, the present invention provides a method for preparing a back-contact solar cell and a back-contact solar cell. Compared with laser etching, the difference between the doped silicon glass layer and the silicon dioxide source absorption layer is corroded by an acid solution, and the excess film layer in the isolation area and the second functional area can be removed by wet etching, which can reduce damage to the silicon substrate and is beneficial to the passivation of the silicon substrate surface and the carrier transmission of the back-contact solar cell.
[0005] In order to solve the above technical problems, the present invention provides the following technical solutions:
[0006] In a first aspect, the present invention provides a method for preparing a back-contact solar cell, comprising:
[0007] Step 1: forming a shallow junction diffusion layer containing first dopant atoms in a first functional region of a first main surface of a silicon substrate, wherein the first main surface of the silicon substrate includes a first functional region, a second functional region, and an isolation region located between the first functional region and the second functional region;
[0008] Step 2: In a thermal oxidation environment, the first dopant atoms in the shallow junction diffusion layer are promoted to form a deep junction diffusion layer, and a silicon dioxide source absorption layer is simultaneously formed in the first functional region, the second functional region, and the isolation region. The shallow junction diffusion layer and / or the deep junction diffusion layer are subjected to an oxidation source absorption treatment based on the silicon dioxide source absorption layer corresponding to the first functional region, and a second doped silicon glass layer containing the first dopant atoms is formed corresponding to the first functional region.
[0009] Step 3: Using an acid solution to simultaneously clean the second doped silica glass layer and the remaining silica source absorption layer to completely remove the silica source absorption layer and partially remove the second doped silica glass layer, wherein the acid solution etches the second doped silica glass layer at a lower rate than the acid solution etches the silica source absorption layer;
[0010] Step 4: forming a carrier collection layer containing second dopant atoms in the second functional region, wherein the conductivity type of the second dopant atoms is opposite to that of the first dopant atoms;
[0011] Step 5: removing the remaining second doped silicon glass layer.
[0012] In a second aspect, an embodiment of the present invention provides a back-contact solar cell, comprising: a back-contact solar cell prepared by the preparation method provided by the embodiment of the first aspect above.
[0013] The technical solution of the first aspect of the above invention has the following advantages or beneficial effects:
[0014] The technical solution provided by the embodiment of the present invention forms a shallow junction diffusion layer in the first functional area of the first main surface of the silicon substrate, and then simultaneously promotes and absorbs the first dopant atoms in the shallow junction diffusion layer in an oxidizing environment. While forming a deep junction diffusion layer in the first functional area, a second doped silicon glass layer containing the first dopant atoms is formed on the outside of the deep junction diffusion layer, and simultaneously forms a silicon dioxide absorption layer (the silicon dioxide absorption layer is essentially composed of silicon dioxide) in the isolation area and the second functional area of the first main surface of the silicon substrate. The subsequent acid solution etching rate of the silicon dioxide absorption layer is greater than the acid solution etching rate of the second doped silicon glass layer. The silicon dioxide absorption layer in the second functional area and the isolation area is directly removed by acid solution etching, while retaining part of the second doped silicon glass layer, providing a basis for the subsequent formation of a carrier collection layer in the second functional area. Compared with the prior art in which a doped silicon glass layer is formed on the entire surface of a silicon substrate and a portion of the doped silicon glass layer is removed by a high-energy laser to expose the silicon substrate, the embodiment of the present invention uses acid solution etching (wet etching) to remove the silicon dioxide absorption layer to expose the silicon substrate of the second functional area and the isolation area. This can effectively reduce the damage to the surface of the silicon substrate of the second functional area and the isolation area, improve the passivation performance of the second functional area, and effectively enhance the carrier transport capability of the subsequently formed carrier collection layer in the second functional area.
[0015] In addition, compared with the prior art that requires polishing to remove laser damage after laser etching, the technical solution provided by the embodiment of the present invention has a simpler process and can reduce the loss of the silicon substrate, which helps to reduce the thickness of the selected silicon substrate and can effectively reduce the cost of back-contact solar cells. Furthermore, the acid solution etching process parameters are easier to control and more stable. Therefore, the technical solution provided by the embodiment of the present invention has higher process stability and is easier to control, which is conducive to the industrialization and promotion of the preparation method.
[0016] Furthermore, a shallow junction diffusion layer is first formed in the first functional area of the silicon substrate, and then the desired deep junction diffusion layer is obtained through synchronous advancement and oxidation source absorption treatment. This can avoid the first dopant atoms from remaining in the second functional area and the isolation area, and avoid the first dopant atoms from contaminating the second functional area and the isolation area, thereby further improving the photoelectric conversion efficiency, carrier transport capacity and other performance of the prepared back-contact solar cell. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 1 is a schematic diagram of the main process of the method for preparing a back-contact solar cell provided by an embodiment of the present invention;
[0018] Figure 2 Schematic diagram of the structural changes of a silicon substrate with a polished surface structure according to an embodiment of the present invention after step S101 to step S105;
[0019] Figure 3Schematic diagram of the structural change of the silicon substrate with a polished surface structure provided by an embodiment of the present invention after step S105 to step S107;
[0020] Figure 4 Schematic diagram of the structural change of the silicon substrate with a suede structure provided by an embodiment of the present invention after step S101 to step S107;
[0021] Figure 5 This is a schematic diagram of the main flow of a specific implementation plan of step S101 provided in an embodiment of the present invention;
[0022] Figure 6 Schematic diagram of the structural changes of the silicon substrate with a polished surface structure provided by an embodiment of the present invention after step S1011 to step S1014;
[0023] Figure 7 Schematic diagram of the structural change of the silicon substrate with a suede structure provided by an embodiment of the present invention after step S1011 to step S1014;
[0024] Figure 8 This is a schematic diagram of the main flow of a specific implementation plan of step S104 provided in an embodiment of the present invention;
[0025] Figure 9 Schematic diagram of the structural changes of the silicon substrate with a polished surface structure provided by an embodiment of the present invention after step S1041 to step S1044;
[0026] Figure 10 This is a schematic diagram of the structural changes of the silicon substrate with a suede structure provided by an embodiment of the present invention after step S1041 to step S1044.
[0027] The reference numerals are as follows:
[0028] 10-silicon substrate; 11-first functional region; 12-second functional region; 13-isolation region; 20-deep junction diffusion layer; 20'-shallow junction diffusion layer; 20"-doped source layer; 30-silicon dioxide absorption layer; 30'-second doped silicon glass layer; 40-carrier collection layer; 41-tunneling oxide layer; 42'-intrinsic polysilicon layer; 42-doped polysilicon layer; 43-third doped silicon glass layer; 50-silicon dioxide mask layer; 50'-first doped silicon glass layer; 60-passivation anti-reflection layer; 70-metal electrode. DETAILED DESCRIPTION
[0029] To address the problem in the current preparation process of back-contact solar cells (particularly TBC solar cells) that the borosilicate glass layer formed on the outer side of the P+ emitter due to laser processing not only affects the P+ emitter doping but also causes laser damage to the silicon substrate surface, resulting in impaired performance of the prepared back-contact solar cell, an embodiment of the present invention provides an improved method for preparing a back-contact solar cell.
[0030] The terms "first" and "second" in the embodiments of the present invention do not limit the number or order of elements. Instead, they are used to distinguish regions with different functions, different types of atoms, or different film layers produced by different processing steps or processes. For example, the first functional region 11 and the second functional region 12 are used to distinguish two functional regions that transport different types of carriers. If the first functional region 11 is a P region, the second functional region 12 is an N region; if the first functional region 11 is an N region, the second functional region 12 is a P region. The first doping atom and the second doping atom are two atoms with opposite conductive properties. The first doped silicon glass layer is formed by a doping source deposition process, and the second doped silicon glass layer is formed by a first doping atom push-in / oxidation absorption process, etc.
[0031] in, Figure 1 A schematic diagram showing the main process of a method for preparing a back-contact solar cell provided by an embodiment of the present invention is shown.
[0032] The embodiment of the present invention provides a method for preparing a back contact solar cell. Figure 1 As shown, the method for preparing the back contact solar cell may include the following steps:
[0033] Step S101 : forming a shallow junction diffusion layer 20 ′ containing first dopant atoms in a first functional region 11 of a first main surface of a silicon substrate 10 .
[0034] The silicon substrate 10 is generally a single crystal silicon substrate. Preferably, the silicon substrate 10 is an N-type single crystal silicon substrate. Accordingly, the first doping atom is a P-type doping atom, and the second doping atom is an N-type doping atom. Alternatively, the silicon substrate 10 may be a P-type single crystal silicon substrate. Accordingly, the first doping atom is an N-type doping atom, and the second doping atom is a P-type doping atom.
[0035] The silicon substrate 10 includes two opposing main surfaces, one of which serves as the first main surface, and the other as the second main surface. It is worth noting that in the embodiment of the present invention, during the use of the prepared back-contact solar cell, the first main surface of the silicon substrate 10 belongs to the back side of the back-contact solar cell, and the second main surface of the silicon substrate 10 belongs to the front side of the back-contact solar cell. Based on this, the first main surface of the silicon substrate 10 can also be described as the back side of the silicon substrate 10, and the second main surface of the silicon substrate can also be described as the front side of the silicon substrate 10.
[0036] It is worth noting that the first main surface of the silicon substrate 10 generally includes a first functional region 11, a second functional region 12, and an isolation region 13 located between the first functional region 11 and the second functional region 12. It can be understood that the first functional region 11, the second functional region 12, and the isolation region 13 are formed due to the provision of various functional layers (such as the deep junction diffusion layer 20, the carrier collection layer 40, etc.), that is, after the formation of various functional layers (such as the deep junction diffusion layer 20, the carrier collection layer 40, etc.), the first functional region 11, the second functional region 12, and the isolation region 13 are formed. Before the shallow junction diffusion layer 20' containing the first dopant atoms is formed, the first functional region 11, the second functional region 12, and the isolation region 13 do not exist on the first main surface of the silicon substrate 10. The first functional region 11, the second functional region 12, and the isolation region 13 are mentioned in this section only for the convenience of describing the areas targeted by the subsequent formation and removal of various functional layers.
[0037] Generally speaking, a back-contact solar cell may be provided with only one first functional region 11, one second functional region 12, and an isolation region 13 located between the first functional region 11 and the second functional region 12. Alternatively, a back-contact solar cell may be provided with a plurality of alternating first functional regions 11 and second functional regions 12, with an isolation region 13 disposed between every two adjacent first functional regions 11 and second functional regions 12.
[0038] The shallow junction diffusion layer 20' is generally formed by the first dopant atoms being diffused shallowly on the surface of the silicon substrate 10. The formation process of the shallow junction diffusion layer 20' will be described in detail later and will not be repeated here.
[0039] Preferably, for an N-type single crystal silicon substrate, the first doping atoms contained in the shallow junction diffusion layer 20 ′ are generally boron atoms, and correspondingly, the second doping atoms are generally phosphorus atoms.
[0040] It is worth noting that Figure 2 、 Figure 3 、 Figure 6 and Figure 9 As shown, the first main surface of the silicon substrate 10 is a polished surface structure. Figure 4 、 Figure 7 and Figure 10 As shown, the first main surface of the silicon substrate 10 has a textured structure. Since the first main surface of the silicon substrate 10 has a textured structure, the first functional area 11 forming the shallow junction diffusion layer 20' also has a textured structure.
[0041] For the silicon substrate 10 with a polished surface structure, the structure obtained by processing in step S101 is as follows: Figure 2 As shown, for the silicon substrate 10 with a velvet structure, the structure obtained by processing in step S101 is as follows: Figure 4 As shown. Figure 2 and Figure 4 It can be seen that after the processing in step S101 , a shallow junction diffusion layer 20 ′ is formed in the first functional region 11 of the first main surface of the silicon substrate 10 , while the second functional region 12 and the isolation region 13 still expose the silicon substrate 10 .
[0042] Step S102: In a thermal oxidation environment, the first dopant atoms in the shallow junction diffusion layer 20' are promoted to form a deep junction diffusion layer 20, and a silicon dioxide absorption layer 30 is simultaneously formed in the first functional area 11, the second functional area 12 and the isolation area 13. Based on the silicon dioxide absorption layer 30 corresponding to the first functional area 11, the shallow junction diffusion layer 20' and / or the deep junction diffusion layer 20 are subjected to oxidation absorption treatment to form a second doped silicon glass layer 30' containing the first dopant atoms corresponding to the first functional area 11.
[0043] The second doped silicon glass layer 30 ′ includes silicon oxide and first doping atoms, and the first doping atoms are derived from the shallow junction diffusion layer 20 ′ and / or the deep junction diffusion layer 20 .
[0044] This oxidizing environment is typically created by introducing oxygen into the environment (e.g., an oxidation furnace tube, diffusion equipment, etc.) surrounding the silicon substrate 10 having the shallow junction diffusion layer 20'. On the one hand, this oxygen reacts with silicon on the surfaces of the first functional region 11, the second functional region 12, and the isolation region 13 to form a silicon dioxide absorption layer 30. On the other hand, in this thermal oxidation environment, first dopant atoms (e.g., boron atoms) in the shallow junction diffusion layer 20' migrate, with some migrating inward of the silicon substrate 10, deepening the junction depth, and some migrating outward (i.e., the oxidation absorption process), allowing the first dopant atoms to enter the portion of the silicon dioxide absorption layer 30 corresponding to the first functional region 11, thereby forming a second doped silicon glass layer 30' containing the first dopant atoms corresponding to the first functional region 11.
[0045] For the silicon substrate 10 with a polished surface structure, after processing in step S102, the structure obtained is as follows Figure 2 As shown, after the silicon substrate 10 with a velvet structure is processed in step S102, the obtained structure is similar to Figure 2 Similar, except that the surface of the silicon substrate 10 maintains a velvet structure. Figure 2 As shown, after this step, a silicon dioxide absorption layer 30 is formed in the second functional area 12 and the isolation area 13 , the shallow junction diffusion layer 20 ′ is transformed into a deep junction diffusion layer 20 , and a second doped silicon glass layer 30 ′ is formed outside the deep junction diffusion layer 20 .
[0046] Step S103: using an acid solution to simultaneously clean the second doped silica glass layer 30' and the remaining silica source layer 30 to completely remove the silica source layer 30 and partially remove the second doped silica glass layer 30', wherein the acid solution etches the second doped silica glass layer 30' at a lower rate than the acid solution etches the silica source layer 30.
[0047] It can be understood that, in the silicon dioxide absorption layer 30 formed in step S102 , the portion corresponding to the first functional region 11 is converted into the second doped silicon glass layer 30 ′. Therefore, the remaining silicon dioxide absorption layer 30 corresponds to the second functional region 12 and the isolation region 13 .
[0048] The acid solution typically contains HF. The acid solution can clean the silicon dioxide absorption layer 30 more quickly. Therefore, in this step, the acid solution etches the second doped silicon glass layer 30' at a lower rate than the silicon dioxide absorption layer 30. This allows the silicon dioxide absorption layer 30 to be completely removed, while the remaining portion of the second doped silicon glass layer 30' continues to protect the deep junction diffusion layer 20 formed in the first functional region 11.
[0049] For the silicon substrate 10 with a polished surface structure, after processing in step S103, the structure obtained is as follows Figure 2 As shown, after the silicon substrate 10 with a velvet structure is processed by step S103, the obtained structure is as shown Figure 4 As shown. Figure 2 and Figure 4 As shown, after this step, the surface of the silicon substrate 10 in the second functional region 12 and the isolation region 13 is exposed, and the second doped silicon glass layer 30 ′ still remains outside the deep junction diffusion layer 20 .
[0050] Step S104 : forming a carrier collection layer 40 containing second doping atoms in the second functional region 12 , wherein the conductivity type of the second doping atoms is opposite to that of the first doping atoms.
[0051] Exemplarily, the first doping atom is a P-type doping atom (such as a boron atom), and the second doping atom is an N-type doping atom (such as a phosphorus atom).
[0052] For the silicon substrate 10 with a polished surface structure, after processing in step S104, the structure obtained is as follows Figure 2 As shown, after the silicon substrate 10 with a velvet structure is processed by step S104, the obtained structure is as shown in FIG. Figure 4 As shown. Figure 2 and Figure 4As shown, after this step, a carrier collection layer 40 is formed in the second functional area 12 , the isolation area 13 exposes the surface of the silicon substrate 10 , and a second doped silicon glass layer 30 ′ still remains outside the deep junction diffusion layer 20 of the first functional area 11 .
[0053] Step S105 : removing the remaining second doped silica glass layer 30 ′.
[0054] For the silicon substrate 10 with a polished surface structure, after processing in step S105, the structure obtained is as follows Figure 2 or Figure 3 As shown, after the silicon substrate 10 with a velvet structure is processed by step S104, the obtained structure is as shown in FIG. Figure 4 As shown. Figure 2 、 Figure 3 and Figure 4 As shown, after this step, the second functional area 12 is formed with a carrier collection layer 40, the isolation area 13 is exposed on the surface of the silicon substrate 10, and only the deep junction diffusion layer 20 is exposed in the first functional area 11. In particular, for the silicon substrate 10 with a polished surface structure, after this step, the isolation area 13 can be as follows Figure 2 The polished surface structure is shown, and it can also be Figure 3 Suede construction shown.
[0055] The technical solution provided by the embodiment of the present invention is as follows: after forming a shallow junction diffusion layer 20' in the first functional area 11 of the first main surface of the silicon substrate 10, the shallow junction diffusion layer 20' is simultaneously subjected to first dopant atom propulsion and source absorption in an oxidizing environment. While forming a deep junction diffusion layer 20 in the first functional area 11, a second doped silicon glass layer 30' containing the first dopant atom is formed on the outside of the deep junction diffusion layer 20, and a silicon dioxide source absorption layer 30 (the silicon dioxide source absorption layer 30 is substantially composed of silicon dioxide) is simultaneously formed in the isolation area and the second functional area 12 of the first main surface of the silicon substrate 10. Subsequently, based on the fact that the rate of etching the silicon dioxide source absorption layer 30 with an acid solution is greater than the rate of etching the second doped silicon glass layer 30' with an acid solution, the silicon dioxide source absorption layer 30 in the second functional area 12 and the isolation area 13 is directly removed by acid solution etching, while a portion of the second doped silicon glass layer 30' is retained, providing a basis for the subsequent formation of a carrier collection layer 40 in the second functional area 12. Compared with the prior art in which a doped silicon glass layer is formed on the entire surface of the silicon substrate 10 and a portion of the doped silicon glass layer is removed by a high-energy laser to expose the silicon substrate 10, the embodiment of the present invention uses acid solution etching (wet etching) to remove the silicon dioxide absorption layer 30 to expose the silicon substrate 10 in the second functional area 12 and the isolation area 13. This can effectively reduce damage to the surface of the silicon substrate 10 in the second functional area 12 and the isolation area 13, reduce defects in the portions of the silicon substrate 10 corresponding to the second functional area 12 and the isolation area 13, and thus improve the passivation performance of the portions of the silicon substrate 10 corresponding to the second functional area 12 and the isolation area 13.
[0056] In addition, compared to laser etching to remove the silicon dioxide absorption layer 30, wet etching can reduce defects in the portion of the silicon substrate 10 corresponding to the second functional region 12, thereby reducing carrier recombination in the second functional region 12. Furthermore, since the first dopant atoms in the shallow junction diffusion layer 20' are advanced to form a deep junction diffusion layer that is only advanced in the first functional region, the first dopant atoms can be prevented from remaining in the second functional region 12, which can also reduce carrier recombination in the second functional region 12, thereby effectively improving the carrier transport capability of the subsequently formed carrier collection layer 40 in the second functional region 12. Furthermore, this process can also prevent the first dopant atoms from remaining in the isolation region 13, thereby improving the isolation effect of the isolation region 13.
[0057] In addition, compared with the prior art that requires polishing to remove laser damage after laser etching, the technical solution provided by the embodiment of the present invention has a simpler process and can reduce the loss of the silicon substrate 10, which helps to reduce the thickness of the selected silicon substrate 10 and can effectively reduce the cost of back-contact solar cells. Furthermore, the acid solution etching process parameters are easier to control, more stable, and highly controllable. Therefore, the technical solution provided by the embodiment of the present invention has higher process stability and is easier to control, which is conducive to the industrialization, mass production and promotion of the preparation method.
[0058] Furthermore, a shallow junction diffusion layer 20' is first formed in the first functional area 11 of the silicon substrate 10, and then the desired deep junction diffusion layer 20 is obtained through synchronous advancement and oxidation source absorption treatment, which can avoid the first doping atoms from remaining in the second functional area 12 and the isolation area 13, and avoid the first doping atoms from contaminating the second functional area 12 and the isolation area 13, thereby further improving the photoelectric conversion efficiency, carrier transport capacity and other performance of the prepared back-contact solar cell.
[0059] Furthermore, the technical solution provided in this embodiment splits the boron diffusion process into two process stages (forming a shallow junction diffusion layer 20' and forming a deep junction diffusion layer 20), which not only prevents the first dopant atoms from contaminating the second functional area 12 and the isolation area 13, but also ensures that the formed PN junction is deep. At the same time, it can also take advantage of the etching difference between the acid solution and silicon dioxide and the doped silicon glass, and use the acid solution to etch to expose the silicon substrate 10 of the second functional area 12 and the isolation area 13. At the same time, it can also ensure that a protective layer for protecting the deep junction diffusion layer 20 is retained corresponding to the deep junction diffusion layer 20, which facilitates the subsequent functional layer preparation and avoids the use of laser to cause damage to the deep junction diffusion layer 20.
[0060] The specific implementation process of each of the above steps will be described in detail below.
[0061] Specifically, for the above step S101, it can be implemented using existing technology. Preferably, in the embodiment of the present invention, a new implementation method for step S101 is provided. Figure 5 As shown, the specific implementation may include the following steps:
[0062] Step S1011 : forming a silicon dioxide mask layer 50 on the first main surface of the silicon substrate 10 .
[0063] Specifically, this step can be performed by oxidizing the first main surface of the silicon substrate 10 in an environment where oxygen is continuously introduced to form a silicon dioxide mask layer 50. The temperature used in this step can be 800°C to 850°C, and the oxidation time is 10min to 60min. For example, the temperature used in this step is 800°C, 820°C, 830°C or 850°C, and the oxidation time is 10min, 20min, 30min, 50min or 60min. The structure after this step can be as follows: Figure 6 and Figure 7 As shown, Figure 6 This is a structural change of the silicon substrate 10 with respect to the polished surface structure. Figure 7 This is a structural change of the silicon substrate 10 with a suede structure.
[0064] In addition, the step S1011 may further include: forming a first winding plating layer A corresponding to the silicon dioxide mask layer 50 on the second main surface of the silicon substrate 10 simultaneously. Taking the silicon substrate 10 with a velvet structure as an example, Figure 7 As shown, a first wrap-around coating layer A corresponding to the silicon dioxide mask layer 50 is formed on the second main surface of the silicon substrate 10 .
[0065] The thickness of the silicon dioxide mask layer 50 formed in this step is generally 50 nm to 300 nm. For example, the thickness of the silicon dioxide mask layer 50 can be 50 nm, 100 nm, 150 nm, 200 nm, 250 nm or 300 nm. By controlling the thickness of the silicon dioxide mask layer 50, on the one hand, the silicon dioxide mask layer 50 can block the first doping atoms from entering the second functional region 12 and the isolation region 13, thereby preventing the first doping atoms from contaminating or damaging the second functional region 12 and the isolation region 13, ensuring the isolation performance of the isolation region 13, and helping to subsequently improve the carrier transport capability of the second functional region 12 and reduce carrier recombination.
[0066] The thickness of the first winding coating A is generally 50 nm to 300 nm. For example, the thickness of the first winding coating A can be 50 nm, 80 nm, 100 nm, 120 nm, 150 nm, 200 nm, 230 nm, 250 nm, 280 nm, or 300 nm. By controlling the thickness of the first winding coating A, the first dopant atoms can be blocked from entering the second main surface of the silicon substrate 10, reducing carrier recombination in the silicon substrate 10 and ensuring the subsequent passivation effect of the second main surface of the silicon substrate 10.
[0067] Step S1012 : removing the portion of the silicon dioxide mask layer 50 corresponding to the first functional region 11 .
[0068] Specifically, in step S1012, the portion of the silicon dioxide mask layer 50 corresponding to the first functional area 11 is removed by laser, so that the portion of the silicon substrate 10 corresponding to the first functional area 11 is exposed, and the laser damage of the silicon substrate 10 corresponding to the first functional area 11 is removed by alkaline solution. The structure obtained after the treatment in step S1012 is as follows: Figure 6 and Figure 7 shown. Figure 6 The target is the silicon substrate 10 with a polished surface structure. Figure 7 The silicon substrate 10 with a velvet structure is targeted. After the treatment in step S1012, the first functional area 11 exposes the surface of the silicon substrate 10, and the silicon dioxide mask layer 50 still remains in the second functional area 12 and the isolation area 13. In the case where a first winding plating layer A is formed on the second main surface of the silicon substrate 10, the first winding plating layer A can be retained in step S1012. In addition, in step S1012, the first winding plating layer A can also be removed by laser treatment (such as Figure 7 shown).
[0069] Since the main component of the silicon dioxide mask layer 50 is silicon dioxide, it is easily removed by laser. Therefore, low-energy laser treatment can be used in this step. Low-energy laser treatment can reduce or even avoid laser damage, which helps to improve the passivation effect of the surface of the silicon substrate 10. Preferably, the energy density of the low-energy laser can be 10mJ / cm 2 ~50mJ / cm 2 For example, the energy density of the low-energy laser is 10 mJ / cm 2 , 20mJ / cm 2 、30mJ / cm 2 , 40mJ / cm 2 or 50 mJ / cm 2 More preferably, low energy laser generally uses an energy density of 40mJ / cm 2 green light.
[0070] Step S1013: By depositing a dopant source, a shallow junction diffusion layer 20' and a dopant source layer 20" containing first dopant atoms are deposited on the first functional region 11. The first dopant atoms enter the remaining silicon dioxide mask layer 50 to form a first doped silicon glass layer 50'. The silicon dioxide mask layer 50 blocks the first dopant atoms from diffusing into the silicon substrate 10.
[0071] Specifically, at 800° C. to 950° C., a boron source (BCl 3 ) and oxygen (O 2 ) are introduced into the first functional region 11 for low-temperature deposition for 2 to 20 minutes to form a shallow junction diffusion layer 20 ′, a doping source layer 20 ″, and a first doped silicon glass layer 50 ′.
[0072] For example, the dopant source deposition temperature may be 800° C., 830° C., 850° C., 880° C., 900° C., 920° C., or 950° C., etc. The deposition time may be 2 min, 5 min, 8 min, 10 min, 15 min, 18 min, or 20 min, etc.
[0073] The structural changes brought about by step S1013 are as follows: Figure 6 and Figure 7 As shown, from Figure 6 and Figure 7 It can be seen that the portion of the first main surface of the silicon substrate 10 corresponding to the first functional area 11 is formed with a shallow junction diffusion layer 20' and a doping source layer 20" stacked from the inside to the outside (the main component of the doping source layer 20" is doped silicon glass containing the first doping atoms), and the portion of the first main surface of the silicon substrate 10 corresponding to the second functional area 12 and the isolation area 13 is formed with a first doped silicon glass layer 50'.
[0074] For example, if the first doping atom is a boron atom, the shallow junction diffusion layer 20' is a shallow junction diffusion layer 20' containing boron atoms, which can serve as a P+ shallow junction emitter, the doping source layer 20" is a boron source layer, and the first doped silicon glass layer 50' is a borosilicate glass layer.
[0075] In addition, for the second main surface of the silicon substrate 10, if the first wrap-around coating layer A is not removed in step S1012, step S1013 further includes: first doping atoms enter the first wrap-around coating layer A to form a first wrap-around coating doped layer. Exemplarily, the first doping atoms are boron atoms, and the first wrap-around coating doped layer is a wrap-around borosilicate glass layer.
[0076] Step S1014 : using an acid solution to remove the doping source layer 20 ″ and the first doped silicon glass layer 50 ′, thereby obtaining a shallow junction diffusion layer 20 ′ corresponding to the first functional region 11 .
[0077] Specifically, the doping source layer 20 ″ and the first doped silicon glass layer 50 ′ are cleaned using an HF solution having a mass fraction of 5% to 50%, wherein the cleaning time is 5 seconds to 300 seconds. For example, the mass fraction of HF in the HF solution is 5%, 10%, 15%, 20%, 30%, 40%, or 50%, and the cleaning time may be 5 seconds, 20 seconds, 50 seconds, 100 seconds, 150 seconds, 200 seconds, 250 seconds, or 300 seconds.
[0078] The structural changes corresponding to this step are as follows Figure 6 and Figure 7 After this step, a shallow junction diffusion layer 20 ′ (such as a P+ shallow junction emitter) can be formed only in the first functional area 11 of the first main surface of the silicon substrate 10 .
[0079] In addition, in view of the fact that the first winding-plated doping layer A still exists on the second main surface of the silicon substrate 10 in the above-mentioned step S1013, and the first winding-plated doping layer A forms a first winding-plated doping layer, the step S1014 also includes: synchronously removing the first winding-plated doping layer. Removing the first winding-plated doping layer on the second main surface of the silicon substrate 10 in this step can reduce or even avoid the first doping atoms from being doped into the second main surface of the silicon substrate 10, thereby reducing the carrier recombination on the surface of the silicon substrate 10 and helping to improve the subsequent passivation effect of the second main surface of the silicon substrate 10. In addition, the synchronous removal of the first winding-plated doping layer can omit the single-sided etching process of the second main surface of the silicon substrate 10, thereby ensuring the integrity of the second main surface of the silicon substrate 10.
[0080] More specifically, for the shallow junction diffusion layer 20' formed in step S1012, the concentration of the first doping atoms in the shallow junction diffusion layer 20' is generally 5×10 19 atoms / cm 3 ~5×1021 atoms / cm 3 For example, the concentration of the first doping atoms in the shallow junction diffusion layer 20' may be 5×10 19 atoms / cm 3 , 8×10 19 atoms / cm 3 , 5×10 20 atoms / cm 3 , 7×10 20 atoms / cm 3 , 9×10 20 atoms / cm 3 , 1×10 21 atoms / cm 3 or 5×10 21 atoms / cm 3 wait.
[0081] Furthermore, the junction depth of the shallow junction diffusion layer 20 ′ may be 0.1 μm to 1.0 μm. For example, the junction depth of the shallow junction diffusion layer 20 ′ may be 0.1 μm, 0.3 μm, 0.5 μm, 0.7 μm, 0.9 μm, or 1.0 μm.
[0082] By controlling the junction depth and the concentration of the first doping atoms of the shallow junction diffusion layer 20', the junction depth and doping concentration of the subsequently formed deep junction diffusion layer 20 can be effectively controlled, thereby helping to improve the doping uniformity of the deep junction diffusion layer 20, improving the carrier transport capability of the deep junction diffusion layer 20, and reducing the contact resistance of the deep junction diffusion layer 20.
[0083] In addition, for the formation of the shallow junction diffusion layer 20 ′, the silicon dioxide mask layer 50 can block the first doping atoms from entering the second functional region 12 and the isolation region 13 , thereby preventing the first doping atoms from contaminating the second functional region 12 and the isolation region 13 .
[0084] Furthermore, with respect to the above-mentioned step S102, it may include: simultaneously carrying out the first doping atom promotion and oxidation source absorption treatment at a temperature of 1000°C to 1050°C, and the treatment time is 30min to 120min. For example, the temperature may be 1000°C, 1020°C or 1050°C, etc. The treatment time may be 30min, 60min, 90min or 120min, etc. Through the oxidation source absorption treatment, a second doped silicon glass layer 30' is formed on the outside of the deep junction diffusion layer 20. Subsequently, by virtue of the difference in the etching rate of the second doped silicon glass layer 30' and the silicon dioxide source absorption layer 30 by the acid solution, a portion of the second doped silicon glass layer 30' can be retained, thereby protecting the deep junction diffusion layer 20.
[0085] Furthermore, step S102 may further include: simultaneously forming a second wrap-around coating corresponding to the silicon dioxide source absorption layer 30 on the second main surface of the silicon substrate 10. Correspondingly, step S103 further includes: simultaneously removing the second wrap-around coating.
[0086] The concentration of the first doping atoms in the deep junction diffusion layer 20 obtained after step S102 can be 1×10 18 ~2×10 19 atoms / cm 3 For example, the concentration of the first doping atoms in the deep junction diffusion layer 20 may be 1×10 18 atoms / cm 3 , 5×10 18 atoms / cm 3 , 9×10 18 atoms / cm 3 , 1×10 19 atoms / cm 3 or 2×10 19 atoms / cm 3 wait.
[0087] Furthermore, the junction depth of the deep junction diffusion layer 20 may be 1.0 μm to 3.0 μm. For example, the junction depth of the deep junction diffusion layer 20 may be 1.0 μm, 1.3 μm, 1.5 μm, 1.7 μm, 2.0 μm, 2.3 μm, 2.5 μm, 2.8 μm, or 3.0 μm. By controlling the junction depth of the deep junction diffusion layer 20 and the concentration of the first dopant atoms in the deep junction diffusion layer 20, the carrier transport capability of the deep junction diffusion layer 20 is ensured, while improving the contact performance between the deep junction diffusion layer 20 and the metal electrode 70.
[0088] The thickness of the silica absorption layer 30 can be 50 nm to 300 nm. For example, the thickness of the silica absorption layer 30 can be 50 nm, 60 nm, 80 nm, 100 nm, 120 nm, 150 nm, 180 nm, 200 nm, 250 nm, or 300 nm. By controlling the thickness of the silica absorption layer 30 and the difference between the etching rate of the second doped silica glass layer 30' by the acid solution and the etching rate of the silica absorption layer 30 by the acid solution, the thickness of the formed second doped silica glass layer 30' can be ensured to meet the requirements of acid cleaning. After acid cleaning, a certain thickness of the second doped silica glass layer 30' can be well retained, thereby achieving the purpose of protecting the deep junction diffusion layer 20.
[0089] Furthermore, step S103 may include cleaning the second doped silica glass layer 30' and the remaining silica absorption layer 30 with a 5% to 50% HF solution by mass, wherein the cleaning time is 5 seconds to 300 seconds, leaving the remaining thickness of the second doped silica glass layer 30' at 20 nm to 200 nm. For example, the HF solution may contain 5%, 10%, 15%, 20%, 25%, 30%, 35%, 40%, 45%, or 50% by mass, and the cleaning time may be 5 seconds, 10 seconds, 15 seconds, 20 seconds, 50 seconds, 100 seconds, 150 seconds, 200 seconds, 250 seconds, or 300 seconds, and the remaining thickness of the second doped silica glass layer 30' may be 20 nm, 40 nm, 50 nm, 80 nm, 100 nm, 150 nm, 180 nm, or 200 nm.
[0090] Furthermore, after step S103 and before step S104, the process may further include: polishing the second functional region 12 and the isolation region 13. This polishing process may use an alkaline solution (such as a sodium hydroxide solution, a potassium hydroxide solution, etc.) to polish the surface of the silicon substrate 10 exposed in the second functional region 12 and the isolation region 13, thereby avoiding the residue of the silicon dioxide absorption layer 30 and helping to improve the performance of the carrier collection layer 40 subsequently formed in the second functional region 12.
[0091] As can be seen from the above embodiments, regardless of whether wrap-around plating occurs on the second main surface of the silicon substrate 10 during steps S101 and S102, after step S103, the second main surface of the silicon substrate 10 is exposed. The first main surface of the silicon substrate 10 is formed with a deep junction diffusion layer 20 and a second doped silicon glass layer 30' stacked from the inside out, corresponding to the first functional region 11. The first main surface of the silicon substrate 10 is exposed, corresponding to the second functional region 12 and the isolation region 13.
[0092] Based on the structure formed in step S103 above, Figure 8 As shown, the specific implementation of step S104 may include:
[0093] Step S1041 : forming a tunneling oxide layer 41 and an intrinsic polysilicon layer 42 ′ in sequence outside the remaining second doped silicon glass layer 30 ′ and the second functional region 12 and the isolation region 13 .
[0094] The structural changes brought about by step S1041 are as follows: Figure 9 As shown. Figure 9 It can be seen that a tunnel oxide layer 41 and an intrinsic polysilicon layer 42 ′ are stacked from the inside to the outside on the outside of the remaining second doped silicon glass layer 30 ′ and the second functional region 12 and the isolation region 13 .
[0095] In addition, step S1041 further includes: forming a third winding coating layer B corresponding to the tunneling oxide layer 41 and a fourth winding coating layer corresponding to the intrinsic polysilicon layer 42' on the second main surface of the silicon substrate 10. For example, the third winding coating layer B can be as follows: Figure 10 shown.
[0096] Since the first doping atoms in the shallow junction diffusion layer 20' are pushed forward to form the deep junction diffusion layer 20 only in the first functional area, the first doping atoms are prevented from remaining in the second functional area 12, thereby preventing the first doping atoms from affecting the tunneling passivation effect of the tunneling oxide layer 41, and further improving the passivation effect of the second functional area.
[0097] Step S1042 : performing a second dopant atom diffusion process on the intrinsic polysilicon layer 42 ′ to form a doped polysilicon layer 42 containing second dopant atoms, and forming a third doped silicon glass layer 43 containing second dopant atoms outside the doped polysilicon layer 42 .
[0098] The structural changes brought about by step S1042 are as follows: Figure 9 and Figure 10 As shown, after this step, the intrinsic polysilicon layer 42 ′ is converted into a doped polysilicon layer 42 , and a third doped silicon glass layer 43 is added on the outside.
[0099] Furthermore, the step S1042 may further include: diffusing the second doping atoms in the fourth winding doping layer to form a fourth winding doping layer C, and forming a fifth winding doping layer D corresponding to the third doped silicon glass layer 43 outside the fourth winding doping layer C. For example, the fourth winding doping layer C and the fifth winding doping layer D may be as follows: Figure 10 The structural changes shown.
[0100] Step S1043 : removing the third doped silicon glass layer 43 corresponding to the first functional region 11 and the isolation region 13 by laser.
[0101] The structural changes brought about by step S1043 are as follows: Figure 9 and Figure 10 As shown, after this step, the outer sides of the first functional region 11 and the isolation region 13 are formed as a doped polysilicon layer 42 , and the outer side of the second functional region 12 is formed as a third doped silicon glass layer 43 .
[0102] Since there are doped polysilicon layers 42 and second doped silicon glass layers 30' inside the third doped silicon glass layer 43 of the first functional region 11, they can better isolate the laser energy, reduce or even avoid the impact of the laser on the deep junction diffusion layer 20. While using laser to remove the third doped silicon glass layer 43 in this step, the stability and reliability of the deep junction diffusion layer 20 can be guaranteed.
[0103] Furthermore, before step S1044, the method may further include: removing the fifth winding coating layer D by using HF solution, and the corresponding structural changes are as follows: Figure 10 It is worth noting that the HF solution can be used to remove the fifth winding coating D before or after the above step S1043, and the order of the HF solution and step S1043 is not limited.
[0104] Step S1044 : using an alkaline solution to remove the doped polysilicon layer 42 and the tunneling oxide layer 41 corresponding to the first functional region 11 and the isolation region 13 .
[0105] The alkaline solution can be a sodium hydroxide solution or a potassium hydroxide solution. The structural changes corresponding to step S1044 are as follows: Figure 9 and Figure 10 As shown. Figure 9 and Figure 10 It can be seen that due to the protection of the remaining third doped silicon glass layer 43 in the second functional area 12, after this step of processing, only the doped polysilicon layer 42 and the tunneling oxide layer 41 corresponding to the first functional area 11 and the isolation area 13 are removed. In addition, due to the presence of the second doped silicon glass layer 30', this process can prevent the alkaline solution from damaging the deep junction diffusion layer 20.
[0106] Furthermore, the step S1044 may further include: simultaneously removing the fourth winding doping layer C and the third winding doping layer B, and using an alkaline solution to make the isolation region 13 and the second main surface of the silicon substrate 10 into a suede structure. The corresponding structural changes are as follows: Figure 10 shown.
[0107] Furthermore, step S105 may further include: using an acid solution to simultaneously remove the third doped silicon glass layer 43 corresponding to the second functional area 12. The corresponding structural changes are as follows: Figure 9 and Figure 10 shown.
[0108] Furthermore, if Figure 1 As shown, the preparation method provided by the embodiment of the present invention may further include: Step S106: forming a passivation anti-reflection layer 60 on the second main surface of the silicon substrate 10 and the first functional area 11, the second functional area 12 and the isolation area 13. The passivation anti-reflection layer 60 may include a passivation layer and an anti-reflection layer stacked from the inside to the outside, and the passivation layer and the anti-reflection layer may be made of existing passivation materials and anti-reflection materials, such as Al2O3, SiN x After step S106, the corresponding structural changes are as follows: Figure 3 and Figure 4 shown.
[0109] Furthermore, if Figure 1As shown, the preparation method provided by the embodiment of the present invention may further include: step S107: forming a metal electrode 70 electrically connected to the deep junction diffusion layer 20 and the carrier collection layer 40 respectively. The corresponding structural changes after step S107 are as follows Figure 3 and Figure 4 shown.
[0110] Furthermore, an embodiment of the present invention also provides a back-contact solar cell, which is prepared by the preparation methods provided in the above embodiments.
[0111] The following describes in detail the method for preparing a back-contact solar cell provided by an embodiment of the present invention using a specific embodiment.
[0112] Example 1:
[0113] Step A1: texturing an N-type silicon wafer with a resistivity of 10Ω·cm and a thickness of 150 μm.
[0114] Step B1: grow a 50 nm thick silicon dioxide mask layer on the surface of the silicon wafer by plasma enhanced chemical vapor deposition (PECVD) method.
[0115] Step C1: Use a 30W green laser to etch the silicon dioxide mask layer reserved for the P region on the back, and use a KOH solution to etch the laser damaged layer under the P region mask layer.
[0116] Step D1: Load the silicon wafer into a low-pressure chemical vapor deposition (LPCVD) quartz boat, introduce a boron source, and complete the boron source deposition process at a temperature of 830°C to form a stacked shallow junction diffusion layer and a boron source layer in the P region, and form a first borosilicate glass layer in the isolation region and the N region.
[0117] Step E1: Use 15% by mass HF solution to completely etch away the front and back boron source layers and the first borosilicate glass layer.
[0118] Step F1: Load the silicon wafer into an LPCVD quartz boat, raise the temperature to 1020°C, and introduce oxygen to complete the high-temperature absorption / propulsion process. During the oxidation process, the surfaces of the P / N regions are oxidized into SiO2 layers (i.e., silicon dioxide absorption layers) (boron atoms diffuse more actively). However, since boron atoms have a higher solid solubility in SiO2, a considerable portion of the boron atoms in the P region will be absorbed into the SiO2, eventually forming a second borosilicate glass layer in the P region and a silicon dioxide absorption layer in the N region and isolation region. The composition of the front and back N regions is the same.
[0119] Step G1: Taking advantage of the significant difference in acid resistance between the second borosilicate glass layer and the silicon dioxide absorption layer, they are simultaneously etched with a 10% by mass HF solution. The silicon dioxide absorption layer is less acid-resistant and is etched first, while the second borosilicate glass layer still retains a thickness of about 50 nm.
[0120] Step H1: Polishing process: the area on the back side reserved as the N zone and the front side become the polished surface N-Si.
[0121] Step I1: Place the dried silicon wafer in a quartz boat, heat it to 600°C under low pressure, introduce 2000sccm of oxygen, grow a tunneling oxide layer of about 1.5nm, then introduce silane to grow a 250nm thick polysilicon layer (i-PolySi), then raise the temperature to 900°C, introduce a phosphorus source to complete the phosphorus diffusion process. At this time, the N region and isolation region are tunneling oxide layer / phosphorus-doped polysilicon layer / phosphorus silicon glass layer structure, and the P region is deep junction P+ emitter / second borosilicate glass layer / tunneling oxide layer / phosphorus-doped polysilicon layer / phosphorus silicon glass layer.
[0122] Step J1: Use a 30W green laser to etch away the phosphosilicate glass layer above the P region and the phosphosilicate glass layer above the isolation region, and etch away the front phosphosilicate glass layer using a 5% by mass HF etching solution.
[0123] Step K1: using an alkaline solution to remove the N+Poly Si and the tunnel oxide layer above the P region and the isolation region. The alkaline solution also forms a textured surface on the front and back isolation regions.
[0124] Step L1: Use HF with a mass fraction of 10% to remove the phosphosilicate glass layer outside the N region and the second borosilicate glass layer on the surface of the P region.
[0125] Step M1: Trimethylaluminum and water were introduced at 250°C to grow a 6nm thick Al2O3 layer on both the front and back surfaces. Next, silane and ammonia were introduced in a plasma-enhanced chemical vapor deposition (PECVD) system at 540°C to deposit a 75nm thick SiNx film on both the front and back surfaces.
[0126] Step N1: Silver paste is screen-printed onto the P and N regions on the back of the silicon wafer, followed by high-temperature sintering to complete the metallization process. Finally, after light injection, a back-contact cell is obtained.
[0127] Comparative Example:
[0128] Step A2: performing texturing treatment on an N-type silicon wafer with a resistivity of 10Ω·cm and a thickness of 150 μm.
[0129] Step B2: Load the silicon wafer into an LPCVD quartz boat, introduce a boron source, and heat it to 1020°C for oxygen absorption / propulsion to complete the boron diffusion process, forming a full-surface P+ / borosilicate glass (BSG) layer structure, and forming a BSG wrap-around coating on the front.
[0130] Step C2: Use a 45W green laser to etch away the BSG on the back side reserved for the N area, then use a single-sided etching process to remove the BSG layer on the front side, and perform a polishing process to remove laser damage and the boron inner diffusion layer, so that the structure reserved for the N area on the back side becomes a polished surface N-Si, and there is BSG in the P area.
[0131] Step D2: Place the dried silicon wafer in a quartz boat, heat it to 600°C under low pressure, introduce 2000sccm of oxygen, and grow a tunneling oxide layer of about 1.5nm. Then introduce silane to grow a 250nm thick polysilicon layer (i-PolySi). Then raise the temperature to 900°C and introduce a phosphorus source to complete the phosphorus diffusion process. At this time, the N region is a tunneling oxide layer / phosphorus-doped polysilicon layer / phosphorus silicon glass layer structure, and the P region is a P+ emitter / borosilicate glass layer / tunneling oxide layer / phosphorus-doped polysilicon layer / phosphorus silicon glass layer.
[0132] Step E2: Use a 30W green laser to etch away the phosphosilicate glass layer above the P region and the phosphosilicate glass layer above the isolation region, and etch away the front phosphosilicate glass layer using a 5% by mass HF etching solution.
[0133] Step F2: using an alkaline solution to remove the N+Poly Si and tunnel oxide layer above the P region. The alkaline solution simultaneously forms a textured surface on the front and back isolation regions.
[0134] Step G2: Use HF with a mass fraction of 10% to remove the phosphosilicate glass layer outside the N region and the borosilicate glass layer on the surface of the P region.
[0135] Step H2: Trimethylaluminum and water were introduced at 250°C to grow a 6nm thick Al2O3 layer on both the front and back surfaces. Next, SiNx films were deposited to a thickness of 75nm on both the front and back surfaces in a plasma-enhanced chemical vapor deposition system at 540°C using silane and ammonia.
[0136] Step I2: Silver paste is screen-printed onto the P and N regions on the back of the silicon wafer. High-temperature sintering completes the metallization process. Finally, light injection treatment completes the back-contact cell.
[0137] It can be seen from the above embodiments and comparative examples that, compared with the prior art of the comparative examples, the technical solution provided by the embodiments of the present invention adds steps B1, C1, and G1, and omits the laser processing process of step C2 and the single-side engraving process.
[0138] The performance of the back-contact solar cells prepared using the above examples and comparative examples was tested, and the test results are shown in Table 1 below:
[0139] Table 1
[0140] EFF (%) Voc(mV) Isc(A) FF(%) Example 26.59 742.5 14.57 81.41 Comparative Example 26.25 740.1 14.55 80.75
[0141] As can be seen from Table 1, the photoelectric conversion efficiency (EFF) of the back-contact solar cell provided in the embodiment is improved by about 0.34%, the open circuit voltage is increased by 2.4 mV, the fill factor (FF) is increased by about 0.66%, and the short-circuit current is increased by about 0.02 A. It can be seen from this that the performance of the back-contact solar cell provided in the embodiment is significantly improved compared to the comparative example. This is because the comparative example uses a high-power laser etching process to remove the borosilicate glass layer above the N region, which will cause laser doping, laser damage, etc., and have an adverse effect on the silicon substrate, etc., while the process of the embodiment uses HF solution wet etching to remove the borosilicate glass layer above the N region, which can reduce the impact on the deep junction diffusion layer and the surface of the silicon substrate, and improve the performance of the produced back-contact solar cells.
[0142] In summary, the embodiments of the present invention provide the following technical solutions:
[0143] Technical Solution 1: A method for preparing a back-contact solar cell, comprising:
[0144] Step 1: forming a shallow junction diffusion layer 20' containing first dopant atoms in a first functional region 11 of a first main surface of a silicon substrate 10, wherein the first main surface of the silicon substrate 10 includes the first functional region 11, the second functional region 12, and an isolation region 13 located between the first functional region 11 and the second functional region 12;
[0145] Step 2: In a thermal oxidation environment, the first dopant atoms in the shallow junction diffusion layer 20' are promoted to form a deep junction diffusion layer 20, and a silicon dioxide source absorption layer 30 is simultaneously formed in the first functional region 11, the second functional region 12, and the isolation region 13. Based on the silicon dioxide source absorption layer 30 corresponding to the first functional region 11, the shallow junction diffusion layer 20' and / or the deep junction diffusion layer 20 are subjected to an oxidation source absorption treatment, and a second doped silicon glass layer 30' containing the first dopant atoms is formed corresponding to the first functional region 11.
[0146] Step 3: Using an acid solution to simultaneously clean the second doped silica glass layer 30' and the remaining silica source layer 30, so as to completely remove the silica source layer 30 and partially remove the second doped silica glass layer 30', wherein the acid solution etches the second doped silica glass layer 30' at a lower rate than the acid solution etches the silica source layer 30;
[0147] Step 4: forming a carrier collection layer 40 containing second dopant atoms in the second functional region 12 , wherein the conductivity type of the second dopant atoms is opposite to that of the first dopant atoms;
[0148] Step 5: removing the remaining second doped silicon glass layer 30 ′.
[0149] Technical Solution 2: According to the preparation method described in Technical Solution 1, step 1 comprises:
[0150] Step 11: forming a silicon dioxide mask layer 50 on the first main surface of the silicon substrate 10;
[0151] Step 12: removing the portion of the silicon dioxide mask layer 50 corresponding to the first functional area 11;
[0152] Step 13: Depositing the shallow junction diffusion layer 20' and the doping source layer 20" containing the first dopant atoms on the outside of the shallow junction diffusion layer 20' in the first functional region 11 by dopant source deposition, wherein the first dopant atoms enter the remaining silicon dioxide mask layer 50 to form a first doped silicon glass layer 50', and the silicon dioxide mask layer 50 blocks the first dopant atoms from diffusing into the silicon substrate 10;
[0153] Step 14: using an acid solution to remove the doping source layer 20 ″ and the first doped silicon glass layer 50 ′, thereby obtaining a shallow junction diffusion layer 20 ′ corresponding to the first functional region 11 .
[0154] Technical solution 3, according to the preparation method described in technical solution 2,
[0155] Step 12 includes: using a laser to remove the portion of the silicon dioxide mask layer 50 corresponding to the first functional area 11 to expose the portion of the silicon substrate 10 corresponding to the first functional area 11, and using an alkaline solution to remove the laser damage of the silicon substrate 10 corresponding to the first functional area 11.
[0156] Technical solution 4: The preparation method according to technical solution 3,
[0157] The energy density of the laser is 10 mJ / cm 2 ~50mJ / cm 2 .
[0158] Technical solution 5, according to the preparation method of technical solution 2,
[0159] Step 13 includes: introducing a boron source (BCl3) and oxygen (O2) into the first functional area 11 at 800°C to 950°C for 2 minutes to 20 minutes to form the shallow junction diffusion layer 20', the doping source layer 20", and the first doped silicon glass layer 50'.
[0160] Technical solution 6, according to the preparation method of technical solution 2,
[0161] Step 14 includes: cleaning the doping source layer 20" and the first doped silicon glass layer 50' using an HF solution with a mass fraction of 10% to 50%, wherein the cleaning time is 20 to 200 seconds.
[0162] Technical solution 7, according to the preparation method described in technical solution 2,
[0163] Step 11 further includes: simultaneously forming a first wrap-around coating corresponding to the silicon dioxide mask layer 50 on the second main surface of the silicon substrate 10;
[0164] Step 13 also includes: the first doping atoms enter the first wrap-around plating layer to form a first wrap-around plating doping layer;
[0165] Step 14 also includes: simultaneously removing the first wrap-around doping layer.
[0166] Technical solution 8, according to the preparation method described in technical solution 2,
[0167] The thickness of the silicon dioxide mask layer 50 is 50 nm to 300 nm.
[0168] Technical solution 9, according to the preparation method of technical solution 7,
[0169] The thickness of the first winding coating is 50nm to 300nm.
[0170] Technical solution 10, the preparation method according to technical solution 1 or 2,
[0171] The concentration of the first doping atoms in the shallow junction diffusion layer 20' is 5×10 19 atoms / cm 3 ~5×10 21 atoms / cm 3 ;
[0172] and / or,
[0173] The junction depth of the shallow junction diffusion layer 20' is 0.1 μm to 1.0 μm;
[0174] and / or,
[0175] The concentration of the first dopant atoms in the deep junction diffusion layer 20 is 1×10 18 atoms / cm 3 ~2×10 19 atoms / cm 3 ;
[0176] and / or,
[0177] The junction depth of the deep junction diffusion layer 20 is 1.0 μm to 3.0 μm;
[0178] and / or,
[0179] The thickness of the silicon dioxide source absorption layer 30 is 50 nm to 300 nm.
[0180] Technical solution 11, according to the preparation method of technical solution 1,
[0181] Step 2 includes: simultaneously advancing the first dopant atom and performing oxidation source absorption treatment at a temperature of 1000° C. to 1050° C. for 30 minutes to 120 minutes;
[0182] and / or,
[0183] Step 2 also includes: synchronously forming a second winding coating layer corresponding to the silicon dioxide source absorption layer 30 on the second main surface of the silicon substrate 10;
[0184] Step 3 also includes: synchronously removing the second winding coating.
[0185] Technical solution 12, the preparation method according to technical solution 1 or 2,
[0186] Step 3 includes: cleaning the second doped silica glass layer 30 ′ and the remaining silica absorption layer 30 with a 5% to 50% HF solution by mass, wherein the cleaning time is 5s to 300s, so that the remaining thickness of the second doped silica glass layer 30 ′ is 20nm to 200nm.
[0187] Technical Solution 13: The preparation method according to Technical Solution 1, further comprising, after step 3 and before step 4:
[0188] The second functional area 12 and the isolation area 13 are polished.
[0189] Technical Solution 14: According to the preparation method of Technical Solution 1 or 13, step 4 comprises:
[0190] Step 41 , forming a tunneling oxide layer 41 and an intrinsic polysilicon layer 42 ′ on the outer side of the remaining second doped silicon glass layer 30 ′ and on the second functional region 12 and the isolation region 13 in sequence;
[0191] Step 42: performing a second dopant atom diffusion process on the intrinsic polysilicon layer 42' to form a doped polysilicon layer 42 containing second dopant atoms, and forming a third doped silicon glass layer 43 containing second dopant atoms outside the doped polysilicon layer 42;
[0192] Step 43 , removing the third doped silicon glass layer 43 corresponding to the first functional region 11 and the isolation region 13 by laser;
[0193] Step 44 : using an alkaline solution to remove the doped polysilicon layer 42 and the tunneling oxide layer 41 corresponding to the first functional region 11 and the isolation region 13 .
[0194] Technical Solution 15: According to the preparation method of Technical Solution 14, step 4 comprises:
[0195] Step 41 further includes: forming a third winding coating layer corresponding to the tunneling oxide layer 41 and a fourth winding coating layer corresponding to the intrinsic polysilicon layer 42 ′ on the second main surface of the silicon substrate 10 ;
[0196] Step 42 further includes: diffusing the second doping atoms in the fourth winding doping layer to form a fourth winding doping layer, and forming a fifth winding doping layer corresponding to the third doped silicon glass layer 43 outside the fourth winding doping layer;
[0197] Before step 44, the method further includes: step 43', removing the fifth winding coating by using HF solution;
[0198] Step 44 also includes: simultaneously removing the fourth wrap-around doping layer and the third wrap-around doping layer, and using the alkaline solution to make the isolation region 13 into a suede structure.
[0199] Technical Solution 16: According to the preparation method of Technical Solution 14, step 4 comprises:
[0200] Step 5 further includes: using the acid solution to simultaneously remove the third doped silicon glass layer 43 corresponding to the second functional area 12 .
[0201] Technical Solution 17: The preparation method according to Technical Solution 1 or 14,
[0202] The preparation method further includes: step 6, forming a passivation anti-reflection layer 60 on the second main surface of the silicon substrate 10 and the first functional area 11, the second functional area 12 and the isolation area 13 respectively;
[0203] and / or,
[0204] The preparation method further includes forming metal electrodes 70 electrically connected to the deep junction diffusion layer 20 and the carrier collection layer 40 respectively.
[0205] Technical solution 18, according to the preparation method of technical solution 1,
[0206] The silicon substrate 10 is an N-type single crystal silicon substrate, the first doping atoms are P-type doping atoms, and the second doping atoms are N-type doping atoms;
[0207] Preferably, the first doping atom comprises a boron atom, and the second doping atom comprises a phosphorus atom;
[0208] and / or,
[0209] The first functional area 11 has a suede structure.
[0210] Technical Solution 19: A back-contact solar cell, characterized in that it is prepared by the preparation method described in any one of claims 1 to 18.
[0211] The above steps are merely provided to help understand the method, structure, and core concept of the present invention. It will be apparent to those skilled in the art that various improvements and modifications may be made to the present invention without departing from the principles of the present invention, and such improvements and modifications are also within the scope of protection of the claims of the present invention.
Claims
1. A method for preparing a back-contact solar cell, characterized in that: include: Step 1: forming a shallow junction diffusion layer (20') containing first dopant atoms in a first functional region (11) of a first main surface of a silicon substrate (10), wherein the first main surface of the silicon substrate (10) includes a first functional region (11), a second functional region (12), and an isolation region (13) located between the first functional region (11) and the second functional region (12); Step 2: In a thermal oxidation environment, the first dopant atoms in the shallow junction diffusion layer (20') are advanced to form a deep junction diffusion layer (20), and a silicon dioxide source absorption layer (30) is simultaneously formed in the first functional area (11), the second functional area (12), and the isolation area (13); based on the silicon dioxide source absorption layer (30) corresponding to the first functional area (11), the shallow junction diffusion layer (20') and / or the deep junction diffusion layer (20) are subjected to an oxidation source absorption treatment, and a second doped silicon glass layer (30') containing the first dopant atoms is formed corresponding to the first functional area (11); Step 3: using an acid solution to simultaneously clean the second doped silicon glass layer (30') and the remaining silicon dioxide absorption layer (30), so as to completely remove the silicon dioxide absorption layer (30) and partially remove the second doped silicon glass layer (30'), wherein the acid solution etches the second doped silicon glass layer (30') at a lower rate than the acid solution etches the silicon dioxide absorption layer (30); Step 4: forming a carrier collection layer (40) containing second doping atoms in the second functional region (12), wherein the conductivity type of the second doping atoms is opposite to the conductivity type of the first doping atoms; Step 5: removing the remaining second doped silicon glass layer (30').
2. The preparation method according to claim 1, characterized in that Step 1 includes: Step 11: forming a silicon dioxide mask layer (50) on the first main surface of the silicon substrate (10); Step 12: removing the portion of the silicon dioxide mask layer (50) corresponding to the first functional area (11); Step 13: depositing the shallow junction diffusion layer (20') and the doping source layer (20") containing the first doping atoms on the outside of the shallow junction diffusion layer (20') on the first functional area (11) by a doping source deposition method, wherein the first doping atoms enter the remaining silicon dioxide mask layer (50) to form a first doped silicon glass layer (50'), and the silicon dioxide mask layer (50) blocks the first doping atoms from diffusing into the silicon substrate (10); Step 14: using an acid solution to remove the doping source layer (20") and the first doped silicon glass layer (50'), to obtain a shallow junction diffusion layer (20') corresponding to the first functional region (11); Preferably, step 12 comprises: using a laser to remove the portion of the silicon dioxide mask layer (50) corresponding to the first functional area (11) so as to expose the portion of the silicon substrate (10) corresponding to the first functional area (11), and using an alkaline solution to remove the laser damage of the silicon substrate (10) corresponding to the first functional area (11); preferably, the energy density of the laser is 10 mJ / cm 2 ~50mJ / cm 2 ; and / or, Step 13 comprises: introducing a boron source (BCl3) and oxygen (O2) into the first functional area (11) at a temperature of 800° C. to 950° C. for 2 to 20 minutes to perform low-temperature deposition, thereby forming the shallow junction diffusion layer (20'), the doping source layer (20"), and the first doped silicon glass layer (50'); and / or, Step 14 comprises: using a HF solution with a mass fraction of 10% to 50% to clean the doping source layer (20") and the first doped silicon glass layer (50'), wherein the cleaning time is 20 to 200 seconds; Preferably, step 11 further comprises: synchronously forming a first wrap-around coating corresponding to the silicon dioxide mask layer (50) on the second main surface of the silicon substrate (10); Step 13 also includes: the first doping atoms enter the first wrap-around plating layer to form a first wrap-around plating doping layer; Step 14 also includes: simultaneously removing the first wrap-around doping layer; Preferably, the thickness of the silicon dioxide mask layer (50) is 50 nm to 300 nm, or the thickness of the first winding coating is 50 nm to 300 nm.
3. The preparation method according to claim 1 or 2, characterized in that The concentration of the first doping atoms in the shallow junction diffusion layer (20') is 5×10 19 atoms / cm 3 ~5×10 21 atoms / cm 3 ; and / or, The shallow junction diffusion layer (20') has a junction depth of 0.1 μm to 1.0 μm; and / or, The concentration of the first doping atoms in the deep junction diffusion layer (20) is 1×10 18 atoms / cm 3 ~2×10 19 atoms / cm 3 ; and / or, The junction depth of the deep junction diffusion layer (20) is 1.0 μm to 3.0 μm; and / or, The thickness of the silicon dioxide source absorption layer (30) is 50 nm to 300 nm.
4. The preparation method according to claim 1, characterized in that Step 2 includes: simultaneously advancing the first dopant atom and performing oxidation source absorption treatment at a temperature of 1000° C. to 1050° C. for 30 minutes to 120 minutes; and / or, Step 2 also includes: synchronously forming a second winding coating corresponding to the silicon dioxide source absorption layer (30) on the second main surface of the silicon substrate (10); Step 3 also includes: synchronously removing the second winding coating.
5. The preparation method according to claim 1 or 4, characterized in that Step 3 comprises: using a 5% to 50% by mass HF solution to clean the second doped silicon glass layer (30') and the remaining silicon dioxide absorption layer (30), wherein the cleaning time is 5s to 300s, so that the remaining thickness of the second doped silicon glass layer (30') is 20nm to 200nm.
6. The preparation method according to claim 1, characterized in that After step 3 and before step 4, the following steps are also included: The second functional area (12) and the isolation area (13) are polished.
7. The preparation method according to claim 1 or 6, characterized in that Step 4 includes: Step 41: forming a tunneling oxide layer (41) and an intrinsic polysilicon layer (42') by sequentially stacking the second functional region (12) and the isolation region (13) outside the remaining second doped silicon glass layer (30'); Step 42: performing a second dopant atom diffusion process on the intrinsic polysilicon layer (42') to form a doped polysilicon layer (42) containing second dopant atoms, and forming a third doped silicon glass layer (43) containing second dopant atoms outside the doped polysilicon layer (42); Step 43: removing the third doped silicon glass layer (43) corresponding to the first functional region (11) and the isolation region (13) by laser; Step 44: using an alkaline solution to remove the doped polysilicon layer (42) and the tunneling oxide layer (41) corresponding to the first functional region (11) and the isolation region (13); Preferably, step 41 further comprises: forming a third winding coating layer corresponding to the tunneling oxide layer (41) and a fourth winding coating layer corresponding to the intrinsic polysilicon layer (42') on the second main surface of the silicon substrate (10); Step 42 also includes: the second doping atoms diffuse into the fourth winding doping layer to form a fourth winding doping layer, and form a fifth winding doping layer corresponding to the third doped silicon glass layer (43) outside the fourth winding doping layer; Before step 44, the method further includes: step 43', removing the fifth winding coating by using HF solution; Step 44 also includes: simultaneously removing the fourth winding plating doping layer and the third winding plating layer, and using the alkaline solution to make the isolation area (13) into a velvet structure; Preferably, step 5 further comprises: using the acid solution to simultaneously remove the third doped silicon glass layer (43) corresponding to the second functional area (12).
8. The preparation method according to claim 1 or 7, characterized in that The preparation method further comprises: step 6, forming a passivation anti-reflection layer (60) on the second main surface of the silicon substrate (10) and the first functional area (11), the second functional area (12) and the isolation area (13); and / or, The preparation method further comprises: forming metal electrodes (70) electrically connected to the deep junction diffusion layer (20) and the carrier collection layer (40) respectively.
9. The preparation method according to claim 1, characterized in that The silicon substrate (10) is an N-type single crystal silicon substrate, the first doping atoms are P-type doping atoms, and the second doping atoms are N-type doping atoms; Preferably, the first doping atom comprises a boron atom, and the second doping atom comprises a phosphorus atom; and / or, The first functional area (11) is a suede structure.
10. A back contact solar cell, characterized in that: The invention is prepared by the preparation method according to any one of claims 1 to 9.
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Back contact solar cell and preparation method thereof
CN121240583A