Method for identifying CCM and DCM modes in high-power digital power supply

Abstract

The invention relates to the field of digital power supplies, and particularly provides a method for identifying CCM and DCM modes in a high-power digital power supply, which comprises the following steps: acquiring an inductive current sampling voltage signal and a reference voltage signal, and detecting the level conversion states of the two through a comparator module; if the comparison result accords with a preset error range, recording a DCM mode identifier and calculating an average sampling current value; adjusting an interrupt priority order to match a time sequence characteristic of the capture event, and generating a current state parameter of a mode switching boundary; calculating a correction factor of the average sampling current by combining the overflow times of the counter and rising edge fluctuation frequency data; a duty ratio parameter is updated based on the corrected current value, and a new PWM control signal is generated and output; when the duty ratio deviation exceeds a switching threshold value, dynamically adjusting an interrupt priority parameter and updating a reference value of a counter; and generating a real-time tracking data set of the inductive current zero point according to the final adjustment parameter.

Description

Technical Field

[0001] The present application relates to the field of digital power supplies, and in particular to a method for identifying CCM and DCM modes in a high-power digital power supply. Background Art

[0002] In modern power electronics, the design and optimization of high-power digital power supplies is a key area for driving energy conversion efficiency and system stability. With the continuous growth of power demand, achieving rapid switching and accurate identification of power supply control modes in high-power scenarios has become a key area of ​​technological advancement. Distinguishing between CCM (continuous conduction mode) and DCM (discontinuous conduction mode) directly impacts power supply efficiency and dynamic response. Therefore, developing simple and efficient identification methods is of significant practical significance.

[0003] However, existing identification methods often rely on complex algorithms or additional hardware detection circuits, which not only increases design costs but also introduces delays and the risk of misjudgment. Particularly in high-power applications, traditional solutions struggle to handle rapid dynamic changes, making it difficult for the system to adapt to diverse load conditions.

[0004] The core challenges in this area primarily focus on several technical factors: first, how to leverage existing capture functionality to efficiently detect the inductor current zero point without adding excessive hardware overhead; second, how to quickly determine the presence of a capture event through software interrupts within the PWM control cycle to ensure real-time performance; and finally, how to accurately distinguish whether the current has dropped to zero using a simple voltage comparison mechanism to determine when to switch modes. These unresolved technical factors can lead to timing deviations or misjudgments during the recognition process, creating urgent technical challenges that require breakthrough.

[0005] Therefore, how to quickly and easily identify CCM and DCM modes by combining the inductor zero current reference voltage with the inductor current sampling voltage, using the capture function to trigger the recording of the counter value at the falling edge of the high-level to low-level pulse, and reading the capture status bit through software interrupt without adding complex hardware has become the key issue of this study. Summary of the Invention

[0006] The present invention provides a method for identifying CCM and DCM modes in a high-power digital power supply, which mainly includes the following steps: Obtain the inductor current sampling voltage and reference voltage signals, and detect the level conversion status of the two through the comparator module; If the reference voltage is detected to transition from high to low, the falling edge of the trigger pulse captures the event and stores the current count value of the counter module; Generate initial capture data based on the stored count value, and read the capture status bit in conjunction with the interrupt service routine to determine the zero point of the inductor current; When the interrupt response time is less than a preset interrupt response time threshold, determining the validity of the capture edge and generating a comparison result between the digital-to-analog conversion output and the initial capture data; If the comparison result is within the preset error range, record the DCM mode flag and calculate the average sampling current value; Calculate the time difference between the current capture status bit and the history counter value, and start the mode switching decision when the difference is less than the PWM cycle ratio coefficient; If the mode switching judgment is established, the capture trigger edge is configured as the rising edge detection mode and the fluctuation capture data set is stored; According to the read status of the capture event flag during the interrupt cycle, the update mode flag is set to CCM or maintain the DCM state; Adjust the interrupt priority order to match the timing characteristics of the captured events and generate the current state parameters of the mode switching boundary; Combine the counter overflow times and rising edge fluctuation frequency data to calculate the correction factor of the average sampling current; Update the duty cycle parameter based on the corrected current value and generate a new PWM control signal output; When the duty cycle deviation exceeds the switching threshold, the interrupt priority parameters are dynamically adjusted and the counter reference value is updated; A real-time tracking data set of the inductor current zero point is generated according to the final adjustment parameters.

[0007] Optionally, the acquiring of the inductor current sampling voltage and the reference voltage signal and detecting a level conversion state of the two by a comparator module includes: Obtain inductor current data, convert it into a sampled voltage signal through a sampling circuit, and obtain an initial voltage value; Generate a reference voltage signal through a preset reference voltage source to determine a comparison benchmark; The comparator module is used to compare the sampled voltage with the reference voltage to determine the direction of level conversion; According to the comparator output result, the level conversion state is detected to obtain the state sequence; Analyze the level change rules through state sequence and determine the change trend; According to the changing trend, the filtering algorithm is used to smooth the signal and obtain the stable state characteristics; If the stable state characteristics exceed the preset state characteristic threshold, the output is adjusted through logical operation to obtain the final judgment result.

[0008] Optionally, if the reference voltage is detected to transition from high to low, triggering a falling edge of a pulse to capture an event and storing a current count value of the counter module includes: If the reference voltage switches from high to low, the falling edge of the trigger pulse is captured to obtain the current count value of the counter module and store it; By storing data and generating time series, we can determine the change pattern of voltage status over time; Use filtering algorithm to process time series and obtain smoothed state characteristics; If the smoothed state feature exceeds the preset state feature threshold, the output is adjusted through logical operation to determine the state abnormality; Generate corresponding control signals based on abnormal status results and determine the subsequent processing direction; Obtain control signals and obtain the final execution instructions through preset mapping rules; By executing the instruction, the status of the counter module is updated and a detection cycle is completed.

[0009] Optionally, generating initial capture data according to the stored count value and reading the capture status bit in conjunction with an interrupt service routine to determine the zero point of the inductor current includes: Obtaining storage count values ​​through a preset storage mechanism to generate initial capture data; Based on the initial captured data, the interrupt service routine is used to detect the interrupt trigger mechanism and read the capture status bit; If the capture status bit changes, the current state is determined by reading the status bit to obtain the status change information; For state change information, data processing logic is used to analyze the initial captured data and determine the zero point of the inductor current; Obtain the determined inductor current zero point and verify the accuracy of the data processing logic based on the zero point detection result; Based on the verified zero-point detection results, the interrupt trigger mechanism is adjusted to optimize the reading efficiency of the capture status bit; According to the optimized reading efficiency, the generation rule of the storage count value is updated to obtain more accurate initial capture data.

[0010] Optionally, when the interrupt response time is less than a preset interrupt response time threshold, determining the validity of the capture edge and generating a comparison result between the digital-to-analog conversion output and the initial capture data includes: If the interrupt response time is less than the preset interrupt response time threshold, the response time data is obtained through the timer to determine the time determination result; According to the time judgment result, the edge detection algorithm is used to detect and capture the edge to obtain the edge validity status; Through the edge validity state, the trigger signal is obtained to generate the initial output data of the digital-to-analog conversion; Obtain captured data from the initial capture module, use a comparator to compare the converted output data with the captured data, and determine the comparison result; If the comparison result exceeds the preset range, the digital-to-analog conversion output is optimized by adjusting the parameters to obtain adjusted output data; Based on the adjusted output data, a convolutional neural network is used to analyze the data characteristics and determine the final output stability; Through the final output stability, the system feedback signal is obtained to determine the end status of the business process.

[0011] Optionally, if the comparison result meets the preset error range, recording the DCM mode identifier and calculating the average sampled current value includes: If the comparison result exceeds the preset error range, the error range is adjusted by collecting additional data to obtain an adjusted error value; Perform a secondary comparison based on the adjusted error value and the comparison result to determine whether the conditions are met; If the secondary comparison meets the conditions, the sampling data in DCM mode is obtained and the mode identifier is determined; The average current value is obtained by performing mean calculation on the sampled data; Compare the average current value with the preset average current threshold to determine the current stability; If the current stability meets the conditions, the mode identification and the average current value are recorded to generate an identification record; Update the DCM mode status according to the identification record and determine the final output data.

[0012] Optionally, the calculating of the time difference between the current capture state bit and the historical counter value, and starting the mode switching determination when the difference is less than the PWM cycle proportional coefficient, includes: The time difference is calculated by collecting the current captured state bit value and the counter value of the historical count to obtain the time difference data; Compare the time difference data with the proportional coefficient of the PWM period to determine whether the difference is less than the proportional coefficient; If the time difference is less than the proportional coefficient, the switching decision logic is triggered according to the comparison result to determine whether to enter the mode switching process; Obtain the result of the judgment condition and obtain the preliminary signal of mode switching by analyzing the relationship between the time difference and the PWM period; For the preliminary signal, a preset preliminary signal threshold is used to perform a secondary check on the switching decision to determine the final switching state; Through the secondary verification result, the execution instruction of the mode switching is determined and the final switching control signal is obtained; According to the switching control signal, the mode switching operation is executed to complete the state conversion process.

[0013] Optionally, if the mode switching determination is established, configuring the capture trigger edge to a rising edge detection mode and storing the fluctuation capture data set includes: If the judgment condition is met, the input signal is analyzed by the preset judgment condition threshold to determine the mode switching state; According to the mode switching status, adjust the trigger edge configuration to the rising detection mode to obtain the edge parameters; Performing a fluctuation capture operation through edge parameters to obtain initial capture data; The initial captured data is processed using a filtering algorithm to obtain smoothed data; Extract key features from smoothed data to determine fluctuation trends; Update the data set according to the fluctuation trend to store the final captured data; Acquire final capture data and verify detection pattern consistency to obtain confirmation results.

[0014] Optionally, updating the mode identifier to CCM or maintaining the DCM state according to the read state of the capture event flag within the interrupt period includes: Generate event flags by capturing events, store them in a preset buffer, and obtain initial flag data; Scan the buffer regularly according to the interrupt cycle, obtain the flag reading result from the initial flag data, and determine the read status value; If the read state value is true, the mode identifier is switched to the CCM state to obtain the updated mode identifier data; If the read status value is false, the DCM state is maintained through the mode identifier, and the maintained mode identifier data is obtained; Using a state machine to process the updated mode identification data or the maintained mode identification data to obtain periodic state information; The support vector machine algorithm is used to classify the periodic state information, determine whether the state is stable, and obtain the classification result; The scanning frequency of the interruption cycle is adjusted according to the classification results to obtain the optimized cycle control parameters.

[0015] Optionally, adjusting the interrupt priority order to match the timing characteristics of the capture event and generating the current state parameter of the mode switching boundary includes: By capturing events to determine the temporal characteristics, we can obtain the order in which the events occur; Adjust interrupt priority based on timing characteristics and determine the changing trend of priority sequence; Generate the time point of mode switching based on the change trend and obtain the initial data of the switching boundary; Analyze the current state based on the initial data and determine the distribution pattern of the state parameters; The distribution law is used to update the boundary generation rules to obtain the precise boundary of mode switching; Extract state parameters from precise boundaries and determine the final value of the current state; The matching of the priority order is verified through the final value to obtain the adjusted interrupt priority.

[0016] The technical solution provided by the embodiment of the present invention may have the following beneficial effects: The present invention discloses a method for identifying CCM and DCM modes in a high-power digital power supply, specifically a method for detecting the zero point of the inductor current. By comparing the level conversion state of the inductor current sampling voltage and the reference voltage, the zero point of the inductor current is accurately captured. The present invention utilizes a pulse falling edge capture event and a counter module to generate initial capture data, and combines an interrupt service program to determine the zero point of the inductor current. By analyzing the validity of the capture edge and the comparison results, intelligent switching of the DCM / CCM mode and accurate calculation of the current sampling value are achieved. The present invention also adopts a method for dynamically adjusting the interrupt priority and duty cycle parameters to achieve real-time tracking of the zero point of the inductor current. This innovative detection method greatly reduces the computational complexity of the loop, improves the system response speed and control accuracy, and provides a reliable guarantee for the efficient operation of the power management system. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a flow chart of a method for identifying CCM and DCM modes in a high-power digital power supply according to the present invention.

[0018] Figure 2 Schematic diagram of a method for identifying CCM and DCM modes in a high-power digital power supply according to the present invention.

[0019] Figure 3 This is another schematic diagram of a method for identifying CCM and DCM modes in a high-power digital power supply according to the present invention. DETAILED DESCRIPTION

[0020] To help those skilled in the art better understand the technical solutions in this specification, the following will provide a clear and complete description of the technical solutions in the embodiments of this specification, in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of this specification, not all of them. All other embodiments derived by those skilled in the art based on the embodiments in this specification without creative effort shall fall within the scope of protection of this specification.

[0021] like Figure 1-3 In this embodiment, a method for identifying CCM and DCM modes in a high-power digital power supply may specifically include: In step S101 , an inductor current sampling voltage and a reference voltage signal are obtained, and a comparator module is used to detect a level conversion state between the two.

[0022] The inductor current data is acquired and converted into a sampled voltage signal via a sampling circuit to obtain the initial voltage value. A reference voltage signal is generated using a preset reference voltage source to determine the comparison baseline. A comparator module compares the sampled voltage with the reference voltage to determine the direction of the level transition. Based on the comparator output, the level transition state is detected to obtain a state sequence. The level change pattern is analyzed from the state sequence to determine the trend. Based on the trend, a filtering algorithm is used to smooth the signal and obtain the stable state characteristics. If the stable state characteristics exceed the preset state characteristic threshold, the output is adjusted through logical operations to obtain the final judgment result.

[0023] For example, during the inductor current sampling process, the inductor current signal is first acquired through a current sensor and converted into a voltage signal. Assuming the inductor current is 2 amperes and the sensor conversion factor is 5 volts per ampere, the sampled voltage is 1 volt. At the same time, a reference voltage of 8 volts is set as the benchmark for the comparator module. The comparator module uses a differential amplifier circuit to compare the sampled voltage with the reference voltage. When the sampled voltage is higher than the reference voltage, the comparator outputs a high level, indicating that the inductor current exceeds the set state characteristic threshold; conversely, it outputs a low level, indicating that the inductor current has not reached the state characteristic threshold. By analyzing the level conversion state of the comparator output, changes in the inductor current can be monitored in real time.

[0024] For example, when the sampled voltage rises from 7 volts to 12 volts, the comparator output switches from low to high, indicating that the inductor current has increased from 4 amps to 14 amps, exceeding the characteristic threshold of 6 amps at 8 volts. This process is processed in real time by the digital signal processor, ensuring that the system can quickly respond to current changes and take appropriate control measures.

[0025] Step S102: If it is detected that the reference voltage switches from high to low, a falling edge of a trigger pulse is captured and the current count value of the counter module is stored.

[0026] If the reference voltage transitions from high to low, the falling edge of the trigger pulse is captured, acquiring and storing the current count value of the counter module. By storing this data, a time series is generated to determine how the voltage state changes over time. A filtering algorithm is used to process the time series to obtain smoothed state characteristics. If the smoothed state characteristics exceed the preset state characteristic threshold, the output is adjusted through logical operations to determine a state anomaly. Based on the state anomaly result, a corresponding control signal is generated to determine the subsequent processing direction. The control signal is obtained and, using the preset mapping rules, the final execution instruction is obtained. By executing the instruction, the state of the counter module is updated, completing a detection cycle.

[0027] For example, during the reference voltage detection process, a voltage comparator monitors the reference voltage's changes in real time. Assuming the reference voltage's initial value is 12 volts, the system triggers a falling-edge capture event when the reference voltage is detected to gradually decrease from 12 volts to 6 volts. At this point, the current count value of the counter module is 128, which is stored in a designated register for subsequent time interval calculations. By analyzing the relationship between the time point at which the reference voltage decreases and the counter value, the rate of voltage decrease can be derived.

[0028] For example, if the counter module's clock frequency is 10 MHz, 128 counts correspond to 18 microseconds. Considering the reference voltage's range from 12 volts to 6 volts, the voltage drop rate can be calculated as 6 volts every 18 microseconds, or 4,675 kilovolts per second. This data is further processed by the digital signal processor and, combined with the system's preset voltage change threshold, determines whether adjustments to the operating state of the relevant circuits are necessary.

[0029] For example, if the system's set voltage drop rate is 500 kilovolts per second, if the current rate is below the drop rate threshold, it indicates the circuit is operating normally; otherwise, an abnormality handling mechanism may be triggered. The entire process is automated through algorithmic analysis, ensuring real-time response and processing of reference voltage changes.

[0030] Step S103 : generating initial capture data according to the stored count value, and reading the capture status bit in conjunction with the interrupt service routine to determine the zero point of the inductor current.

[0031] The stored count value is obtained through a preset storage mechanism to generate initial capture data. Based on this initial capture data, the interrupt service routine detects the interrupt trigger mechanism and reads the capture status bit. If the capture status bit changes, the current state is determined by reading the status bit, obtaining state change information. Based on this state change information, the initial capture data is analyzed using data processing logic to determine the inductor current zero point. The determined inductor current zero point is obtained and combined with the zero-point detection results to verify the accuracy of the data processing logic. Based on the verified zero-point detection results, the interrupt trigger mechanism is adjusted to optimize the capture status bit reading efficiency. Based on this optimized reading efficiency, the storage count value generation rules are updated to obtain more accurate initial capture data.

[0032] For example, in inductor current zero point detection, initial capture data must first be generated based on the stored count value. Assume the current count value is 5000, the system clock frequency is 10 MHz, and the capture period is 1 μs. Calculation shows that the initial value of the capture data is 5000. Next, the interrupt service routine reads the capture status bit to determine whether the inductor current has reached zero. A capture status bit value of 1 indicates that the current has crossed zero, while a value of 0 indicates that it has not. Assuming the current capture status bit is 1, the system records the current timestamp and updates the capture data. By analyzing the trend of the captured data, the zero point of the inductor current can be determined.

[0033] For example, if the capture status bit is 1 three times in a row with a 1μs interval, it can be inferred that the inductor current reaches zero within 1μs. The system adjusts the control strategy based on this data to ensure the stability and efficiency of the inductor current.

[0034] Step S104 : when the interrupt response time is less than the preset interrupt response time threshold, determining the validity of the capture edge and generating a comparison result between the digital-to-analog conversion output and the initial capture data.

[0035] If the interrupt response time is less than the preset interrupt response time threshold, the response time data is obtained through a timer to determine the time determination result. Based on the time determination result, an edge detection algorithm is used to detect the capture edge and determine the edge validity status. Based on the edge validity status, a trigger signal is obtained to generate the initial output data of the digital-to-analog conversion. The captured data is obtained from the initial capture module, and a comparator is used to compare the converted output data with the captured data to determine the comparison result. If the comparison result exceeds the preset range, the digital-to-analog conversion output is optimized by adjusting parameters to obtain the adjusted output data. Based on the adjusted output data, a convolutional neural network is used to analyze the data characteristics and determine the final output stability. Based on the final output stability, a system feedback signal is obtained to determine the end status of the business process.

[0036] Exemplarily, when the interrupt response time is less than a preset interrupt response time threshold, the system determines the validity of the capture edge through a specific algorithm.

[0037] For example, if the preset interrupt response time threshold is 10 microseconds, the system will immediately start the timer after capturing an edge signal and complete the response within 9 microseconds. At this time, the system will use a digital filtering algorithm to process the captured edge signal to eliminate noise interference.

[0038] Specifically, the system uses a sliding average filter algorithm to average the signals of five consecutive sampling points to produce a stable edge signal. The system then compares the processed edge signal with a preset reference edge. If the difference between the two is less than 1 volt, the edge is considered valid. After determining a valid edge, the system generates a digital-to-analog conversion output. The digital-to-analog conversion process uses a 12-bit precision converter to convert the digital signal into an analog signal.

[0039] For example, the system converts a captured digital signal value of 2048 into an analog signal of 5 volts. Finally, the system compares the initial captured data with the DAC output. For example, if the initial captured data value is 2050 and the DAC output is 5.1 volts, the system calculates the difference between the two. If the difference is less than 0.1 volt, the comparison result is considered consistent. Throughout this process, the system automatically completes the determination, conversion, and comparison operations based on pre-set algorithms and thresholds, ensuring data accuracy and reliability.

[0040] Step S105 : If the comparison result meets the preset error range, the DCM mode flag is recorded and the average sampled current value is calculated.

[0041] If the comparison result exceeds the preset error range, the error range is adjusted by collecting additional data to obtain an adjusted error value. A secondary comparison is performed between the adjusted error value and the comparison result to determine whether the conditions are met. If the secondary comparison meets the conditions, the sampled data in DCM mode is obtained and the mode identifier is determined. The average current value is calculated by averaging the sampled data. The average current value is compared with the preset average current threshold to determine the current stability. If the current stability meets the conditions, the mode identifier and average current value are recorded to generate an identification record. The DCM mode status is updated based on the identification record to determine the final output data.

[0042] For example, when the comparison result meets the preset error range, the preset error threshold of 0.05 is first used for judgment. If the deviation between the actual measured value and the theoretical value is less than 0.05, the current DCM mode identifier is recorded as "DCM_001". Next, the system collects current sampling values ​​for 10 consecutive cycles, which are 2A, 25A, 23A, 22A, 24A, 21A, 26A, 23A, 22A, and 25A, and uses a weighted average algorithm to calculate the average sampled current value. The specific calculation process is: multiply each sampled value by the corresponding weight coefficient, which is determined according to the inverse of the sampling time interval, namely 1, 1, 1, 1, 1, 1, 1, 1, 1, and then add the weighted sampled values ​​to obtain a weighted sum of 23A. Finally, the weighted sum is divided by the sum of the weight coefficients, 1, to obtain an average sampled current value of 23A. In this way, the system can accurately record the DCM mode identification and calculate the average sampling current value that meets the actual application requirements, providing reliable data support for subsequent circuit analysis and optimization.

[0043] Step S106 , calculating the time difference between the current capture state bit and the historical counter value, and starting the mode switching determination when the difference is smaller than the PWM cycle proportional coefficient.

[0044] The time difference is calculated by collecting the currently captured state bit value and the historical counter value to obtain the time difference data. The time difference data is compared with the proportional coefficient of the PWM period to determine whether the difference is less than the proportional coefficient. If the time difference is less than the proportional coefficient, the switching judgment logic is triggered based on the comparison result to determine whether to enter the mode switching process. The result of the judgment condition is obtained, and the relationship between the time difference and the PWM period is analyzed to obtain a preliminary signal for mode switching. Based on the preliminary signal, the switching judgment is secondary verified using the preset preliminary signal threshold to determine the final switching state. Based on the secondary verification result, the execution instruction for mode switching is determined, and the final switching control signal is obtained. Based on the switching control signal, the mode switching operation is executed, completing the state transition process.

[0045] For example, in calculating the time difference between the capture state bit and the history counter value, assuming that the timestamp of the current capture state bit is T1 and the timestamp of the history counter value is T2, the time difference Δt can be calculated using the formula Δt=T1-T2.

[0046] For example, if T1 is 1000 microseconds and T2 is 800 microseconds, Δt is 200 microseconds. Next, Δt is compared with the PWM cycle scale factor, assuming the PWM cycle scale factor is 250 microseconds. Since 200 microseconds is less than 250 microseconds, the system initiates a mode switch determination. During this process, the system further analyzes the compatibility of the current operating state with the target mode. For example, if the current operating current is 5 amps and the target mode requires a current range of 3 to 7 amps, the system determines that the current state meets the switching conditions and executes the mode switch. Throughout this process, the system ensures the accuracy and timeliness of mode switching through real-time data acquisition and algorithm analysis.

[0047] Step S107 : If the mode switching determination is established, the capture trigger edge is configured as a rising edge detection mode and the fluctuation capture data set is stored.

[0048] If the judgment condition is met, the input signal is analyzed using the preset judgment condition threshold to determine the mode switching state. Based on the mode switching state, the trigger edge configuration is adjusted to the rising detection mode to obtain edge parameters. Using the edge parameters, a fluctuation capture operation is performed to obtain initial captured data. A filtering algorithm is applied to the initial captured data to obtain smoothed data. Key features are extracted from the smoothed data to determine the fluctuation trend. Based on the fluctuation trend, the data set is updated to store the final captured data. The final captured data is obtained and the detection mode consistency is verified to obtain a confirmation result.

[0049] Exemplarily, when the mode switching determination is established, the system first sets the capture trigger edge to the rising edge detection mode through the configuration register, and adjusts the level detection circuit of the relevant pin to the rising edge trigger state at the hardware level.

[0050] For example, setting bits [2:0] of the configuration register at address 0x2000 to 001 selects rising-edge detection mode. The system then activates the data capture module, which monitors the input signal in real time at a sampling frequency of 1 MHz. Upon detecting a rising edge, the data capture module immediately records the signal waveform at that moment and stores it in a pre-allocated buffer with 1024 samples, each occupies 16 bits of data width. To ensure data integrity and accuracy, the system automatically performs a CRC check after each capture. The check algorithm uses the CRC-16-CCITT standard, with an initial value of 0xFFFF and a polynomial of 0x1021. The check result is stored with the captured data for subsequent analysis and verification. During data storage, the system sorts the captured data according to timestamps with an accuracy of 1 microsecond to ensure accurate temporal relationships. Finally, the system packages the complete fluctuation capture data set and transfers it to a designated location in main memory via a DMA channel at a transfer rate of 100 MB / s, ensuring efficient data transmission and storage. The entire process is completely automated by hardware and firmware, requiring no human intervention.

[0051] Step S108 : updating the mode flag to CCM or maintaining the DCM state according to the read state of the capture event flag within the interruption period.

[0052] An event flag is generated by capturing an event and stored in a preset buffer to obtain initial flag data. The buffer is scanned periodically according to the interrupt cycle, and the flag reading result is obtained from the initial flag data to determine the read state value. If the read state value is true, the mode identifier is used to switch to the CCM state to obtain updated mode identifier data. If the read state value is false, the mode identifier is used to maintain the DCM state to obtain maintained mode identifier data. A state machine is used to process the updated mode identifier data or the maintained mode identifier data to obtain cycle state information. The cycle state information is classified using a support vector machine algorithm to determine whether the state is stable and obtain a classification result. The scanning frequency of the interrupt cycle is adjusted based on the classification result to obtain optimized cycle control parameters.

[0053] For example, when capturing the read status of an event flag during an interrupt cycle, the system first reads the current event flag value from a hardware register. Assume the register address is 0x4000 and the read flag value is 0x03. Based on the binary representation of the flag value, the lower two bits represent the event trigger status. If the lower two bits are 11, the event is determined to have been triggered. At this point, the system invokes a mode update algorithm, which performs calculations based on the event trigger frequency and duration. Assuming the event trigger frequency is 100 Hz and the duration is 10 ms, the system calculates the event energy: E = frequency × duration = 100 × 0.01 = 1. If E exceeds the preset event energy threshold of 0.8, the mode flag is updated to CCM (continuous capture mode); otherwise, DCM (discrete capture mode) is maintained. After updating the mode flag, the system writes the new mode flag to the mode control register through the interrupt service routine. Assume the register address is 0x4004 and the written value is 0x01, indicating CCM mode. The system also logs the mode switch, including the timestamp, event flag value, calculated energy value, and final mode flag, for subsequent analysis and optimization.

[0054] For example, the timestamp is 2023-10-01 12:00:00, the event flag value is 0x03, the calculated energy value is 1, and the final mode identifier is CCM. These data will be stored in the system log for subsequent analysis and optimization.

[0055] Step S109 : adjusting the interrupt priority order to match the timing characteristics of the capture event, and generating the current state parameter of the mode switching boundary.

[0056] By capturing events, we determine the timing characteristics and derive the order in which the events occur. We adjust the interrupt priority based on the timing characteristics and determine the changing trend of the priority sequence. Based on the changing trend, we generate the time point for mode switching and obtain the initial data for the switching boundary. We analyze the current state based on the initial data and determine the distribution pattern of the state parameters. Using this distribution pattern, we update the boundary generation rules and obtain the precise boundary for mode switching. We extract the state parameters from the precise boundary and determine the final value of the current state. We verify the consistency of the priority sequence using the final value and obtain the adjusted interrupt priority.

[0057] For example, when adjusting the interrupt priority order to match the timing characteristics of the capture event, it is first necessary to reallocate the interrupt priority according to the frequency and response time requirements of the capture event.

[0058] For example, suppose a system has three interrupt sources: interrupt A, interrupt B, and interrupt C, with average event capture frequencies of 100, 50, and 200 per second, respectively. Analysis shows that interrupt C has the highest frequency, so its priority is set to the highest (priority 1), interrupt A to the second highest (priority 2), and interrupt B to the lowest (priority 3). Next, a priority preemption algorithm is implemented to ensure that high-priority interrupts are responded to immediately, while low-priority interrupts are executed after the high-priority interrupt completes. When generating the current state parameters for mode switching boundaries, a state machine model is used to dynamically calculate the current parameters based on the current system state and input events.

[0059] For example, when the system switches from low-power mode to high-performance mode, the current parameter gradually increases from 10 mA to 500 mA. A linear interpolation algorithm ensures a smooth transition of the current change. Simultaneously, a Kalman filter algorithm estimates and corrects the current in real time, eliminating measurement noise and ensuring the accuracy of the current parameter. This method enables the system to efficiently adjust interrupt priorities based on the timing characteristics of the captured event and generate precise current state parameters at the mode switching boundary.

[0060] Step S1010 , calculating a correction factor of the average sampled current by combining the counter overflow times and the rising edge fluctuation frequency data.

[0061] By recording the number of counter overflows, overflow count data is obtained. The fluctuation frequency is extracted from the overflow count data to obtain the rising edge frequency value. The rising edge frequency value is compared with the preset frequency data to determine the current sampling offset. The sampled current data is adjusted based on the offset to determine the initial average current value. The relationship between the initial average current value and the correction factor is obtained, and the correction factor value is calculated. The correction factor value is combined with the frequency data to obtain the final average sampled current correction factor. The sampled current is adjusted using the final correction factor to obtain calibrated average current data.

[0062] For example, when calculating the correction factor for the average sampled current, we first need to obtain data on the number of counter overflows and the rising edge fluctuation frequency. Assume that the counter overflows 5 times and the rising edge fluctuation frequency is 100 Hz. By analyzing this data, we can determine the fluctuation range of the sampled current.

[0063] For example, the number of counter overflows is proportional to the fluctuation of the sampled current. Therefore, the correction factor can be calculated as 0.5 using the formula: correction factor = number of overflows / fluctuation frequency. Next, the sampled current is corrected using the correction factor. Assuming the original sampled current is 10A, the corrected sampled current is 10A * 0.5 = 5A. To ensure the accuracy of the correction factor, the fluctuation of the sampled current can be further analyzed. For example, by converting the time domain signal into the frequency domain using a Fourier transform, the main frequency component can be observed to be consistent with the rising edge fluctuation frequency. If so, the correction factor is calculated correctly. Finally, the corrected sampled current is compared with the theoretical value. For example, if the theoretical value is 6A and the corrected sampled current is 5A, the error is 16.7%. The calculated result can be further optimized by adjusting the correction factor.

[0064] Step S1011 , updating the duty cycle parameter based on the corrected current value, and generating a new PWM control signal output.

[0065] The current value is acquired through the acquisition system and filtered to generate corrected data. Features are extracted from the corrected data to determine the duty cycle adjustment range. The duty cycle parameters are updated based on the adjustment range to determine the new duty cycle value. A PWM signal is generated using the new duty cycle value to generate a preliminary control signal. The preliminary control signal is smoothed to obtain an adjusted signal. The final output is generated from the adjusted signal, completing the PWM control signal update. If the final output exceeds the preset output threshold, the feature extraction and adjustment process is repeated.

[0066] For example, when updating the duty cycle parameters based on the corrected current value, the current sensor first collects the actual current value. Assume the current current value is 5 amps, while the target current value is 0 amps. Through error calculation, the current error is 5 amps. A proportional-integral (PI) control algorithm is used, with the proportional coefficient Kp set to 2 and the integral coefficient Ki set to 0.5, to calculate the control output. Based on the control output, the duty cycle parameters are adjusted. Assuming the current duty cycle is 50%, the new duty cycle is 50% + 10% + 5% = 55%. The updated duty cycle parameters are input into the PWM generation module to generate a new PWM control signal.

[0067] For example, if the PWM frequency is 10 kHz and the duty cycle is 65%, the output high level time is 65 microseconds and the low level time is 35 microseconds. In this way, the system can adjust the PWM signal in real time to ensure that the current value is stable near the target value, thereby achieving precise current control.

[0068] Step S1012: When the duty cycle deviation exceeds the switching threshold, dynamically adjust the interrupt priority parameter and update the counter reference value.

[0069] If the duty cycle deviation exceeds the switching threshold, deviation detection is performed to determine if the value is out of range. The switching threshold is used to determine the trigger condition for priority switching. Updated interrupt priority parameters are obtained through dynamic adjustment. The counter baseline value is reset based on the parameter update. Real-time processing data is obtained to determine whether the rate of change is stable. If the rate of change is abnormal, the support vector machine algorithm is used to determine the adjustment range. The real-time processing flow is updated based on the adjustment range.

[0070] For example, when the duty cycle deviation exceeds the preset switching threshold (for example, ±5%), the system triggers a dynamic adjustment mechanism. First, by monitoring the changes in the duty cycle in real time, a sliding window algorithm is used to calculate the deviation between the current duty cycle and the target value. Assuming that the current duty cycle is 48%, the target value is 50%, and the deviation is -2%, which is lower than the switching threshold, the system does not need to be adjusted. If the duty cycle deviation reaches -6%, exceeding the switching threshold, the system will initiate dynamic adjustment of the interrupt priority parameters. The specific operation is to adjust the interrupt priority parameters proportionally according to the size of the deviation. For example, for every 1% increase in deviation, the priority is increased by 10%. At the same time, the counter reference value is updated to ensure the accuracy of subsequent duty cycle calculations. The reference value is updated using a weighted average method, and the current reference value and the new calculated value are weighted in a ratio of 7:3 to generate a new reference value.

[0071] For example, if the current reference value is 1000 and the new calculated value is 980, the new reference value is 1000 × 0.7 + 980 × 0.3 = 994. This series of operations ensures that the system can respond quickly and return to a stable state when the duty cycle deviates significantly.

[0072] Step S1013: Generate a real-time tracking data set of the inductor current zero point according to the final adjustment parameters.

[0073] Parameters are adjusted through optimization to obtain a preliminary distribution of the inductor current. Zero points are extracted from this preliminary distribution to identify the changing characteristics of the inductor current. Feature extraction is performed on the changing characteristics to determine the dynamic mode of the real-time data. If the dynamic mode exceeds the preset dynamic mode threshold, the real-time data is adjusted through parameter optimization to obtain a revised feature set. This revised feature set is used to generate a real-time tracking sequence to determine the offset trend of the zero point position. Based on the offset trend, the tracking dataset is updated to obtain the real-time zero point distribution of the inductor current. The final tracking dataset is obtained through real-time zero point distribution adjustment and optimization.

[0074] For example, to generate a real-time tracking dataset for inductor current zero points, the first step is to collect raw inductor current data, assuming a sampling frequency of 100 kHz and a sampling duration of 1 second. The collected current signal is subjected to frequency domain analysis using a fast Fourier transform (FFT) to extract a fundamental frequency of 50 Hz and an amplitude of 10 A. Next, the current signal is smoothed using a sliding window averaging method with a window size of 100 sampling points to reduce noise. A zero-crossing detection algorithm is then used to detect the zero-point instant of the current signal, setting a dynamic mode threshold of 1 A. A zero-point time series is generated by recording the timestamp of each zero-crossing in real time. Furthermore, an interpolation algorithm is used to interpolate the zero-point time series to generate a continuous inductor current zero-point trajectory. Finally, the processed zero-point trajectory is compared with the raw current signal to verify the accuracy of zero-point detection. A dataset containing information such as the zero-point time and current amplitude is generated for subsequent real-time tracking and control. Throughout the entire process, the selection of algorithms and parameters directly affects the accuracy and real-time performance of the data set, so they need to be optimized and adjusted according to the actual application scenarios.

[0075] The above description is merely a preferred embodiment of the present application and an illustration of the technical principles employed. Those skilled in the art should understand that the scope of the invention involved in this application is not limited to the technical solutions formed by the specific combination of the above-mentioned technical features, but also encompasses other technical solutions formed by any combination of the above-mentioned technical features or their equivalents without departing from the concept of this application. For example, a technical solution formed by replacing the above-mentioned features with (but not limited to) technical features with similar functions disclosed in this application.

Claims

1. A method for identifying CCM and DCM modes in a high-power digital power supply, characterized in that: The method comprises the following steps: Obtain the inductor current sampling voltage and reference voltage signals, and detect the level conversion status of the two through the comparator module; If the reference voltage is detected to transition from high to low, the falling edge of the trigger pulse captures the event and stores the current count value of the counter module; Generate initial capture data based on the stored count value, and read the capture status bit in conjunction with the interrupt service routine to determine the zero point of the inductor current; When the interrupt response time is less than a preset interrupt response time threshold, determining the validity of the capture edge and generating a comparison result between the digital-to-analog conversion output and the initial capture data; If the comparison result is within the preset error range, record the DCM mode flag and calculate the average sampling current value; Calculate the time difference between the current capture status bit and the history counter value, and start the mode switching decision when the difference is less than the PWM cycle ratio coefficient; If the mode switching judgment is established, the capture trigger edge is configured as the rising edge detection mode and the fluctuation capture data set is stored; According to the read status of the capture event flag during the interrupt cycle, the update mode flag is set to CCM or the DCM state is maintained; Adjust the interrupt priority order to match the timing characteristics of the captured events and generate the current state parameters of the mode switching boundary; Combine the counter overflow times and rising edge fluctuation frequency data to calculate the correction factor of the average sampling current; Update the duty cycle parameter based on the corrected current value and generate a new PWM control signal output; When the duty cycle deviation exceeds the switching threshold, the interrupt priority parameters are dynamically adjusted and the counter reference value is updated; A real-time tracking data set of the inductor current zero point is generated according to the final adjustment parameters.

2. The method for identifying CCM and DCM modes in a high-power digital power supply according to claim 1, characterized in that: The step of obtaining the inductor current sampling voltage and the reference voltage signal and detecting the level conversion state of the two through a comparator module includes: Obtain inductor current data, convert it into a sampled voltage signal through a sampling circuit, and obtain an initial voltage value; Generate a reference voltage signal through a preset reference voltage source to determine a comparison benchmark; The comparator module is used to compare the sampled voltage with the reference voltage to determine the direction of level conversion; According to the comparator output result, the level conversion state is detected to obtain the state sequence; Analyze the level change rules through state sequence and determine the change trend; According to the changing trend, the filtering algorithm is used to smooth the signal and obtain the stable state characteristics; If the stable state characteristics exceed the preset state characteristic threshold, the output is adjusted through logical operation to obtain the final judgment result.

3. The method for identifying CCM and DCM modes in a high-power digital power supply according to claim 1, characterized in that: If the reference voltage is detected to transition from high to low, the falling edge of the trigger pulse is captured and the current count value of the counter module is stored, including: If the reference voltage switches from high to low, the falling edge of the trigger pulse is captured to obtain the current count value of the counter module and store it; By storing data and generating time series, we can determine the change pattern of voltage status over time; Use filtering algorithm to process time series and obtain smoothed state characteristics; If the smoothed state feature exceeds the preset state feature threshold, the output is adjusted through logical operation to determine the state abnormality; Generate corresponding control signals based on abnormal status results and determine the subsequent processing direction; Obtain control signals and obtain the final execution instructions through preset mapping rules; By executing the instruction, the status of the counter module is updated and a detection cycle is completed.

4. The method for identifying CCM and DCM modes in a high-power digital power supply according to claim 1, characterized in that: The method of generating initial capture data according to the stored count value and reading the capture status bit in conjunction with the interrupt service routine to determine the zero point of the inductor current includes: Obtaining storage count values ​​through a preset storage mechanism to generate initial capture data; Based on the initial captured data, the interrupt service routine is used to detect the interrupt trigger mechanism and read the capture status bit; If the capture status bit changes, the current state is determined by reading the status bit to obtain the status change information; For state change information, data processing logic is used to analyze the initial captured data and determine the zero point of the inductor current; Obtain the determined inductor current zero point and verify the accuracy of the data processing logic based on the zero point detection result; Based on the verified zero-point detection results, the interrupt trigger mechanism is adjusted to optimize the reading efficiency of the capture status bit; According to the optimized reading efficiency, the generation rule of the storage count value is updated to obtain more accurate initial capture data.

5. The method for identifying CCM and DCM modes in a high-power digital power supply according to claim 1, characterized in that: When the interrupt response time is less than a preset interrupt response time threshold, determining the validity of the capture edge and generating a comparison result between the digital-to-analog conversion output and the initial capture data, includes: If the interrupt response time is less than the preset interrupt response time threshold, the response time data is obtained through the timer to determine the time determination result; According to the time judgment result, the edge detection algorithm is used to detect and capture the edge to obtain the edge validity status; Through the edge validity status, the trigger signal is obtained to generate the initial output data of the digital-to-analog conversion; Obtaining captured data from the initial capture module, using a comparator to compare the converted output data with the captured data to determine a comparison result; If the comparison result exceeds the preset range, the digital-to-analog conversion output is optimized by adjusting the parameters to obtain adjusted output data; Based on the adjusted output data, a convolutional neural network is used to analyze the data characteristics and determine the final output stability; Through the final output stability, the system feedback signal is obtained to determine the end status of the business process.

6. The method for identifying CCM and DCM modes in a high-power digital power supply according to claim 1, characterized in that: If the comparison result meets the preset error range, recording the DCM mode identifier and calculating the average sampled current value includes: If the comparison result exceeds the preset error range, the error range is adjusted by collecting additional data to obtain an adjusted error value; Perform a secondary comparison based on the adjusted error value and the comparison result to determine whether the conditions are met; If the secondary comparison meets the conditions, the sampling data in DCM mode is obtained and the mode identifier is determined; The average current value is obtained by performing mean calculation on the sampled data; Compare the average current value with the preset average current threshold to determine the current stability; If the current stability meets the conditions, the mode identification and the average current value are recorded to generate an identification record; Update the DCM mode status according to the identification record and determine the final output data.

7. The method for identifying CCM and DCM modes in a high-power digital power supply according to claim 1, characterized in that: The step of calculating the time difference between the current capture state bit and the historical counter value, and starting the mode switching determination when the time difference is less than the PWM cycle proportional coefficient, includes: The time difference is calculated by collecting the current captured state bit value and the counter value of the historical count to obtain the time difference data; Compare the time difference data with the proportional coefficient of the PWM period to determine whether the difference is less than the proportional coefficient; If the time difference is less than the proportional coefficient, the switching decision logic is triggered according to the comparison result to determine whether to enter the mode switching process; Obtain the result of the judgment condition and obtain the preliminary signal of mode switching by analyzing the relationship between the time difference and the PWM period; For the preliminary signal, a preset preliminary signal threshold is used to perform a secondary check on the switching decision to determine the final switching state; Through the secondary verification result, the execution instruction of the mode switching is determined and the final switching control signal is obtained; According to the switching control signal, the mode switching operation is executed to complete the state conversion process.

8. The method for identifying CCM and DCM modes in a high-power digital power supply according to claim 1, characterized in that: If the mode switching determination is established, configuring the capture trigger edge to a rising edge detection mode and storing the fluctuation capture data set includes: If the judgment condition is met, the input signal is analyzed by the preset judgment condition threshold to determine the mode switching state; According to the mode switching status, adjust the trigger edge configuration to the rising detection mode to obtain the edge parameters; Performing a fluctuation capture operation through edge parameters to obtain initial capture data; The initial captured data is processed using a filtering algorithm to obtain smoothed data; Extract key features from smoothed data to determine fluctuation trends; Update the data set based on the fluctuation trend to store the final captured data; Acquire final capture data and verify detection pattern consistency to obtain confirmation results.

9. The method for identifying CCM and DCM modes in a high-power digital power supply according to claim 1, characterized in that: The updating mode identifier to CCM or maintaining the DCM state according to the read state of the capture event flag in the interrupt period includes: Generate event flags by capturing events, store them in a preset buffer, and obtain initial flag data; Scan the buffer regularly according to the interrupt cycle, obtain the flag reading result from the initial flag data, and determine the read status value; If the read state value is true, the mode identifier is switched to the CCM state to obtain the updated mode identifier data; If the read status value is false, the DCM state is maintained through the mode identifier, and the maintained mode identifier data is obtained; Using a state machine to process the updated mode identification data or the maintained mode identification data to obtain periodic state information; The support vector machine algorithm is used to classify the periodic state information, determine whether the state is stable, and obtain the classification result; The scanning frequency of the interruption cycle is adjusted according to the classification results to obtain the optimized cycle control parameters.

10. The method for identifying CCM and DCM modes in a high-power digital power supply according to claim 1, characterized in that: The method of adjusting the interrupt priority order to match the timing characteristics of the capture event and generating the current state parameter of the mode switching boundary includes: By capturing events to determine the temporal characteristics, we can obtain the order in which the events occur; Adjust interrupt priority based on timing characteristics and determine the changing trend of priority sequence; Generate the time point of mode switching based on the change trend and obtain the initial data of the switching boundary; Analyze the current state based on the initial data and determine the distribution pattern of the state parameters; The distribution law is used to update the boundary generation rules to obtain the precise boundary of mode switching; Extract state parameters from precise boundaries and determine the final value of the current state; The matching of the priority order is verified through the final value to obtain the adjusted interrupt priority.

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