Space vector modulation method and device of three-level inverter and storage medium

By adding the acting time of PPP and NNN type zero voltage vectors in the zero vector selection of the three-level inverter, and combining the bus midpoint potential balance control, the problem of the inverter minimum pulse width on time is solved, and stable bus midpoint potential and improved system control performance are achieved.

CN120566930APending Publication Date: 2025-08-29WUHAN INSTITUTE OF MARINE ELECTRIC PROPULSION (THE 712TH RESEARCH INSTITUTE OF CHINA STATE SHIPBUILDING CORP LTD)
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Patent Information

Application Number
CN202510763167.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-09
Publication Date
2025-08-29

AI Technical Summary

Technical Problem

When the existing three-level inverter is running at a low-modulation ratio, the modulated pulse width is within the minimum pulse width, resulting in the minimum pulse width on-time of the power device, which may lead to control failure and affect system performance.

Method used

The space vector modulation method of the three-level inverter is adopted to increase the acting time of the PPP and NNN type zero voltage vector in the zero vector selection, increase the conduction time of the power device, and adjust the acting time of the redundant small vector through the mid-point potential balance control of the bus line, ensuring the stable potential of the bus line mid-point potential and avoiding the minimum pulse width conduction time.

Benefits of technology

It effectively avoids the minimum pulse width on-time of the power device, maintains the stable potential of the bus midpoint, improves the system control performance, and has low algorithm complexity and is easy to implement digitally.

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Abstract

The invention relates to a space vector modulation method and device of a three-level inverter and a storage medium, and belongs to the technical field of converter control. Determining a fundamental voltage vector for synthesizing the reference voltage vector and an action time of the fundamental voltage vector; based on the action time of the basic voltage vector, determining the action sequence and time distribution of the basic voltage vector; adjusting the action time of a redundant small vector in the basic voltage vector based on the bus midpoint potential balance control fine adjustment amount, and obtaining the action sequence and time distribution of the adjusted basic voltage vector; and comparing the generated three-phase modulation wave with a triangular carrier wave, and outputting a PWM pulse to drive a three-level inverter to generate a corresponding switching state based on a comparison result. According to the method provided by the invention, the conduction time of the power device can be prolonged, and the minimum pulse width conduction time of the power device is avoided.
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Description

Technical Field

[0001] The present invention relates to the technical field of converter control, and in particular to a space vector modulation method, device and storage medium for a three-level inverter. Background Art

[0002] Multilevel converters offer advantages such as high power factor, low switching losses, low harmonic content, and low dv / dt. They have been widely used in renewable energy generation, high-voltage variable-frequency speed regulation, and flexible AC / DC transmission and distribution in power systems. Three-level active neutral-point clamped inverters, compared to traditional diode-clamped and flying-capacitor inverters, utilize active devices to clamp the busbar midpoint, increasing control freedom and facilitating uniform control of power device losses and balanced control of the busbar capacitor midpoint voltage. Consequently, they are attracting increasing attention.

[0003] To ensure the safe operation of the main circuit power devices, the modulated pulse width must be greater than the minimum allowable on-time of the power devices, and the minimum pulse interval must be greater than the minimum allowable off-time of the devices. Setting the minimum pulse width reduces the inverter's DC voltage utilization, especially when operating at low modulation ratios, where the inverter modulates the pulse width within the minimum pulse width. Traditionally, the minimum pulse width treatment involves setting the pulse width to 0, the maximum value, or the minimum pulse width. This treatment reduces system control performance and, in severe cases, can cause the entire system to fail. Summary of the Invention

[0004] In view of this, it is necessary to provide a space vector modulation method, device and storage medium for a three-level inverter to solve the problem of how to avoid the minimum pulse width conduction time in the inverter modulation power device.

[0005] In order to solve the above problems, in a first aspect, the present invention provides a space vector modulation method for a three-level inverter, comprising: Determining, based on an area where a reference voltage vector of the three-level inverter is located in a space voltage vector coordinate system, a basic voltage vector for synthesizing the reference voltage vector and an action time of the basic voltage vector; wherein the zero vector in the basic voltage vector includes OOO, PPP, and NNN; determining an action sequence and time distribution of the basic voltage vectors based on the action time of the basic voltage vectors; Based on the busbar midpoint potential balance control fine-tuning amount, adjusting the action time of the redundant small vectors in the basic voltage vector to obtain the action sequence and time distribution of the adjusted basic voltage vector; The generated three-phase modulation waves are compared with the triangular carrier respectively, and PWM pulses are output based on the comparison results to drive the three-level inverter to generate corresponding switching states; the three-phase modulation waves are generated based on the action sequence and time distribution of the adjusted basic voltage vectors.

[0006] In one possible implementation, determining a basic voltage vector for synthesizing the reference voltage vector and an action time of the basic voltage vector based on a region where the reference voltage vector of the three-level inverter is located in a space voltage vector coordinate system includes: The space voltage vector coordinate system is divided into 6 large sectors, and each large sector is divided into 6 small sectors in turn, resulting in 36 small sectors; Based on the coordinates of the reference voltage vector in the space voltage vector coordinate system, obtaining the small sector where the reference voltage vector is located in the space voltage vector coordinate system; Determining the basic voltage vector based on the small sector where the reference voltage vector is located in the space voltage vector coordinate system; The action time of the basic voltage vector is determined by using the space vector equivalence principle.

[0007] In a possible implementation, the six large sectors are as follows: The first large sector: U beta >0 and U beta - U alfa <0; Second largest sector: U beta >0 and U beta - U alfa >0 and U beta + U alfa >0; Sector III: U beta >0 and U beta + U alfa <0; IV Large Sector: U beta <0 and U beta - U alfa >0; The Vth largest sector: U beta <0 and U beta - U alfa <0 and U beta + U alfa <0; Sector VI: U beta<0 and U beta + U alfa >0; U alfa 、U beta They are the spatial voltage vector coordinate system α Axis coordinates, β axis coordinates; The six small sectors obtained by dividing the first large sector are as follows: Small sector I_a: 1-U beta - U alfa >0 and U beta -U alfa >0; Small sector I_b: 1-U beta - U alfa >0 and U beta -U alfa <0; Small sector I_c: 1-U beta - U alfa >0 and U beta - U alfa +1>0 and 0.5-U beta >0 and U beta -U alfa >0; I_dth small sector: 1-U beta - U alfa <0 and U beta - U alfa +1>0 and 0.5-U beta >0 and U beta -U alfa <0; Small sector I_e: 0.5-U beta <0; The first small sector: U beta - U alfa +1<0; The basic voltage vectors of the six small sectors obtained by dividing the first large sector are as follows: The I_ath small sector: OON / PPO-OOO / PPP / NNN-POO / ONN; I_b small sector: OON / PPO-OOO / PPP / NNN-POO / ONN; Small sector I_c: OON-PON-POO-PPO; The 1_dth small sector: ONN-OON-PON-POO; The first small sector: OON-PON-PPN-PPO; The first small sector: ONN-PNN-PON-POO; The action time T of the basic voltage vector of the six small sectors obtained by dividing the first large sector a 、T b 、T c They are as follows: Small sector I_a: T a =2U beta 、T b =1- U alfa -U beta 、T c = U alfa -U beta ; Small sector I_b: T a =2U beta 、T b =1- U alfa -U beta 、T c = U alfa -U beta ; Small sector I_c: T a =1- U alfa +U beta 、T b = U alfa +U beta 、T c =1-2U beta ; The I_dth small sector: T a =1-2U beta 、T b =1- U alfa +U beta 、T c = U alfa +U beta ; The first small sector: T a =2- U alfa -U beta 、T b = U alfa -U beta 、T c =2U beta -1; The first small sector: T a =2- U alfa -U beta 、T b = U alfa -U beta -1, T c =2U beta .

[0008] In a possible implementation, the action sequence and time distribution of the basic voltage vectors of the six small sectors obtained by dividing the first large sector are as follows: Small sector I_a: NNN( T b )-ONN( T a )-OON( T c )-OOO( T b )-POO( T a )-PPO( T c )-PPP( T b )-PPO( T c )-POO( T a )-OOO( T b )-OON( T c )-ONN( T a )-NNN( T b ); Small sector I_b: NNN( T b )-ONN( T a )-OON( T c )-OOO( T b )-POO( T a )-PPO( T c )-PPP( T b )-PPO( T c )-POO( T a )-OOO( T b )-OON( T c )-ONN( T a )-NNN( T b ); Sector I_c: OON( T c )-PON( T b )-POO( T a )-PPO( T c )-POO( T a )-PON( T b )-OON( T c ); Sector I_d: ONN( T a )-OON( T c )-PON( T b )-POO( T a )-PON( T b )-OON( T c )-ONN( T a ); Sector I_e: OON( T c )-PON( T b )-PPN( T a )-PPO( T c )-PPN( T a )-PON( T b)-OON( T c ); The first small sector: ONN( T a )-PNN( T b )-PON( T c )-POO( T a )-PON( T c )-PNN( T b )-ONN( T a ).

[0009] In a possible implementation, the action sequence and time distribution of the basic voltage vectors of the six small sectors corresponding to the adjusted first large sector are as follows: Small sector I_a: NNN( T b )-ONN( T a )-OON( T c )-OOO( T b )-POO( T a )-PPO( T c )-PPP( T b )-PPO( T c )-POO( T a )-OOO( T b )-OON( T c )-ONN( T a )-NNN( T b ); Small sector I_b: NNN( T b )-ONN( T a )-OON( T c )-OOO( T b )-POO( T a)-PPO( T c )-PPP( T b )-PPO( T[[ID=!1]] c )-POO( T a )-OOO( T b )-OON( T c )-ONN( T a )-NNN( T b ); The I_c small sector: OON( T c )-PON( T b )-POO( T \ a )-PPO( vm T c )-POO( T a )-PON( T b )-OON( T c ); The I_d small sector: ONN( T a )-OON( T c )-PON( T b )-POO((1- vm )T a )-PON( T b )-OON( T c )-ONN( T a ); The I_e small sector: OON( T c )-PON( T b )-PPN( T a )-PPO( vm T c )-PPN( T a )-PON( T b )-OON( It should be noted that there may be some inaccuracies in the translation due to the lack of clear context for these tags and notations. If possible, it is recommended to provide more detailed information for a more accurate translation. T c ); The first small sector: ONN( T a )-PNN( T b )-PON( T c )-POO((1- vm )T a )-PON( T c )-PNN( T b )-ONN( T a ); Indicates the fine-tuning amount of busbar midpoint potential balance control.

[0010] In a possible implementation, each phase bridge arm of the three-level inverter includes six power switch tubes; Wherein, the first power switch tube, the fifth power switch tube, the sixth power switch tube and the fourth power switch tube are connected in series in sequence; A combination of the second power switch tube and the third power switch tube connected in series is connected in parallel with a combination of the fifth power switch tube and the sixth power switch tube connected in series; The method of comparing the generated three-phase modulation wave with the triangular carrier wave respectively and outputting PWM pulses based on the comparison results to drive the three-level inverter to generate corresponding switching states includes: When the three-phase modulation wave is greater than the triangular carrier wave, the output PWM pulse drives the upper power switch tube to turn on and controls the lower power switch tube to turn off.

[0011] In a possible implementation, the step of comparing the generated three-phase modulated waves with the triangular carrier wave, and outputting PWM pulses based on the comparison results to drive the three-level inverter to generate corresponding switching states includes: When the three-phase modulation wave is smaller than the triangular carrier wave, the output PWM pulse drives the upper power switch tube to turn off and controls the lower power switch tube to turn on.

[0012] In a second aspect, the present invention further provides a space vector modulation device for a three-level inverter, comprising: A first determining module is configured to determine, based on an area where a reference voltage vector of the three-level inverter is located in a space voltage vector coordinate system, a basic voltage vector for synthesizing the reference voltage vector and an action time of the basic voltage vector; wherein the zero vector in the basic voltage vector includes OOO, PPP, and NNN; a second determining module, configured to determine an action sequence and time distribution of the basic voltage vectors based on an action time of the basic voltage vectors; An adjustment module is configured to adjust the action time of the redundant small vectors in the basic voltage vector based on the busbar midpoint potential balance control fine-tuning amount, and obtain the action sequence and time distribution of the adjusted basic voltage vector; A driving module is used to compare the generated three-phase modulated waves with the triangular carrier respectively, and output PWM pulses based on the comparison results to drive the three-level inverter to produce corresponding switching states; the three-phase modulated waves are generated based on the action sequence and time distribution of the adjusted basic voltage vectors.

[0013] In a third aspect, the present invention further provides an electronic device comprising a memory and a processor, wherein: The memory is used to store programs; The processor is coupled to the memory and is configured to execute the program stored in the memory to implement the space vector modulation method for the three-level inverter described in any of the above implementations.

[0014] In a fourth aspect, the present invention also provides a computer-readable storage medium for storing a computer-readable program or instruction, which, when executed by a processor, can implement the steps in the space vector modulation method of the three-level inverter described in any of the above-mentioned implementation methods.

[0015] The beneficial effects of the present invention are as follows: the space vector modulation method, device, and storage medium of the three-level inverter provided by the present invention determine the basic voltage vector and action time for synthesizing the reference voltage vector according to the region where the reference voltage vector of the three-level inverter is located in the space voltage vector coordinate system. During the space vector synthesis process, three types of zero voltage space vectors, OOO, PPP, and NNN, can be simultaneously selected in the selection of zero vectors. By increasing the action time of PPP and NNN type zero voltage vectors in the zero vector selection, the conduction time of the power device is increased, and the minimum pulse width conduction time of the power device is avoided. The action time of the redundant small vector is adjusted according to the bus midpoint potential balance control fine-tuning amount to maintain the stability of the bus midpoint potential, and the action sequence and time distribution of the adjusted basic voltage vector are obtained, so that the generated three-phase modulated wave is compared with the triangular carrier respectively. Based on the comparison result, PWM pulses are output to drive the three-level inverter to generate the corresponding switching state. The algorithm complexity is low, the implementation is convenient, and it is easy to realize digitally. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0017] Figure 1 A schematic diagram of the topological structure of the three-level active neutral point clamped inverter provided by the present invention; Figure 2 A schematic flow chart of an embodiment of a space vector modulation method for a three-level inverter provided by the present invention; Figure 3 A schematic diagram of the spatial voltage vector distribution of the three-level active neutral point clamped inverter provided by the present invention; Figure 4 A schematic diagram of the voltage vector synthesis sequence and action time of the three-level active neutral point clamped inverter provided by the present invention; Figure 5 A schematic flow chart of a space vector modulation method for a three-level inverter considering minimum pulse width limitation provided by the present invention; Figure 6 A schematic diagram showing the relationship between the modulation waves of T1, T3, and T5 tubes and the triangular carrier wave generated by space vector modulation of the active neutral point clamped three-level inverter considering the minimum pulse width limitation provided by the present invention; Figure 7 Schematic diagram of the relationship between the T1, T3, and T5 tube modulation waves and the triangular carrier wave generated by the traditional space vector modulation provided by the present invention; Figure 8 A schematic structural diagram of an embodiment of a space vector modulation device for a three-level inverter provided by the present invention; Figure 9 This is a schematic structural diagram of an embodiment of the electronic device provided by the present invention. DETAILED DESCRIPTION

[0018] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making any creative efforts shall fall within the scope of protection of the present invention.

[0019] In the description of the embodiments of the present invention, unless otherwise specified, "plurality" means two or more. "And / or" describes the association relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can mean: A exists alone, A and B exist simultaneously, or B exists alone.

[0020] The terms "first," "second," and so on, used in the embodiments of the present invention are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, technical features designated as "first" or "second" may explicitly or implicitly include at least one such feature.

[0021] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present invention. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute a separate or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0022] The present invention takes a three-level active neutral point clamped inverter as an example to further illustrate the space vector modulation method of the three-level inverter. Figure 1 A schematic diagram of the topology of the three-level active neutral point clamped inverter provided by the present invention is shown in FIG. Figure 1 As shown in Figure 3, the three-level active neutral point clamped inverter can be viewed as replacing the neutral point clamped diode in a traditional diode neutral point clamped three-level inverter with an active power device. Due to the use of active clamping, the three-level active neutral point clamped inverter has a higher degree of control freedom.

[0023] The present invention provides a space vector modulation method, device and storage medium for a three-level inverter, which are respectively described below.

[0024] Figure 2 A flow chart of an embodiment of a space vector modulation method for a three-level inverter provided by the present invention is shown in FIG. Figure 2 As shown, the space vector modulation method of the three-level inverter includes: S201. Determine, based on an area where a reference voltage vector of a three-level inverter is located in a space voltage vector coordinate system, basic voltage vectors for synthesizing the reference voltage vector and action times of the basic voltage vectors; the zero vectors in the basic voltage vectors include OOO, PPP, and NNN.

[0025] For example, Figure 3 The schematic diagram of the spatial voltage vector distribution of the three-level active neutral point clamped inverter provided by the present invention is as follows: Figure 3 As shown, the space voltage vector coordinate system is divided into six large sectors, each large sector is divided into six small sectors. Taking the first large sector as an example, it can be divided into six small sectors a, b, c, d, e, and f.

[0026] The basic voltage vector is determined according to the area (i.e., the small sector) where the reference voltage vector of the three-level inverter is located in the space voltage vector coordinate system. The basic voltage vector is used to synthesize the reference voltage vector, and the action time of the basic voltage vector is calculated using the space vector equivalence principle.

[0027] Each phase arm of a three-level inverter can output three voltage states: P, O, and N. These states can be combined to form 27 basic voltage vectors, including zero and non-zero basic voltage vectors. Non-zero basic voltage vectors have three modulus lengths: small, medium, and large. Small vectors can be further divided into P-type and N-type small vectors (appearing in pairs).

[0028] When the modulation ratio is low, the zero vector OOO lasts longer, while the zero vector duration is shorter. The present invention simultaneously selects three types of zero-voltage space vectors: OOO, PPP, and NNN. By increasing the duration of PPP and NNN zero-voltage vectors during zero vector selection, the on-time of power devices is increased, preventing the minimum pulse width on-time of power devices.

[0029] S202: Determine the action sequence and time distribution of the basic voltage vectors based on the action time of the basic voltage vectors.

[0030] According to the area where the reference voltage vector is located in the space voltage vector coordinate system, the basic vector and the action time are selected, and the order and time distribution of the basic vector action are determined.

[0031] S203 : Based on the busbar midpoint potential balance control fine-tuning amount, adjust the action time of the redundant small vectors in the basic voltage vector to obtain the action sequence and time distribution of the adjusted basic voltage vector.

[0032] In order to maintain the stability of the busbar midpoint potential, the balanced control of the busbar capacitor midpoint potential is achieved by fine-tuning the time distribution of the redundant small vectors, and the action sequence and time distribution of the adjusted basic voltage vectors are obtained.

[0033] S204: Compare the generated three-phase modulated waves with the triangular carrier waves, and output PWM pulses based on the comparison results to drive the three-level inverter to generate corresponding switching states. The three-phase modulated waves are generated based on the adjusted sequence and time distribution of the basic voltage vectors. Based on the adjusted sequence and time distribution of the basic voltage vectors, the final three-phase modulated waves are compared with the corresponding triangular carrier waves, and the final PWM pulses are output to drive the three-level inverter to generate corresponding switching states.

[0034] The three-phase modulation wave of the three-level inverter is denoted as U refaT1 、UrefaT3 、U refaT5 ;U refbT1 、U refbT3 、U refbT5 ;U refcT1 、U refcT3 、U refcT5 , respectively, are the comparison values ​​of the A-phase bridge arm T1 and T2 tubes, the comparison values ​​of the A-phase bridge arm T3 and T4 tubes, the comparison values ​​of the A-phase bridge arm T5 and T6 tubes; the comparison values ​​of the B-phase bridge arm T1 and T2 tubes, the comparison values ​​of the B-phase bridge arm T3 and T4 tubes, the comparison values ​​of the B-phase bridge arm T5 and T6 tubes; the comparison values ​​of the C-phase bridge arm T1 and T2 tubes, the comparison values ​​of the C-phase bridge arm T3 and T4 tubes, the comparison values ​​of the C-phase bridge arm T5 and T6 tubes.

[0035] The triangular carrier used in the three-level inverter is denoted as C. The three-phase modulation waves are compared with the carrier C respectively. When the modulation wave is greater than the carrier, the upper tube is turned on and the lower tube is turned off; when the modulation wave is less than the carrier, the upper tube is turned off and the lower tube is turned on.

[0036] In summary, the space vector modulation method for a three-level inverter provided in an embodiment of the present invention determines a basic voltage vector and an action time for synthesizing a reference voltage vector based on the region where the reference voltage vector of the three-level inverter is located in a space voltage vector coordinate system. During the space vector synthesis process, three types of zero voltage space vectors, OOO, PPP, and NNN, can be simultaneously selected when selecting the zero vector. By increasing the action time of the PPP and NNN zero voltage vectors in the zero vector selection, the on-time of the power device is increased, avoiding the minimum pulse width on-time of the power device. The action time of the redundant small vectors is adjusted according to the bus midpoint potential balance control fine-tuning amount to maintain the stability of the bus midpoint potential. The adjusted action sequence and time distribution of the basic voltage vectors are obtained, and the generated three-phase modulated waves are compared with the triangular carrier respectively. Based on the comparison results, PWM pulses are output to drive the three-level inverter to generate corresponding switching states. The algorithm has low complexity, is easy to implement, and is easy to realize digitally.

[0037] In some embodiments of the present invention, determining a basic voltage vector for synthesizing the reference voltage vector and an action time of the basic voltage vector based on an area where the reference voltage vector of the three-level inverter is located in a space voltage vector coordinate system includes: The space voltage vector coordinate system is divided into 6 large sectors, and each large sector is divided into 6 small sectors in turn, resulting in 36 small sectors; Based on the coordinates of the reference voltage vector in the space voltage vector coordinate system, obtaining the small sector where the reference voltage vector is located in the space voltage vector coordinate system; Determining the basic voltage vector based on the small sector where the reference voltage vector is located in the space voltage vector coordinate system; The action time of the basic voltage vector is determined by using the space vector equivalence principle.

[0038] According to the αβ axis reference voltage U alfa 、U beta The large sectors are divided into 6 large sectors. The division principles are as follows: The first large sector: U beta >0 and U beta - U alfa <0; Second largest sector: U beta >0 and U beta - U alfa >0 and U beta + U alfa >0; Sector III: U beta >0 and U beta + U alfa <0; IV Large Sector: U beta <0 and U beta - U alfa >0; The Vth largest sector: U beta <0 and U beta - U alfa <0 and U beta + U alfa <0; Sector VI: U beta <0 and U beta + U alfa >0.

[0039] According to the αβ axis reference voltage U alfa 、U beta Perform small sector division. Take the first large sector as an example to divide the small sectors and obtain 6 small sectors. The division principle is as follows: Small sector I_a: 1-U beta - U alfa >0 and U beta -U alfa >0; Small sector I_b: 1-U beta - U alfa >0 and U beta -U alfa <0; Small sector I_c: 1-U beta - U alfa >0 and U beta - U alfa +1>0 and 0.5-U beta >0 and U beta -U alfa >0; I_dth small sector: 1-U beta - U alfa <0 and U beta - U alfa +1>0 and 0.5-U beta >0 and U beta -U alfa <0; Small sector I_e: 0.5-U beta <0; The first small sector: U beta - U alfa +1<0.

[0040] According to the αβ axis reference voltage U alfa 、U beta The reference voltage vector of the small sector is synthesized by the three nearest basic voltage vectors. The basic voltage vectors selected for each small sector are as follows: The I_ath small sector: OON / PPO-OOO / PPP / NNN-POO / ONN; I_b small sector: OON / PPO-OOO / PPP / NNN-POO / ONN; Small sector I_c: OON-PON-POO-PPO; The 1_dth small sector: ONN-OON-PON-POO; The first small sector: OON-PON-PPN-PPO; The I_fth small sector: ONN-PNN-PON-POO.

[0041] According to the values ​​of the αβ-axis reference voltages Ualfa and Ubeta and the sector where the reference voltage vector is located, the action time of the basic voltage vector is calculated using the space vector equivalence principle. The action time is recorded as Ta, Tb, and Tc, respectively, as follows: No. I_a Small Ogi Ward: T a =2U beta , T b =1- U alfa -U beta , T c = U alfa -U beta ; No. I_b Koogi Ward: T a =2U beta , T b =1- U alfa -U beta , T c = U alfa -U beta ; No. I_c Koogi Ward: T a =1- U alfa +U beta , T b = U alfa +U beta , T c =1-2U beta ; No. I_d Koogi Ward: T a =1-2U beta , T b =1- U alfa +U beta , T c = U alfa +U beta ; No. I_e Koogi Ward: T a =2- U alfa -U beta , T b = U alfa -U beta , T c =2U beta -1; No. I_f Koogi Ward: T a =2- U alfa -U beta , T b = U alfa -U beta -1, Tc =2U beta .

[0042] According to the αβ axis reference voltage U alfa 、U beta The three basic vectors selected for the sector and their action times determine the order and time distribution of the basic vector actions. In some embodiments of the present invention, the action order and time distribution of the basic voltage vectors of the six small sectors obtained by dividing the first large sector are as follows: Small sector I_a: NNN( T b )-ONN( T a )-OON( T c )-OOO( T b )-POO( T a )-PPO( T c )-PPP( T b )-PPO( T c )-POO( T a )-OOO( T b )-OON( T c )-ONN( T a )-NNN( T b ); Small sector I_b: NNN( T b )-ONN( T a )-OON( T c )-OOO( T b )-POO( T a )-PPO( T c )-PPP( T b )-PPO( T c )-POO( T a )-OOO( T b )-OON( Tc )-ONN( T a )-NNN( T b ); The I_c small sector: OON( T c )-PON( T b )-POO( T a )-PPO( T c )-POO( T a )-PON( T b )-OON( T c ); The I_d small sector: ONN( T a )-OON( T c )-PON( T b )-POO( T a )-PON( T b )-OON( T c )-ONN( T a ); The I_e small sector: OON( T c )-PON( T b )-PPN( T a )-PPO( T c )-PPN( T a )-PON( T b )-OON( T c ); The I_f small sector: ONN( T a )-PNN( T b )-PON( T c )-POO( T a )-PON( T c )-PNN( T b )-ONN( T a ).

[0043] In order to maintain the stability of the busbar midpoint potential, the busbar capacitor midpoint potential balance control is achieved by fine-tuning the time distribution of the redundant small vector. The busbar midpoint potential balance control fine-tuning amount is recorded as vm .

[0044] In some embodiments of the present invention, the action sequence and time distribution of the basic voltage vectors of the six small sectors corresponding to the adjusted first large sector are as follows: Small sector I_a: NNN( T b )-ONN( T a )-OON( T c )-OOO( T b )-POO( T a )-PPO( T c )-PPP( T b )-PPO( T c )-POO( T a )-OOO( T b )-OON( T c )-ONN( T a )-NNN( T b ); Small sector I_b: NNN( T b )-ONN( T a )-OON( T c )-OOO( T b )-POO( T a )-PPO( T c )-PPP( T b )-PPO( T c)-POO( T a )-OOO( T b )-OON( T c )-ONN( T a )-NNN( T b ); The I_c small sector: OON( T c )-PON( T b )-POO( T a )-PPO( vm T c )-POO( T a )-PON( T b )-OON( T c ); The I_d small sector: ONN( T a )-OON( T c )-PON( T b )-POO((1- vm )T a )-PON( T b )-OON( T c )-ONN( T a ); The I_e small sector: OON( T c )-PON( T b )-PPN( T a )-PPO( vm T c )-PPN( T a )-PON( T b )-OON( T c ); The I_f small sector: ONN( T a )-PNN( Tb )-PON( T c )-POO((1- vm )T a )-PON( T c )-PNN( T b )-ONN( T a ); Indicates the fine-tuning amount of busbar midpoint potential balance control.

[0045] In some embodiments of the present invention, each phase bridge arm of the three-level inverter includes 6 power switch tubes; Wherein, the first power switch tube, the fifth power switch tube, the sixth power switch tube and the fourth power switch tube are connected in series in sequence; A combination of the second power switch tube and the third power switch tube connected in series is connected in parallel with a combination of the fifth power switch tube and the sixth power switch tube connected in series; The method of comparing the generated three-phase modulation wave with the triangular carrier wave respectively and outputting PWM pulses based on the comparison results to drive the three-level inverter to generate corresponding switching states includes: When the three-phase modulation wave is greater than the triangular carrier wave, the output PWM pulse drives the upper power switch tube to turn on and controls the lower power switch tube to turn off.

[0046] In some embodiments of the present invention, the step of comparing the generated three-phase modulated waves with the triangular carrier wave, and outputting PWM pulses based on the comparison results to drive the three-level inverter to generate corresponding switching states includes: When the three-phase modulation wave is smaller than the triangular carrier wave, the output PWM pulse drives the upper power switch tube to turn off and controls the lower power switch tube to turn on.

[0047] like Figure 1 As shown, each phase bridge arm of the three-level inverter includes six power switch tubes, namely the first power switch tube T1, the second power switch tube T2, the third power switch tube T3, the fourth power switch tube T4, the fifth power switch tube T5 and the sixth power switch tube T6.

[0048] After comparing the final generated modulation wave with the corresponding triangular carrier wave, the final PWM pulse is output to drive the three-level active neutral point clamped inverter.

[0049] Figure 4 This is a schematic diagram of the voltage vector synthesis sequence and action time of the three-level active neutral point clamped inverter provided by the present invention, as shown in FIG. Figure 4As shown, when the voltage vector is located in other large sectors, the coordinate transformation can be applied to be equivalent to the first large sector, thereby determining the corresponding basic voltage vector action sequence and calculating the voltage vector action time.

[0050] After coordinate transformation, the basic voltage vector action time when the reference voltage vector is located in other large sectors is calculated. The three-phase modulation wave of the active neutral point clamped three-level inverter is recorded as U refaT1 、U refaT3 、U refaT5 ;U refbT1 、U refbT3 、U refbT5 ;U refcT1 、U refcT3 、U refcT5 , respectively, are the comparison values ​​of the A-phase bridge arm T1 and T2 tubes, the comparison values ​​of the A-phase bridge arm T3 and T4 tubes, the comparison values ​​of the A-phase bridge arm T5 and T6 tubes; the comparison values ​​of the B-phase bridge arm T1 and T2 tubes, the comparison values ​​of the B-phase bridge arm T3 and T4 tubes, the comparison values ​​of the B-phase bridge arm T5 and T6 tubes; the comparison values ​​of the C-phase bridge arm T1 and T2 tubes, the comparison values ​​of the C-phase bridge arm T3 and T4 tubes, the comparison values ​​of the C-phase bridge arm T5 and T6 tubes.

[0051] The PWM wave generation method of the active neutral point clamped three-level inverter is proposed. The triangular carrier used by the active neutral point clamped three-level inverter is denoted as C. The three-phase modulation wave U refaT1 、U refaT3 、U refaT5 ;U refbT1 、U refbT3 、U refbT5 ;U refcT1 、U refcT3 、U refcT5 Compared with the carrier C, when the modulated wave is greater than the carrier, the upper tube is turned on and the lower tube is turned off; when the modulated wave is less than the carrier, the upper tube is turned off and the lower tube is turned on.

[0052] The space vector modulation method for a three-level inverter provided in an embodiment of the present invention increases the action time of PPP and NNN type zero voltage vectors in zero vector selection, thereby increasing the conduction time of the power device and avoiding the minimum pulse width conduction time of the power device, thereby realizing a space vector modulation strategy for a three-level inverter that takes into account the minimum pulse width limitation.

[0053] Figure 5 The flow chart of the space vector modulation method of the three-level inverter considering the minimum pulse width limitation provided by the present invention is as follows: Figure 5 As shown, the following steps are included: Step S1: Given the αβ axis reference voltage U alfa 、U beta,According to the space vector synthesis principle of three-level inverter, the action time Ta, Tb, and Tc of three adjacent basic vectors are calculated.

[0054] Step S1.1: Based on the αβ axis reference voltage U alfa 、U beta Perform large sector division, such as Figure 3 As shown, the first large sector, the second large sector, the third large sector, the fourth large sector, the fifth large sector and the sixth large sector are obtained.

[0055] Step S1.2: Based on the αβ axis reference voltage U alfa 、U beta The small sectors are divided, and the small sectors are divided by taking the I-th large sector as an example to obtain the I_a-th small sector, the I_b-th small sector, the I_c-th small sector, the I_d-th small sector, the I_e-th small sector and the I_f-th small sector.

[0056] Step S1.3: According to the αβ axis reference voltage U alfa 、U beta The reference voltage vector of the small sector is synthesized by the three nearest basic voltage vectors. The basic vectors selected for each small sector are: The I_ath small sector: OON / PPO-OOO / PPP / NNN-POO / ONN; I_b small sector: OON / PPO-OOO / PPP / NNN-POO / ONN; Small sector I_c: OON-PON-POO-PPO; The 1_dth small sector: ONN-OON-PON-POO; The first small sector: OON-PON-PPN-PPO; The I_fth small sector: ONN-PNN-PON-POO.

[0057] Step S1.4: According to the αβ axis reference voltage U alfa 、U beta The value and the sector where the reference voltage vector is located are used to calculate the action time of the basic voltage vector using the space vector equivalence principle. The action time is recorded as T a 、T b 、T c .

[0058] Step S2: According to the αβ axis reference voltage U alfa 、U beta The sector in which the vector is located, the three selected basic vectors and their action time, determine the order and time distribution of the basic vector action.

[0059] The order and time distribution of basic vector action are as follows: Small sector I_a: NNN( T b )-ONN( T a )-OON( T c )-OOO( T b )-POO( T a )-PPO( T c )-PPP( T b )-PPO( T c )-POO( T a )-OOO( T b )-OON( T c )-ONN( T a )-NNN( T b ); The first small sector: NNN( T b )-ONN( T a )-OON( T c )-OOO( T b )-POO( T a )-PPO( T c )-PPP( T b )-PPO( T c )-POO( T a )-OOO( T b )-OON( T c )-ONN( T a )-NNN( T b ); Small sector I_c: OON( T c )-PON( Tb )-POO( T a )-PPO( T c )-POO( T a )-PON( T b )-OON( T c ); The I_dth minor sector: ONN( T a )-OON( T c )-PON( T b )-POO( T a )-PON( T b )-OON( T c )-ONN( T a ); The I_eth minor sector: OON( T c )-PON( T b )-PPN( T a )-PPO( T c )-PPN( T a )-PON( T b )-OON( T c ); The I_fth minor sector: ONN( T a )-PNN( T b )-PON( T c )-POO( T a )-PON( T c )-PNN( T b )-ONN( T a )。

[0060] Step S3: To maintain the stability of the busbar midpoint potential, the busbar capacitor midpoint potential is balanced by fine-tuning the time distribution of the redundant small vectors.

[0061] The busbar midpoint potential balance control is achieved by fine-tuning the time of the redundant small vector. The busbar midpoint potential balance control fine-tuning amount is recorded as vm , the basic vector action sequence and time distribution after fine-tuning are as follows: Small sector I_a: NNN( T b )-ONN( T a )-OON( T c )-OOO( T b )-POO( T a )-PPO( T c )-PPP( T b )-PPO( T c )-POO( T a )-OOO( T b )-OON( T c )-ONN( T a )-NNN( T b ); Small sector I_b: NNN( T b )-ONN( T a )-OON( T c )-OOO( T b )-POO( T a )-PPO( T c )-PPP( T b )-PPO( T c )-POO( T a )-OOO( T b )-OON( T c )-ONN( Ta )-NNN( T b ); Sector I_c: OON( T c )-PON( T b )-POO( T a )-PPO( vm T c )-POO( T a )-PON( T b )-OON( T c ); Sector I_d: ONN( T a )-OON( T c )-PON( T b )-POO((1- vm )T a )-PON( T b )-OON( T c )-ONN( T a ); Sector I_e: OON( T c )-PON( T b )-PPN( T a )-PPO( vm T c )-PPN( T a )-PON( T b )-OON( T c ); Sector I_f: ONN( T a )-PNN( T b )-PON( T c )-POO((1- vm )T a )-PON( T c )-PNN( T b )-ONN( T a ).

[0062] Step S4: After comparing the finally generated modulation wave with the corresponding triangular carrier wave, the final PWM pulse is output to drive the three-level active neutral point clamped inverter.

[0063] After coordinate transformation, the basic voltage vector action time when the reference voltage vector is located in other large sectors is calculated. The three-phase modulation wave of the active neutral point clamped three-level inverter is recorded as U refaT1 、U refaT3 、U refaT5 ;U refbT1 、U refbT3 、U refbT5 ;U refcT1 、U refcT3 、U refcT5 , respectively, are the comparison values ​​of the A-phase bridge arm T1 and T2 tubes, the comparison values ​​of the A-phase bridge arm T3 and T4 tubes, the comparison values ​​of the A-phase bridge arm T5 and T6 tubes; the comparison values ​​of the B-phase bridge arm T1 and T2 tubes, the comparison values ​​of the B-phase bridge arm T3 and T4 tubes, the comparison values ​​of the B-phase bridge arm T5 and T6 tubes; the comparison values ​​of the C-phase bridge arm T1 and T2 tubes, the comparison values ​​of the C-phase bridge arm T3 and T4 tubes, the comparison values ​​of the C-phase bridge arm T5 and T6 tubes.

[0064] The PWM wave generation method of the active neutral point clamped three-level inverter is proposed. The triangular carrier used by the active neutral point clamped three-level inverter is denoted as C. The three-phase modulation wave U refaT1 、U refaT3 、U refaT5 ;U refbT1 、U refbT3 、U refbT5 ;U refcT1 、U refcT3 、U refcT5 Compared with the carrier C, when the modulated wave is greater than the carrier, the upper tube is turned on and the lower tube is turned off; when the modulated wave is less than the carrier, the upper tube is turned off and the lower tube is turned on.

[0065] Figure 6 Schematic diagram of the relationship between the modulation waves of T1, T3, and T5 tubes and the triangular carrier generated by space vector modulation of the active neutral point clamped three-level inverter considering the minimum pulse width limitation provided by the present invention. Figure 7This diagram shows the relationship between the modulation waves for the T1, T3, and T5 transistors and the triangular carrier wave generated by conventional space vector modulation (SVM) provided by the present invention. Specifically, the present invention provides a SVM method for a three-level inverter that takes into account minimum pulse width constraints. When the modulation ratio is low, the zero vector OOO lasts longer, while the small vector lasts shorter. By increasing the duration of PPP and NNN zero voltage vectors in zero vector selection, the on-time of the power devices is increased, avoiding the minimum pulse width on-time of the power devices. This implements a SVM strategy for a three-level inverter that takes into account minimum pulse width constraints. The SVM method for a three-level inverter disclosed in the present invention has the advantages of low algorithm complexity, ease of implementation, and ease of digital realization.

[0066] In order to better implement the space vector modulation method of the three-level inverter in the embodiment of the present invention, based on the space vector modulation method of the three-level inverter, correspondingly, Figure 8 As shown, an embodiment of the present invention further provides a space vector modulation device for a three-level inverter. The space vector modulation device 800 for a three-level inverter includes: A first determining module 810 is configured to determine, based on an area where a reference voltage vector of the three-level inverter is located in a space voltage vector coordinate system, a basic voltage vector for synthesizing the reference voltage vector and an action time of the basic voltage vector; wherein the zero vector in the basic voltage vector includes OOO, PPP, and NNN; A second determining module 820 is configured to determine an action sequence and time distribution of the basic voltage vectors based on the action time of the basic voltage vectors; An adjustment module 830 is configured to adjust the action time of the redundant small vectors in the basic voltage vector based on the busbar midpoint potential balance control fine-tuning amount, and obtain an action sequence and time distribution of the adjusted basic voltage vector; The driving module 840 is used to compare the generated three-phase modulated waves with the triangular carrier respectively, and output PWM pulses based on the comparison results to drive the three-level inverter to produce corresponding switching states; the three-phase modulated waves are generated based on the action sequence and time distribution of the adjusted basic voltage vectors.

[0067] The space vector modulation device 800 for a three-level inverter provided in the above embodiment can implement the technical solution described in the above embodiment of the space vector modulation method for a three-level inverter. The specific implementation principles of the above modules or units can be found in the corresponding contents of the above embodiment of the space vector modulation method for a three-level inverter, and will not be repeated here.

[0068] like Figure 9 As shown, the present invention also provides an electronic device 900. The electronic device 900 includes a processor 901, a memory 902 and a display 903. Figure 9 Only some of the components of the electronic device 900 are shown, but it should be understood that implementation of all of the shown components is not required, and more or fewer components may be implemented instead.

[0069] In some embodiments, the processor 901 may be a central processing unit (CPU), a microprocessor, or other data processing chip, configured to execute program codes stored in the memory 902 or process data, such as the space vector modulation method for a three-level inverter in the present invention.

[0070] In some embodiments, the processor 901 may be a single server or a server group. The server group may be centralized or distributed. In some embodiments, the processor 901 may be local or remote. In some embodiments, the processor 901 may be implemented on a cloud platform. In some embodiments, the cloud platform may include a private cloud, a public cloud, a hybrid cloud, a community cloud, a distributed cloud, an internal cloud, multiple clouds, or any combination thereof.

[0071] In some embodiments, the memory 902 may be an internal storage unit of the electronic device 900, such as a hard disk or memory of the electronic device 900. In other embodiments, the memory 902 may also be an external storage device of the electronic device 900, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the electronic device 900.

[0072] Furthermore, the memory 902 may include both an internal storage unit of the electronic device 900 and an external storage device. The memory 902 is used to store application software installed in the electronic device 900 and various data.

[0073] In some embodiments, the display 903 can be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, or an organic light-emitting diode (OLED) touchscreen. The display 903 is used to display information on the electronic device 900 and to display a visual user interface. Components 901-903 of the electronic device 900 communicate with each other via a system bus.

[0074] In one embodiment, when the processor 901 executes the space vector modulation program of the three-level inverter in the memory 902, the following steps may be implemented: Determining, based on an area where a reference voltage vector of the three-level inverter is located in a space voltage vector coordinate system, a basic voltage vector for synthesizing the reference voltage vector and an action time of the basic voltage vector; wherein the zero vector in the basic voltage vector includes OOO, PPP, and NNN; determining an action sequence and time distribution of the basic voltage vectors based on the action time of the basic voltage vectors; Based on the busbar midpoint potential balance control fine-tuning amount, adjusting the action time of the redundant small vectors in the basic voltage vector to obtain the action sequence and time distribution of the adjusted basic voltage vector; The generated three-phase modulation waves are compared with the triangular carrier respectively, and PWM pulses are output based on the comparison results to drive the three-level inverter to generate corresponding switching states; the three-phase modulation waves are generated based on the action sequence and time distribution of the adjusted basic voltage vectors.

[0075] It should be understood that, when executing the space vector modulation program for the three-level inverter in the memory 902 , the processor 901 may implement other functions in addition to the above functions. For details, please refer to the description of the corresponding method embodiment above.

[0076] Furthermore, the embodiment of the present invention does not specifically limit the type of the electronic device 900 mentioned. The electronic device 900 may be a portable electronic device such as a mobile phone, a tablet computer, a personal digital assistant (PDA), a wearable device, a laptop computer, or the like. Exemplary embodiments of portable electronic devices include, but are not limited to, portable electronic devices equipped with IOS, Android, Microsoft, or other operating systems. The above-mentioned portable electronic devices may also be other portable electronic devices, such as a laptop computer with a touch-sensitive surface (e.g., a touch panel). It should also be understood that in some other embodiments of the present invention, the electronic device 900 may not be a portable electronic device, but a desktop computer with a touch-sensitive surface (e.g., a touch panel).

[0077] Accordingly, an embodiment of the present invention further provides a computer-readable storage medium, which is used to store computer-readable programs or instructions. When the program or instructions are executed by a processor, the steps or functions of the space vector modulation method of the three-level inverter provided in the above-mentioned method embodiments can be implemented.

[0078] Those skilled in the art will appreciate that all or part of the process flow of the above-described method embodiment can be implemented by instructing related hardware (such as a processor, controller, etc.) through a computer program, and the computer program can be stored in a computer-readable storage medium. The computer-readable storage medium may be a magnetic disk, an optical disk, a read-only memory, or a random access memory.

[0079] The above describes in detail the space vector modulation method, device, and storage medium for the three-level inverter provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only intended to help understand the method and core concept of the present invention. At the same time, for those skilled in the art, according to the concept of the present invention, there may be changes in the specific implementation methods and application scopes. In summary, the contents of this specification should not be understood as limiting the present invention.

Claims

1. A space vector modulation method for a three-level inverter, characterized in that: include: determining, based on an area where a reference voltage vector of the three-level inverter is located in a space voltage vector coordinate system, a basic voltage vector for synthesizing the reference voltage vector and an action time of the basic voltage vector; The zero vectors in the basic voltage vectors include OOO, PPP and NNN; determining an action sequence and time distribution of the basic voltage vectors based on the action time of the basic voltage vectors; Based on the busbar midpoint potential balance control fine-tuning amount, adjusting the action time of the redundant small vectors in the basic voltage vector to obtain the action sequence and time distribution of the adjusted basic voltage vector; The generated three-phase modulation waves are compared with the triangular carrier respectively, and PWM pulses are output based on the comparison results to drive the three-level inverter to generate corresponding switching states; the three-phase modulation waves are generated based on the action sequence and time distribution of the adjusted basic voltage vectors.

2. The space vector modulation method for a three-level inverter according to claim 1, wherein: The method further comprises: determining a region where a reference voltage vector of the three-level inverter is located on a space voltage vector coordinate system, and determining a basic voltage vector for synthesizing the reference voltage vector and an action time of the basic voltage vector. The space voltage vector coordinate system is divided into 6 large sectors, and each large sector is divided into 6 small sectors in turn, resulting in 36 small sectors; Based on the coordinates of the reference voltage vector in the space voltage vector coordinate system, obtaining the small sector where the reference voltage vector is located in the space voltage vector coordinate system; Determining the basic voltage vector based on the small sector where the reference voltage vector is located in the space voltage vector coordinate system; The action time of the basic voltage vector is determined by using the space vector equivalence principle.

3. The space vector modulation method for a three-level inverter according to claim 2, wherein: The six major sectors are as follows: The first large sector: U beta >0 and U beta - U alfa <0; II Ogi Ward: U beta >0 and U beta - U alfa >0 and U beta + U alfa >0; Sector III: U beta >0 and U beta + U alfa <0; IV Large Sector: U beta <0 and U beta - U alfa >0; V Oogi Ward: U beta <0AndU beta - U alfa <0AndU beta + U alfa <0; Sector VI: U beta <0 and U beta + U alfa >0; U alfa 、U beta They are the spatial voltage vector coordinate system α Axis coordinates, β axis coordinates; The six small sectors obtained by dividing the first large sector are as follows: No. I_a Koogi Ward: 1-U beta - U alfa >0 and U beta -U alfa >0; No. I_b Koogi Ward: 1-U beta - U alfa >0 and U beta -U alfa <0; No. I_c Koogi Ward: 1-U beta - U alfa >0 and U beta - U alfa +1>0 and 0.5-U beta >0 and U beta -U alfa >0; No. I_d Koogi Ward: 1-U beta - U alfa <0AndU beta - U alfa +1>0 and 0.5-U beta >0 and U beta -U alfa <0; Small sector I_e: 0.5-U beta <0; The first small sector: U beta - U alfa +1<0; The basic voltage vectors of the six small sectors obtained by dividing the first large sector are as follows: The I_ath small sector: OON / PPO-OOO / PPP / NNN-POO / ONN; I_b small sector: OON / PPO-OOO / PPP / NNN-POO / ONN; Small sector I_c: OON-PON-POO-PPO; The 1_dth small sector: ONN-OON-PON-POO; The first small sector: OON-PON-PPN-PPO; The first small sector: ONN-PNN-PON-POO; The action time T of the basic voltage vector of the six small sectors obtained by dividing the first large sector a 、T b 、T c They are as follows: No. I_a Small Ogi Ward: T a =2U beta , T b =1- U alfa -U beta , T c = U alfa -U beta ; No. I_b Koogi Ward: T a =2U beta , T b =1- U alfa -U beta , T c = U alfa -U beta ; Small sector I_c: T a =1- U alfa +U beta 、T b = U alfa +U beta 、T c =1-2U beta ; The I_dth small sector: T a =1-2U beta 、T b =1- U alfa +U beta 、T c = U alfa +U beta ; No. I_e Koogi Ward: T a =2- U alfa -U beta , T b = U alfa -U beta , T c =2U beta -1; No. I_f Koogi Ward: T a =2- U alfa -U beta , T b = U alfa -U beta -1, T c =2U beta .

4. The space vector modulation method for a three-level inverter according to claim 3, characterized in that: The action sequence and time distribution of the basic voltage vectors of the six small sectors obtained by dividing the first large sector are as follows: Sector I_a: NNN( T b )-ONN( T a )-OON( T c )-OOO( T b )-POO( T a )-PPO( T c )-PPP( T b )-PPO( T c )-POO( T a )-OOO( T b )-OON( T c )-ONN( T a )-NNN( T b ); The I_bth minor sector: NNN( T b )-ONN( T a )-OON( T c )-OOO( T b )-POO( T a )-PPO( T c )-PPP( T b )-PPO( T c )-POO( T a )-OOO( T b )-OON( T c )-ONN( T a )-NNN( T b ) The I_c-th minor sector: OON( T c )-PON( T b )-POO( T a )-PPO( T c )-POO( T a )-PON( T b )-OON( T c ) The I_d-th smallest sector: ONN( T a )-OON( T c )-PON( T b )-POO( T a )-PON( T b )-OON( T c )-ONN( T a ) The I_e-th smallest sector: OON( T c )-PON( T b )-PPN( T a )-PPO( T c )-PPN( T a )-PON( T b )-OON( T c ) The first small sector: ONN( T a )-PNN( T b )-PON( T c )-POO( T a )-PON( T c )-PNN( T b )-ONN( T a ).

5. The space vector modulation method for a three-level inverter according to claim 4, characterized in that: The action sequence and time distribution of the basic voltage vectors of the six small sectors corresponding to the adjusted first large sector are as follows: The I_a minor sector: NNN( T b )-ONN( T a )-OON( T c )-OOO( T b )-POO( T a )-PPO( T c )-PPP( T b )-PPO( T c )-POO( T a )-OOO( T b )-OON( T c )-ONN( T a )-NNN( T b ); The I_bth minor sector: NNN( T b )-ONN( T a )-OON( T c )-OOO( T b )-POO( T a )-PPO( T c )-PPP( T b )-PPO( T c )-POO( T a )-OOO( T b )-OON( T c )-ONN( T a )-NNN( T b ); The I_c-th smallest sector: OON( T c )-PON( T b )-POO( T a )-PPO( vm T c )-POO( T a )-PON( T b )-OON( T c ) The I_d-th minor sector: ONN( T a ) - OON( T c ) - PON( T b ) - POO((1 - vm )T a ) - PON( T b ) - OON( T c ) - ONN( T a ) The I_e-th smallest sector: OON( T c )-PON( T b )-PPN( T a )-PPO( vm T c )-PPN( T a )-PON( T b )-OON( T c ) The first small sector: ONN( T a )-PNN( T b )-PON( T c )-POO((1- vm )T a )-PON( T c )-PNN( T b )-ONN( T a ); Indicates the fine-tuning amount of busbar midpoint potential balance control.

6. The space vector modulation method for a three-level inverter according to claim 1, characterized in that: Each phase bridge arm of the three-level inverter includes 6 power switch tubes; Wherein, the first power switch tube, the fifth power switch tube, the sixth power switch tube and the fourth power switch tube are connected in series in sequence; A combination of the second power switch tube and the third power switch tube connected in series is connected in parallel with a combination of the fifth power switch tube and the sixth power switch tube connected in series; The method of comparing the generated three-phase modulation wave with the triangular carrier wave respectively and outputting PWM pulses based on the comparison results to drive the three-level inverter to generate corresponding switching states includes: When the three-phase modulation wave is greater than the triangular carrier wave, the output PWM pulse drives the upper power switch tube to turn on and controls the lower power switch tube to turn off.

7. The space vector modulation method for a three-level inverter according to claim 6, characterized in that: The method of comparing the generated three-phase modulation wave with the triangular carrier wave respectively and outputting PWM pulses based on the comparison results to drive the three-level inverter to generate corresponding switching states includes: When the three-phase modulation wave is smaller than the triangular carrier wave, the output PWM pulse drives the upper power switch tube to turn off and controls the lower power switch tube to turn on.

8. A space vector modulation device for a three-level inverter, characterized in that: include: a first determining module, configured to determine, based on an area where a reference voltage vector of the three-level inverter is located in a space voltage vector coordinate system, a basic voltage vector for synthesizing the reference voltage vector and an action time of the basic voltage vector; The zero vectors in the basic voltage vectors include OOO, PPP and NNN; a second determining module, configured to determine an action sequence and time distribution of the basic voltage vectors based on an action time of the basic voltage vectors; An adjustment module is configured to adjust the action time of the redundant small vectors in the basic voltage vector based on the busbar midpoint potential balance control fine-tuning amount, and obtain the action sequence and time distribution of the adjusted basic voltage vector; A driving module is used to compare the generated three-phase modulated waves with the triangular carrier respectively, and output PWM pulses based on the comparison results to drive the three-level inverter to produce corresponding switching states; the three-phase modulated waves are generated based on the action sequence and time distribution of the adjusted basic voltage vectors.

9. An electronic device, characterized in that: comprising a memory and a processor, wherein, The memory is used to store programs; The processor is coupled to the memory and is configured to execute the program stored in the memory to implement the steps of the space vector modulation method for a three-level inverter according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that Used to store computer-readable programs or instructions, which, when executed by a processor, can implement the steps of the space vector modulation method for a three-level inverter according to any one of claims 1 to 7.