Three-phase four-wire converter, power supply system and voltage control method

Abstract

The invention discloses a three-phase four-wire converter, a power supply system and a voltage control method, and a control unit responds to the condition that the instantaneous voltage of a capacitor midpoint is greater than a second voltage threshold value, and controls a balance bridge arm, so that the current part flowing into an inductor is greater than the current part flowing into a second bus capacitor in the total current flowing into the capacitor midpoint. And the control unit further controls the balance bridge arm according to the voltage peak-to-peak value of the capacitor midpoint and the first voltage threshold in response to the situation that the instantaneous voltage of the capacitor midpoint is not greater than the second voltage threshold, so that the total current flowing into the capacitor midpoint is distributed in the current part flowing into the second bus capacitor and the current part flowing into the inductor. According to the arrangement, the magnitude of the first bus capacitor and the magnitude of the second bus capacitor do not need to be increased additionally, the balance bridge arm is controlled, and the distribution proportion of the total current distributed in the current part flowing into the second bus capacitor and the current part flowing into the inductor is adjusted, so that the output voltage waveform and the system loss are taken into consideration.

Description

Technical Field

[0001] The present application relates to the field of power electronics technology, and in particular to a three-phase four-wire converter, a power supply system, and a voltage control method. Background Art

[0002] Distributed power generation (DG) is a decentralized, efficient, and renewable power generation method. It has garnered widespread attention due to its advantages, including improving energy utilization, promoting the development of renewable energy, enhancing power supply reliability, reducing transmission and distribution costs, and meeting the needs of specialized locations. Existing DG systems are primarily used in low-voltage distribution networks, which contain a large number of unbalanced and nonlinear loads. To improve power quality and reliability, three-phase, four-wire converters are typically used as power conversion devices.

[0003] Currently, common three-phase, four-wire converter topologies include split-bus, four-leg, and active split topologies. In the split-bus topology, two bus capacitors are connected in series between the positive and negative DC busbars, with the neutral line directly connected to the midpoint of the two bus capacitors. This prevents the injection of zero-sequence voltage components during modulation, requiring only the most basic sinusoidal pulse width modulation (SPWM) method. This results in low DC voltage utilization and large voltage fluctuations at the capacitor midpoint, necessitating the use of bulky, high-capacitance bus capacitors, resulting in poor cost-effectiveness and reliability. In the four-leg topology, the balancing arm output is directly connected to the load neutral line, requiring numerous active components and resulting in relatively complex topology, control, and modulation. The active split topology can be seen as a combination of the split-bus and four-leg topologies. In this topology, the balancing arm is completely decoupled from the three arms of the inverter unit and can be independently controlled. The balancing arm's primary function is to suppress bus voltage fluctuations, thereby reducing the size of the bus capacitors and improving the converter's power density and cost-effectiveness. However, existing control schemes fail to strike a balance between busbar capacitor size, balancing bridge arm losses, and output voltage waveform quality. Therefore, while maintaining a constant busbar capacitor size (maintaining the midpoint voltage oscillation amplitude) and maintaining high output voltage waveform quality, further reducing balancing bridge arm losses is an urgent challenge. Summary of the Invention

[0004] The present application provides a three-phase four-wire converter, a power supply system and a voltage control method, which are used to reduce the loss of the balancing bridge arm while ensuring that the bus capacitor volume does not increase and the output voltage waveform quality is maintained.

[0005] In a first aspect, an embodiment of the present application provides a three-phase four-wire converter, comprising: a balancing bridge unit, an inverter unit, and a control unit, wherein the input end of the inverter unit is connected to a positive DC bus and a negative DC bus, the output end of the inverter unit is used to connect to a load, and the inverter unit is used to convert the DC power on the positive DC bus and the negative DC bus into AC power for output. Furthermore, the balancing bridge unit comprises a balancing bridge arm, a first bus capacitor, a second bus capacitor, and an inductor; the balancing bridge arm is connected between the positive DC bus and the negative DC bus, the first end of the first bus capacitor is connected to the positive DC bus, the second end of the first bus capacitor and the first end of the second bus capacitor are mutually connected at a capacitor midpoint, the second end of the second bus capacitor is connected to the negative DC bus, and the inductor is connected between the midpoint of the balancing bridge arm and the midpoint of the capacitor; the midpoint of the capacitor is connected to the first end of the neutral line, and the second end of the neutral line is used to connect to the load.

[0006] Furthermore, the control unit can control the balancing bridge arm in response to the instantaneous voltage at the midpoint of the capacitor being greater than the second voltage threshold, so that the current portion flowing into the inductor of the total current flowing into the midpoint of the capacitor is greater than the current portion flowing into the second bus capacitor. With this arrangement, it is possible to adaptively distribute the total current between the inductor branch and the bus capacitor branch by controlling the balancing bridge arm without additionally increasing the size of the first bus capacitor and the second bus capacitor, so that most of the total current flows preferentially into the bridge arm inductor branch, promptly reducing the voltage fluctuation at the midpoint of the capacitor and ensuring the quality of the output voltage waveform. In addition, since the instantaneous voltage at the midpoint of the capacitor is greater than the second voltage threshold, indicating that the instantaneous voltage fluctuation is large, it is possible to give priority to reducing the voltage fluctuation at the midpoint of the capacitor to control the operation of the balancing bridge arm, i.e., system loss is not given priority at this time.

[0007] Furthermore, the control unit can also control the balancing bridge arm in response to the instantaneous voltage at the midpoint of the capacitor being no greater than the second voltage threshold, based on the peak-to-peak voltage at the midpoint of the capacitor and the first voltage threshold, so that the total current flowing into the midpoint of the capacitor is distributed between the current portion flowing into the second bus capacitor and the current portion flowing into the inductor, and the first voltage threshold is less than the second voltage threshold. With this arrangement, the voltage fluctuation at the midpoint of the capacitor can be maintained at the first voltage threshold V by controlling the balancing bridge arm without additionally increasing the size of the first bus capacitor and the second bus capacitor. th1 Therefore, by adjusting the distribution ratio of the total current between the current part flowing into the second bus capacitor and the current part flowing into the inductor, the voltage fluctuation at the midpoint of the capacitor can be kept within the maximum allowable capacitor ripple, and the loss of the balancing bridge arm can be reduced, thereby achieving a balance between the output voltage waveform and the system loss.

[0008] In some embodiments, when the peak-to-peak voltage at the capacitor midpoint is greater than a first voltage threshold, the control unit can control the upper and lower switches of the balancing bridge arm to alternately conduct, causing a portion of the total current to flow into the second bus capacitor and another portion to flow into the inductor. This configuration distributes the total current between the second bus capacitor and the inductor, reducing fluctuations at the capacitor midpoint, ensuring the waveform quality of the output voltage, and avoiding increased losses in the balancing bridge arm, thereby achieving a balance between the voltage at the capacitor midpoint and system losses.

[0009] In some embodiments, when the peak-to-peak voltage at the capacitor midpoint is no greater than a first voltage threshold, the control unit can turn off both the upper and lower switches of the balancing bridge arm, allowing the total current to flow entirely into the second bus capacitor. This configuration prevents current from flowing into the inductor, reduces losses, and improves system efficiency.

[0010] In some embodiments, when the instantaneous voltage at the capacitor midpoint is not greater than the second voltage threshold, the proportion of the current flowing into the second bus capacitor in the total current can be controlled based on the difference between the peak-to-peak value of the voltage at the capacitor midpoint and the first voltage threshold. For example, the value obtained by integrating the difference between the peak-to-peak value of the voltage at the capacitor midpoint and the first voltage threshold is used as the proportion of the current flowing into the second bus capacitor in the total current.

[0011] In some embodiments, when the instantaneous voltage at the capacitor midpoint is no greater than a second voltage threshold, the proportion of the current flowing into the second bus capacitor in the total current is set to a first capacitance allocation ratio, and the proportion of the current flowing into the inductor in the total current is set to a first inductance allocation ratio. During actual operation of the three-phase four-wire converter, the sum of the first capacitance allocation ratio and the first inductance allocation ratio is 1.

[0012] In some embodiments, when the instantaneous voltage at the capacitor midpoint is greater than a second voltage threshold, the portion of the current flowing into the second bus capacitor in the total current is equal to the second capacitance allocation ratio, and the second capacitance allocation ratio is smaller than the first capacitance allocation ratio. Based on this, the loss incurred when the instantaneous voltage at the capacitor midpoint is no greater than the second voltage threshold and the loss incurred when the instantaneous voltage at the capacitor midpoint is greater than the second voltage threshold can be reduced.

[0013] In some embodiments, the second capacitance allocation ratio is a constant value, which reduces calculation time.

[0014] In some embodiments, when the instantaneous voltage at the midpoint of the capacitor is greater than the second voltage threshold, the portion of the current flowing into the inductor accounts for a second inductance allocation ratio in the total current, and when the three-phase four-wire converter is actually operating, the sum of the second capacitor allocation ratio and the second inductance allocation ratio is 1.

[0015] In some embodiments, when the instantaneous voltage at the midpoint of the capacitor is not greater than a second voltage threshold, and the peak-to-peak value of the voltage at the midpoint of the capacitor is greater than a first voltage threshold, the upper and lower switches in the balancing bridge arm are controlled to alternately turn on, and the duty cycle of the switching signal of the upper switch is a first duty cycle, thereby changing the operating state of the balancing bridge arm to the first operating state. Furthermore, when the instantaneous voltage at the midpoint of the capacitor is greater than a second voltage threshold, the upper and lower switches in the balancing bridge arm are controlled to alternately turn on, and the duty cycle of the switching signal of the upper switch is a second duty cycle, thereby changing the operating state of the balancing bridge arm to the second operating state. The first duty cycle and the second duty cycle can be set to be different, thereby changing the first operating state of the balancing bridge arm to the second operating state.

[0016] In some embodiments, in order to enable the total current to be distributed between the second bus capacitor branch and the bridge arm inductor branch, when the balanced bridge arm is working, the impedance of the equivalent circuit of the balanced bridge arm and the inductor can satisfy the following relationship: when the balanced bridge arm is working, the impedance of the equivalent circuit of the balanced bridge arm and the inductor is capacitive at the fundamental frequency and the triple frequency, the phase angle when the impedance of the equivalent circuit is capacitive is the same as the phase angle of the second bus capacitor, the impedance amplitude of the equivalent circuit at the fundamental frequency and the triple frequency is three times the relationship, and the impedance amplitude of the equivalent circuit at the DC component is not greater than the impedance amplitude threshold.

[0017] In a second aspect, an embodiment of the present application further provides a power supply system comprising a photovoltaic module, a DC-DC converter, and a three-phase four-wire converter; wherein the input of the DC-DC converter is connected to the photovoltaic module, the output of the DC-DC converter is connected to the positive DC bus and the negative DC bus, the input of the three-phase four-wire converter is connected to the positive DC bus and the negative DC bus, and the output of the three-phase four-wire converter is used to connect to a load. Furthermore, the DC-DC converter is used to convert the DC power input by the photovoltaic module and output it to the positive DC bus and the negative DC bus, and the three-phase four-wire converter is used to convert the DC power on the positive DC bus and the negative DC bus into AC power and output it to the load. Furthermore, the three-phase four-wire converter is the three-phase four-wire converter described in the first aspect or any possible implementation of the first aspect.

[0018] In the third aspect, an embodiment of the present application also provides a voltage control method for the midpoint of a capacitor, which is applied to a three-phase four-wire converter. The three-phase four-wire converter includes: a balancing bridge unit and an inverter unit; the input end of the inverter unit is connected to the positive DC bus and the negative DC bus, the output end of the inverter unit is used to connect the load, and the inverter unit is used to convert the DC power on the positive DC bus and the negative DC bus into AC power and then output it; the balancing bridge unit includes a balancing bridge arm, a first bus capacitor, a second bus capacitor and an inductor; the balancing bridge arm is connected between the positive DC bus and the negative DC bus, the first bus capacitor is connected between the positive DC bus and the midpoint of the capacitor, the second bus capacitor is connected between the negative DC bus and the midpoint of the capacitor, and the inductor is connected between the midpoint of the bridge arm of the balancing bridge arm and the midpoint of the capacitor; the midpoint of the capacitor is connected to the first end of the neutral line, and the second end of the neutral line is used to connect the load.

[0019] Furthermore, the method includes:

[0020] In response to the instantaneous voltage at the midpoint of the capacitor being greater than a second voltage threshold, controlling the balancing bridge arm so that, of the total current flowing into the midpoint of the capacitor, the portion of the current flowing into the inductor is greater than the portion of the current flowing into the second bus capacitor;

[0021] In response to the instantaneous voltage at the midpoint of the capacitor being no greater than the second voltage threshold, the balancing bridge arm is controlled based on the peak-to-peak value of the voltage at the midpoint of the capacitor and the first voltage threshold so that the total current flowing into the midpoint of the capacitor is distributed between the current portion flowing into the second bus capacitor and the current portion flowing into the inductor, and the first voltage threshold is less than the second voltage threshold.

[0022] In some embodiments, when the peak-to-peak value of the voltage at the midpoint of the capacitor is greater than the first voltage threshold, the balancing bridge arm is controlled based on the peak-to-peak value of the voltage at the midpoint of the capacitor and the first voltage threshold, so that the total current flowing into the midpoint of the capacitor is distributed between the current portion flowing into the second bus capacitor and the current portion flowing into the inductor, including but not limited to the following process: controlling the upper bridge arm switch and the lower bridge arm switch of the balancing bridge arm to alternately turn on, so that part of the total current flows into the second bus capacitor and the other part flows into the inductor. With this arrangement, the total current can be distributed between the second bus capacitor and the inductor, reducing the fluctuation of the capacitor midpoint, ensuring the waveform quality of the output voltage, and avoiding the increase in the loss of the balancing bridge arm, thereby achieving a balance between the voltage at the midpoint of the capacitor and the system loss.

[0023] In some embodiments, when the peak-to-peak voltage at the capacitor midpoint is no greater than a first voltage threshold, the balancing bridge arm is controlled based on the peak-to-peak voltage at the capacitor midpoint and the first voltage threshold so that the total current flowing into the capacitor midpoint is divided between the current portion flowing into the second bus capacitor and the current portion flowing into the inductor, including but not limited to the following process: controlling both the upper and lower bridge arm switches of the balancing bridge arm to be turned off so that the total current flows entirely into the second bus capacitor. This configuration can prevent current from flowing into the inductor, reduce losses, and improve system efficiency.

[0024] In addition, the technical effects of the corresponding schemes in the second and third aspects can refer to the technical effects that can be obtained by the corresponding scheme in the first aspect, and the repeated parts will not be described in detail. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 A schematic diagram of an application scenario of a photovoltaic system provided in an embodiment of the present application;

[0026] Figure 2 A circuit diagram of a three-phase four-wire converter provided in an embodiment of the present application;

[0027] Figure 3 This is a schematic diagram of an equivalent circuit of a balanced bridge circuit provided in an embodiment of the present application;

[0028] Figure 4 A control block diagram for controlling the operation of a balancing bridge arm provided in an embodiment of the present application. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings. The specific operating methods in the method embodiments can also be applied to device embodiments or system embodiments. It should be noted that in the description of the present application, "multiple" can be understood as "at least two". In addition, it should be understood that in the description of the present application, words such as "first" and "second" are only used to distinguish the purpose of description, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying order.

[0030] It should be noted that the same reference numerals in the drawings of this application represent the same or similar structures, and thus their repeated description will be omitted. The words expressing positions and directions described in this application are all explained using the drawings as examples, but they can be modified as needed, and such modifications are included in the scope of protection of this application. The drawings of this application are only for illustrative purposes and do not represent true proportions.

[0031] The switch in the embodiment of the present application may be one or more of various types of switching devices such as a relay, a metal oxide semiconductor field effect transistor (MOSFET), a bipolar junction transistor (BJT), an insulated gate bipolar transistor (IGBT), a silicon carbide (SiC) MOSFET, etc., which are not listed one by one in the embodiment of the present application. In addition, each switch may include a first electrode, a second electrode and a control electrode, wherein the control electrode is used to control the closing or opening of the switch. When the switch is closed, current can be transmitted between the first electrode and the second electrode of the switch. When the switch is open, current cannot be transmitted between the first electrode and the second electrode of the switch. Taking MOSFET as an example, the control electrode of the switch is the gate, the first electrode of the switch may be the source, the second electrode may be the drain, or the first electrode may be the drain and the second electrode may be the source.

[0032] In order to facilitate the understanding of the technical solutions provided by the embodiments of the present application, the application scenarios of the solutions of the present application are first described below. The three-phase four-wire converter provided by the embodiments of the present application can be applied to power supply systems (such as power supply systems in industry and commerce). The power supply system can be a photovoltaic system based on solar power generation or a wind power supply system based on wind power generation, or it can also be other energy conversion products or power generation products. Among them, the three-phase four-wire converter is suitable for powering base station equipment (such as base station equipment in remote areas with no mains power or poor mains power), or for powering batteries, or for powering various types of electrical equipment such as household appliances (such as refrigerators, air conditioners, etc.) in the power grid. In this application, the application of the three-phase four-wire converter in a photovoltaic system is used as an example for explanation. Of course, in actual applications, the specific implementation of the three-phase four-wire converter can be determined according to the actual application scenario and is not limited here.

[0033] Figure 1 A schematic diagram of an application scenario of a photovoltaic system provided in an embodiment of the present application. Figure 1The photovoltaic system includes a photovoltaic module 100, an inverter 200, a load 300 (e.g., a household appliance (such as a refrigerator, air conditioner, etc.)), and an energy storage device 400. The inverter 200 may integrate a direct current-direct current (DC-DC) conversion circuit and a direct current-alternating current (DC-AC) conversion circuit. The energy storage device 400 may be connected between the DC-DC conversion circuit and the DC-AC conversion circuit. The electrical energy generated by the photovoltaic module 100 can be converted by the DC-DC conversion circuit to step up or step down to charge the energy storage device 400. The electrical energy generated by the photovoltaic module 100 can also be transmitted to the load 300 through the DC-DC conversion circuit and the DC-AC conversion circuit. Furthermore, when the electrical energy generated by the photovoltaic module 100 is insufficient to power the grid 400 or the load 300, the electrical energy stored in the energy storage device 400 can be transmitted to the load 300 through the DC-AC conversion circuit within the inverter 200. On the other hand, the energy storage device 400 can also receive power from the power grid 400. The AC power output by the power grid 400 is converted into DC power after passing through the DC-AC conversion circuit and transmitted to the energy storage device 400 to charge the energy storage device 400. Based on this, the three-phase four-wire converter in the embodiment of the present application can be used as the above-mentioned DC-AC conversion circuit and applied to photovoltaic systems.

[0034] Figure 2 A circuit diagram of a three-phase four-wire converter provided in an embodiment of the present application. Figure 2The three-phase four-wire converter 10 may include: a balancing bridge unit 12, an inverter unit 11, and a control unit 13. The input end of the inverter unit 11 is connected to the positive DC bus Bus+ and the negative DC bus Bus-, respectively; the output end of the inverter unit 11 is connected to the load; and the balancing bridge unit 12 is connected between the positive DC bus Bus+ and the negative DC bus Bus-. Furthermore, the control unit 13 is connected to the balancing bridge unit 12 and the inverter unit 11, respectively. During operation, the control unit 13 controls the balancing bridge unit 12 to stabilize the bus voltage between the positive DC bus Bus+ and the negative DC bus Bus-. The control unit 13 also controls the inverter unit 11 to convert the bus voltage on the positive DC bus Bus+ and the negative DC bus Bus- into an AC voltage and output it to the load to power the load. Exemplarily, the control unit 13 may be a field programmable gate array (FPGA), a general-purpose central processing unit (CPU), a general-purpose processor, a digital signal processing (DSP), an application-specific integrated circuit (ASIC), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It may implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the disclosure of this application. The control unit 13 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like.

[0035] In general, the inverter unit 11 includes three bridge arms: A bridge arm, B bridge arm, and C bridge arm, wherein the A bridge arm, the B bridge arm, and the C bridge arm can adopt a three-level topology, which includes but is not limited to a T-type three-level, an I-type three-level, etc. For example, referring to Figure 2 The A bridge arm includes switches SA1-SA4, the B bridge arm includes switches SB1-SB4, and the C bridge arm includes switches SC1-SC4. The control unit 13 is connected to the control electrodes of the switches SA1-SA4, the switches SB1-SB4, and the switches SC1-SC4, respectively. By controlling the conduction and cutoff of the switches SA1-SA4, the switches SB1-SB4, and the switches SC1-SC4, the inverter unit 11 converts the DC bus voltage into an AC voltage. It is understood that the process by which the control unit 13 controls the operation of the inverter unit 11 can refer to the control process in the relevant art, and the details are not repeated here. In addition, the process by which the control unit 13 controls the operation of the inverter unit 11 and the process by which the balancing bridge unit 12 is controlled can be decoupled from each other. Therefore, the process by which the control unit 13 controls the operation of the inverter unit 11 and the process by which the balancing bridge unit 12 is controlled do not affect each other.

[0036] It is worth mentioning that, referring to Figure 2 The inverter unit 11 may also include inductors LrA to LrC and capacitors CfA to CfC. Of course, the inverter unit 11 may also include other structures (such as relays, etc.), which are not limited in this application. Moreover, the above is only an example of the specific structure of the inverter unit 11. In specific implementations, the specific structure of the inverter unit 11 is not limited to the above structure provided in the embodiments of this application, and may also be other structures known to those skilled in the art.

[0037] Continue to refer to Figure 2 The balancing bridge unit 12 may include a balancing bridge arm, a first bus capacitor CD1, a second bus capacitor CD2, and an inductor. The balancing bridge arm is connected between the positive DC bus Bus+ and the negative DC bus Bus-, and includes an upper bridge arm switch SN1 and a lower bridge arm switch SN2. The first end of the first bus capacitor CD1 is connected to the positive DC bus Bus+, the second end of the first bus capacitor CD1 and the first end of the second bus capacitor CD2 are mutually connected at a capacitor midpoint ZO, the second end of the second bus capacitor CD2 is connected to the negative DC bus Bus-, and the inductor Ln is connected between the bridge arm midpoint of the balancing bridge arm and the capacitor midpoint ZO. Based on this, the control unit 13 is respectively connected to the control electrodes of the upper bridge arm switch SN1 and the lower bridge arm switch SN2 of the balancing bridge arm. By controlling the conduction and cutoff of the upper bridge arm switch SN1 and the lower bridge arm switch SN2, the balancing bridge unit 12 stabilizes the bus voltage V between the positive DC bus Bus+ and the negative DC bus Bus-. dc . In addition, the midpoint ZO of the capacitor is connected to the first end of the neutral line NL, and the second end of the neutral line NL can be connected to the load 300. In addition, the capacitors CfA to CfC are also connected to the neutral line NL. In addition, the control electrode of the upper arm switch SN1 can receive the switching signal sn1, and the switching signal sn1 is used to control the on and off of the upper arm switch SN1. The control electrode of the lower arm switch SN2 receives the switching signal sn2, and the switching signal sn2 is used to control the on and off of the lower arm switch SN2. The switching signal sn1 and the switching signal sn2 are pulse width modulation (PWM) signals, respectively, and have opposite phases.

[0038] In some solutions of the related art, the balancing bridge arm is always in the working process of switching between the upper bridge arm switch and the lower bridge arm switch, resulting in large system losses. In other solutions of the related art, when there are special loads such as unbalanced loads in the power supply system, the voltage deviation of the capacitor midpoint is large, which seriously affects the quality of the output voltage waveform. It is necessary to set a larger bus capacitor to ensure the quality of the voltage waveform. Therefore, these control schemes do not make a good balance between the bus capacitor size, the balancing bridge arm loss and the output voltage waveform quality. To this end, an embodiment of the present application provides an efficient control method for a three-phase four-wire converter, which uses the relationship between the voltage at the midpoint of the capacitor and the threshold value to adaptively modify the control parameters of the balancing bridge arm to control the working state of the upper bridge arm switch and the lower bridge arm switch of the balancing bridge arm, thereby affecting the distribution of the total current flowing into the midpoint of the capacitor, and ultimately achieving a balance between the voltage at the midpoint of the capacitor and the system loss.

[0039] The following first explains the voltage fluctuations and system losses that result from the capacitor midpoint.

[0040] Figure 3 This is a schematic diagram of an equivalent circuit of a balanced bridge circuit provided in an embodiment of the present application. Figure 2 and Figure 3 The equivalent circuit of the balanced bridge circuit can be a Buck circuit. The load of the Buck circuit includes two current sources, one of which is the current i flowing into the midpoint ZO of the capacitor through the neutral line NL. N The other current source is the current i flowing into the capacitor midpoint ZO through the inverter circuit 11. mid The total current i flowing into the capacitor midpoint ZO is sum is the current i N With current i mid Moreover, the control of the upper bridge arm switch SN1 and the lower bridge arm switch SN2 of the balancing bridge arm needs to consider the total current i under different load conditions. sum The distribution of the bridge arm inductance Ln branch and the second busbar capacitance CD2 branch in the balanced bridge arm. Among them, the current i flowing through the bridge arm inductance Ln branch Ln It will affect the loss of the balancing bridge arm. That is, the greater the current flowing through the inductor Ln, the greater the loss of the balancing bridge arm, resulting in greater system loss and lower efficiency. The current i flowing through the second bus capacitor CD2 branch is cd It will affect the size of the bus capacitor, and the current i flowing through the second bus capacitor CD2 cd The larger the voltage U of the capacitor midpoint ZO is, the greater the voltage fluctuation is, and the larger the busbar capacitor is required, which will increase the volume of the system. In addition, if the voltage fluctuation of the capacitor midpoint ZO exceeds the allowable range, it will affect the normal operation of the system. Based on this, in the embodiment of the present application, the control unit 13 can be based on the instantaneous voltage U of the capacitor midpoint ZO. ZO With the second voltage threshold Vth2 The relationship between the size of the capacitor and the instantaneous voltage U at the midpoint ZO of the capacitor ZO The peak-to-peak voltage ΔV during the power frequency cycle pp With the first voltage threshold V th1 , control the balanced bridge arm, and adaptively distribute the total current between the inductor branch and the busbar capacitor branch to achieve a balance between the voltage at the capacitor midpoint ZO and system loss.

[0041] In some embodiments of the present application, the control unit 13 converts the instantaneous voltage U at the capacitor midpoint ZO into ZO With the second voltage threshold V th2 For comparison, when the instantaneous voltage U at the capacitor midpoint ZO is ZO Greater than the second voltage threshold V th2 When the instantaneous voltage U at the midpoint ZO of the capacitor is ZO The fluctuation of the output voltage is large, which has a great influence on the waveform quality of the output voltage. The balance bridge arm can be controlled to make the current part i flowing into the inductor Ln in the total current Ln Greater than the current portion i flowing into the second bus capacitor CD2 cd Based on this, in the embodiment of the present application, it is possible to adaptively distribute the total current between the inductance branch and the bus capacitance branch by controlling the balance bridge arm without increasing the size of the first bus capacitor CD1 and the second bus capacitor CD2, so that most of the total current flows into the bridge arm inductance branch first, and the voltage fluctuation of the capacitor midpoint ZO is reduced in time to ensure the quality of the output voltage waveform. In addition, since the instantaneous voltage UZO of the capacitor midpoint ZO is greater than the second voltage threshold Vth2, it means that the instantaneous voltage U ZO The fluctuation is large, so priority can be given to reducing the voltage fluctuation at the capacitor midpoint ZO to control the operation of the balanced bridge arm, that is, the system loss is not given priority at this time.

[0042] And, in U ZO >V th2 When the current flows into the second bus capacitor CD2, a part of the total current flows into the inductor, and the current flowing into the inductor is Ln Greater than the current portion i flowing into the second bus capacitor CD2 cd As a result, most of the current flows into the bridge arm inductance branch, and a small amount of current flows into the second bus capacitor CD2 branch, which can timely reduce the voltage fluctuation at the capacitor midpoint ZO.

[0043] Furthermore, in U ZO >V th2 When the current flowing into the second bus capacitor CD2 is cd In the total current i sum The proportion in is set as the second capacitance allocation ratio λ C2For example, λ C2 It can be set to a constant value to reduce the calculation time. C2 The value of λ is as small as possible, so that the current flowing into the second capacitor branch is as small as possible and the voltage fluctuation is reduced as much as possible. C2 Set to 0.05, 0.1, 0.15, 0.2, etc. Of course, for λ C2 The specific value of can be determined according to the needs of the actual application scenario and is not limited here.

[0044] And, the current part i flowing into the inductor Ln Ln In the total current i sum The proportion in is set as the second inductance distribution ratio λ D2 , when the three-phase four-wire converter is actually working, λ D2 +λ C2 =1. It is worth mentioning that λ C2 It can represent the current part i flowing into the inductor Ln collected in practice. Ln The total current i collected sum The proportion of D2 It can represent the current part i flowing into the second bus capacitor CD2 collected cd The total current i collected sum In addition, we can C2 The value of λ is as small as possible so that D2 The value of is as large as possible, so that most of the total current flows into the inductor branch and the voltage fluctuation is reduced.

[0045] In some other embodiments of the present application, the control unit 13 changes the instantaneous voltage U of the capacitor midpoint ZO to ZO With the second voltage threshold V th2 For comparison, when the instantaneous voltage U at the capacitor midpoint ZO is ZO Not greater than (ie less than or equal to) the second voltage threshold V th2 When the instantaneous voltage U ZO The fluctuation is small, which has little impact on the waveform quality of the output voltage, but the working efficiency of the system is not optimal. Then, by setting the first voltage threshold V th1 , and the first voltage threshold V th1 Less than the second voltage threshold V th2 The control unit 13 can be based on the instantaneous voltage U ZO The peak-to-peak voltage ΔV during the power frequency cycle pp With the first voltage threshold V th1 , control the balance bridge arm so that the total current i sum The current portion i flowing into the second bus capacitor CD2 cdand the current portion i flowing into the inductor Ln Ln Based on this, in the embodiment of the present application, it is possible to control the balance bridge arm without increasing the size of the first bus capacitor CD1 and the second bus capacitor CD2, so that the voltage fluctuation of the capacitor midpoint ZO is maintained at the first voltage threshold V th1 The system can operate normally, so the total current i sum The current portion i flowing into the second bus capacitor CD2 cd and the current portion i flowing into the inductor Ln Ln The distribution ratio is adjusted so that the voltage fluctuation at the capacitor midpoint ZO is kept at the maximum allowable capacitor ripple and the loss of the balanced bridge arm is reduced, thereby achieving a balance between the output voltage waveform and the system loss.

[0046] According to the peak-to-peak voltage ΔV at the midpoint ZO of the capacitor pp With the first voltage threshold V th1 The size relationship is controlled to balance the bridge arm so that the total current i sum The current portion i flowing into the second bus capacitor CD2 cd and the current portion i flowing into the inductor Ln Ln Among them, the first capacitance distribution ratio λ C1 Set to the current portion i flowing into the second bus capacitor CD2 cd In the total current i sum The proportion of the first inductance distribution ratio λ D1 Set to the current portion i flowing into Ln Ln In the total current i sum The following describes the working process of controlling the balancing bridge arm according to the peak-to-peak voltage of the capacitor midpoint and the first voltage threshold.

[0047] If ΔV pp >V th1 , then the first capacitance distribution ratio λ C1 and the first inductance distribution ratio λ D1 are not zero, so that the total current i sum Part of the current flows into the bridge arm inductor Ln branch, and the other part of the current flows into the second bus capacitor CD2 branch. Specifically, controlling the balancing bridge arm so that the total current is distributed between the current portion flowing into the second bus capacitor CD2 and the current portion flowing into the inductor can include the following process: controlling the upper bridge arm switch SN1 and the lower bridge arm switch SN2 of the balancing bridge arm to be alternately turned on so that the total current i sum The first capacitance distribution ratio λ C1 The current part i cd Flows into the second bus capacitor CD2, corresponding to the first inductance distribution ratio λ D1The current part i Ln flows into the inductor Ln, thereby reducing the total current i sum Assigned as current i cd and i Ln , which can reduce the fluctuation of the capacitor midpoint ZO, ensure the waveform quality of the output voltage, and avoid the increase of the loss of the balance bridge arm, thereby achieving a balance between the voltage of the capacitor midpoint ZO and the system loss.

[0048] If ΔV pp ≤V th1 , indicating that the voltage fluctuation at the capacitor midpoint ZO is very small, and has little or no effect on the waveform quality of the output voltage. The control unit 13 can give priority to the system loss and make the first capacitor allocation ratio λ C1 is not zero, so that the first inductance distribution ratio λ D1 is zero, so that the total current i sum Specifically, controlling the balancing bridge arm so that the total current is distributed between the current portion flowing into the second bus capacitor CD2 and the current portion flowing into the inductor may include the following process: controlling both the upper bridge arm switch SN1 and the lower bridge arm switch SN2 of the balancing bridge arm to be turned off, so that the total current i sum All of the current flows into the second bus capacitor CD2, thereby preventing the current from flowing into the inductor, reducing losses and improving system efficiency.

[0049] It is understandable that when the three-phase four-wire converter is actually working, λ C1 +λ D1 =1. It is worth mentioning that λ C1 It can represent the current part i flowing into the inductor Ln collected in practice. Ln The total current i collected sum The proportion of λ D1 It can represent the current part i flowing into the second bus capacitor CD2 collected cd The total current i collected sum In actual work, λ C1 The value range can be 0 to 1.

[0050] In specific implementation, it can be based on ΔV PP With V th1 The difference (i.e. ΔV PP -V th1 ) Control λ C1 For example, ΔV PP With V th1 The difference between ΔV PP -V th1 The value obtained by integration is taken as λ C1 .

[0051] It is understandable that the first voltage threshold V th1 Can be set to 10% V dc , the second voltage threshold V th2 Can be set to 15% V dc , V dc is the bus voltage between the positive DC bus Bus+ and the negative DC bus Bus-. Of course, in practical applications, the first voltage threshold V th1 and the second voltage threshold V th2 The specific value of can also be determined according to the needs of the actual application scenario and is not limited here.

[0052] Generally, the three-phase four-wire converter 10 is also provided with a sensor, through which the capacitor voltage U at both ends of the first bus capacitor CD1 can be collected. cd1 And the capacitor voltage U across the second bus capacitor CD2 cd2 and the capacitor voltage U cd1 and U cd2 Send to the control unit 13, the control unit 13 will U cd1 and U cd2 Make the difference and get the instantaneous voltage U at the midpoint ZO of the capacitor ZO , that is U ZO =U cd1 -U cd2 .

[0053] In specific implementation, the second capacitance allocation ratio can be smaller than the first capacitance allocation ratio, that is, λ C2 <λ C1 Based on this, in U ZO ≤V th2 The loss of controlling the balanced bridge arm will be less than that of ZO >V th2 Control the loss caused by the operation of the balanced bridge arm.

[0054] In addition, in U ZO ≤V th2 When the U is on, the control unit 13 outputs a switching signal sn1 to the upper arm switch SN1, and the duty cycle of the switching signal sn1 is the first duty cycle, and outputs a switching signal sn2 to the lower arm switch SN2, and the duty cycle of the switching signal sn2 is 1 minus the value of the first duty cycle, and controls the upper arm switch SN1 and the lower arm switch SN2 to be alternately turned on, and makes the working state of the upper arm switch SN1 and the lower arm switch SN2 alternately turned on the first working state. And, in U ZO >V th2When the control unit 13 outputs a switching signal sn1 to the upper bridge arm switch SN1, and the duty cycle of the switching signal sn1 is the second duty cycle, and outputs a switching signal sn2 to the lower bridge arm switch SN2, and the duty cycle of the switching signal sn2 is 1 minus the second duty cycle. The upper bridge arm switch SN1 and the lower bridge arm switch SN2 are controlled to alternately turn on, and the operating state in which the upper bridge arm switch SN1 and the lower bridge arm switch SN2 are alternately turned on is the second operating state. Based on this, the first duty cycle and the second duty cycle can be set to be different, so that the first operating state is different from the second operating state.

[0055] In order to distribute the total current between the second busbar capacitor branch and the bridge arm inductor branch, when the balanced bridge arm is working, the impedance of the equivalent circuit of the balanced bridge arm and the inductor can satisfy the following relationship:

[0056] (1) The impedance of the equivalent circuit of the balanced bridge arm and the inductor is capacitive at the fundamental frequency (i.e., the power frequency) and the triple frequency (i.e., the triple frequency of the power frequency), and the phase angle when the impedance of the equivalent circuit of the balanced bridge arm and the inductor is capacitive is the same as the phase angle of the second bus capacitance.

[0057] (2) The impedance of the equivalent circuit of the balanced bridge arm and the inductor has an impedance amplitude three times that at the fundamental frequency (i.e., the power frequency) and the triple frequency (i.e., the triple frequency of the power frequency).

[0058] (3) The impedance amplitude of the equivalent circuit of the balanced bridge arm and the inductor at the DC component is not greater than the impedance amplitude threshold. The impedance amplitude threshold is as small as possible, so that the impedance amplitude of the equivalent circuit of the balanced bridge arm and the inductor at the DC component can be as low as possible to suppress the DC offset of the voltage at the midpoint of the capacitor. It is understandable that the impedance amplitude threshold is 0.1, 0.01, etc. In actual applications, the specific value of the impedance amplitude threshold can be determined according to the requirements of the actual application scenario.

[0059] According to the above relationship, the PI controller Gvd(s), the lead-lag compensator G L d(s), baseband notch filter G N (s) and the low-pass filter G LP (s). Among them, the PI controller G vd (s) is used to reduce the impedance amplitude of the equivalent circuit of the balanced bridge arm and the inductor at the DC component. Lead-lag compensator G L d(s) is used to make the impedance of the equivalent circuit of the balanced bridge arm and the inductor have the same phase angle at the fundamental frequency and the triple frequency, while further reducing the phase angle of the inductor branch impedance. N (s) is used to make the impedance of the equivalent circuit of the balanced bridge arm and the inductor triple in magnitude at the fundamental frequency and the tripled frequency. LP(s) is used to suppress high frequency oscillation and improve system stability. Furthermore, the inductor current proportional inner loop is added to control the resistance coefficient r x , making the impedance of the equivalent circuit of the balanced bridge arm and the inductor appear resistive-inductive.

[0060] For example, the expression of the PI controller Gvd(s) can be shown as follows:

[0061]

[0062] Among them, K P , K I They represent the control parameters of the PI controller Gvd(s), and s represents the variable.

[0063] For example, the lead-lag compensator G Ld The expression (s) can be as follows:

[0064]

[0065] Among them, τ1 and τ2 represent the lead-lag compensator G L The control parameter of d(s), s represents the variable.

[0066] For example, the baseband notch filter G N The expression for (s) can be as follows:

[0067]

[0068] Among them, w0 represents the fundamental frequency, K N Represents the baseband notch filter G N (s) is the control parameter, where s represents the variable.

[0069] For example, the low-pass filter G LP The expression for (s) can be as follows:

[0070]

[0071] Where f represents the low-pass filter G LP The cutoff frequency of (s).

[0072] The solution relationship of the above control parameters is as follows:

[0073] r, x =20|j3w o L d |;

[0074]

[0075]

[0076]

[0077]

[0078] in, is the phase shift angle of the three-phase alternating current, and the cut-off frequency of the low-pass filter is f = 500 Hz.

[0079] In the embodiment of the present application, the control unit may store a first mapping relationship, which includes: the proportion of the current flowing into the second bus capacitor in the total current λ C , the proportion of the current flowing into the inductor in the total current λ D , control parameter K P , K I ,τ1,τ2,K N 、r x For example, λ C ,λ D , K P , K I ,τ1,τ2,K N 、r x Can be set to multiple different values, and the multiple λ C , multiple λ D , multiple K P , multiple K I , multiple τ1, multiple τ2, multiple K N and multiple r x Alternatively, the control unit may also store a second mapping relationship, which includes: the proportion of the current flowing into the inductor in the total current λ D , control parameter K P , K I ,τ1,τ2,K N 、r x For example, λ C ,λ D , K P , K I ,τ1,τ2,K N 、r x Can be set to multiple different values, and the multiple λ C , multiple λ D , multiple K P , multiple K I , multiple τ1, multiple τ2, multiple K N and multiple r x One to one correspondence.

[0080] Exemplarily, the first mapping relationship or the second mapping relationship may be stored in the control unit in the form of a lookup table, or the first mapping relationship or the second mapping relationship may be stored in the control unit in the form of a relational expression.

[0081] Based on the above mapping relationship, the control parameter K can be adjusted P , K I ,τ1,τ2,K N 、r x , adaptively reconstruct the impedance of the equivalent circuit of the balanced bridge arm and the inductor and the capacitance branch impedance, so as to achieve the current i Ln and current i cd For example, under rated operating conditions, the voltage fluctuation at the midpoint of the capacitor, the size of the first bus capacitor and the second bus capacitor, and the proportion of the current flowing into the second bus capacitor in the total current λ C and the proportion of the current flowing into the inductor in the total current λ D It can be determined according to the control requirements. When the working conditions change, for example, when the load imbalance decreases or the load becomes lighter, if the proportion λ under the rated working conditions is still used C and λ D , the voltage fluctuation at the midpoint of the capacitor will be less than the first voltage threshold, and the system efficiency is not optimal at this time. As long as the voltage fluctuation at the midpoint of the capacitor remains within the first voltage threshold, the system can operate normally. Therefore, by adjusting λ C and λ D , so that the voltage fluctuation at the midpoint of the capacitor is kept at the maximum allowed capacitor ripple, and λ D Based on this, the embodiment of the present application provides an adaptive impedance adjustment control solution to achieve stable operation and efficiency improvement of the system under all working conditions.

[0082] Adaptive impedance adjustment link: refer to Figure 4 , Figure 4 This is a control block diagram for controlling the operation of the balanced bridge arm provided in the embodiment of the present application. ZO (i.e. U cd1 -U cd2 ) is the feedback quantity. First, U ZO With V th2 Do the difference and get the difference U ZO -V th2 .

[0083] If U ZO -V th2 >0, that is U ZO >V th2 , the control unit will flow into the second bus capacitor CD2 current i cd In the total current i sumThe proportion in is set to the set allocation ratio λ as a constant value C3 (The setting distribution ratio λ C3 The ratio of the second capacitor to the C2 The same or the deviation between them meets the error tolerance range). After that, the control unit will C3 With limit λ C0 In general, λ C3 <λ C0 , then the control unit will C3 With the set voltage threshold λ th Do the difference and get the current i flowing into the inductor Ln Ln In the total current i sum The proportion of λ D3 Based on this, the control unit can obtain λ C3 and λ D3 Combined with the first mapping relationship or the second mapping relationship, we can get λ C3 and λ D3 The corresponding control parameter K P , K I ,τ1,τ2,K N 、r x , and the parameter K P , K I ,τ1,τ2,K N Input PI controller G vd (s), lead-lag compensator G Ld (s), baseband notch filter G N (s) and the low-pass filter G LP (s), for the PI controller G vd (s), lead-lag compensator G Ld (s), baseband notch filter G N (s) and the low-pass filter G LP The corresponding control parameters in (s) are updated to obtain the updated PI controller G vd (s), lead-lag compensator G Ld (s), baseband notch filter G N (s) and the low-pass filter G LP Based on this, the voltage U of the second bus capacitor CD2 is also collected cd2 , and U cd2 With reference voltage V ref Make a difference and get U cd2 -V ref , and U cd2 -V ref Enter the updated PI controller G in sequence vd (s), lead-lag compensator G Ld(s), baseband notch filter G N (s) and the low-pass filter G LP (s), and the voltage U1 is obtained. In addition, the current i flowing through the inductor is also collected Ln , the current i Ln With the obtained r x Multiply and get the voltage U2 (U2=i Ln *r x ). After that, the voltage U2 is subtracted from the voltage U1 to obtain the difference U2-U1, and the duty cycle DC2 is obtained according to the difference U2-U1. The duty cycle DC2 is used as the second duty cycle, and the switching signals sn1 and sn2 are output according to the second duty cycle to control the upper arm switch SN1 and the lower arm switch SN2 to be alternately turned on, so that the total current i sum The second inductance distribution ratio λ D2 Most of the current flows through the inductor Ln, making the total current i sum The corresponding second capacitance distribution ratio λ C2 A small portion of the current flows into the second bus capacitor CD2 and gradually adjusts the midpoint voltage to a safe operating range.

[0084] It is worth mentioning that D3 =λ th -λ C3 , where λ can be made C3 The value of λ is as small as possible, then D3 The value of will be as large as possible, so that most of the total current flows into the bridge arm inductor branch, and the current flowing into the second capacitor branch is as small as possible. It is worth mentioning that in theory, λ th 1, however, in the actual calculation process, due to the total current i sum , current i Ln and i cd In order to satisfy the principle of parallelogram synthesis and prevent the analytical expression from being meaningless when solving the control parameters, λ is required. th >1. In addition, in order to ensure that the total current i sum Can be based on λ D2 and λ C2 distribution, to prevent excessive deviation, λ th It is not advisable to take too large a value. Therefore, in this application, th >1, for example, λ th =1+Δλ, and the value of Δλ needs to make λ th As close to 1 as possible, for example, Δλ can be set to values ​​such as 0.1, 0.01, etc. Of course, in actual applications, the specific value of Δλ can be determined according to the needs of the actual application scenario and is not limited here.

[0085] If UZO -V th2 ≤0, that is U ZO ≤V th2 , indicating that the voltage potential at the capacitor midpoint ZO does not have a large DC offset, the control unit will ZO The peak-to-peak voltage ripple ΔV at the capacitor midpoint ZO is calculated by sliding average of the power frequency cycle pp , the control unit will ΔV pp With V th1 Make the difference and get the difference ΔV pp -V th1 The control unit converts the difference ΔV pp -V th1 After the integration link, the proportion of the current flowing into the second bus capacitor CD2 in the total current is calculated. C4 (The C4 The first capacitor distribution ratio λ C1 The integral coefficient ki is defined as the capacitance distribution coefficient change Δλ according to the physical meaning. C The ratio of the voltage fluctuation difference e at the capacitor midpoint ZO, that is, assuming the current i N and current i mid The maximum voltage ripple value V generated when all the current flows through the DC bus PP_max The reciprocal of, for example, half the bus voltage V dc The reciprocal of . For example, the expression of ki is as follows:

[0086]

[0087] After that, the control unit will C4 With limit λ C0 Compare. C4 May be greater than, equal to, or less than λ C0 Among them, if λ C4 ≤λ C0 , then λ C4 Output directly and C4 and λ th Do the difference and get λ D4 , we get λ C4 and λ D4 , combined with the first mapping relationship or the second mapping relationship, we can get λ C4 and λ D4 The corresponding control parameter K P , K I ,τ1,τ2,K N 、r x , and the control parameter K P , K I ,τ1,τ2,KN Input PI controller G vd (s), lead-lag compensator G Ld (s), baseband notch filter G N (s) and the low-pass filter G LP (s), for the PI controller G vd (s), lead-lag compensator G Ld (s), baseband notch filter G N (s) and the low-pass filter G LP The corresponding control parameters in (s) are updated, and the updated PI controller G can also be obtained. vd (s), lead-lag compensator G Ld (s), baseband notch filter G N (s) and the low-pass filter G LP (s). Or, if λ C1 >λ C0 , then λ C0 As the new λ C4 Output, to the original λ C4 Limit the amplitude and set the new λ C4 and λ th Do the difference and get λ D4 , and we get the new λ C4 (i.e. λ C0 ) and λ D4 , and then according to the first mapping relationship or the second mapping relationship, the new λ is obtained C4 (i.e. λ C0 ) and λ D4 The corresponding control parameter K P , K I ,τ1,τ2,K N 、r x , and the control parameter K P , K I ,τ1,τ2,K N Input PI controller G vd (s), lead-lag compensator G Ld (s), baseband notch filter G N (s) and the low-pass filter G LP (s), for the PI controller G vd (s), lead-lag compensator G Ld (s), baseband notch filter G N (s) and the low-pass filter G LP The corresponding control parameters in (s) are updated to obtain the updated PI controller G vd (s), lead-lag compensator G Ld (s), baseband notch filter G N(s) and the low-pass filter G LP Based on this, the control unit also collects the voltage U of the second bus capacitor CD2 cd2 , and U cd2 With reference voltage V ref Make a difference and get U cd2 -V ref , and U cd2 -V ref Enter the updated PI controller G in sequence vd (s), lead-lag compensator G Ld (s), baseband notch filter G N (s) and the low-pass filter G LP (s), and the voltage U1 is obtained. In addition, the control unit also collects the current i flowing through the inductor Ln , the current i Ln With the obtained r x Multiply and get the voltage U2 (i.e. Ln *r x The voltage U2 is then subtracted from the voltage U1 to obtain a difference U2-U1. A duty cycle DC1 is obtained based on the difference U2-U1. The duty cycle DC1 is used as the first duty cycle, and the switching signals sn1 and sn2 are output according to the first duty cycle.

[0088] For example, if ΔV pp >V th1 , the λ calculated by the control unit C4 is a value in the interval (0, 1), and λ C4 As the first capacitance distribution ratio λ C1 , the first duty cycle obtained is not zero, then the switching signals sn1 and sn2 obtained can control the upper arm switch SN1 and the lower arm switch SN2 to be alternately turned on, so that the total current corresponds to the first capacitance distribution ratio λ C1 Part of the current flows into the capacitor branch of the second bus capacitor CD2, and the first inductance distribution ratio λ in the total current D1 The other part of the current flows into the inductor branch. C1 and λ th The difference adaptively modifies the PI controller G vd (s), lead-lag compensator G Ld (s), baseband notch filter G N (s) and the low-pass filter G LP The control parameters in (s) realize the impedance reconstruction of the balanced bridge arm, while ensuring U ZO Not exceeding V th2 Under this condition, the system efficiency is improved and the quality of the output voltage waveform is improved.

[0089] For example, if ΔV pp ≤V th1 , the λ calculated by the control unit C4 =1, and λ C4 As the first capacitance distribution ratio λ C1 , the obtained first duty cycle is zero, and the obtained switching signals sn1 and sn2 can control the upper arm switch SN1 and the lower arm switch SN2 to be turned off, so that the total current flows into the capacitor branch of the second bus capacitor CD2.

[0090] It is understandable that λ C0 Can be equal to λ th or 1. Of course, λ C0 It can also be set to other values, which are not limited here. In addition, the control unit 13 can also perform dual closed-loop control on the voltage of the second bus capacitor CD2 and the current flowing through the inductor to achieve adaptive impedance control.

[0091] Based on this, an embodiment of the present application also provides a voltage control method for the midpoint of a capacitor, which is applied to a three-phase four-wire converter. The three-phase four-wire converter includes: a balancing bridge unit and an inverter unit; the input end of the inverter unit is connected to the positive DC bus and the negative DC bus, the output end of the inverter unit is used to connect the load, and the inverter unit is used to convert the DC power on the positive DC bus and the negative DC bus into AC power and then output it; the balancing bridge unit includes a balancing bridge arm, a first bus capacitor, a second bus capacitor and an inductor; the balancing bridge arm is connected between the positive DC bus and the negative DC bus, the first bus capacitor is connected between the positive DC bus and the midpoint of the capacitor, the second bus capacitor is connected between the negative DC bus and the midpoint of the capacitor, and the inductor is connected between the midpoint of the bridge arm of the balancing bridge arm and the midpoint of the capacitor; the midpoint of the capacitor is connected to the first end of the neutral line, and the second end of the neutral line is used to connect the load.

[0092] Furthermore, the method includes:

[0093] In response to the instantaneous voltage at the midpoint of the capacitor being greater than a second voltage threshold, controlling the balancing bridge arm so that, of the total current flowing into the midpoint of the capacitor, the portion of the current flowing into the inductor is greater than the portion of the current flowing into the second bus capacitor;

[0094] In response to the instantaneous voltage at the midpoint of the capacitor being no greater than the second voltage threshold, the balancing bridge arm is controlled based on the peak-to-peak value of the voltage at the midpoint of the capacitor and the first voltage threshold so that the total current flowing into the midpoint of the capacitor is distributed between the current portion flowing into the second bus capacitor and the current portion flowing into the inductor, and the first voltage threshold is less than the second voltage threshold.

[0095] In some embodiments of the present application, when the peak-to-peak value of the voltage at the midpoint of the capacitor is greater than the first voltage threshold, the balancing bridge arm is controlled based on the peak-to-peak value of the voltage at the midpoint of the capacitor and the first voltage threshold, so that the total current flowing into the midpoint of the capacitor is distributed into the current portion flowing into the second bus capacitor and the current portion flowing into the inductor, including but not limited to the following process: controlling the upper arm switch and the lower arm switch of the balancing bridge arm to alternately turn on, so that part of the total current flows into the second bus capacitor, and the other part flows into the inductor.

[0096] In some embodiments of the present application, when the peak-to-peak value of the voltage at the midpoint of the capacitor is not greater than the first voltage threshold, the balancing bridge arm is controlled based on the peak-to-peak value of the voltage at the midpoint of the capacitor and the first voltage threshold, so that the total current flowing into the midpoint of the capacitor is distributed between the current portion flowing into the second bus capacitor and the current portion flowing into the inductor, including but not limited to the following process: controlling the upper arm switch and the lower arm switch of the balancing bridge arm to be cut off, so that the total current flows entirely into the second bus capacitor.

[0097] The above content is only a specific implementation method of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with this technical field can easily think of changes or replacements within the technical scope disclosed in this application, and they should all be covered by the protection scope of the present application.

Claims

1. A three-phase four-wire converter, characterized in that: include: Balance bridge unit, inverter unit and control unit; The input end of the inverter unit is connected to the positive DC bus and the negative DC bus, and the output end of the inverter unit is used to connect to the load. The inverter unit is used to convert the DC power on the positive DC bus and the negative DC bus into AC power and then output it; The balancing bridge unit includes a balancing bridge arm, a first bus capacitor, a second bus capacitor, and an inductor; the balancing bridge arm is connected between the positive DC bus and the negative DC bus, the first end of the first bus capacitor is connected to the positive DC bus, the second end of the first bus capacitor and the first end of the second bus capacitor are connected to each other at a capacitor midpoint, the second end of the second bus capacitor is connected to the negative DC bus, and the inductor is connected between the bridge arm midpoint of the balancing bridge arm and the capacitor midpoint; the capacitor midpoint is connected to the first end of the neutral line, and the second end of the neutral line is used to connect to a load; The control unit is used for: In response to the instantaneous voltage at the midpoint of the capacitor being greater than a second voltage threshold, controlling the balancing bridge arm so that, of the total current flowing into the midpoint of the capacitor, the portion of the current flowing into the inductor is greater than the portion of the current flowing into the second bus capacitor; In response to the instantaneous voltage at the midpoint of the capacitor being no greater than the second voltage threshold, the balancing bridge arm is controlled based on the peak-to-peak value of the voltage at the midpoint of the capacitor and the first voltage threshold, so that the total current flowing into the midpoint of the capacitor is distributed between the current portion flowing into the second bus capacitor and the current portion flowing into the inductor, and the first voltage threshold is less than the second voltage threshold.

2. The three-phase four-wire converter according to claim 1, wherein: When the peak-to-peak value of the voltage at the midpoint of the capacitor is greater than a first voltage threshold, the control unit is further used to: control the upper arm switch and the lower arm switch of the balancing bridge arm to be alternately turned on, so that part of the total current flows into the second bus capacitor and the other part of the current flows into the inductor.

3. The three-phase four-wire converter according to claim 1 or 2, characterized in that: When the peak-to-peak value of the voltage at the midpoint of the capacitor is not greater than the first voltage threshold, the control unit is further used to: control the upper arm switch and the lower arm switch of the balance bridge arm to be turned off, so that the total current flows into the second bus capacitor.

4. The three-phase four-wire converter according to claim 2, wherein: The proportion of the current flowing into the second bus capacitor in the total current is controlled according to the difference between the peak-to-peak value of the voltage at the midpoint of the capacitor and the first voltage threshold.

5. The three-phase four-wire converter according to claim 2 or 4, characterized in that: When the instantaneous voltage at the midpoint of the capacitor is not greater than the second voltage threshold, the proportion of the current flowing into the second bus capacitor in the total current is the first capacitor allocation ratio; When the instantaneous voltage at the midpoint of the capacitor is greater than the second voltage threshold, the portion of the current flowing into the second bus capacitor in the total current is the second capacitor allocation ratio; The second capacitance allocation ratio is smaller than the first capacitance allocation ratio.

6. The three-phase four-wire converter according to claim 5, characterized in that: The second capacitance allocation ratio is a constant value.

7. The three-phase four-wire converter according to any one of claims 2, 4 to 6, characterized in that: When the instantaneous voltage at the midpoint of the capacitor is not greater than the second voltage threshold, and the peak-to-peak value of the voltage at the midpoint of the capacitor is greater than the first voltage threshold, controlling the upper bridge arm switch and the lower bridge arm switch in the balancing bridge arm to be alternately turned on, and the duty cycle of the switching signal of the upper bridge arm switch is the first duty cycle; When the instantaneous voltage at the midpoint of the capacitor is greater than the second voltage threshold, controlling the upper bridge arm switch and the lower bridge arm switch in the balancing bridge arm to be alternately turned on, and the duty cycle of the switching signal of the upper bridge arm switch is the second duty cycle; The first duty cycle is different from the second duty cycle.

8. The three-phase four-wire converter according to any one of claims 1 to 7, characterized in that: When the balancing bridge arm is working, the impedance of the equivalent circuit of the balancing bridge arm and the inductor is capacitive at the fundamental frequency and the triple frequency, the phase angle of the impedance of the equivalent circuit when it is capacitive is the same as the phase angle of the second bus capacitance, the impedance amplitude of the equivalent circuit at the fundamental frequency and the triple frequency is three times the impedance amplitude, and the impedance amplitude of the equivalent circuit at the DC component is not greater than the impedance amplitude threshold.

9. A power supply system, characterized in that: comprising a photovoltaic module, a DC-DC converter and a three-phase four-wire converter according to any one of claims 1 to 8; The input end of the DC-DC converter is connected to the photovoltaic module, and the output end of the DC-DC converter is connected to the positive DC bus and the negative DC bus. The DC-DC converter is used to convert the DC power input by the photovoltaic module and output it to the positive DC bus and the negative DC bus; The input end of the three-phase four-wire converter is connected to the positive DC bus and the negative DC bus, and the output end of the three-phase four-wire converter is used to connect to the load. The three-phase four-wire converter is used to convert the DC power on the positive DC bus and the negative DC bus into AC power and then output it to the load.

10. A method for controlling the voltage at the midpoint of a capacitor, characterized in that: The method is applied to a three-phase four-wire converter, which includes: a balancing bridge unit and an inverter unit; the input end of the inverter unit is connected to a positive DC bus and a negative DC bus, the output end of the inverter unit is used to connect a load, and the inverter unit is used to convert the DC power on the positive DC bus and the negative DC bus into AC power for output; the balancing bridge unit includes a balancing bridge arm, a first bus capacitor, a second bus capacitor, and an inductor; the balancing bridge arm is connected between the positive DC bus and the negative DC bus, the first bus capacitor is connected between the positive DC bus and the midpoint of the capacitor, the second bus capacitor is connected between the negative DC bus and the midpoint of the capacitor, and the inductor is connected between the midpoint of the balancing bridge arm and the midpoint of the capacitor; the midpoint of the capacitor is connected to a first end of a neutral line, and the second end of the neutral line is used to connect to a load; The method comprises: In response to the instantaneous voltage at the midpoint of the capacitor being greater than a second voltage threshold, controlling the balancing bridge arm so that, of the total current flowing into the midpoint of the capacitor, the portion of the current flowing into the inductor is greater than the portion of the current flowing into the second bus capacitor; In response to the instantaneous voltage at the midpoint of the capacitor being no greater than the second voltage threshold, the balancing bridge arm is controlled based on the peak-to-peak value of the voltage at the midpoint of the capacitor and the first voltage threshold, so that the total current flowing into the midpoint of the capacitor is distributed between the current portion flowing into the second bus capacitor and the current portion flowing into the inductor, and the first voltage threshold is less than the second voltage threshold.

11. The method according to claim 10, wherein When the peak-to-peak value of the voltage at the midpoint of the capacitor is greater than a first voltage threshold, controlling the balancing bridge arm according to the peak-to-peak value of the voltage at the midpoint of the capacitor and the first voltage threshold so that the total current flowing into the midpoint of the capacitor is distributed between the current portion flowing into the second bus capacitor and the current portion flowing into the inductor, including: The upper bridge arm switch and the lower bridge arm switch of the balancing bridge arm are controlled to be alternately turned on, so that a portion of the total current flows into the second bus capacitor and another portion of the total current flows into the inductor.

12. The method according to claim 10 or 11, wherein: When the peak-to-peak value of the voltage at the midpoint of the capacitor is not greater than a first voltage threshold, controlling the balancing bridge arm according to the peak-to-peak value of the voltage at the midpoint of the capacitor and the first voltage threshold so that the total current flowing into the midpoint of the capacitor is distributed between the current portion flowing into the second bus capacitor and the current portion flowing into the inductor, including: The upper bridge arm switch and the lower bridge arm switch of the balancing bridge arm are controlled to be turned off, so that the total current flows entirely into the second bus capacitor.

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