Two-dimensional flexible photoelectric detector and manufacturing method thereof

Abstract

The embodiment of the invention provides a two-dimensional flexible photoelectric detector and a manufacturing method thereof, and belongs to the technical field of photoelectric detectors. The two-dimensional flexible photoelectric detector comprises a flexible substrate; the infrared light absorption back gate layer is arranged on the flexible substrate and is used for responding to the infrared light and regulating and controlling the response state of the two-dimensional flexible photoelectric detector to light with different wavelengths according to the gate voltage; the dielectric layer and the gate electrode layer are arranged on the infrared light absorption back gate layer; the floating gate layer is arranged on the dielectric layer; the tunneling layer is arranged on the floating gate layer; the mixed-phase transition metal chalcogenide film layer is arranged on the tunneling layer and used for generating positive photoelectric response under irradiation of visible light, and current in the mixed-phase transition metal chalcogenide film layer can be regulated and controlled by voltage; and the two-dimensional semiconductor function layer is arranged on the mixed-phase transition metal chalcogenide film layer and is used for responding to visible light and enhancing short wave response. According to the invention, wavelength selective photoelectric detection can be carried out under an illumination condition.

Description

Technical Field

[0001] The present disclosure relates to the technical field of photoelectric detectors, and in particular to a two-dimensional flexible photoelectric detector and a manufacturing method thereof. Background Art

[0002] Photodetectors are a type of device that converts light signals into electrical signals. They are widely used in image recognition, intelligent security, remote sensing imaging and other fields.

[0003] In related technologies, a photodetector consists of a stacked substrate layer, a gate electrode layer, a dielectric layer, a floating gate layer, a tunneling layer, a two-dimensional semiconductor channel layer, and an electrode layer. Depending on the material of the two-dimensional semiconductor channel layer, the photodetector can detect light within a certain wavelength range.

[0004] However, depending on the material of the two-dimensional semiconductor channel layer, the same photodetector can only photodetect light within a wavelength range, which results in a single working mode of the photodetector and limited functionality. Summary of the Invention

[0005] This disclosure provides a two-dimensional flexible photodetector and a method for manufacturing the same, capable of regulating the response of the two-dimensional flexible photodetector to light of different wavelengths within the wavelength range from visible light to infrared light, and performing wavelength-selective photodetection under illumination conditions. The technical solution includes at least the following solutions: On the one hand, a two-dimensional flexible photodetector is provided for wavelength-selective photodetection under illumination conditions, comprising: a flexible substrate; an infrared light absorption back gate layer, arranged on the flexible substrate, for responding to infrared light and regulating the response state of the two-dimensional flexible photodetector to light of different wavelengths according to the gate voltage; a dielectric layer and a gate electrode layer, arranged on the infrared light absorption back gate layer; a floating gate layer, arranged on the dielectric layer; a tunneling layer, arranged on the floating gate layer; a mixed-phase transition metal sulfide compound film layer, arranged on the tunneling layer, for generating a positive photoelectric response under the irradiation of visible light, and the current in the mixed-phase transition metal sulfide compound film layer can be regulated by voltage; a two-dimensional semiconductor functional layer, arranged on the mixed-phase transition metal sulfide compound film layer, for responding to visible light and enhancing the short-wave response; and an electrode layer, arranged on the two-dimensional semiconductor functional layer.

[0006] Optionally, the infrared light absorbing back gate layer is an N-type Ge layer.

[0007] Optionally, the infrared light absorbing back gate layer has a thickness of 1 μm to 5 μm.

[0008] Optionally, the material of the mixed-phase transition metal chalcogenide film layer is MoS2 having a 1T phase and a 2H phase.

[0009] Optionally, the thickness of the mixed-phase transition metal chalcogenide film layer is 10 nm to 15 nm.

[0010] Optionally, the material of the two-dimensional semiconductor functional layer is N-type In2S3.

[0011] Optionally, the two-dimensional semiconductor functional layer has a thickness of 130 nm to 170 nm.

[0012] Optionally, the floating gate layer is made of graphene.

[0013] Optionally, the material of the tunneling layer is hexagonal boron nitride.

[0014] On the other hand, a method for manufacturing a two-dimensional flexible photodetector is provided, comprising: forming an infrared light absorbing back gate layer on a flexible substrate, the infrared light absorbing back gate layer being used to respond to infrared light and regulate the response state of the two-dimensional flexible photodetector to light of different wavelengths according to a gate voltage; forming a dielectric layer and a gate electrode layer on the infrared light absorbing back gate layer; forming a floating gate layer on the dielectric layer; forming a tunneling layer on the floating gate layer; forming a mixed-phase transition metal sulfide compound film layer on the tunneling layer, the mixed-phase transition metal sulfide compound film layer being used to generate a positive photoelectric response under the irradiation of visible light, and the current in the mixed-phase transition metal sulfide compound film layer being regulated by voltage; forming a two-dimensional semiconductor functional layer on the mixed-phase transition metal sulfide compound film layer, the two-dimensional semiconductor functional layer being used to respond to visible light and enhance the short-wave response; and forming an electrode layer on the two-dimensional semiconductor functional layer.

[0015] The beneficial effects of the technical solutions provided by the embodiments of the present disclosure include at least: In the disclosed embodiments, an infrared light absorbing back-gate layer is provided on a flexible substrate, enabling the back-gate layer to respond to infrared light, thereby facilitating photoelectric detection of infrared light. A mixed-phase transition metal chalcogenide film layer and a two-dimensional semiconductor functional layer are sequentially provided on the tunneling layer. The mixed-phase transition metal chalcogenide film layer can construct a multi-level structure, effectively expanding the light response range and generating a positive photoelectric response under visible light irradiation. Its current can be controlled by voltage. The two-dimensional semiconductor functional layer can respond to visible light and enhance short-wave response. The two layers work together to achieve wide-spectrum, high-sensitivity photoelectric detection of visible light. A floating gate layer and a tunneling layer are sequentially arranged on the infrared light absorbing back gate layer. The floating gate layer can realize charge storage, and the tunneling layer can realize charge tunneling and charge blocking. The two constitute a non-volatile storage structure. The above structures cooperate with each other. By applying a specific gate voltage on the infrared light absorbing back gate layer, the charge storage state in the non-volatile storage structure can be regulated, thereby regulating the response state of the two-dimensional flexible photodetector to light of different wavelengths in the wavelength range from visible light to infrared light. Under illumination conditions, the two-dimensional flexible photodetector can switch among three working modes: responding to visible light only, responding to visible light and infrared light at the same time, and responding to infrared light only, thereby realizing wavelength-selective photoelectric detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0017] Figure 1 Schematic diagram of the structure of a two-dimensional flexible photoelectric detector provided by an embodiment of the present disclosure; Figure 2 This is a flow chart of a method for manufacturing a two-dimensional flexible photodetector provided by an embodiment of the present disclosure; Figures 3 to 8 This is a schematic diagram of the manufacturing process of a two-dimensional flexible photodetector provided in an embodiment of the present disclosure.

[0018] Reference numerals: 10: flexible substrate; 20: infrared light absorbing back gate layer; 30: dielectric layer; 40: gate electrode layer; 50: floating gate layer; 60: tunneling layer; 70: mixed-phase transition metal chalcogenide film layer; 80: two-dimensional semiconductor functional layer; 90: electrode layer; 91: source; 92: drain. DETAILED DESCRIPTION

[0019] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning as understood by a person of ordinary skill in the art to which this disclosure pertains. The terms "first," "second," "third," and similar terms used in the patent specification and claims of this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish between different components. Similarly, terms such as "a" or "an" do not indicate a quantitative limitation, but rather indicate the presence of at least one. Terms such as "include" or "comprising" mean that the elements or objects preceding "include" or "comprising" encompass the elements or objects listed after "include" or "comprising," and their equivalents, and do not exclude other elements or objects. Terms such as "connected" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly. "A and / or B" indicates three situations: A, B, and A and B.

[0020] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0021] Figure 1 Schematic diagram of the structure of a two-dimensional flexible photoelectric detector provided by an embodiment of the present disclosure. The two-dimensional flexible photoelectric detector is used for wavelength selective photoelectric detection under illumination conditions, such as Figure 1 As shown, the two-dimensional flexible photodetector includes: a flexible substrate 10; an infrared light absorbing back gate layer 20, which is arranged on the flexible substrate 10, for responding to infrared light and regulating the response state of the two-dimensional flexible photodetector to light of different wavelengths according to the gate voltage; a dielectric layer 30 and a gate electrode layer 40, which are arranged on the infrared light absorbing back gate layer 20; a floating gate layer 50, which is arranged on the dielectric layer 30; a tunneling layer 60, which is arranged on the floating gate layer 50; a mixed-phase transition metal sulfide compound film layer 70, which is arranged on the tunneling layer 60, for generating a positive photoelectric response under the irradiation of visible light, and the current in the mixed-phase transition metal sulfide compound film layer 70 can be regulated by voltage; a two-dimensional semiconductor functional layer 80, which is arranged on the mixed-phase transition metal sulfide compound film layer 70, for responding to visible light and enhancing the short-wave response; and an electrode layer 90, which is arranged on the two-dimensional semiconductor functional layer 80.

[0022] In the disclosed embodiment, an infrared light absorbing back-gate layer 20 is provided on a flexible substrate 10, enabling infrared light absorption, thereby facilitating photoelectric detection of infrared light. A mixed-phase transition metal chalcogenide film layer 70 and a two-dimensional semiconductor functional layer 80 are sequentially provided on a tunneling layer 60. The mixed-phase transition metal chalcogenide film layer 70 can construct a multi-level structure, effectively expanding the light response range and generating a positive photoelectric response under visible light illumination. Its current can be controlled by voltage. The two-dimensional semiconductor functional layer 80 can respond to visible light and enhance short-wavelength response. The two layers work together to achieve wide-spectrum, high-sensitivity photoelectric detection of visible light. A floating gate layer 50 and a tunneling layer 60 are sequentially arranged on the infrared light absorbing back gate layer 20. The floating gate layer 50 can realize charge storage, and the tunneling layer 60 can realize charge tunneling and charge blocking. The two constitute a non-volatile storage structure. The above structures cooperate with each other. By applying a specific gate voltage on the infrared light absorbing back gate layer 20, the charge storage state in the non-volatile storage structure can be regulated, thereby regulating the response state of the two-dimensional flexible photodetector to light of different wavelengths in the wavelength range from visible light to infrared light. Under illumination conditions, the two-dimensional flexible photodetector can switch among three working modes: responding only to visible light, responding to visible light and infrared light at the same time, and responding only to infrared light, thereby realizing wavelength-selective photoelectric detection.

[0023] This two-dimensional flexible photodetector is better suited for fields such as wavelength-selective image acquisition and feature extraction. Furthermore, providing the aforementioned structures on the flexible substrate 10 helps improve the device's integration, making the two-dimensional flexible photodetector more suitable for flexible scenarios such as flexible wearable devices.

[0024] Optionally, the material of the flexible substrate 10 may be polydimethylsiloxane (PDMS).

[0025] In other embodiments, the material of the flexible substrate 10 can be adjusted according to actual needs, and the present disclosure does not limit this.

[0026] Optionally, the thickness of the flexible substrate 10 is 60 μm to 100 μm.

[0027] For example, the thickness of the flexible substrate 10 may be 60 μm, 80 μm, or 100 μm.

[0028] Optionally, the infrared light absorbing back gate layer 20 is an N-type Ge layer. The N-type Ge layer has good absorption and response performance to infrared light and good conductivity, which is conducive to stable response state control by applying a specific gate voltage.

[0029] Optionally, the infrared light absorbing back grid layer 20 has a thickness of 1 μm to 5 μm. When the thickness of the infrared light absorbing back grid layer 20 is within this range, better absorption and response effects to infrared light can be ensured.

[0030] For example, the infrared light absorption back gate layer 20 may have a thickness of 1 μm, 3 μm, or 5 μm.

[0031] For example, the material of the dielectric layer 30 may be SiO 2 .

[0032] In other embodiments, the material of the dielectric layer 30 can be adjusted according to actual needs, and the present disclosure does not limit this.

[0033] Optionally, the dielectric layer 30 has a thickness of 260 nm to 340 nm.

[0034] For example, the thickness of the dielectric layer 30 may be 260 nm, 300 nm, or 340 nm.

[0035] For example, the gate electrode layer 40 and the dielectric layer 30 are connected and are both disposed on the infrared light absorbing back gate layer 20. The gate electrode layer 40 is electrically connected to the infrared light absorbing back gate layer 20 and does not contact the floating gate layer 50. The provision of the gate electrode layer 40 facilitates the introduction of external electrical signals into the infrared light absorbing back gate layer 20 through the gate electrode layer 40, thereby regulating the device's response to light of different wavelengths.

[0036] Optionally, the gate electrode layer 40 includes a Pt layer and an Au layer sequentially stacked in a direction away from the infrared light absorption back gate layer 20 , or includes a Ni layer and an Au layer sequentially stacked in a direction away from the infrared light absorption back gate layer 20 .

[0037] Optionally, the gate electrode layer 40 has a thickness of 83 nm to 160 nm.

[0038] For example, when the gate electrode layer 40 includes a Ni layer and an Au layer stacked in sequence in a direction away from the infrared light absorbing back gate layer 20 , the thickness of the Ni layer may be 3 nm to 10 nm, and the thickness of the Au layer may be 80 nm to 150 nm.

[0039] Optionally, the floating gate layer 50 is made of graphene. Graphene has excellent electrical conductivity and high carrier mobility, and can effectively store charge, thereby ensuring good operating reliability of the two-dimensional flexible photodetector.

[0040] Optionally, the floating gate layer 50 has a thickness of 0.3 nm to 1 nm.

[0041] For example, the thickness of the floating gate layer 50 may be 0.3 nm, 0.7 nm, or 1 nm.

[0042] Optionally, the tunneling layer 60 is made of hexagonal boron nitride (h-BN). h-BN can achieve charge tunneling and charge blocking, and has a good carrier control effect. The combination of h-BN and graphene can effectively achieve non-volatile storage function.

[0043] Optionally, the tunneling layer 60 has a thickness of 6 nm to 11 nm.

[0044] For example, the thickness of the tunneling layer 60 may be 6 nm, 9 nm, or 11 nm.

[0045] Optionally, the material of the mixed-phase transition metal chalcogenide film layer 70 is MoS2 having a 1T phase and a 2H phase. In this way, the mixed-phase transition metal chalcogenide film layer 70 can construct a multi-level structure, further extending the light response range. Its photoelectric conversion efficiency changes significantly with the extension of the light response range, which is conducive to achieving wide-spectrum photoelectric detection.

[0046] Optionally, the thickness of the mixed-phase transition metal chalcogenide film layer 70 is 10 nm to 15 nm. When the thickness of the mixed-phase transition metal chalcogenide film layer 70 is within this range, a good photoelectric response effect to visible light can be ensured.

[0047] For example, the thickness of the mixed-phase transition metal chalcogenide film layer 70 may be 10 nm, 13 nm, or 15 nm.

[0048] Optionally, the material of the two-dimensional semiconductor functional layer 80 is N-type In2S3. N-type In2S3 can respond to visible light, enhance carrier transport in the short-wave region, and thus enhance short-wave response. Combining it with the mixed-phase transition metal chalcogenide film layer 70 can achieve functional complementarity and performance enhancement through energy band optimization. The combination of N-type In2S3 and MoS2 with 1T and 2H phases not only ensures good interface properties, but also significantly improves the cross-interface transmission efficiency of carriers, which is conducive to improving the sensitivity of the device.

[0049] Optionally, the thickness of the two-dimensional semiconductor functional layer 80 is 130 nm to 170 nm. When the thickness of the two-dimensional semiconductor functional layer 80 is within this range, the cross-interface transmission efficiency of carriers can be effectively improved.

[0050] For example, the thickness of the two-dimensional semiconductor functional layer 80 may be 130 nm, 150 nm, or 170 nm.

[0051] Optionally, the thickness of the electrode layer 90 is 10 nm to 90 nm.

[0052] For example, the thickness of the electrode layer 90 may be 10 nm, 50 nm, or 90 nm.

[0053] Exemplarily, the electrode layer 90 includes a source electrode 91 and a drain electrode 92 , and the source electrode 91 and the drain electrode 92 are spaced apart and arranged on the two-dimensional semiconductor functional layer 80 .

[0054] Exemplarily, the material of the electrode layer 90 may be Ag.

[0055] In other embodiments, the material of the electrode layer 90 can be adjusted according to actual needs, and the present disclosure does not limit this.

[0056] It should be noted that the aforementioned other film layer structures may also adopt other materials according to actual needs, as long as they can achieve the same effects as the embodiments of the present disclosure, and the present disclosure does not impose any restrictions on this.

[0057] The following is an exemplary description of the working mode of the two-dimensional flexible photodetector in the embodiment of the present disclosure.

[0058] In the embodiment of the present disclosure, a specific gate voltage can be applied to the gate electrode layer 40, that is, a specific gate voltage is applied to the infrared absorption back gate layer 20, to regulate the charge storage state in the non-volatile storage structure composed of the floating gate layer 50 and the tunneling layer 60, to regulate the channel current of the two-dimensional flexible photodetector, and then change the channel resistance, and to regulate the response state of the two-dimensional flexible photodetector to light of different wavelengths in the wavelength range from visible light to infrared light.

[0059] For example, a two-dimensional flexible photodetector can be connected in series with a fixed resistor. Gate voltage pulses of varying amplitudes or widths can be applied to the gate electrode layer 40 to controllably change the channel resistance of the two-dimensional flexible photodetector. This changes the resistance ratio between the two-dimensional flexible photodetector and the series-connected fixed resistor, allowing the output voltage across the fixed resistor to accurately reflect this change in resistance ratio. By manipulating the device's channel resistance, the device can exhibit at least three different resistance states, corresponding to different wavelengths of light response, and thus at least three different operating modes: In the first, after applying a forward voltage pulse to the gate electrode layer 40, a large number of electrons accumulate in the floating gate layer 50, resulting in strong channel depletion and a high-resistance state. At this point, the device's channel resistance is much greater than the fixed resistance, and the output voltage approaches zero. Under infrared light, the device's response to infrared light is effectively suppressed due to the extremely low channel current, and the output voltage remains unchanged. Under visible light, the mixed-phase transition metal chalcogenide film 70 absorbs photons, enhancing its conductivity. This decreases the channel resistance and increases the output voltage. Therefore, in this operating mode, the two-dimensional flexible photodetector can respond only to visible light.

[0060] In the second mode, after applying a medium-amplitude voltage pulse to the gate electrode layer 40, some charge is stored in the floating gate layer 50, the device enters a medium-conductance state, the channel resistance is equivalent to the fixed resistor, and the output voltage is at an intermediate value. Under visible light irradiation, the mixed-phase transition metal chalcogenide film layer 70 produces a positive photoresponse, causing the channel resistance to decrease and the output voltage to increase. Under infrared light irradiation, the infrared-absorbing back-gate layer 20 absorbs the infrared light and produces a negative photoresponse. The grating effect modulates the channel, causing the channel resistance to increase and the output voltage to decrease. Therefore, in this operating mode, the two-dimensional flexible photodetector can respond simultaneously to visible and infrared light, achieving dual-band imaging.

[0061] Third, applying a negative voltage pulse to the gate electrode layer 40 releases the charge in the floating gate layer 50, fully conducting the channel and assuming a low-resistance state. At this point, the device's channel resistance is much smaller than the fixed resistance, and the output voltage approaches the power supply voltage. Under visible light, the effect on the channel resistance is minimal, and the output voltage remains unchanged, making the device insensitive to visible light. Under infrared light, the grating effect of the infrared-absorbing back-gate layer 20 increases the channel resistance and decreases the output voltage. Therefore, in this operating mode, the two-dimensional flexible photodetector can respond only to infrared light.

[0062] Figure 2 This is a flow chart of a method for manufacturing a two-dimensional flexible photodetector provided by an embodiment of the present disclosure. Figure 2 As shown, the production method includes: In step S1 , an infrared light absorbing back gate layer is formed on a flexible substrate.

[0063] The infrared light absorbing back gate layer is used to respond to infrared light and regulate the response state of the two-dimensional flexible photodetector to light of different wavelengths according to the gate voltage.

[0064] In step S2 , a dielectric layer and a gate electrode layer are formed on the infrared light absorbing back gate layer.

[0065] In step S3 , a floating gate layer is formed on the dielectric layer.

[0066] In step S4 , a tunneling layer is formed on the floating gate layer.

[0067] In step S5, a mixed-phase transition metal chalcogenide film layer is formed on the tunneling layer. The mixed-phase transition metal sulfide compound film layer is used to generate a positive photoelectric response under the irradiation of visible light, and the current in the mixed-phase transition metal sulfide compound film layer can be regulated by voltage.

[0068] In step S6 , a two-dimensional semiconductor functional layer is formed on the mixed-phase transition metal chalcogenide film layer.

[0069] Two-dimensional semiconductor functional layers are used to respond to visible light and enhance short-wavelength response.

[0070] In step S7 , an electrode layer is formed on the two-dimensional semiconductor functional layer.

[0071] It should be noted that the manufacturing method embodiment is different from the above Figure 1 The structural embodiments are based on the same inventive concept. The beneficial effects of the embodiments of the present disclosure can be found in the above structural embodiments and will not be repeated here.

[0072] Figures 3 to 8 This is a schematic diagram of the manufacturing process of a two-dimensional flexible photodetector provided by the embodiment of the present disclosure. Figure 1 as well as Figures 3 to 8 , the above-mentioned production method is exemplified.

[0073] like Figure 3 As shown, step S1 may include the following steps: In step S101, a flexible substrate 10 is provided, comprising: First, the borosilicate glass slide is pretreated, for example, by ultrasonic cleaning with acetone for 30 to 300 seconds, followed by rinsing with isopropyl alcohol, and further oxygen plasma treatment with a treatment power controlled between 80W and 120W.

[0074] A temporary polyimide (PI) support film is then attached to the pretreated glass slide surface via a pressure-sensitive adhesive layer. Subsequently, a PDMS prepolymer and a curing agent are mixed at a mass ratio of 9:1 to 11:1, preferably 10:1. After thorough mixing, the mixture is vacuum degassed. The degassed mixture is spin-coated at a speed of 800 to 1200 rpm for 30 to 40 seconds. After spin coating, the mixture is thermally cured at a temperature of 70°C to 90°C, preferably 80°C, to obtain a flexible substrate 10 with a thickness of 60 to 100 μm.

[0075] In step S102, an infrared light absorbing back gate layer 20 is formed on the flexible substrate 10, including: First, provide a 4-inch, double-sided polished, 160μm±5μm thick, crystal orientation <100> , N-type single crystal Ge wafer with a resistivity of 1.10Ω·cm, or other single crystal Ge wafers with similar thickness, resistivity range, and crystal orientation.

[0076] The Ge wafer was fixed using a custom-made annular Teflon fixture. The fixed Ge wafer and fixture were then cleaned sequentially with acetone, isopropyl alcohol, anhydrous ethanol, and deionized water, and then dried using high-purity nitrogen.

[0077] Then, using a graduated cylinder, measure 250ml of HF, 200ml of NH₄OH, 400ml of H₂O₂, and 3000ml of deionized water. Pour these into a Teflon beaker in that order. Stir the mixture at 500 rpm for 10 minutes at room temperature using a magnetic stirrer to ensure uniform mixing and temperature stability. The composition of the etching solution can be adjusted flexibly based on experimental needs.

[0078] A clamped Ge wafer was placed horizontally in the etching solution, with an electric stirrer placed above the Ge wafer and a magnetic stirrer below. Both the magnetic stirrer and the electric stirrer were set to 100 rpm. The Ge wafer was thinned to obtain a Ge film with a thickness of 1 to 5 μm.

[0079] In order to monitor the etching thickness of the Ge wafer in real time, a Ge wafer sample with a size of 10mm×10mm can be placed in the etching solution for 20 minutes in advance, and the Ge wafer sample can be taken out regularly during the etching process for thickness measurement to ensure that the thickness of the final Ge film is controlled below 5μm.

[0080] After thinning is completed, the resulting Ge film is slowly placed in deionized water for rinsing, and further rinsed with deionized water, and finally dried with high-purity nitrogen. Subsequently, the Ge film is directly attached to the surface of the flexible substrate 10 to form a good adhesion interface. After the attachment is completed, acetone, isopropyl alcohol, anhydrous ethanol and deionized water are used to clean the surface of the Ge film in sequence to remove organic pollutants and dust, and a nitrogen gun is used to dry the residual moisture. Finally, the cleaned Ge film is placed in an oxygen plasma cleaning machine for surface modification treatment to obtain an infrared light absorbing back gate layer 20 to improve the wettability of the subsequent photoresist on the infrared light absorbing back gate layer 20 and the surface of the flexible substrate 10.

[0081] like Figure 4 As shown, step S2 may include the following steps: First, the plasma-enhanced chemical vapor deposition (PECVD) reaction chamber is pretreated: argon gas is introduced at a flow rate of 200 to 500 sccm, and RF power of 10 to 50 W is applied at a frequency of 13.56 MHz. Low-power plasma cleaning is performed for 1 to 5 minutes while maintaining the substrate temperature at 80°C to 100°C. This effectively removes residual impurities in the reaction chamber while preventing damage to the surface of the infrared light-absorbing back-gate layer 20. Subsequently, plasma stabilization pretreatment is performed: maintaining an argon flow rate of 200 to 500 sccm and applying RF power of 10 to 50 W for 3 to 8 minutes to stabilize the reaction environment. During this period, the substrate temperature is monitored in real time by thermocouples and fed back to the temperature control system to ensure a constant temperature of 80°C to 100°C. No material deposition is performed at this time.

[0082] After the pretreatment is completed, the structure obtained in step S102 is loaded onto the substrate, and the closed-loop temperature control system is immediately activated to ensure that the substrate temperature fluctuation during the deposition process is controlled within ±1°C. At the same time, the vacuum system is activated to pump the reaction chamber pressure to 5×10 -6 Torr or less.

[0083] During the formal deposition phase, the precursor gases are switched to 10 sccm to 30 sccm of SiH4 and 300 sccm to 500 sccm of N2O, and the working pressure of the reaction chamber is stably maintained at 0.6 Torr to 1.2 Torr through dynamic feedback control. Under the condition of a constant substrate temperature of 70°C to 95°C, 50W to 80W of RF power is applied, the frequency of the RF power source is 13.56MHz, and the impedance matcher is adjusted to make the reflected power less than 1%. During the deposition process, an infrared thermal imager is used to monitor the surface temperature of the flexible substrate 10 in real time to ensure that it is always below 95°C to prevent PDMS from undergoing glass transition or thermal damage. The deposition time is set to 10min to 20min to obtain a SiO2 layer with a thickness of 260nm to 340nm.

[0084] After deposition, the SiH4 and N2O gas supplies are immediately shut off, along with the RF power. High-purity nitrogen is then introduced at a rate of 200 to 400 sccm, and the temperature is programmed to decrease at a rate of 0.3 to 0.5°C / s until the substrate temperature drops below 80°C.

[0085] Spin-coat the positive photoresist on the SiO2 layer at 3000 rpm for 30 seconds to form a 1.2±0.1μm thick photoresist layer. The photoresist layer covers at least 200μm beyond the edge of the device active area to ensure complete coverage. Then bake on a hot plate at 90℃ to 95℃ for 90s, remove the solvent, and use a contact lithography machine at 80mJ / cm 2 Up to 120 mJ / cm 2 The mask is designed as a rectangular window array with a single window size of 20×20μm. 2 The array pitch is 50μm. After exposure, the film is post-baked at 110°C for 60 seconds and then immersed in a 2.38% tetramethylammonium hydroxide (TMAH) developer for 30 to 60 seconds to form a clear contact window pattern. After development, the window sidewall angle is 85° ± 2° (confirmed by scanning electron microscopy cross-section measurements).

[0086] After development, a reactive ion etching (RIE) system was used to open the SiO2 contact window. The etching gas was a mixture of 50 sccm of CF4 and 5 sccm of O2. The etching was performed under the conditions of 20 mTorr chamber pressure and 150 W RF power. The etching endpoint was monitored by optical emission spectroscopy (OES). + The intensity change of the characteristic peak (440 nm) is determined, and 10% to 20% overetching is continued after the endpoint to ensure that the window is fully opened. The process time is about 5min30s.

[0087] After the etching is completed, oxygen plasma ashing treatment is performed for 3 to 7 minutes under the conditions of 80 W to 120 W radio frequency power and 10 sccm of O2 to remove residual photoresist and clean the contact window to obtain the dielectric layer 30.

[0088] Subsequently, Ni and Au were deposited in the electron beam evaporation system in sequence: before deposition, the sample chamber was evacuated to a background vacuum of less than 5×10 -6 Torr, a 3nm to 10nm Ni layer was first deposited as an adhesion layer at a rate of 0.1 to 0.3 Å / s, followed by an 80nm to 150nm Au layer at a rate of 0.8 to 1.2 Å / s. The sample stage was kept water-cooled at 25°C during deposition to prevent thermal damage.

[0089] After metal deposition is complete, the sample is immersed in a room temperature acetone solution for 30 to 60 minutes to remove excess photoresist, thereby obtaining the gate electrode layer 40. Ultrasonic treatment is avoided to prevent damage to the flexible substrate 10 or the infrared light absorbing back gate layer 20. A final stripping process is then performed, where the temporary PI support film and the glass slide are mechanically separated from the flexible substrate 10. For example, ultrasonic stripping can be performed for less than or equal to 20 seconds using a low power of less than or equal to 40 W, or a gentle stripping process can be performed using N-methylpyrrolidone (NMP) solvent.

[0090] like Figure 5 As shown, step S3 may include the following steps: In step S301, a floating gate material layer is formed on a first temporary substrate, including: A 25μm to 100μm thick copper foil was selected as the first temporary substrate for annealing. The annealing temperature was set at 1060°C to 1080°C for 8 to 16 hours. Before heating, the copper foil was placed in a chemical vapor deposition (CVD) chamber and heated for approximately 5 minutes under a reducing gas (H2:Ar = 50:250) until it reached 1040°C to 1050°C. The atmosphere was adjusted to a graphene growth atmosphere and maintained at this temperature for a period of time. A carbon source was introduced to initiate the reaction. The carbon source was then removed and the copper foil was allowed to cool to room temperature in the reducing atmosphere to form a floating gate material layer on the first temporary substrate.

[0091] After the growth is complete, the CVD chamber is quickly cooled to room temperature and a mixture of Ar and H2 is introduced to raise the pressure of the CVD chamber to atmospheric pressure. The sample is removed from the chamber, and the CVD experiment is terminated.

[0092] In step S302, the floating gate material layer is transferred onto the dielectric layer 30, including: After selecting the graphene area on the copper foil, the graphene is tightly adhered with thermal release tape. After applying pressure for 5 minutes, the thermal release tape is slowly peeled off from one corner. The side of the thermal release tape with the graphene adhered to it is attached to the dielectric layer 30. The entire structure is then heated to 65°C. As the temperature increases, the thermal release tape loses its stickiness and is easily peeled off from the graphene. The entire transfer process is completed by purging with a high-purity nitrogen gun to obtain the floating gate layer 50.

[0093] like Figure 6 As shown, step S4 may include the following steps: In step S401, a tunneling material layer is formed on a second temporary substrate, comprising: A high-purity copper foil with a thickness of 20 μm to 30 μm is provided as a second temporary substrate; the copper foil is placed in a tubular furnace reaction chamber, and is heated to 1040° C. to 1060° C. at a heating rate of 10° C. / min to 15° C. / min under an argon protective atmosphere, and maintained for 3 hours to 6 hours for annealing.

[0094] Ammonia borane is used as a precursor and decomposed at an evaporation temperature of 90°C to 100°C to generate borazine gas; 10sccm to 100sccm of argon is used as a carrier gas to transport the borazine gas to a reaction chamber, and h-BN crystals are continuously grown for 60min to 70min at a growth temperature of 950°C to 1050°C and a pressure of 30Pa to 40Pa to form a tunneling material layer on a second temporary substrate. During the growth process, the back side of the copper foil is controlled to face the direction of the reaction gas flow.

[0095] In step S402, the tunneling material layer is transferred onto the floating gate layer 50, including: The h-BN crystals were transferred to a 1-inch-wide first blue film tape by mechanical exfoliation to form a master tape. A 1-inch-wide second blue film tape was used as a sub-tape and subjected to a secondary exfoliation process with the master tape to obtain h-BN sheets with uniform thickness.

[0096] The thinned h-BN sheet was transferred from the sub-tape to the PDMS surface using a 4×3 array of rectangular PDMS blocks. The individual PDMS blocks measured 4 mm × 2.5 mm × 0.5 mm. The h-BN sheet was then transferred onto the floating gate layer 50 using a two-dimensional material transfer system, maintaining a contact pressure between 0.1 N and 0.5 N to form the tunneling layer 60.

[0097] like Figure 7 As shown, step S5 may include the following steps: In step S501, a mixed-phase transition metal chalcogenide material layer is formed on a third temporary substrate, including: forming the mixed-phase transition metal chalcogenide material layer on the third temporary substrate using a pulsed laser induction method, for example: Use a high-precision electronic balance to weigh 200 mg to 480 mg of MoCl5 and 100 mg to 700 mg of thiourea, place them in a round-bottom flask, then use a pipette to draw 2 mL to 5 mL of isopropanol into the round-bottom flask; use a Si wafer with a 100 nm to 150 nm oxide layer, and use a diamond knife to cut the Si wafer into squares with a side length of 1 cm to 2 cm; then ultrasonically clean the Si wafer with acetone and ethanol, respectively, and finally blow dry the Si wafer with a nitrogen gun as a third temporary substrate.

[0098] Place the round-bottom flask on a magnetic stirrer supported by an iron stand and stir in a water bath. Set the stirring speed to 1500-2000 rpm, the stirring temperature to 50-70°C, and the stirring time to 1-3 hours. After stirring, pipette the reaction precursor solution into a reagent bottle.

[0099] Use tweezers to place the cleaned Si wafer on the table of the coating machine and press the adsorption button; then use a pipette to drop the reaction precursor solution on the Si wafer and spread it evenly on the entire surface of the Si wafer; set the spin coating parameters to 500rpm for 30s to 45s, and 800rpm to 3000rpm for 30s, and then start spin coating; place the spin-coated sample on a baking plate, set the baking temperature to 90℃ to 120℃, and the baking time to 3min to 10min, and wait until the reaction precursor solution is completely dried.

[0100] Place the Si wafer with the precursor spin-coated in a vacuum chamber and evacuate the chamber. Set the laser process parameters to 150 mJ / cm 2 Up to 250 mJ / cm 2 The laser was then pulsed at a frequency of 3 Hz to 7 Hz, a scanning speed of 0.2 mm / s to 2 mm / s, 1,500 to 3,000 pulses, and a scanning area of ​​1.5 cm × 0.2 cm in a rectangular shape. The laser spot size was 2 mm × 1 mm. After laser irradiation, the Si wafer was cleaned with isopropyl alcohol and ultrapure water at low power ultrasonic speeds for 2 to 10 minutes, respectively, to prevent damage to the mixed-phase transition metal chalcogenide material caused by excessive power. The wafer was then dried with a nitrogen gun to form a mixed-phase transition metal chalcogenide material layer on a third temporary substrate.

[0101] In step S502, the mixed-phase transition metal chalcogenide material layer is transferred onto the tunneling layer 60, including: Weigh 0.75g to 1.5g of polyvinyl pyrrolidone (PVP) powder into a test tube. Add 1.0mL to 1.5mL of 99.5% pure N-vinyl pyrrolidone (NVP) and 0.75mL of deionized water to the test tube. Finally, add alcohol dropwise to the test tube to make approximately 10mL of PVP colloidal solution. Dissolve polyvinyl alcohol (PVA) particles in deionized water and magnetically stir at room temperature for 30 minutes. At this point, the PVA particles will not completely dissolve. Then, increase the temperature and continue magnetic stirring until the PVA is completely dissolved. This forms a PVA colloidal solution, which is then placed in a vacuum for at least 12 hours.

[0102] A few drops of PVP colloidal solution were spin-coated on the mixed-phase transition metal chalcogenide material layer at 2500 rpm for 1 minute, followed by baking at 70°C for 1 minute to remove the solvent, resulting in a PVP film. A PVA colloidal solution was spin-coated on top of the PVP film and baked under the same conditions, integrating the two water-soluble polymers into a solid adhesive film. The solid adhesive film and the mixed-phase transition metal chalcogenide material layer were removed from the third temporary substrate using tweezers and transferred to the tunneling layer 60, where they adhered electrostatically. The sample was then heated in a water bath at 60°C to 80°C, the solid adhesive film removed, and the sample dried, resulting in the mixed-phase transition metal chalcogenide film layer 70.

[0103] like Figure 8 As shown, step S6 may include the following steps: In step S601, forming a two-dimensional semiconductor functional material layer on a fourth temporary substrate includes: The In2S3 powder is placed in the upstream area of ​​a horizontal hot-wall quartz tube furnace, wherein the temperature of the upstream area of ​​the horizontal hot-wall quartz tube furnace is 180°C to 220°C; the content of the In2S3 powder is 30mg to 50mg, and the purity of the In2S3 powder is greater than or equal to 99.99%.

[0104] A SiO2 substrate was installed in the downstream area of ​​the furnace as a fourth temporary substrate, 3 to 5 cm axially from the downstream area, with its surface perpendicular to the airflow. The reaction chamber was evacuated to a vacuum of 0.8 to 1.2 Torr. Argon was introduced as a shielding gas at a pressure of 35 to 45 sccm.

[0105] Keeping the flow rate of argon gas unchanged, the temperature of the fourth temporary substrate is raised to 550°C to 950°C, and the deposition time is maintained at 15 minutes to 90 minutes; after the deposition is completed, the system is naturally cooled to below 250°C to form an N-type In2S3 layer on the fourth temporary substrate to obtain a two-dimensional semiconductor functional material layer.

[0106] In step S602, the two-dimensional semiconductor functional material layer is transferred onto the mixed-phase transition metal chalcogenide compound film layer 70, including: 0.584 g of PVA powder and 5 ml of deionized water were added to a round-bottom flask, stirred at 1500 rpm on a magnetic stirrer, and heated to 80°C for complete dissolution to prepare a PVA colloidal solution; 1.5 g of PVP powder was mixed with 1.5 ml of 99.5% pure NVP, 0.75 ml of deionized water was added, and ethanol was added to a total volume of 10 ml. The mixture was ultrasonically treated for 60 minutes to prepare a composite glue solution of PVP and PVA.

[0107] A glue-tipped dropper was used to drop the composite glue of PVP and PVA onto the two-dimensional semiconductor functional material layer. A two-step spin coating process was adopted, first at a speed of 500 rpm for 30 seconds, and then at a speed of 1500 rpm for 30 seconds. The sample after spin coating with the composite glue of PVP and PVA was placed on a 70°C hot plate and baked for 1 minute until completely cured to obtain an adhesive layer. Use precision tweezers to create an initial peeling point at the edge of the adhesive layer, and perform mechanical peeling at a constant angle and speed to peel the adhesive layer and the two-dimensional semiconductor functional material layer from the fourth temporary substrate; add a deionized water wetting layer on the mixed-phase transition metal sulfide compound film layer 70, and accurately align the composite structure of the adhesive layer and the two-dimensional semiconductor functional material layer and lay it flat on the mixed-phase transition metal sulfide compound film layer 70, and place it on an 80°C hot plate and heat it for 5 to 10 minutes; then place the sample in deionized water for gradient temperature water bath treatment, rinse the sample surface with deionized water, remove the adhesive layer and blow dry with nitrogen to obtain a two-dimensional semiconductor functional layer 80.

[0108] like Figure 1 As shown, step S7 may include the following steps: A photoresist is spin-coated on the two-dimensional semiconductor functional layer 80, and after exposure and development by an electron beam lithography machine (E-Beam Lithography, EBL), an electrode lithography area is formed on the two-dimensional semiconductor functional layer 80; an Ag film is evaporated in the electrode lithography area using an electron beam evaporation device; then, an acetone solution is used to remove excess photoresist to form a source electrode 91 and a drain electrode 92 in the electrode lithography area, respectively, to obtain an electrode layer 90, and the thickness of the electrode layer 90 is 10nm to 90nm.

[0109] The following will be combined Figure 1 as well as Figures 3 to 8 , the above-mentioned preparation method is further illustrated by Example 1.

[0110] Example 1: like Figure 3 As shown, step S1 may include the following steps: In step S101, a flexible substrate 10 is provided, comprising: First, the borosilicate glass slides were pretreated, for example, by ultrasonic cleaning with acetone for 300 seconds, followed by rinsing with isopropyl alcohol, and further oxygen plasma treatment with a treatment power of 100 W for 5 minutes.

[0111] A temporary PI support film was then attached to the pretreated glass slide surface via a pressure-sensitive adhesive layer. Subsequently, a PDMS prepolymer and a curing agent were mixed at a mass ratio of 10:1 and vacuum degassing was performed. The degassed mixture was spin-coated at 1000 rpm for 30 seconds. After spin coating, the mixture was thermally cured at 80°C, resulting in a flexible substrate 10 with a thickness of 65 μm.

[0112] In step S102, an infrared light absorbing back gate layer 20 is formed on the flexible substrate 10, including: First, provide a 4-inch, double-sided polished, 160μm thick, crystal orientation <100> , N-type single crystal Ge wafer with a resistivity of 1.10Ω·cm.

[0113] The Ge wafer was fixed using a custom-made annular Teflon fixture. The fixed Ge wafer and fixture were then cleaned sequentially with acetone, isopropyl alcohol, anhydrous ethanol, and deionized water, and then dried using high-purity nitrogen.

[0114] Then, use a measuring cylinder to measure 250 ml of HF, 200 ml of NH4OH, 400 ml of H2O2 and 3000 ml of deionized water, pour them into a Teflon beaker in sequence, and use a magnetic stirrer to stir at room temperature to obtain an etching solution to ensure that the solution is evenly mixed and the temperature is stable.

[0115] The clamped Ge wafer was immersed in the etching solution and stirred by an electric stirrer to thin the Ge wafer. The Ge wafer was then rinsed with deionized water to obtain a Ge film with a thickness of 1.5 μm.

[0116] After thinning, the resulting Ge film is slowly rinsed in deionized water, further rinsed with deionized water, and finally dried with high-purity nitrogen. Subsequently, the Ge film is directly attached to the surface of the flexible substrate 10 to form a good adhesion interface. After attachment, the surface of the Ge film is cleaned in sequence with acetone, isopropyl alcohol, anhydrous ethanol, and deionized water to remove organic pollutants and dust, and a nitrogen gun is used to dry the residual moisture. Finally, the cleaned Ge film is placed in an oxygen plasma cleaner for surface modification treatment to obtain an infrared light absorbing back gate layer 20.

[0117] like Figure 4 As shown, step S2 may include the following steps: First, the PECVD reaction chamber was pretreated by introducing argon gas at a flow rate of 200 sccm, applying 40 W of RF power, and performing plasma cleaning while maintaining the substrate temperature at 85°C.

[0118] After pretreatment, the structure obtained in step S102 was loaded onto a substrate. During the main deposition phase, the precursor gases were switched to 20 sccm of SiH₄ and 400 sccm of N₂O. Dynamic feedback control was used to maintain the reaction chamber operating pressure at a stable 0.6 Torr. With a constant substrate temperature of 75°C, 50 W of RF power was applied, and the deposition time was set to 20 minutes, resulting in a 260 nm thick SiO₂ layer.

[0119] Spin-coat the positive photoresist on the surface of the SiO2 layer at a speed of 3000 rpm to form a photoresist layer with a thickness of 1.2±0.1μm and a spray rate of 100mJ / cm 2 The patterned pattern was exposed with an exposure dose of 100 nm. After exposure, the pattern was developed in 2.38% TMAH developer for 30 seconds.

[0120] After development, etching was performed using an RIE system. The etching gas was a mixture of 50 sccm of CF4 and 5 sccm of O2. The etching was performed under a chamber pressure of 20 mTorr and a radio frequency power of 150 W.

[0121] After the etching is completed, oxygen plasma ashing treatment is performed to remove residual photoresist to obtain the dielectric layer 30 .

[0122] Subsequently, Ni and Au were deposited sequentially in an electron beam evaporation system: a 3 nm Ni layer was first deposited at a rate of 0.3 Å / s as an adhesion layer, and then an 80 nm Au layer was deposited at a rate of 1.2 Å / s.

[0123] After the metal deposition is completed, the sample is immersed in a room temperature acetone solution for 60 minutes to remove excess photoresist, thereby obtaining the gate electrode layer 40. A final stripping process is then performed, whereby the temporary PI support film and the glass slide are mechanically separated from the flexible substrate 10. For example, a mild stripping process can be performed using NMP solvent.

[0124] like Figure 5 As shown, step S3 may include the following steps: In step S301, a floating gate material layer is formed on a first temporary substrate, including: A 25μm-thick copper foil was selected as the first temporary substrate for annealing. The annealing temperature was set at 1080°C for 8 hours. Before heating, the copper foil was placed in a CVD chamber and heated to 1040°C using a reducing gas (H2:Ar = 50:250) for approximately 5 minutes. The atmosphere was then adjusted to a graphene growth atmosphere (CH4:H2:Ar = 3:20:200) and the temperature was maintained for a period of 12 minutes. CH4 was then introduced to initiate the reaction. The CH4 flow was stopped, and the copper foil was allowed to cool to room temperature in the reducing atmosphere (H2:Ar = 50:250) to form a floating gate material layer on the first temporary substrate.

[0125] After the growth is complete, the CVD chamber is quickly cooled to room temperature and a mixture of Ar and H2 is introduced to raise the pressure of the CVD chamber to atmospheric pressure. The sample is removed from the chamber, and the CVD experiment is terminated.

[0126] In step S302, the floating gate material layer is transferred onto the dielectric layer 30, including: After selecting the graphene area on the copper foil, the graphene is tightly adhered with thermal release tape. After applying pressure for 5 minutes, the thermal release tape is slowly peeled off from one corner. The side of the thermal release tape with the graphene adhered to it is attached to the dielectric layer 30. The entire structure is then heated to 65°C. As the temperature increases, the thermal release tape loses its stickiness and is easily peeled off from the graphene. The entire transfer process is completed by purging with a high-purity nitrogen gun to obtain the floating gate layer 50.

[0127] like Figure 6 As shown, step S4 may include the following steps: In step S401, a tunneling material layer is formed on a second temporary substrate, comprising: A high-purity copper foil with a thickness of 20 μm is provided as a second temporary substrate; the copper foil is placed in a tubular furnace reaction chamber, and the temperature is raised to 1040° C. at a heating rate of 10° C. / min under an argon protective atmosphere, and maintained for 3 hours for annealing.

[0128] Ammonia borane was used as a precursor and decomposed at an evaporation temperature of 90°C to generate borazine gas. Argon at 10 sccm was used as a carrier gas to deliver the borazine gas to the reaction chamber. h-BN crystals were grown continuously for 60 minutes at a growth temperature of 950°C and a pressure of 30 Pa to form a tunneling material layer on a second temporary substrate. During the growth process, the back side of the copper foil was controlled to face the direction of the reaction gas flow.

[0129] In step S402, the tunneling material layer is transferred onto the floating gate layer 50, including: The h-BN crystals were transferred to a 1-inch-wide first blue film tape by mechanical exfoliation to form a master tape. A 1-inch-wide second blue film tape was used as a sub-tape and subjected to a secondary exfoliation process with the master tape to obtain h-BN sheets with uniform thickness.

[0130] The thinned h-BN sheet was transferred from the sub-tape to the PDMS surface using a 4×3 array of rectangular PDMS blocks. The individual PDMS blocks measured 4 mm × 2.5 mm × 0.5 mm. The h-BN sheet was then transferred onto the floating gate layer 50 using a two-dimensional material transfer system, maintaining a contact pressure between 0.1 N and 0.5 N to form the tunneling layer 60.

[0131] like Figure 7 As shown, step S5 may include the following steps: In step S501, a mixed-phase transition metal chalcogenide material layer is formed on a third temporary substrate, comprising: Use a high-precision electronic balance to weigh 200 mg of MoCl5 and 400 mg of thiourea, place them in a round-bottom flask, then use a pipette to draw 2 mL of isopropanol into the round-bottom flask; use a Si wafer with a 100 nm oxide layer, and use a diamond knife to cut the Si wafer into squares with a side length of 2 cm; then ultrasonically clean the Si wafer with acetone and ethanol, respectively, and finally blow dry the Si wafer with a nitrogen gun as a third temporary substrate.

[0132] Place the round-bottom flask on a magnetic stirrer with an iron stand for magnetic stirring in a water bath. Set the stirring speed to 1900 rpm, the stirring temperature to 50°C, and the stirring time to 3 hours. After stirring, use a pipette to aspirate the reaction precursor solution into a reagent bottle.

[0133] Use tweezers to place the cleaned Si wafer on the table of the coating machine and press the adsorption button; then use a pipette to drop the reaction precursor solution on the Si wafer and spread it evenly on the entire Si wafer surface; set the spin coating parameters to 500 rpm for 45 seconds and 2000 rpm for 30 seconds, and then start spin coating; place the spin-coated sample on a baking plate, set the baking temperature to 120°C and the baking time to 5 minutes, and wait until the reaction precursor solution is completely dried.

[0134] Place the Si wafer with the precursor spin-coated in a vacuum chamber and evacuate the chamber. Set the laser process parameters to 150 mJ / cm 2The laser was pulsed at a 3 Hz pulse frequency, a scanning speed of 1 mm / s, 1500 pulses, and a scanning area of ​​1.5 cm × 0.2 cm in a rectangular shape. The laser spot size was 2 mm × 1 mm. After laser irradiation, the Si wafer was cleaned with isopropyl alcohol and ultrapure water at low power ultrasonic speeds for 2 minutes each to prevent damage to the mixed-phase transition metal chalcogenide material caused by excessive power. The wafer was then dried with a nitrogen gun to form a mixed-phase transition metal chalcogenide material layer on a third temporary substrate.

[0135] In step S502, the mixed-phase transition metal chalcogenide material layer is transferred onto the tunneling layer 60, including: Weigh 1.5g of PVP powder into a test tube. Add 1.5mL of 99.5% pure NVP and 0.75mL of deionized water to the test tube. Finally, add alcohol dropwise to the test tube to make approximately 10mL of PVP colloidal solution. Dissolve 2.475g of PVA particles in 25mL of deionized water and magnetically stir at room temperature for 30 minutes. At this point, the PVA particles will not completely dissolve. Next, raise the temperature to 85°C and maintain magnetic stirring until the PVA is completely dissolved. This creates a PVA colloidal solution, which is then placed in a vacuum for at least 12 hours.

[0136] A few drops of PVP colloidal solution were spin-coated on the mixed-phase transition metal chalcogenide material layer at 2500 rpm for 1 minute, followed by baking at 70°C for 1 minute to remove the solvent, resulting in a PVP film. A PVA colloidal solution was spin-coated on top of the PVP film and baked under the same conditions, integrating the two water-soluble polymers into a solid adhesive film. The solid adhesive film and the mixed-phase transition metal chalcogenide material layer were removed from the third temporary substrate using tweezers and transferred to the tunneling layer 60, where they adhered electrostatically. The sample was heated in a 68°C water bath, the solid adhesive film removed, and the sample was blown dry to obtain the mixed-phase transition metal chalcogenide film layer 70.

[0137] like Figure 8 As shown, step S6 may include the following steps: In step S601, forming a two-dimensional semiconductor functional material layer on a fourth temporary substrate includes: In2S3 powder is placed in an upstream area of ​​a horizontal hot-wall quartz tube furnace, wherein the temperature of the upstream area of ​​the horizontal hot-wall quartz tube furnace is 180°C; the content of the In2S3 powder is 30 mg, and the purity of the In2S3 powder is greater than or equal to 99.99%.

[0138] A SiO2 substrate was installed in the downstream area of ​​the furnace as a fourth temporary substrate, 3 cm axially away from the downstream area, with its surface perpendicular to the airflow. The reaction chamber was evacuated to 0.8 Torr and filled with 35 sccm of argon as a shielding gas.

[0139] Keeping the argon flow rate unchanged, the temperature of the fourth temporary substrate is raised to 550°C, and the deposition time is maintained at 15 minutes. After the deposition is completed, the system is naturally cooled to below 250°C to form an N-type In2S3 layer on the fourth temporary substrate to obtain a two-dimensional semiconductor functional material layer.

[0140] In step S602, the two-dimensional semiconductor functional material layer is transferred onto the mixed-phase transition metal chalcogenide compound film layer 70, including: 0.584 g of PVA powder and 5 ml of deionized water were added to a round-bottom flask, stirred at 1500 rpm on a magnetic stirrer, and heated to 80°C for complete dissolution to prepare a PVA colloidal solution; 1.5 g of PVP powder was mixed with 1.5 ml of 99.5% pure NVP, 0.75 ml of deionized water was added, and ethanol was added to a total volume of 10 ml. The mixture was ultrasonically treated for 60 minutes to prepare a composite glue solution of PVP and PVA.

[0141] A glue-tipped dropper was used to drop the composite glue of PVP and PVA onto the two-dimensional semiconductor functional material layer. A two-step spin coating process was adopted, first at a speed of 500 rpm for 30 seconds, and then at a speed of 1500 rpm for 30 seconds. The sample after spin coating with the composite glue of PVP and PVA was placed on a 70°C hot plate and baked for 1 minute until completely cured to obtain an adhesive layer. Use precision tweezers to create an initial peeling point at the edge of the adhesive layer, and perform mechanical peeling at a constant angle and speed to peel the adhesive layer and the two-dimensional semiconductor functional material layer from the fourth temporary substrate; add a deionized water wetting layer on the mixed-phase transition metal sulfide compound film layer 70, and accurately align the composite structure of the adhesive layer and the two-dimensional semiconductor functional material layer and lay it flat on the mixed-phase transition metal sulfide compound film layer 70, and place it on an 80°C hot plate and heat it for 5 to 10 minutes; then place the sample in deionized water for gradient temperature water bath treatment, rinse the sample surface with deionized water, remove the adhesive layer and blow dry with nitrogen to obtain a two-dimensional semiconductor functional layer 80.

[0142] like Figure 1 As shown, step S7 may include the following steps: 4% polymethylmethacrylate (PMMA) photoresist was spin-coated on the two-dimensional semiconductor functional layer 80 at a rotation speed of 2000 rpm for 70 seconds. The layer was placed on a hot plate and baked at 170° C. for 3 minutes and 30 seconds. The spin-coated thickness of the photoresist was 450 nm.

[0143] After EBL exposure and development in a methyl isobutyl ketone (MIBK) developer solution for 30 seconds, the film is moved to an isopropyl alcohol solution and soaked for 80 seconds. The film is rinsed with deionized water and then blown dry with a nitrogen gun to form an electrode photolithography area on the two-dimensional semiconductor functional layer 80. An Ag film is evaporated in the electrode photolithography area using an electron beam evaporation device. The film is then soaked in an acetone solution for 20 minutes to remove excess photoresist, thereby forming a source electrode 91 and a drain electrode 92 in the electrode photolithography area to obtain an electrode layer 90. The thickness of the electrode layer 90 is 10 nm.

[0144] The following will be combined Figure 1 as well as Figures 3 to 8 , the above-mentioned preparation method is further illustrated by Example 2.

[0145] Example 2: like Figure 3 As shown, step S1 may include the following steps: In step S101, a flexible substrate 10 is provided, comprising: First, the borosilicate glass slides were pretreated, for example, by ultrasonic cleaning with acetone for 300 seconds, followed by rinsing with isopropyl alcohol, and then oxygen plasma treatment with a treatment power of 120 W for 4 minutes.

[0146] A temporary PI support film was then attached to the pretreated glass slide surface via a pressure-sensitive adhesive layer. Subsequently, a PDMS prepolymer and a curing agent were mixed at a mass ratio of 9:1 and vacuum degassing was performed. The degassed mixture was spin-coated at 1100 rpm for 30 seconds. After spin coating, the mixture was thermally cured at 80°C, resulting in a flexible substrate 10 with a thickness of 70 μm.

[0147] In step S102, an infrared light absorbing back gate layer 20 is formed on the flexible substrate 10, including: First, provide a 4-inch, double-sided polished, 160μm thick, crystal orientation <100> , N-type single crystal Ge wafer with a resistivity of 1.10Ω·cm.

[0148] The Ge wafer was fixed using a custom-made annular Teflon fixture. The fixed Ge wafer and fixture were then cleaned sequentially with acetone, isopropyl alcohol, anhydrous ethanol, and deionized water, and then dried using high-purity nitrogen.

[0149] Then, use a measuring cylinder to measure 250 ml of HF, 200 ml of NH4OH, 400 ml of H2O2 and 3000 ml of deionized water, pour them into a Teflon beaker in sequence, and use a magnetic stirrer to stir at room temperature to obtain an etching solution to ensure that the solution is evenly mixed and the temperature is stable.

[0150] The clamped Ge wafer was immersed in the etching solution and stirred by an electric stirrer to thin the Ge wafer. The Ge wafer was then rinsed with deionized water to obtain a Ge film with a thickness of 2 μm.

[0151] After thinning, the resulting Ge film is slowly rinsed in deionized water, further rinsed with deionized water, and finally dried with high-purity nitrogen. Subsequently, the Ge film is directly attached to the surface of the flexible substrate 10 to form a good adhesion interface. After attachment, the surface of the Ge film is cleaned in sequence with acetone, isopropyl alcohol, anhydrous ethanol, and deionized water to remove organic pollutants and dust, and a nitrogen gun is used to dry the residual moisture. Finally, the cleaned Ge film is placed in an oxygen plasma cleaner for surface modification treatment to obtain an infrared light absorbing back gate layer 20.

[0152] like Figure 4 As shown, step S2 may include the following steps: First, the PECVD reaction chamber was pretreated by introducing argon gas at a flow rate of 300 sccm, applying 30 W of RF power, and performing plasma cleaning while maintaining the substrate temperature at 90°C.

[0153] After pretreatment, the structure obtained in step S102 was loaded onto a substrate. During the main deposition phase, the precursor gases were switched to 25 sccm of SiH₄ and 500 sccm of N₂O. Dynamic feedback control was used to maintain the reaction chamber operating pressure at a stable 0.7 Torr. With a constant substrate temperature of 80°C, 55 W of RF power was applied, and the deposition time was set to 20 minutes, resulting in a 270 nm thick SiO₂ layer.

[0154] Spin-coat the positive photoresist on the surface of the SiO2 layer at a speed of 3000 rpm to form a photoresist layer with a thickness of 1.2±0.1μm and a spray rate of 90mJ / cm 2 The patterned pattern was exposed with an exposure dose of 100 nm. After exposure, the pattern was developed in 2.38% TMAH developer for 30 seconds.

[0155] After development, etching was performed using an RIE system. The etching gas was a mixture of 50 sccm of CF4 and 5 sccm of O2. The etching was performed under a chamber pressure of 20 mTorr and a radio frequency power of 150 W.

[0156] After the etching is completed, oxygen plasma ashing treatment is performed to remove residual photoresist to obtain the dielectric layer 30 .

[0157] Subsequently, Ni and Au were sequentially deposited in an electron beam evaporation system: a 4 nm Ni layer was first deposited at a rate of 0.2 Å / s as an adhesion layer, and then a 85 nm Au layer was deposited at a rate of 0.9 Å / s.

[0158] After the metal deposition is completed, the sample is immersed in a room temperature acetone solution for 60 minutes to remove excess photoresist, thereby obtaining the gate electrode layer 40. A final stripping process is then performed, whereby the temporary PI support film and the glass slide are mechanically separated from the flexible substrate 10. For example, a mild stripping process can be performed using NMP solvent.

[0159] like Figure 5 As shown, step S3 may include the following steps: In step S301, a floating gate material layer is formed on a first temporary substrate, including: A 100μm-thick copper foil was selected as the first temporary substrate for annealing. The annealing temperature was set at 1080°C for 16 hours. Before heating, the copper foil was placed in a CVD chamber and heated to 1042°C using a reducing gas (H2:Ar = 50:250) for approximately 5 minutes. The atmosphere was then adjusted to a graphene growth atmosphere (CH4:H2:Ar = 3:20:200) and the temperature was maintained for a period of 12 minutes. CH4 was then introduced to initiate the reaction. The CH4 flow was stopped, and the copper foil was allowed to cool to room temperature in the reducing atmosphere (H2:Ar = 50:250) to form a floating gate material layer on the first temporary substrate.

[0160] After the growth is complete, the CVD chamber is quickly cooled to room temperature and a mixture of Ar and H2 is introduced to raise the pressure of the CVD chamber to atmospheric pressure. The sample is removed from the chamber, and the CVD experiment is terminated.

[0161] In step S302, the floating gate material layer is transferred onto the dielectric layer 30, including: After selecting the graphene area on the copper foil, the graphene is tightly adhered with thermal release tape. After applying pressure for 5 minutes, the thermal release tape is slowly peeled off from one corner. The side of the thermal release tape with the graphene adhered to it is attached to the dielectric layer 30. The entire structure is then heated to 65°C. As the temperature increases, the thermal release tape loses its stickiness and is easily peeled off from the graphene. The entire transfer process is completed by purging with a high-purity nitrogen gun to obtain the floating gate layer 50.

[0162] like Figure 6 As shown, step S4 may include the following steps: In step S401, a tunneling material layer is formed on a second temporary substrate, comprising: A high-purity copper foil with a thickness of 25 μm is provided as a second temporary substrate; the copper foil is placed in a tubular furnace reaction chamber, and the temperature is raised to 1045° C. at a heating rate of 11° C. / min under an argon protective atmosphere, and maintained for 3.5 hours for annealing.

[0163] Ammonia borane was used as a precursor, which decomposed at an evaporation temperature of 92°C to generate borazine gas. Argon at 20 sccm was used as a carrier gas to deliver the borazine gas to the reaction chamber. h-BN crystals were grown continuously for 62 minutes at a growth temperature of 960°C and a pressure of 32 Pa to form a tunneling material layer on a second temporary substrate. During the growth process, the back side of the copper foil was controlled to face the direction of the reaction gas flow.

[0164] In step S402, the tunneling material layer is transferred onto the floating gate layer 50, including: The h-BN crystals were transferred to a 1-inch-wide first blue film tape by mechanical exfoliation to form a master tape. A 1-inch-wide second blue film tape was used as a sub-tape and subjected to a secondary exfoliation process with the master tape to obtain h-BN sheets with uniform thickness.

[0165] The thinned h-BN sheet was transferred from the sub-tape to the PDMS surface using a 4×3 array of rectangular PDMS blocks. The individual PDMS blocks measured 4 mm × 2.5 mm × 0.5 mm. The h-BN sheet was then transferred onto the floating gate layer 50 using a two-dimensional material transfer system, maintaining a contact pressure between 0.1 N and 0.5 N to form the tunneling layer 60.

[0166] like Figure 7 As shown, step S5 may include the following steps: In step S501, a mixed-phase transition metal chalcogenide material layer is formed on a third temporary substrate, comprising: Use a high-precision electronic balance to weigh 250 mg of MoCl5 and 450 mg of thiourea, place them in a round-bottom flask, then use a pipette to draw 5 mL of isopropanol into the round-bottom flask; use a Si wafer with a 150 nm oxide layer, and use a diamond knife to cut the Si wafer into squares with a side length of 2 cm; then ultrasonically clean the Si wafer with acetone and ethanol respectively, and finally blow dry the Si wafer with a nitrogen gun as a third temporary substrate.

[0167] Place the round-bottom flask on a magnetic stirrer supported by an iron stand and stir in a water bath. Set the stirring speed to 2000 rpm, the stirring temperature to 65°C, and the stirring time to 2 hours. After stirring, use a pipette to aspirate the reaction precursor solution into a reagent bottle.

[0168] Use tweezers to place the cleaned Si wafer on the table of the coating machine and press the adsorption button; then use a pipette to drop the reaction precursor solution on the Si wafer and spread it evenly on the entire Si wafer surface; set the spin coating parameters to 500 rpm for 45 seconds and 2000 rpm for 30 seconds, and then start spin coating; place the spin-coated sample on a baking plate, set the baking temperature to 120°C and the baking time to 5 minutes, and wait until the reaction precursor solution is completely dried.

[0169] Place the Si wafer with the precursor spin-coated in a vacuum chamber and evacuate the chamber. Set the laser process parameters to 200 mJ / cm 2 The laser was pulsed at a 3 Hz pulse frequency, a scanning speed of 1 mm / s, 2000 pulses, and a scanning area of ​​1.5 cm × 0.2 cm in a rectangular shape. The laser spot size was 2 mm × 1 mm. After laser irradiation, the Si wafer was cleaned with isopropyl alcohol and ultrapure water at low power ultrasonic speeds for 8 minutes each to prevent damage to the mixed-phase transition metal chalcogenide material caused by excessive power. The wafer was then dried with a nitrogen gun to form a mixed-phase transition metal chalcogenide material layer on a third temporary substrate.

[0170] In step S502, the mixed-phase transition metal chalcogenide material layer is transferred onto the tunneling layer 60, including: Weigh 0.75g of PVP powder into a test tube. Add 1.5mL of 99.5% pure NVP and 0.75mL of deionized water to the test tube. Finally, add alcohol dropwise to the test tube to make approximately 10mL of PVP colloidal solution. Dissolve 3.0g of PVA particles in 25mL of deionized water and magnetically stir at room temperature for 30 minutes. At this point, the PVA particles will not completely dissolve. Next, raise the temperature to 85°C and maintain magnetic stirring until the PVA is completely dissolved. This creates a PVA colloidal solution, which is then placed in a vacuum for at least 12 hours.

[0171] A few drops of PVP colloidal solution were spin-coated on the mixed-phase transition metal chalcogenide material layer at 2500 rpm for 1 minute, followed by baking at 70°C for 1 minute to remove the solvent, resulting in a PVP film. A PVA colloidal solution was spin-coated on top of the PVP film and baked under the same conditions, integrating the two water-soluble polymers into a solid adhesive film. The solid adhesive film and the mixed-phase transition metal chalcogenide material layer were removed from the third temporary substrate using tweezers and transferred to the tunneling layer 60, where they adhered electrostatically. The sample was heated in an 80°C water bath, the solid adhesive film removed, and the sample dried, resulting in a mixed-phase transition metal chalcogenide film layer 70.

[0172] like Figure 8 As shown, step S6 may include the following steps: In step S601, forming a two-dimensional semiconductor functional material layer on a fourth temporary substrate includes: In2S3 powder is placed in an upstream area of ​​a horizontal hot-wall quartz tube furnace, wherein the temperature of the upstream area of ​​the horizontal hot-wall quartz tube furnace is 190°C; the content of the In2S3 powder is 32 mg, and the purity of the In2S3 powder is greater than or equal to 99.99%.

[0173] A SiO2 substrate was installed in the downstream area of ​​the furnace as a fourth temporary substrate, 3.5 cm axially away from the downstream area, with its surface perpendicular to the airflow. The reaction chamber was evacuated to 0.85 Torr and filled with 36 sccm of argon as a shielding gas.

[0174] Keeping the argon flow rate unchanged, the temperature of the fourth temporary substrate is raised to 650°C, and the deposition time is maintained at 25 minutes; after the deposition is completed, the system is naturally cooled to below 250°C to form an N-type In2S3 layer on the fourth temporary substrate to obtain a two-dimensional semiconductor functional material layer.

[0175] In step S602, the two-dimensional semiconductor functional material layer is transferred onto the mixed-phase transition metal chalcogenide compound film layer 70, including: 0.584 g of PVA powder and 5 ml of deionized water were added to a round-bottom flask, stirred at 1500 rpm on a magnetic stirrer, and heated to 80°C for complete dissolution to prepare a PVA colloidal solution; 1.5 g of PVP powder was mixed with 1.5 ml of 99.5% pure NVP, 0.75 ml of deionized water was added, and ethanol was added to a total volume of 10 ml. The mixture was ultrasonically treated for 60 minutes to prepare a composite glue solution of PVP and PVA.

[0176] A glue-tipped dropper was used to drop the composite glue of PVP and PVA onto the two-dimensional semiconductor functional material layer. A two-step spin coating process was adopted, first at a speed of 500 rpm for 30 seconds, and then at a speed of 1500 rpm for 30 seconds. The sample after spin coating with the composite glue of PVP and PVA was placed on a 70°C hot plate and baked for 1 minute until completely cured to obtain an adhesive layer. Use precision tweezers to create an initial peeling point at the edge of the adhesive layer, and perform mechanical peeling at a constant angle and speed to peel the adhesive layer and the two-dimensional semiconductor functional material layer from the fourth temporary substrate; add a deionized water wetting layer on the mixed-phase transition metal sulfide compound film layer 70, and accurately align the composite structure of the adhesive layer and the two-dimensional semiconductor functional material layer and lay it flat on the mixed-phase transition metal sulfide compound film layer 70, and place it on an 80°C hot plate and heat it for 5 to 10 minutes; then place the sample in deionized water for gradient temperature water bath treatment, rinse the sample surface with deionized water, remove the adhesive layer and blow dry with nitrogen to obtain a two-dimensional semiconductor functional layer 80.

[0177] like Figure 1 As shown, step S7 may include the following steps: 4% PMMA photoresist was spin-coated on the two-dimensional semiconductor functional layer 80 at a rotation speed of 2000 rpm for 70 seconds, and the layer was placed on a heating plate and baked at 170° C. for 3 minutes and 30 seconds. The spin-coated thickness of the photoresist was 450 nm.

[0178] After EBL exposure and development in MIBK developer solution for 30 seconds, the film is moved to an isopropyl alcohol solution and soaked for 80 seconds, rinsed with deionized water, and then blown dry with a nitrogen gun to form an electrode photolithography area on the two-dimensional semiconductor functional layer 80; using electron beam evaporation equipment, Ag film is evaporated in the electrode photolithography area; then, the film is soaked in acetone solution for 20 minutes to remove excess photoresist, so as to form a source 91 and a drain 92 in the electrode photolithography area, respectively, to obtain an electrode layer 90, and the thickness of the electrode layer 90 is 20 nm.

[0179] For other embodiments, their production steps can be understood by referring to the above embodiments. The differences between the various embodiments can be understood as the different selections of various parameters. The parameter selections of each embodiment can be exemplified in Table 1 below, which do not deviate from the description of the production method involved in the aforementioned embodiments.

[0180] Table 1

[0181]

[0182] An embodiment of the present disclosure also provides an electronic device, which includes any of the aforementioned flexible two-dimensional photodetectors.

[0183] Exemplarily, the electronic device may be any product with a photoelectric detection function, such as an imaging device or a flexible wearable device.

[0184] An embodiment of the present disclosure also provides a method for manufacturing an electronic device, which includes any one of the aforementioned methods for manufacturing the two-dimensional flexible photodetector.

[0185] The above description is merely an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the scope of protection of the present disclosure.

Claims

1. A two-dimensional flexible photodetector for wavelength-selective photodetection under illumination conditions, characterized in that: include: Flexible substrate; an infrared light absorbing back gate layer, disposed on the flexible substrate, for responding to infrared light and regulating the response state of the two-dimensional flexible photodetector to light of different wavelengths according to a gate voltage; A dielectric layer and a gate electrode layer are provided on the infrared light absorbing back gate layer; a floating gate layer, disposed on the dielectric layer; a tunneling layer, disposed on the floating gate layer; a mixed-phase transition metal chalcogenide film layer, disposed on the tunneling layer, for generating a positive photoelectric response under irradiation of visible light, wherein the current in the mixed-phase transition metal chalcogenide film layer can be regulated by voltage; A two-dimensional semiconductor functional layer is provided on the mixed-phase transition metal chalcogenide film layer, and is used to respond to visible light and enhance short-wave response; The electrode layer is arranged on the two-dimensional semiconductor functional layer.

2. The two-dimensional flexible photodetector according to claim 1, characterized in that: The infrared light absorbing back gate layer is an N-type Ge layer.

3. The two-dimensional flexible photodetector according to claim 2, characterized in that: The infrared light absorption back gate layer has a thickness of 1 μm to 5 μm.

4. The two-dimensional flexible photodetector according to claim 1, characterized in that: The material of the mixed-phase transition metal chalcogenide film layer is MoS2 having a 1T phase and a 2H phase.

5. The two-dimensional flexible photodetector according to claim 4, characterized in that: The thickness of the mixed-phase transition metal sulfide compound film layer is 10 nm to 15 nm.

6. The two-dimensional flexible photodetector according to claim 4, characterized in that: The material of the two-dimensional semiconductor functional layer is N-type In2S3.

7. The two-dimensional flexible photodetector according to claim 6, characterized in that: The thickness of the two-dimensional semiconductor functional layer is 130 nm to 170 nm.

8. The two-dimensional flexible photodetector according to any one of claims 1 to 7, characterized in that: The material of the floating gate layer is graphene.

9. The two-dimensional flexible photodetector according to claim 8, characterized in that: The material of the tunneling layer is hexagonal boron nitride.

10. A method for manufacturing a two-dimensional flexible photodetector, characterized in that: include: forming an infrared light absorbing back gate layer on the flexible substrate, wherein the infrared light absorbing back gate layer is used to respond to infrared light and regulate the response state of the two-dimensional flexible photodetector to light of different wavelengths according to a gate voltage; forming a dielectric layer and a gate electrode layer on the infrared light absorbing back gate layer; forming a floating gate layer on the dielectric layer; forming a tunneling layer on the floating gate layer; forming a mixed-phase transition metal chalcogenide film layer on the tunneling layer, wherein the mixed-phase transition metal chalcogenide film layer is used to generate a positive photoelectric response under the irradiation of visible light, and the current in the mixed-phase transition metal chalcogenide film layer can be controlled by voltage; forming a two-dimensional semiconductor functional layer on the mixed-phase transition metal chalcogenide film layer, wherein the two-dimensional semiconductor functional layer is used to respond to visible light and enhance short-wave response; An electrode layer is formed on the two-dimensional semiconductor functional layer.

Images