Circuit board damage detection optimization method and system

Abstract

The invention relates to the technical field of circuit board detection, and provides a circuit board damage detection optimization method and system, and the method comprises the following steps: S1, synchronously collecting a contact resistance signal, a probe pressure signal and environment data of a circuit board test point through a probe array, and carrying out the optimization processing of the collected data parameters; s2, establishing a contact impedance dynamic model, depicting the dynamic change of the contact impedance of the circuit board, extracting a characteristic signal for analysis, and mining the mode characteristics of an abnormal signal; and S3, fusing the abnormal multi-source evidences of the circuit board, processing the uncertainty and relevance among the evidences, and reversely deducing the positions and reasons of the potential defects on the circuit board. Through a multi-dimensional verification and error self-correction mechanism, the error between a defect solution and a real defect is quantified and reversely deduced by using posterior error estimation, so that the reliability and consistency of a detection result are improved, a reliable result support is provided for engineering application of circuit board damage detection, and meanwhile, the dependence on detection experience of detection personnel is avoided.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit board detection, and in particular to a circuit board damage detection optimization method and system. Background Art

[0002] During the production and application of circuit boards, circuit board damage detection methods usually collect electrical signals (such as voltage, current, impedance) and physical signals (such as temperature, stress), combine signal processing technology (such as wavelet transform and Fourier analysis) to extract fault characteristics, and then use machine learning or pattern recognition algorithms to identify defects.

[0003] However, this detection method has limitations in practical applications. In multi-scale fault modeling, separation analysis is often used, which makes it difficult to uniformly describe the coupling relationship between microscopic and macroscopic faults. Feature extraction is easily affected by scale differences, making it difficult to obtain stable features. When fusing multi-source evidence, the uncertainty and correlation in the time and frequency domains are not adequately handled. The inversion process is prone to multiple solutions due to the lack of targeted constraints, making it difficult to accurately locate the defect location and cause. As a result, the output cause of circuit board damage defects is significantly different from the actual cause of circuit board defects. It is often necessary to combine manual experience to judge and verify the output cause of circuit board damage defects. It is highly dependent on the work experience of the inspectors and is difficult to popularize. Summary of the Invention

[0004] In view of the problems existing in the prior art, the purpose of the present invention is to provide a circuit board damage detection optimization method and system to solve the problems raised by the above background technology.

[0005] To achieve the above objectives, the present invention provides a circuit board damage detection optimization method, comprising the following steps:

[0006] S1, synchronously collect contact resistance signals, probe pressure signals and environmental data of circuit board test points through a probe array, and optimize the collected data parameters;

[0007] S2. Establish a dynamic contact impedance model to describe the dynamic changes of the circuit board contact impedance, extract characteristic signals for analysis, and mine the pattern characteristics of abnormal signals;

[0008] S3: Integrate multi-source evidence of PCB anomalies, address the uncertainty and correlation between evidence, and infer the location and cause of potential defects on the PCB;

[0009] S4. Verify the test results and infer whether the test results are reliable to ensure the accuracy of the circuit board damage detection results;

[0010] S5. Feedback the test results to the user terminal, and display the damage location and cause through a chart.

[0011] In step S1, optimizing the collected data parameters includes the following steps:

[0012] S11. Construct a high-dimensional algebraic space for the collected circuit board fault signals, simultaneously carrying the multi-dimensional physical field information of the signals and the quaternion orthogonality, and describing the spatial correlation relationship of the circuit board fault signals;

[0013] S12. Construct the quaternion Fourier transform on the non-commutative ring, adapt to the non-commutative characteristics of quaternion multiplication, correct the distortion of the classical transform signal, and distinguish the polarization difference of the fault signal;

[0014] S13. Introduce fractional calculus to transform quaternion wavelet to adapt to the fractional-order singularity of circuit board fault signals and capture the time-frequency details of weak fault signals;

[0015] S14. Simultaneously extract quaternion and spinor features, adapt to the electromagnetic signal distortion and physical structure deformation coupling characteristics of the circuit board fault signal, and analyze the spatial posture difference before and after the fault signal;

[0016] S15. Map the quaternion fault signal to the quantum state space, describe the fault mode superposition state with a density matrix, quantify the uncertainty of the superposition state through quantum entropy, and distinguish between probability mixing and fault superposition problems;

[0017] S16. Optimize the processed fault signal data again to make the optimized fault signal data adapt to the precise optimization requirements of circuit board damage detection.

[0018] In step S16, optimizing the processed fault signal data further includes the following steps:

[0019] S161. Define a cellular automaton and use it to dynamically adjust detection parameters. Combined with the fault signal grid, evolution rules, and parameter set, simulate the spatial propagation of circuit board faults and adapt to the diffusion of fault signals in physical space.

[0020] S162. Construct a hypertopological space, use the hypertopological structure to decouple redundant associations of fault signal features, combine fault signal features, many-to-many associations and filtering, filter out noise, and retain the characteristic topology of the real fault signal;

[0021] S163. Define causal emergence metrics, trace the causal chain of the circuit board fault signal, and identify the causal emergence points of the fault signal by combining the hypertopological space and emergence rules at different times.

[0022] S164. Construct a multi-scale verification function to verify the robustness of the detection fault signal data parameters at multiple scales, both microscopic and macroscopic, to ensure that the optimized measurement is adapted to the fault signal characteristics at different scales.

[0023] In step S2, depicting the dynamic change of the circuit board contact impedance includes the following steps:

[0024] S211. Construct the basic generators of the fault spinor Lie algebra for the circuit board from the macroscopic and microscopic detection scales, define the fault primitives and coupling relationships at each scale, and adapt to the algebraic structure with multiple scales;

[0025] S212. Convert the multi-scale fault spinor Lie algebra primitives into spinor Lie groups that describe the evolution of faults at different scales over time and space, and model the multi-scale fault development process.

[0026] S213. Define the intervention rule of the spinor Lie group on the original fault signal, output the corrected fault signal as the input of the multi-scale verification, and extract the stable and unchanged fault features under the action of the spinor Lie group.

[0027] In step S2, mining the pattern features of abnormal signals includes the following steps:

[0028] S221. Based on the extracted stable fault features, the fractal fluctuation intensity of faults at different scales is calculated to provide a dynamic fluctuation quantification basis for multi-scale calibration error analysis.

[0029] S222. Based on the error analysis results of the associated multi-scale verification, calculate the fractal complexity of faults at different scales, adapt the time-frequency detail analysis of fractional-order wavelets, and assist in locating the spatial distribution characteristics of circuit board faults;

[0030] S223. Quantify the complexity distribution of faults of different scales in the time-frequency domain, correlate multi-scale verification errors, and provide a basis for fault feature correlation for multi-scale verification.

[0031] In step S3, processing the uncertainty and correlation between evidences includes the following steps:

[0032] S311. Based on the fault feature correlation calculation results, quantify the fuzzy correlation of the fault complexity in the time-frequency domain, and adapt the error propagation of the multi-scale fault verification of the circuit board;

[0033] S312. Perform Choquet integration on the fractal fuzzy measure of the time-frequency block, integrate multi-scale time-frequency features, and provide accurate time-frequency fault information for circuit board damage detection;

[0034] S313, the fractal Choquet integral obtained by the processing is further processed using the fractal Sugeno integral to enhance the maximum-minimum decision-making characteristics and adapt to the suddenness of circuit board failures;

[0035] S314. Integrate the fractal evidence of each multi-scale time-frequency block, assign different weights according to the complexity of the time-frequency block, and calculate a comprehensive fault correlation quantization value, so that the verification error can be corrected based on the actual fault correlation characteristics.

[0036] In step S3, inferring the location and cause of the potential defect on the circuit board includes the following steps:

[0037] S321. Construct a forward mapping from the physical state of the circuit board to the detection signal, convert the existence of circuit board damage defects into a measurable signal, and provide a basic correlation for inferring the circuit board damage defects;

[0038] S322. Solve the multi-solution problem and make the inverse defects more consistent with the physical reality of the circuit board through regularization constraints;

[0039] S323, through iterative updating, gradually approaching the defect solution that fits both the detection signal and the physical defect, solving the convergence problem of the nonlinear inverse problem;

[0040] S324. Utilize the Morozov deviation principle to adapt the inferred circuit board damage defect solution to the actual detection noise, avoiding over-correction of noise that leads to false defects, or ignoring noise that leads to missing real defects.

[0041] In step S4, the reasoning to check whether the result is reliable includes the following steps:

[0042] S41. Quantify the error between the inverse defect solution and the actual defect using a posteriori error estimation to verify the reliability of the solution and avoid outputting false defects or missing defects.

[0043] S42. Use the homology group to verify the topological rationality of the defect solution to ensure that the inferred defect meets the topological constraints of circuit board damage detection;

[0044] S43. Construct an applied Bayesian network from defects to propagation to signal distortion, and trace the physical causes from the inverse defect solution.

[0045] S44. Calculate topological correlations, based on tracing physical causes and topological correlations, self-correct the inverse problem solving errors, and deeply correlate multi-scale verification errors with the actual characteristics of the defects.

[0046] In step S44, the topological association adopts the fusion of fractal geometry and algebraic topology to verify the rationality of the association between the fractal complexity of the defect solution and the topological structure.

[0047] 10. A circuit board damage detection optimization system, applied to the circuit board damage detection optimization method described above, comprising:

[0048] The signal acquisition and processing module is used to synchronously collect multi-dimensional signals of contact resistance and probe pressure of the circuit board test points through the probe array, and optimize the processing based on the environmental data to provide high-quality, denoised raw data input for subsequent testing;

[0049] The feature modeling and analysis module is used to build a dynamic change model of contact impedance, accurately depicting the evolution of circuit board contact impedance with working conditions, and extract abnormal characteristic signals and mine patterns, converting impedance changes at the physical layer into analyzable fault characteristics, providing a feature-level basis for defect identification;

[0050] The fusion and reverse calculation module is used to integrate multi-dimensional evidence of circuit board anomalies, handle the uncertainty and correlation between evidence, and reversely infer the location and cause of potential defects based on the fusion results. By leveraging the complementary nature of multi-source information, it overcomes the limitations of single-feature detection.

[0051] Reliable verification and reasoning module, used to verify the defect results obtained in the early stage of detection, infer the reliability of the results, avoid false defect output or omission, and provide guarantee for the accuracy of the detection results;

[0052] The test result display module is used to feed back the final test results to the user terminal in the form of charts, intuitively presenting complex test data and lowering the threshold for result interpretation.

[0053] The present invention provides a circuit board damage detection optimization method and system, the beneficial effects of which include at least the following:

[0054] 1. By using spinor Lie algebra as the cornerstone, defining multi-scale fault primitives and modeling their evolution process, combined with Lie group invariant extraction, this method overcomes the bottleneck of traditional methods in describing the coupling relationship of multi-scale faults. Features such as microscopic solder cracks and macroscopic voltage distortion can be accurately characterized within a unified algebraic framework, providing a stable and physically meaningful feature source for subsequent analysis. Relying on spinor fractal characteristics, a multi-scale verification process is established. Fractal fluctuation intensity, fractal dimension, and singular spectrum analysis provide a quantitative basis for verification from the dimensions of dynamic fluctuation, spatial complexity, and time-frequency distribution, respectively. This promotes a deep correlation between verification errors and the actual characteristics of the fault, allowing the detection method to accurately identify and locate nonlinear and multi-scale coupled faults.

[0055] 2. Through the fusion of spinor Lie algebra and fractal geometry, the accurate extraction and quantification of multi-scale fault features of circuit boards are achieved, the basic generators of fault spinor Lie algebra at macro and micro scales are constructed, and the fault primitives and coupling relationships at each scale are defined, which solves the problem that traditional methods are difficult to uniformly describe multi-scale fault coupling. The primitives are converted into the evolution law of faults over time and space through spinor Lie groups, providing a dynamic modeling basis for the fault development process. At the same time, the stable and invariant features under the action of spinor Lie groups are extracted. Combined with fractal fluctuation intensity, fractal dimension and singular spectrum analysis, quantitative mining of abnormal signal patterns is achieved. Fractal fluctuation intensity provides a dynamic quantitative basis for multi-scale verification error analysis, fractal dimension assists in locating the spatial distribution of faults, and singular spectrum characterizes the complexity distribution in the time-frequency domain, providing a feature correlation basis for multi-scale verification, which improves the stability and discrimination of fault features as a whole and lays a high-precision feature foundation for subsequent detection.

[0056] 3. The synergy of fractal evidence fusion and inverse problem solving significantly improves the accuracy of circuit board defect location and attribution. In terms of evidence processing, fractal fuzzy measurement is used to quantify the fuzzy correlation of fault complexity in the time-frequency domain. The Choquet integral and Sugeno integral are combined to fuse multi-scale time-frequency features to enhance the adaptability to fault mutation. The weighted integration of multi-scale fractal evidence solves the problem of scattered multi-scale fault information, so that the verification error can be corrected based on the actual correlation characteristics of the fault. In the inverse process, a forward mapping from physical state to detection signal is constructed, and the multi-solution of the inverse problem is solved through regularization constraints. The defect solution that fits the detection signal and physical reality is iteratively approximated. The Morozov deviation principle is combined to adapt the noise level to effectively avoid false defects or missed detections, and accurate inversion from multi-source evidence to defect location and cause is achieved, improving the detection efficiency of complex fault scenarios.

[0057] 4. Through multi-dimensional verification and error self-correction mechanism, the posterior error estimation is used to quantify the error between the inverse defect solution and the real defect, the reliability boundary of the solution is clarified, and the topological rationality of the defect solution is verified by the homology group to ensure that the inverse defect meets the physical topological constraints of the circuit board and avoid false defects with topological contradictions. The physical cause is traced from the defect solution through the causal Bayesian network, realizing the deepening from "knowing the fault" to "knowing the cause". At the same time, based on the topological association, fractal geometry and algebraic topology are integrated to verify the rationality of the association between fractal complexity and topological structure, and then self-correct the error in solving the inverse problem, so that the multi-scale verification error is deeply associated with the actual characteristics of the defect, which improves the credibility and consistency of the detection results, provides reliable result support for the engineering application of circuit board damage detection, and avoids relying on the detection experience of the detection personnel, so that the detection system can be popularized. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0059] Figure 1 A schematic diagram of the method flow of a circuit board damage detection optimization method and system provided in this application;

[0060] Figure 2 A schematic diagram of the system modules of a circuit board damage detection optimization method and system provided in this application. DETAILED DESCRIPTION

[0061] The following embodiments of the present invention are described in further detail in conjunction with the accompanying drawings and examples. The following embodiments are only used to illustrate the present invention and are not intended to limit the scope of the present invention.

[0062] like Figure 1-Figure 2 As shown, this embodiment proposes a circuit board damage detection optimization method, including the following steps:

[0063] S1, synchronously collect contact resistance signals, probe pressure signals and environmental data of circuit board test points through a probe array, and optimize the collected data parameters;

[0064] S2. Establish a dynamic contact impedance model to describe the dynamic changes of the circuit board contact impedance, extract characteristic signals for analysis, and mine the pattern characteristics of abnormal signals;

[0065] S3: Integrate multi-source evidence of PCB anomalies, address the uncertainty and correlation between evidence, and infer the location and cause of potential defects on the PCB;

[0066] S4. Verify the test results and infer whether the test results are reliable to ensure the accuracy of the circuit board damage detection results;

[0067] S5. Feedback the test results to the user terminal, and display the damage location and cause through a chart.

[0068] In this embodiment, in step S1, optimizing the collected data parameters includes the following steps:

[0069] S11. Construct a high-dimensional algebraic space for the collected circuit board fault signals, while carrying the multi-dimensional physical field information of the signal and the quaternion orthogonality, to describe the spatial correlation relationship of the circuit board fault signals. The formula is: , where For circuit boards The space-time fault signal function at time , is the number of fault signals, is a geometric algebraic primitive that defines the orthogonal relationship of the physical field. Primitive Corresponding fault signal components;

[0070] S12. Construct the quaternion Fourier transform on the non-commutative ring, adapt to the non-commutative characteristics of quaternion multiplication, correct the distortion of the classical transform signal, and distinguish the polarization difference of the fault signal. The formula is: , where is the frequency domain characteristic of the circuit board fault signal, is the quaternion multiplication group, is the transformation kernel function of the quaternion domain, Circuit board testing The quaternion time domain signal at the moment, To distinguish the unit quaternion of the polarization direction of the fault signal, is the angular frequency that describes the fault signal characteristics;

[0071] S13. Introduce fractional calculus to transform quaternion wavelet, adapt to the fractional-order singularity of the circuit board fault signal, and capture the time-frequency details of the weak fault signal. The formula is: , where To extract the fault signal at scale and displacement The fractional quaternion wavelet transform coefficients of the time-frequency characteristics are: is the normalization coefficient, is the fractional quaternion wavelet function, is the scale and displacement transformation of the time variable;

[0072] S14. Simultaneously extract quaternion and spinor features, adapt to the electromagnetic signal distortion and physical structure deformation coupling characteristics of the circuit board fault signal, and analyze the spatial posture difference before and after the fault signal. The formula is: , where In order to fuse the quaternion spinor cross product operation of spinor features at different times and positions, Circuit board testing The quaternion time domain signal at the moment, and Describe the physical structure of the circuit board Moment and The spatial spinor vector components that describe the physical structure of the circuit board at all times;

[0073] S15. Map the quaternion fault signal to the quantum state space, use the density matrix to describe the superposition state of the fault mode, quantify the uncertainty of the superposition state through quantum entropy, and distinguish between probability mixing and fault superposition problems. The formula is: , where To measure the uncertainty of the superposition of quantum states of quaternion signals, the quantized quaternion entropy is used. is a density matrix, and , is the quantum state vector, for The dual vector of for The probability of occurrence, is the number of probabilities, is the matrix trace;

[0074] S16. Optimize the processed fault signal data again to make the optimized fault signal data adapt to the precise optimization requirements of circuit board damage detection.

[0075] In this embodiment, in step S16, optimizing the processed fault signal data further includes the following steps:

[0076] S161. Define a cellular automaton and use it to dynamically adjust detection parameters. Combined with the fault signal grid, evolution rules, and parameter set, simulate the spatial propagation of circuit board faults and adapt to the diffusion of fault signals in physical space.

[0077] S162. Construct a hypertopological space, use the hypertopological structure to decouple redundant associations of fault signal features, combine fault signal features, many-to-many associations and filtering, filter out noise, and retain the characteristic topology of the real fault signal;

[0078] S163. Define causal emergence metrics, trace the causal chain of the circuit board fault signal, and identify the causal emergence points of the fault signal by combining the hypertopological space and emergence rules at different times.

[0079] S164. Construct a multi-scale verification function to verify the robustness of the fault signal data parameters at multiple scales, microscopically and macroscopically, to ensure that the optimized measurement is adapted to the fault signal characteristics at different scales. The formula is: , where is the comprehensive error index of multi-scale calibration, is the scale index, is the total number of scales, For scale The detection error below.

[0080] Specifically, by taking the spinor Lie algebra as the cornerstone, defining multi-scale fault primitives and modeling their evolution process, and combining it with Lie group invariant extraction, we break through the bottleneck that traditional methods have difficulty in describing the coupling relationship of multi-scale faults, so that characteristics such as microscopic solder cracks and macroscopic voltage distortion can be accurately characterized under a unified algebraic framework, providing a stable and physically meaningful feature source for subsequent analysis. Relying on the spinor fractal characteristics, a multi-scale verification process is established, and fractal fluctuation intensity, fractal dimension and singular spectrum analysis provide quantitative basis for verification from the dimensions of dynamic fluctuation, spatial complexity and time-frequency distribution, respectively, which promotes the deep correlation between verification errors and actual fault characteristics, so that the detection method can still accurately identify and locate nonlinear and multi-scale coupled faults.

[0081] In this embodiment, in step S2, depicting the dynamic change of the circuit board contact impedance includes the following steps:

[0082] S211. Construct the basic generator of the fault spinor Lie algebra for the circuit board from the macroscopic and microscopic detection scales, define the fault primitives and coupling relationships at each scale, and adapt to the algebraic structure with multiple scales. The formula is: , where In order to describe the coupling law of macroscopic and microscopic fault-based components of the circuit board, and Scale Under different fault primitives, For scale Lower fault primitive and Coupling to generate fault primitives The strength coefficient, is the total number of fault primitives;

[0083] S212. Convert the multi-scale fault spinor Lie algebra primitives into spinor Lie groups that describe the evolution of faults at different scales over time and space, and model the multi-scale fault development process. The formula is: , where For scale The fault spinor Lie group at this scale can be understood as a set of rules for the fault from initiation to development and evolution at this scale. For example, at the microscopic scale, it can describe the evolution of solder joint cracks from slight cracking to expansion and penetration. At the macroscopic scale, it can characterize the change of the overall temperature field of the circuit board from local anomaly to global drift. For scale Next Each fault spinor Lie algebra primitive The activation coefficient reflects the degree to which the primitive is triggered or involved in the evolution of the corresponding scale fault. is the total number of multi-scale fault spinor Lie algebra primitives;

[0084] S213. Define the intervention rules of the spinor Lie group on the original fault signal, output the corrected fault signal as the input of the multi-scale verification, and extract the stable and unchanged fault characteristics under the action of the spinor Lie group as the core input of the multi-scale verification to ensure the robustness of the verification.

[0085] In this embodiment, in step S2, mining the pattern features of abnormal signals includes the following steps:

[0086] S221. Based on the extracted stable fault characteristics, the fractal fluctuation intensity of faults of different scales is calculated to provide a dynamic fluctuation quantification basis for multi-scale calibration error analysis. The formula is: , where For scale Lower stable fault characteristics The fractal fluctuation intensity, For scale The mean of the lower stable fault characteristics, is the time window length;

[0087] S222. Based on the error analysis results of the associated multi-scale verification, calculate the fractal complexity of faults at different scales, adapt the time-frequency detail analysis of the fractional-order wavelet, and assist in locating the spatial distribution characteristics of the circuit board fault. The formula is: , where For scale The fractal dimension of is the number of boxes covering the fault signature, is the box size;

[0088] S223. Quantify the complexity distribution of faults of different scales in the time-frequency domain, correlate the multi-scale verification errors, and provide a basis for fault feature correlation for multi-scale verification. The formula is: , where For scale The fractal singular spectrum under covers the complexity distribution of multi-scale faults. For scale The number of fault time-frequency blocks, is the singular index.

[0089] Specifically, through the fusion of spinor Lie algebra and fractal geometry, the accurate extraction and quantification of multi-scale fault features of circuit boards are achieved, the basic generators of fault spinor Lie algebra at macro and micro scales are constructed, and the fault primitives and coupling relationships at each scale are defined, which solves the problem that traditional methods are difficult to uniformly describe multi-scale fault coupling. The primitives are converted into the evolution law of faults over time and space through spinor Lie groups, providing a dynamic modeling basis for the fault development process. At the same time, the stable and invariant features under the action of spinor Lie groups are extracted, and combined with fractal fluctuation intensity, fractal dimension and singular spectrum analysis, the quantitative mining of abnormal signal patterns is achieved. The fractal fluctuation intensity provides a dynamic quantitative basis for multi-scale verification error analysis, the fractal dimension assists in locating the spatial distribution of faults, and the singular spectrum characterizes the complexity distribution in the time-frequency domain, providing a feature correlation basis for multi-scale verification, which overall improves the stability and discrimination of fault features and lays a high-precision feature foundation for subsequent detection.

[0090] In this embodiment, in step S3, processing the uncertainty and correlation between evidence includes the following steps:

[0091] S311. Based on the fault feature correlation calculation results, the fuzzy correlation of the time-frequency domain fault complexity is quantified to adapt the error propagation of the multi-scale fault verification of the circuit board. The formula is: , where and For scale The time-frequency block subset under , is the fractal fuzzy measure of multi-fault time-frequency block coupling correlation, is the fractal correlation coupling coefficient, and Fault Set and fault sets fractal fuzzy measure of ;

[0092] S312. Perform Choquet integration on the fractal fuzzy measure of the time-frequency block and fuse the multi-scale time-frequency features to provide accurate time-frequency fault information for circuit board damage detection. The formula is: , where For scale Fractal Choquet integral under , is the fractional wavelet coefficient, is the feature threshold, For scale The complete set of circuit board fault time-frequency blocks below;

[0093] S313. The fractal Choquet integral obtained by the processing is further processed using the fractal Sugeno integral to strengthen the maximum-minimum decision-making characteristics and adapt to the suddenness of circuit board failures. The formula is: , where scale Fractal Sugeno integral under

[0094] S314. Integrate the fractal evidence of each multi-scale time-frequency block, assign different weights according to the complexity of the time-frequency block, and calculate a comprehensive fault correlation quantification value to solve the problem of scattered multi-scale fault information and allow the verification error to be corrected based on the actual fault correlation characteristics. The formula is: , is the revised comprehensive fractal evidence value, For the The fractal evidence value after the correction of the time-frequency block, For the fractal evidence weights for each time-frequency block.

[0095] In this embodiment, in step S3, inferring the location and cause of the potential defect on the circuit board includes the following steps:

[0096] S321. Construct a forward mapping from the physical state of the circuit board to the detection signal, convert the existence of the circuit board damage defect into a measurable signal, and provide a basic correlation for inferring the circuit board damage defect. The formula is: , where This is a distortion detection signal that occurs when there is a damage defect on the circuit board. Physical status of the circuit board The forward operator of is the interference noise during detection;

[0097] S322. Solve the multi-solution problem and make the inverse defect more consistent with the physical reality of the circuit board through regularization constraints. The formula is: , where In order to find the circuit board damage defect solution that best fits the detection signal and satisfies the physical constraints, The signal simulation error is the difference between the beam back-calculated defect state and the actual detection signal. is the regularization strength, is the physical constraint penalty term;

[0098] S323, through iterative updates, gradually approach the defect solution that fits both the detection signal and the physical defect, and solve the convergence problem of the nonlinear inverse problem. The formula is: , where and Respectively Second and The defective solution of the iteration, that is, the defective solution before and after the iterative update, is the iteration step length, is the signal residual The adjoint operator of ;

[0099] S324. Using the Morozov deviation principle, the inferred circuit board damage defect solution is adapted to the actual detection noise to avoid over-correcting the noise and causing false defects, or ignoring the noise and missing the real defects. The formula is: , where is the defect solution after regularization, is the noise level.

[0100] Specifically, the synergy between fractal evidence fusion and inverse problem solving significantly improves the accuracy of circuit board defect location and attribution. In terms of evidence processing, fractal fuzzy measurement is used to quantify the fuzzy correlation of fault complexity in the time-frequency domain, and the Choquet integral and Sugeno integral are combined to fuse multi-scale time-frequency features to enhance the adaptability to fault mutation. By weighted integration of multi-scale fractal evidence, the problem of scattered multi-scale fault information is solved, so that the verification error can be corrected based on the actual correlation characteristics of the fault. In the inverse process, a forward mapping from physical state to detection signal is constructed, and the multi-solution of the inverse problem is solved by regularization constraints. The defect solution that fits the detection signal and physical reality is iteratively approximated. The noise level is adapted by combining the Morozov deviation principle to effectively avoid false defects or missed detections, and the accurate inversion from multi-source evidence to defect location and cause is achieved, which improves the detection efficiency of complex fault scenarios.

[0101] In this embodiment, in step S4, the reasoning to check whether the result is reliable includes the following steps:

[0102] S41. Use the a posteriori error estimate to quantify the error between the inverse defect solution and the actual defect, verify the reliability of the solution, and avoid outputting false defects or missing defects. The formula is: , where is a constant related to the physical characteristics of the circuit board and the detection system, is the regularization parameter that controls the upper bound of the error;

[0103] S42. Use the homology group to verify the topological rationality of the defect solution to ensure that the inferred defect meets the topological constraints of circuit board damage detection. The formula is: , where Solution for beam defects and real defects The topological differences, is the homological dimension;

[0104] S43. Construct a Bayesian network from defect to propagation to signal distortion, and trace the physical cause from the inverse defect solution. The formula is: , where Solution for defects Depend on The resulting posterior probability, for Leading to defective solution The likelihood of for The prior probability of

[0105] S44. Calculate the topological correlation. Based on the physical cause and topological correlation, self-correct the inverse problem solution error and make the multi-scale verification error deeply correlated with the actual characteristics of the defect. The formula is: , where Solution for defects The causal confidence level, Solution for defects The fractal dimension of is the noise level.

[0106] In this embodiment, in step S44, the topological association adopts the fusion of fractal geometry and algebraic topology to verify the rationality of the association between the fractal complexity of the defect solution and the topological structure. The formula is: , where Solution for defects The topological length of is the association threshold.

[0107] Specifically, the multi-dimensional verification and error self-correction mechanism uses a posteriori error estimation to quantify the error between the inverse defect solution and the real defect, clarifies the reliability boundary of the solution, and uses the homology group to verify the topological rationality of the defect solution, ensuring that the inverse defect conforms to the physical topological constraints of the circuit board, avoiding false defects with topological contradictions, and tracing the physical cause from the defect solution through the causal Bayesian network, realizing the deepening from "knowing the fault" to "knowing the cause". At the same time, based on the topological association, fractal geometry and algebraic topology are integrated to verify the rationality of the association between fractal complexity and topological structure, and then self-correct the error in solving the inverse problem, so that the multi-scale verification error is deeply associated with the actual characteristics of the defect, thereby improving the credibility and consistency of the detection results, providing reliable result support for the engineering application of circuit board damage detection, and avoiding dependence on the detection experience of the inspection personnel, so that the detection system can be popularized.

[0108] A circuit board damage detection optimization system, applied to the circuit board damage detection optimization method described above, comprises:

[0109] The signal acquisition and processing module is used to synchronously collect multi-dimensional signals of contact resistance and probe pressure at the test points of the circuit board through the probe array, and optimize the processing based on the environmental data to provide high-quality, denoised raw data input for subsequent testing;

[0110] The feature modeling and analysis module is used to build a dynamic change model of contact impedance, accurately depicting the evolution of circuit board contact impedance with working conditions, and extract abnormal characteristic signals and mine patterns, converting impedance changes at the physical layer into analyzable fault characteristics, providing a feature-level basis for defect identification;

[0111] The fusion and reverse calculation module is used to integrate multi-dimensional evidence of circuit board anomalies, handle the uncertainty and correlation between evidence, and reversely infer the location and cause of potential defects based on the fusion results. By leveraging the complementary nature of multi-source information, it overcomes the limitations of single-feature detection.

[0112] Reliable verification and reasoning module, used to verify the defect results obtained in the early stage of detection, infer the reliability of the results, avoid false defect output or omission, and provide guarantee for the accuracy of the detection results;

[0113] The test result display module is used to feed back the final test results to the user terminal in the form of charts, intuitively presenting complex test data and lowering the threshold for result interpretation.

[0114] The above embodiments are intended to illustrate the present invention only and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the embodiments, it should be understood by those skilled in the art that various combinations, modifications, or equivalent substitutions of the technical solutions of the present invention do not depart from the spirit and scope of the technical solutions of the present invention and should be encompassed by the scope of the claims of the present invention.

Claims

1. A circuit board damage detection optimization method, characterized in that: The following steps are involved: S1, synchronously collect contact resistance signals, probe pressure signals and environmental data of circuit board test points through a probe array, and optimize the collected data parameters; S2. Establish a dynamic contact impedance model to describe the dynamic changes of the circuit board contact impedance, extract characteristic signals for analysis, and mine the pattern characteristics of abnormal signals; S3: Integrate multi-source evidence of PCB anomalies, address the uncertainty and correlation between evidence, and infer the location and cause of potential defects on the PCB; S4. Verify the test results and infer whether the test results are reliable to ensure the accuracy of the circuit board damage detection results; S5. Feedback the test results to the user terminal, and display the damage location and cause through a chart.

2. A circuit board damage detection optimization method according to claim 1, characterized in that: In step S1, optimizing the collected data parameters includes the following steps: S11. Construct a high-dimensional algebraic space for the collected circuit board fault signals, simultaneously carrying the multi-dimensional physical field information of the signals and the quaternion orthogonality, and describing the spatial correlation relationship of the circuit board fault signals; S12. Construct the quaternion Fourier transform on the non-commutative ring, adapt to the non-commutative characteristics of quaternion multiplication, correct the distortion of the classical transform signal, and distinguish the polarization difference of the fault signal; S13. Introduce fractional calculus to transform quaternion wavelet to adapt to the fractional-order singularity of circuit board fault signals and capture the time-frequency details of weak fault signals; S14. Simultaneously extract quaternion and spinor features, adapt to the electromagnetic signal distortion and physical structure deformation coupling characteristics of the circuit board fault signal, and analyze the spatial posture difference before and after the fault signal; S15. Map the quaternion fault signal to the quantum state space, describe the fault mode superposition state with a density matrix, quantify the uncertainty of the superposition state through quantum entropy, and distinguish between probability mixing and fault superposition problems; S16. Optimize the processed fault signal data again to make the optimized fault signal data adapt to the precise optimization requirements of circuit board damage detection.

3. A circuit board damage detection optimization method according to claim 2, characterized in that: In step S16, optimizing the processed fault signal data further includes the following steps: S161. Define a cellular automaton and use it to dynamically adjust detection parameters. Combined with the fault signal grid, evolution rules, and parameter set, simulate the spatial propagation of circuit board faults and adapt to the diffusion of fault signals in physical space. S162. Construct a hypertopological space, use the hypertopological structure to decouple redundant associations of fault signal features, combine fault signal features, many-to-many associations and filtering, filter out noise, and retain the characteristic topology of the real fault signal; S163. Define causal emergence metrics, trace the causal chain of the circuit board fault signal, and identify the causal emergence points of the fault signal by combining the hypertopological space and emergence rules at different times. S164. Construct a multi-scale verification function to verify the robustness of the detection fault signal data parameters at multiple scales, both microscopic and macroscopic, to ensure that the optimized measurement is adapted to the fault signal characteristics at different scales.

4. A circuit board damage detection optimization method according to claim 3, characterized in that: In step S2, depicting the dynamic change of the circuit board contact impedance includes the following steps: S211. Construct the basic generators of the fault spinor Lie algebra for the circuit board from the macroscopic and microscopic detection scales, define the fault primitives and coupling relationships at each scale, and adapt to the algebraic structure with multiple scales; S212. Convert the multi-scale fault spinor Lie algebra primitives into spinor Lie groups that describe the evolution of faults at different scales over time and space, and model the multi-scale fault development process. S213. Define the intervention rule of the spinor Lie group on the original fault signal, output the corrected fault signal as the input of the multi-scale verification, and extract the stable and unchanged fault features under the action of the spinor Lie group.

5. A circuit board damage detection optimization method according to claim 4, characterized in that: In step S2, mining the pattern features of abnormal signals includes the following steps: S221. Based on the extracted stable fault features, the fractal fluctuation intensity of faults at different scales is calculated to provide a dynamic fluctuation quantification basis for multi-scale calibration error analysis. S222. Based on the error analysis results of the associated multi-scale verification, calculate the fractal complexity of faults at different scales, adapt the time-frequency detail analysis of fractional-order wavelets, and assist in locating the spatial distribution characteristics of circuit board faults; S223. Quantify the complexity distribution of faults of different scales in the time-frequency domain, correlate multi-scale verification errors, and provide a basis for fault feature correlation for multi-scale verification.

6. A circuit board damage detection optimization method according to claim 5, characterized in that: In step S3, processing the uncertainty and correlation between evidences includes the following steps: S311. Based on the fault feature correlation calculation results, quantify the fuzzy correlation of the fault complexity in the time-frequency domain, and adapt the error propagation of the multi-scale fault verification of the circuit board; S312. Perform Choquet integration on the fractal fuzzy measure of the time-frequency block, integrate multi-scale time-frequency features, and provide accurate time-frequency fault information for circuit board damage detection; S313, the fractal Choquet integral obtained by the processing is further processed using the fractal Sugeno integral to enhance the maximum-minimum decision-making characteristics and adapt to the suddenness of circuit board failures; S314. Integrate the fractal evidence of each multi-scale time-frequency block, assign different weights according to the complexity of the time-frequency block, and calculate a comprehensive fault correlation quantization value, so that the verification error can be corrected based on the actual fault correlation characteristics.

7. A circuit board damage detection optimization method according to claim 6, characterized in that: In step S3, inferring the location and cause of the potential defect on the circuit board includes the following steps: S321. Construct a forward mapping from the physical state of the circuit board to the detection signal, convert the existence of circuit board damage defects into a measurable signal, and provide a basic correlation for inferring the circuit board damage defects; S322. Solve the multi-solution problem and make the inverse defects more consistent with the physical reality of the circuit board through regularization constraints; S323, through iterative updating, gradually approaching the defect solution that fits both the detection signal and the physical defect, solving the convergence problem of the nonlinear inverse problem; S324. Utilize the Morozov deviation principle to adapt the inferred circuit board damage defect solution to the actual detection noise, avoiding over-correction of noise that leads to false defects, or ignoring noise that leads to missing real defects.

8. A circuit board damage detection optimization method according to claim 7, characterized in that: In step S4, the reasoning to check whether the result is reliable includes the following steps: S41. Quantify the error between the inverse defect solution and the actual defect using a posteriori error estimation to verify the reliability of the solution and avoid outputting false defects or missing defects. S42. Use the homology group to verify the topological rationality of the defect solution to ensure that the inferred defect meets the topological constraints of circuit board damage detection; S43. Construct an applied Bayesian network from defects to propagation to signal distortion, and trace the physical causes from the inverse defect solution. S44. Calculate topological correlations, based on tracing physical causes and topological correlations, self-correct the inverse problem solving errors, and deeply correlate multi-scale verification errors with the actual characteristics of the defects.

9. A circuit board damage detection optimization method according to claim 8, characterized in that: In step S44, the topological association adopts the fusion of fractal geometry and algebraic topology to verify the rationality of the association between the fractal complexity of the defect solution and the topological structure.

10. A circuit board damage detection optimization system, applied to a circuit board damage detection optimization method as claimed in claim 9, characterized in that: include: The signal acquisition and processing module is used to synchronously collect multi-dimensional signals of contact resistance and probe pressure of the circuit board test points through the probe array, and optimize the processing based on the environmental data to provide high-quality, denoised raw data input for subsequent testing; The feature modeling and analysis module is used to build a dynamic change model of contact impedance, accurately depicting the evolution of circuit board contact impedance with working conditions, and extract abnormal characteristic signals and mine patterns, converting impedance changes at the physical layer into analyzable fault characteristics, providing a feature-level basis for defect identification; The fusion and reverse calculation module is used to integrate multi-dimensional evidence of circuit board anomalies, handle the uncertainty and correlation between evidence, and reversely infer the location and cause of potential defects based on the fusion results. By leveraging the complementary nature of multi-source information, it overcomes the limitations of single-feature detection. Reliable verification and reasoning module, used to verify the defect results obtained in the early stage of detection, infer the reliability of the results, avoid false defect output or omission, and provide guarantee for the accuracy of the detection results; The test result display module is used to feed back the final test results to the user terminal in the form of charts, intuitively presenting complex test data and lowering the threshold for result interpretation.

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