Storage method for pulse target sharing of neuron computer

Abstract

The invention discloses a storage method for pulse target sharing of a neuron computer, which comprises the following steps: a neuron corresponds to an axon, a pulse target is finally converted into an axon tail end, a core axon data memory maintains an axon tail end list formed by continuously stored axon tail ends, the axon points to an initial address of the corresponding axon tail end list, and the axon tail end list corresponds to the initial address of the axon tail end list; when the neurons give out pulses, all the axon tail ends are traversed from the axon tail ends at the initial address of the axon tail end list to the high address direction in sequence, and the multiple axons can share the last multiple axon tail ends in the same axon tail end list. For the full connection layer of the spiking neural network, as each presynaptic neuron is connected to all post-synaptic neuron, each presynaptic neuron can share the same axon end list, so that the storage overhead is remarkably reduced. Updating is carried out according to the five types of axon states, and three types of axon updating requests are processed respectively.

Description

Technical Field

[0001] The present invention belongs to the field of neural network compilation and storage technology, and in particular relates to a storage method for pulse target sharing of a neuron computer. Background Art

[0002] Spiking Neural Networks (SNNs) achieve information processing by simulating the sequential pulse transmission mechanism of biological neurons. SNNs are composed of neuron groups and projections. A neuron group is a collection of neurons with similar functions and a specific spatial structure. A projection is a set of unidirectional connections from one neuron group to itself or to other neuron groups. For each neuron in the starting neuron group, it specifies which neurons in the destination neuron group will receive a pulse from that neuron.

[0003] The Neural Computer utilizes a many-core architecture with a two-dimensional grid topology. Each core occupies a single location, with neurons that may emit spikes and spike targets that may receive spikes located on the core. In hardware implementation, each neuron's axon references spike targets through one or more axon terminals to implement a connectome. However, in scenarios with high-density fully connected connections and where convolutional connections share connection data, the addition of duplicate axon terminals results in unnecessary storage overhead, reducing hardware resource utilization. Summary of the Invention

[0004] To address the shortcomings of the prior art, the present invention adopts the following technical solutions by sharing impulse targets among multiple axons in a neuron computer to reduce storage overhead: A storage method for sharing pulse targets in a neural computer, applied to a neural computer with a many-core architecture. The core contains neurons that may emit pulses and pulse targets that may receive pulses. Each neuron corresponds to an axon, and the pulse target is ultimately converted into an axon terminal. The core's axon data memory is used to maintain an axon terminal list consisting of continuously stored axon terminals. Each axon points to the corresponding starting address of the axon terminal list. When a neuron emits a pulse, it starts at the axon terminal at the starting address of the axon terminal list and traverses each axon terminal in sequence toward higher addresses until the axon terminal with the termination flag set to 1. Multiple axons can share the last several axon terminals in the same axon terminal list. For the fully connected layer of a spiking neural network, since each presynaptic neuron is connected to all postsynaptic neurons, each presynaptic neuron can share the same axon terminal list, significantly reducing storage overhead.

[0005] Furthermore, the axon terminal includes the position of the core where the pulse target is located relative to the core where the axon terminal itself is located and the sequence number of the pulse target within its core, as well as a termination flag for indicating whether the current axon terminal is the last one in the axon terminal list.

[0006] Furthermore, the pulse targets include private pulse targets, which are only used by the axons to which they belong. Each axon can have several private pulse targets, and the private pulse targets include output pulse targets and common private pulse targets. The output pulse target is used to output pulses to the outside of the spiking neural network, and the common private pulse target is used to send pulses to the pulse targets inside the spiking neural network. Each axon has at most one output pulse target. Furthermore, the pulse target also includes a shared pulse target, which can be shared by multiple axons. The same group of one to multiple pulse targets shared by multiple axons constitutes a shared pulse target sequence.

[0007] The axon terminal list sequentially includes axon terminals of common private pulse targets, axon terminals of shared pulse target sequences, and axon terminals of output pulse targets.

[0008] The axons include the first to fifth types of axons; the first type of axons have output pulse targets; the second type of axons have only common private pulse targets; the third type of axons have shared pulse target sequences, may have common private pulse targets, but have no output pulse targets; the fourth type of axons do not have any pulse targets themselves, but use the shared pulse target sequences of other axons; the fifth type of axons do not have and do not use any pulse targets.

[0009] Axon update requests include the first type of axon update requests, which add a given output pulse target to a given axon that needs to output pulses outside the spiking neural network.

[0010] The axon update request also includes a second type of axon update request, which adds a number of given common private pulse targets to a given axon; If the current axon is a type 1, 2, 3 or 5 axon, the given common private pulse target is added to the current axon; in this case, the axon terminal list address of the axon is pointing to or can point to its own axon terminal list, and the axon terminal of the common private pulse target can be added to the axon terminal list of the axon itself; If the current axon is a fourth-type axon, each shared pulse target sequence used by the current axon is first copied to the current axon. The copied shared pulse target sequence is temporarily exclusive to the current axon and can be shared by other axons in the future. Then the given ordinary private pulse target is added to the current axon. In this case, the current axon's only axon terminal list address is pointing to the shared pulse target sequence of other axons and cannot point to the axon terminal of the given ordinary private pulse target at the same time. By copying the shared pulse target sequence first to make it temporarily exclusive, the current axon does not need an additional address to point to the original shared pulse target sequence, thereby freeing up the necessary address space for the addition of ordinary private pulse targets.

[0011] The axon update request also includes a third type of axon update request, which adds a given shared pulse target sequence to a given axon, creates a mapping relationship between the added shared pulse target sequence and each axon using it, traverses the mapping relationship, and for each shared pulse target sequence, classifies each axon using it according to the current state of the axon, and then processes each type of axon in turn, including the following steps: For the first type of axons, each pulse target in the current shared pulse target sequence is added to the current axon as a common private pulse target; For the second type of axons, the current shared pulse target sequence is added to the current axon as the last shared pulse target sequence.

[0012] For the third type of axon, if If true, the current shared pulse target sequence is added to the current axon as the last shared pulse target sequence, where refers to the sequence of shared pulse targets to be added to the current axon, Refers to the use The axonal assembly, Refers to the last shared pulse target sequence of the current axon, which has the highest axon terminal address. Refers to the use axon set; otherwise, each pulse target in the current shared pulse target sequence is added to the current axon as a common private pulse target; when the same axon terminal list is shared by multiple axons, since each axon starts from the starting address of its own axon terminal list and traverses each axon terminal in ascending order of address, the axon using the axon terminal with a lower address must use the axon terminal with a higher address; in other words, the set composed of axons using the earlier shared pulse target sequence must be a subset of the set composed of axons using the later shared pulse target sequence. Therefore, only when the above conditions are met can it be added Add to the current axon.

[0013] For the fourth type of axon, if the pulse targets of the current shared pulse target sequence are exactly the same as the pulse targets contained in the last shared pulse target sequence used by the axon, no operation is required. Otherwise, copy each used shared pulse target sequence to the current axon, and add the current shared pulse target sequence as the last shared pulse target sequence to the current axon; in the process of processing the second and third types of axons, the current shared pulse target sequence may have been added to an axon as the last shared pulse target sequence, and no other shared pulse target sequence has been added to the axon since then. In this case, if the above conditions are met, the current axon is already using the current shared pulse target sequence.

[0014] For the fifth type of axons, operations need to be carried out according to the order in which the axons are processed. In the process of processing the third, third, and fourth types of axons, the current shared pulse target sequence may have been added to an axon as the last shared pulse target sequence, and no other shared pulse target sequence has been added to the axon since then. If such an axon A1 exists, the current fifth type of axon will use the last shared pulse target sequence of A1. If not, the current shared pulse target sequence will be added to the current axon, and the axon will be recorded as A2. When processing other axons after the first axon, A2 must exist, so that the current axon points to the last shared pulse target sequence of A2.

[0015] Furthermore, the mapping relationship between the added shared pulse target sequence and each axon using it is of dictionary type, wherein the key is the shared pulse target sequence and the value is a list of the axons to which it is stored.

[0016] Furthermore, A is defined as a reference pointing to a certain axon, which is initially None. For the second, third, and fourth types of axons, when the current shared pulse target sequence is added to the current axon as the last shared pulse target sequence, if A is None, A is pointed to the current axon.

[0017] The advantages and beneficial effects of the present invention are: The present invention introduces a shared pulse target sequence mechanism, so that multiple axons can share the same part of the pulse targets, especially in fully connected high-density connection scenarios, which significantly reduces storage overhead. By classifying axons and selecting the optimal addition scheme according to their current state, unnecessary duplication is avoided, thereby improving resource allocation and algorithm execution efficiency. At the same time, the present invention supports the dynamic addition of private and shared pulse targets, enhances the flexibility and scalability of the system, and can adapt to the needs of neural networks of different scales and topologies. For the two-dimensional grid multi-core architecture of the neuron computer, the present invention fully utilizes storage space and computing resources, optimizes communication and data access between cores, and improves overall performance. At the same time, through intelligent classification and maintenance of shared sequence mapping relationships, it reduces redundant operations and repeated calculations, further improves computing efficiency and energy efficiency, and has significant advantages in storage optimization and efficient operation of large-scale pulse neural networks. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 4 is a diagram showing the axon storage structure in the memory according to an embodiment of the present invention.

[0019] Figure 2 4 is a diagram showing the logical structure of the axon in an embodiment of the present invention.

[0020] Figure 3 Schematic diagram of the structure of the axon terminal list in an embodiment of the present invention.

[0021] Figure 4 It is an overall flow chart of the method in an embodiment of the present invention. DETAILED DESCRIPTION

[0022] The following describes the specific embodiments of the present invention in detail with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only used to illustrate and explain the present invention and are not intended to limit the present invention.

[0023] The present invention introduces a shared pulse target sequence mechanism, so that multiple axons can share the same part of the pulse targets, especially in fully connected high-density connection scenarios, which significantly reduces storage overhead. By classifying axons and selecting the optimal addition scheme according to their current state, unnecessary duplication is avoided, thereby improving resource allocation and algorithm execution efficiency. At the same time, the present invention supports the dynamic addition of private and shared pulse targets, enhances the flexibility and scalability of the system, and can adapt to the needs of neural networks of different scales and topologies. For the two-dimensional grid multi-core architecture of the neuron computer, the present invention fully utilizes storage space and computing resources, optimizes communication and data access between cores, and improves overall performance. At the same time, through intelligent classification and maintenance of shared sequence mapping relationships, it reduces redundant operations and repeated calculations, further improves computing efficiency and energy efficiency, and has significant advantages in storage optimization and efficient operation of large-scale pulse neural networks.

[0024] Specifically, each core's Axon data memory consists of Each neuron corresponds to an axon, and each axon maintains the starting address of its own axon terminal list. Figure 1 As shown in , the axon terminal list is composed of axon terminals stored consecutively in the memory, and each axon terminal gives a pulse target for receiving pulses from the axon to which it belongs. Specifically, each axon terminal occupies one word, maintaining the position of the core where the corresponding pulse target is located relative to the core where the axon terminal itself is located and the sequence number of the pulse target within its core. In addition, it also contains a termination flag (occupies one bit) to indicate whether the current axon terminal is the last one in the axon terminal list. Whenever a neuron emits a pulse, the corresponding axon starts from the axon terminal at the starting address of the axon terminal list maintained by itself, and traverses each axon terminal in turn in the direction of higher addresses until the axon terminal with a termination flag of 1. Multiple axons can share the last several axon terminals in the same axon terminal list. As shown in Figure 2 As shown in the figure, axon 1 points to axon terminal A, axon 2 points to axon terminal B, and all axon terminals from B to C are shared by these two axons. For the fully connected layer of SNN, since each presynaptic neuron is connected to all postsynaptic neurons, each presynaptic neuron can share the same axon terminal list, thereby significantly reducing storage overhead.

[0025] The pulse targets pointed by the axons can be divided into two categories according to their scope of use. One category is private pulse targets, which are only used by the axons to which they belong, and each axon can have several such targets. Private pulse targets can be divided into ordinary private pulse targets and output pulse targets according to their functions. The latter is used to output pulses to the outside of the SNN, and each axon contains at most one. The other category is shared pulse targets, which can be shared by multiple axons. Multiple axons may share the same group of one or more pulse targets, which constitute a shared pulse target sequence. The aforementioned types of pulse targets will eventually be converted into axon terminals. Figure 3 As shown, the axon terminal list includes the axon terminals of common private pulse targets, the axon terminals of shared pulse target sequences, and the axon terminals of output pulse targets in sequence.

[0026] Takes the given axon update request as input. Axon update requests are divided into the following 3 categories: Type 1 axon update request: adds a given output pulse target to a given axon that needs to output pulses outside the SNN.

[0027] Type 2 Axon Update Request: Adds several given common private pulse targets to a given axon.

[0028] Type 3 axon update request: adds a given shared spike target sequence to a given axon.

[0029] This method first processes the first type of axon update request, and then processes the second and third types of axon update requests in batches according to the need to establish interneuron connections.

[0030] Since the process of adding a shared pulse target sequence depends on the current state of the axon, this method divides the axons into the following five categories according to the types of pulse targets they contain: Type 1 axons: have output impulse targets.

[0031] Class 2 axons: have only common private impulse targets.

[0032] Class 3 axons: have a shared pulse target sequence, may have a common private pulse target, but no output pulse target.

[0033] Class 4 axons: use shared impulse target sequences from other axons.

[0034] Class 5 axons: do not have any impulse targets.

[0035] like Figure 4 As shown, a storage method for pulse target sharing of a neuron computer is applicable to allocating connection data between neurons on a neuron computer with a many-core architecture, comprising the following steps: Step S1: processing the first type of axon update request; For each class 1 axon update request, add the given output pulse target to the given axon.

[0036] Step S2: Process other axon update requests in batches; For each batch of axon update requests, the second and third category axon update requests are processed separately. For each second category axon update request, step S3 is executed. For each third category axon update request, a mapping relationship is created from the added shared pulse target sequence to the corresponding axon, and then step S4 is executed.

[0037] Specifically, the second and third types of axon update requests are traversed to obtain the pulse target sequence to be added and determine its type. If it is a common private pulse target, step S3 is executed; if it is a shared pulse target sequence, a mapping relationship is created from the shared pulse target sequence to the axon. This mapping relationship is of dictionary type, where the key is the shared pulse target sequence and the value is the list of axons to which it belongs. Then step S4 is executed.

[0038] Step S3: processing the second type of axon update request; Adds the given general private pulse target to the current axon if the current axon is a class 1, 2, 3, or 5 axon. In this case, the axon's axon terminal list address points to or can point to its own axon terminal list, and the axon terminal of the general private pulse target is added to the axon's own axon terminal list.

[0039] If the current axon is a Class 4 axon, each shared pulse target sequence used by the current axon is first copied to the current axon. The resulting shared pulse target sequence is temporarily exclusive to the current axon and can be shared with other axons in the future. The given normal private pulse target is then added to the current axon. In this case, the current axon's unique axon terminal list address is already pointing to the shared pulse target sequence of another axon and cannot simultaneously point to the axon terminal of the given normal private pulse target. By first copying the shared pulse target sequence to make it temporarily exclusive, the current axon does not need to use an additional address to point to the original shared pulse target sequence, freeing up the necessary address space for the addition of the normal private pulse target.

[0040] Step S4: Processing the third type of axon update request.

[0041] Traverse the mapping created in step S2. For each shared pulse target sequence, classify each axon using it according to its current state, and then process each axon in turn. Define A as a reference to an axon, initially None.

[0042] For class 1 axons, each spike target in the current shared spike target sequence is added to the current axon as a common private spike target.

[0043] For type 2 axons, add the current shared pulse target sequence as the last shared pulse target sequence to the current axon. If A is None, point A to the axon.

[0044] For type 3 axons, if If it is established, the current shared pulse target sequence is added to the current axon as the last shared pulse target sequence. If A is None, A is pointed to the axon. refers to the sequence of shared pulse targets to be added to the current axon, Refers to the use Axonal collection. Refers to the last shared pulse target sequence of the current axon, which has the highest axon terminal address. Refers to the use Otherwise, each pulse target in the current shared pulse target sequence is added to the current axon as a common private pulse target. In the case where the same axon terminal list is shared by multiple axons, since each axon starts from the starting address of its own axon terminal list and traverses each axon terminal in ascending order of address, the axon using the axon terminal with a lower address must use the axon terminal with a higher address. In other words, the set composed of axons using the earlier shared pulse target sequence must be a subset of the set composed of axons using the later shared pulse target sequence. Therefore, only when the above conditions are met can it be added. Add to the current axon.

[0045] For axons in category 4, if the pulse targets of the current shared pulse target sequence are identical to those of the last shared pulse target sequence used by the axon, no action is required. Otherwise, all used shared pulse target sequences are copied to the current axon and the current shared pulse target sequence is added to the current axon as the last shared pulse target sequence. If A is None, A is set to point to the axon. During the processing of axons in categories 2 and 3, the current shared pulse target sequence may have already been added to an axon as the last shared pulse target sequence, and no other shared pulse target sequences have been added to the axon since then. In this case, if the above conditions are met, the current axon is already using the current shared pulse target sequence.

[0046] For Category 5 axons, the order in which axons are processed is determined by the situation. During the processing of Category 2, 3, and 4 axons, the current shared pulse target sequence may have been added to an axon as the last shared pulse target sequence, and no other shared pulse target sequences have been added to that axon since then. If such an axon exists, it is denoted as A. When processing the first Category 5 axon, if A exists, the current Category 5 axon uses A's last shared pulse target sequence. If not, the current shared pulse target sequence is added to the current axon, and this axon is denoted as A. When processing axons after the first axon, A is always present, and the current axon is assigned to A's last shared pulse target sequence.

[0047] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some or all of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A storage method for pulse target sharing in a neuron computer, applied to a neuron computer with a many-core architecture, wherein the core includes neurons that emit pulses and pulse targets that receive pulses, characterized by: The neuron corresponds to the axon, and the pulse target is eventually converted into the axon terminal. The core axon data storage is used to maintain the axon terminal list consisting of the axon and its continuously stored axon terminals. The axon points to the starting address of the corresponding axon terminal list. When the neuron emits a pulse, it starts from the axon terminal at the starting address of the axon terminal list and traverses each axon terminal in turn in the direction of higher addresses. Multiple axons share the last several axon terminals in the same axon terminal list.

2. The storage method for pulse target sharing for a neuron computer according to claim 1, characterized in that: The axon terminal includes the position of the core where the pulse target is located relative to the core where the axon terminal itself is located and the sequence number of the pulse target within its core, as well as a termination flag used to indicate whether the current axon terminal is the last one in the axon terminal list.

3. The storage method for pulse target sharing for a neuron computer according to claim 1, characterized in that: The pulse targets include private pulse targets, which are only used by the axons to which they belong. The private pulse targets include output pulse targets, which are used to output pulses to the outside of the spiking neural network. Axons include type I axons, which have output impulse targets; Axon update requests include the first type of axon update requests, which add a given output pulse target to a given axon that needs to output pulses outside the spiking neural network.

4. The storage method for pulse target sharing for a neuron computer according to claim 3, characterized in that: The pulse targets also include shared pulse targets, which can be shared by multiple axons. The same group of one or more pulse targets shared by multiple axons constitutes a shared pulse target sequence. The private pulse target also includes a common private pulse target; The axons further include the second to fifth types of axons, the second type of axons have only common private pulse targets, the third type of axons have shared pulse target sequences, may have common private pulse targets, but have no output pulse targets; the fourth type of axons use the shared pulse target sequences of other axons; the fifth type of axons do not have any pulse targets; The axon update request also includes a second type of axon update request, which adds a number of given common private pulse targets to a given axon; If the current axon is a first, second, third or fifth type axon, the given common private pulse target is added to the current axon; the axon terminal list address of the axon is pointing to or can point to its own axon terminal list, and the axon terminal of the common private pulse target can be added to the axon terminal list of the axon itself; If the current axon is a fourth-type axon, the shared pulse target sequences used by the current axon are first copied to the current axon. The copied shared pulse target sequences are temporarily exclusive to the current axon and can be shared by other axons in the future. Then the given common private pulse target is added to the current axon. The current axon's only axon terminal list address is pointing to the shared pulse target sequences of other axons and cannot point to the axon terminal of the given common private pulse target at the same time.

5. The storage method for pulse target sharing for a neuron computer according to claim 3, characterized in that: The pulse targets also include shared pulse targets, which can be shared by multiple axons. The same group of one or more pulse targets shared by multiple axons constitutes a shared pulse target sequence. The private pulse target also includes a common private pulse target; The axons further include second and third types of axons, the second type of axons have only common private pulse targets, and the third type of axons have shared pulse target sequences, may have common private pulse targets, but have no output pulse targets; The axon update request also includes a third type of axon update request, which adds a given shared pulse target sequence to a given axon, creates a mapping relationship between the added shared pulse target sequence and the corresponding axon, traverses the mapping relationship, and processes the axon using the shared pulse target sequence according to the current category of the axon, including the following steps: For the first type of axons, each pulse target in the current shared pulse target sequence is added to the current axon as a common private pulse target; For the second type of axons, the current shared pulse target sequence is added to the current axon as the last shared pulse target sequence.

6. For the third type of axon, if If true, the current shared pulse target sequence is added to the current axon as the last shared pulse target sequence, where refers to the sequence of shared pulse targets to be added to the current axon, Refers to the use The axonal assembly, Refers to the last shared pulse target sequence of the current axon, which has the highest axon terminal address. Refers to the use Otherwise, each pulse target in the current shared pulse target sequence is added to the current axon as a common private pulse target.

7. The storage method for pulse target sharing for a neuron computer according to claim 5, characterized in that: The axons also include a fourth type of axon that uses a shared pulse target sequence with other axons; For the fourth type of axon, if the pulse targets of the current shared pulse target sequence are exactly the same as the pulse targets contained in the last shared pulse target sequence used by the axon, no operation is required. Otherwise, copy each used shared pulse target sequence to the current axon, and add the current shared pulse target sequence as the last shared pulse target sequence to the current axon.

8. The storage method for pulse target sharing for a neuron computer according to claim 5, characterized in that: The axons also include a fifth type of axons that do not have any impulse targets; For the fifth type of axons, operations need to be carried out according to the order in which the axons are processed. In the process of processing the third, third, and fourth types of axons, the current shared pulse target sequence may have been added to an axon as the last shared pulse target sequence, and no other shared pulse target sequence has been added to the axon since then. If such an axon A1 exists, the current fifth type of axon will use the last shared pulse target sequence of A1. If not, the current shared pulse target sequence will be added to the current axon, and the axon will be recorded as A2. When processing other axons after the first axon, A2 must exist, so that the current axon points to the last shared pulse target sequence of A2.

9. The storage method for pulse target sharing for a neuron computer according to claim 5, characterized in that: The mapping relationship is of dictionary type, wherein the key is the shared pulse target sequence and the value is the list of the axons to which it is stored.

10. The storage method for pulse target sharing for a neuron computer according to claim 5, characterized in that: Define A as a reference pointing to a certain axon, initially None. For the second, third, and fourth types of axons, when the current shared pulse target sequence is added to the current axon as the last shared pulse target sequence, if A is None, then A will be pointed to the current axon.

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