Electronic component testing system, method, equipment and medium

Abstract

The invention provides an electronic component test system, method and device and a medium, and the method comprises the steps: applying a pulse excitation signal to an input end of a to-be-tested electronic component, and determining an equivalent parasitic parameter set of the to-be-tested electronic component; constructing a signal path simulation network when the to-be-tested electronic component is tested based on the equivalent parasitic parameter set in combination with a test path of the to-be-tested electronic component, and performing test response analysis on the initial test signal through the signal path simulation network to obtain a signal pre-compensation coefficient of the initial test signal in a transmission process; applying a spectrum shaping test signal determined based on the signal pre-compensation coefficient to the to-be-tested electronic component, and determining the waveform fidelity of the actual response and the expected response of the spectrum shaping test signal under the to-be-tested electronic component; and whether the to-be-tested electronic component passes the test is determined based on the waveform fidelity. According to the technical scheme provided by the invention, the to-be-tested electronic component can be effectively tested when the test signal generates distortion deviation.

Description

Technical Field

[0001] The present application relates to the technical field of electrical component testing, and more specifically, to an electronic component testing system, method, equipment, and medium. Background Art

[0002] As the basic unit of electronic systems, the performance of electronic components directly affects the reliability and stability of equipment. With the rapid development of technologies such as 5G, artificial intelligence, and the Internet of Things, components are evolving towards high frequency, miniaturization, and integration, and the working environment is also more complex, which places higher demands on their functional consistency and weather resistance. Testing technology needs to cover dimensions such as electrical performance, environmental adaptability, and reliability. By combining automated testing equipment with intelligent algorithms, it can accurately capture problems such as component parameter drift and hidden defects, ensuring their safe operation in key areas such as aerospace, automotive electronics, and medical equipment. It is the core link in ensuring the quality of the electronics industry chain.

[0003] In existing electronic component testing, based on the principle of electrical signal excitation and response analysis, specified electrical signals are applied to the components through test equipment to simulate actual working scenarios. The output signals are then collected and compared with standard parameters to judge performance, thereby achieving full-process testing from performance verification to defect location. However, in electronic component testing, the coupling of distributed parasitic parameters inside the electronic components and in the signal transmission path (such as the spatial distribution of parasitic inductance and parasitic capacitance) and transmission line effects (such as reflection and delay caused by impedance discontinuities) will cause the test signal to produce signal distortion deviations (i.e., voltage overshoot and oscillation attenuation) during transmission, making it impossible to effectively test the electronic components to be tested. Therefore, how to effectively test the electronic components to be tested when the test signal produces distortion deviations has become a difficult problem facing the industry. Summary of the Invention

[0004] The present application provides an electronic component testing system, method, device and medium, which can effectively test the electronic component to be tested when the test signal produces distortion deviation.

[0005] In a first aspect, the present application provides a method for testing electronic components, comprising the following steps: Apply a pulse excitation signal to the input end of the electronic component to be tested and collect the transient response waveform at the output end; Extracting a voltage overshoot amplitude and an oscillation decay time constant at a key time point from the transient response waveform, and then determining an equivalent parasitic parameter set of the electronic component to be tested based on the voltage overshoot amplitude and the oscillation decay time constant; Constructing a signal path simulation network for testing the electronic component to be tested based on the equivalent parasitic parameter set and in combination with a test path of the electronic component to be tested, and then performing a test response analysis on an initial test signal through the signal path simulation network to obtain a signal pre-compensation coefficient of the initial test signal during transmission; performing spectrum shaping processing on the initial test signal according to the signal pre-compensation coefficient to obtain a spectrum-shaped test signal for the electronic component under test, applying the spectrum-shaped test signal to the electronic component under test, and determining the waveform fidelity between an actual response of the spectrum-shaped test signal under the electronic component under test and an expected response; When the waveform fidelity exceeds a preset fidelity threshold, it is determined that the electronic component to be tested has passed the test.

[0006] In some embodiments, determining the equivalent parasitic parameter set of the electronic component to be tested specifically includes: Obtaining the transient response waveform of the output terminal of the electronic component under test; extracting the voltage overshoot amplitude and oscillation decay time constant at key time points from the transient response waveform; An equivalent parasitic parameter set of the electronic component to be tested is determined based on the voltage overshoot amplitude and the oscillation decay time constant.

[0007] In some embodiments, extracting the voltage overshoot amplitude and the oscillation decay time constant at key time points from the transient response waveform specifically includes: Performing noise reduction and filtering processing on the transient response waveform to obtain a preprocessed response waveform; Determine the first peak point of the rising edge of the waveform as the key time point based on the preprocessed response waveform, and use the difference between the voltage value corresponding to the key time point and the steady-state voltage value as the voltage overshoot amplitude; intercepting the decay oscillation segment waveform data after the key time point, and extracting all maximum value points in the decay oscillation segment waveform data to form an envelope sample sequence; An exponential function is fitted to the envelope sample sequence, and a time constant of an exponential decay term after the exponential function fitting is extracted as an oscillation decay time constant.

[0008] In some embodiments, constructing a signal path simulation network for testing the electronic component to be tested based on the equivalent parasitic parameter set and the test path of the electronic component to be tested specifically includes: Converting the parasitic resistance, parasitic inductance and parasitic capacitance parameters in the equivalent parasitic parameter set into corresponding simulation model elements; Dividing the transmission line segment of the test path into a plurality of transmission sub-line segments; The frequency domain transmission matrix of each transmission sub-line segment is established using the telegraph equation in transmission line theory; The simulation model elements and the frequency domain transmission matrix of each transmission sub-segment are cascaded, and the test source impedance and load impedance are connected at the same time to construct a signal path simulation network when the electronic component to be tested is tested.

[0009] In some embodiments, performing a test response analysis on the initial test signal through the signal path simulation network to obtain a signal pre-compensation coefficient of the initial test signal during transmission specifically includes: Inputting the initial test signal as stimulus into the signal path simulation network, and extracting the corresponding simulation response waveform at the network output end; constructing a system response function of the signal in the transmission path based on the amplitude and phase differences between the simulated response waveform and the initial test signal; A frequency domain inversion operation is performed on the system response function to obtain a signal pre-compensation coefficient of the initial test signal during the transmission process.

[0010] In some embodiments, performing spectrum shaping processing on the initial test signal according to the signal pre-compensation coefficient to obtain the spectrum-shaped test signal of the electronic component to be tested specifically includes: Perform Fourier transform on the initial test signal to obtain a frequency domain signal; Multiplying the frequency domain signal by the signal pre-compensation coefficient point by point to obtain a compensated frequency domain signal; Perform inverse Fourier transform on the compensated frequency domain signal to obtain the spectrum shaping test signal of the electronic component to be tested.

[0011] In some embodiments, a pulse excitation signal is applied to the input terminal of the electronic component to be tested by a signal generator.

[0012] In a second aspect, the present application provides an electronic component testing system, comprising: An excitation module, configured to apply a pulse excitation signal to an input terminal of the electronic component to be tested, and determine a set of equivalent parasitic parameters of the electronic component to be tested; The processing module is further configured to construct a signal path simulation network for testing the electronic component to be tested based on the equivalent parasitic parameter set and the test path of the electronic component to be tested, and then perform a test response analysis on the initial test signal through the signal path simulation network to obtain a signal pre-compensation coefficient of the initial test signal during transmission; The processing module is further configured to perform spectrum shaping processing on the initial test signal according to the signal pre-compensation coefficient to obtain a spectrum shaped test signal for the electronic component under test, apply the spectrum shaped test signal to the electronic component under test, and determine the waveform fidelity between an actual response of the spectrum shaped test signal under the electronic component under test and an expected response; The execution module is used to determine that the electronic component to be tested has passed the test when the waveform fidelity exceeds a preset fidelity threshold.

[0013] In a third aspect, the present application provides a computer device, comprising a memory and a processor, wherein the memory stores a code, and the processor is configured to obtain the code and execute the above-mentioned electronic component testing method.

[0014] In a fourth aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the above-mentioned electronic component testing method is implemented.

[0015] The technical solutions provided by the embodiments disclosed in this application have the following beneficial effects: In the electronic component testing system, method, device, and medium provided in the present application, a pulse excitation signal is first applied to the input end of the electronic component under test, and an equivalent parasitic parameter set of the electronic component under test is determined. Furthermore, a signal path simulation network is constructed for testing the electronic component under test based on the equivalent parasitic parameter set and the test path of the electronic component under test. Then, a test response analysis is performed on the initial test signal through the signal path simulation network to obtain a signal pre-compensation coefficient of the initial test signal during transmission. Then, the initial test signal is spectrally shaped according to the signal pre-compensation coefficient to obtain a spectrally shaped test signal of the electronic component under test. The spectrally shaped test signal is applied to the electronic component under test, and the waveform fidelity between the actual response and the expected response of the spectrally shaped test signal under the electronic component under test is determined. Finally, when the waveform fidelity exceeds a preset fidelity threshold, the electronic component under test is determined to have passed the test.

[0016] It can be seen that the present application can effectively test the electronic components to be tested when the test signal produces distortion deviation. First, the test signal is applied to the input end of the electronic component to be tested, and the transient response waveform of the output end is collected to reflect the transient characteristics of the electronic component to be tested during the transition from one stable state to another stable state, providing effective data support for analyzing the performance parameters of the electronic component to be tested; secondly, the equivalent parasitic parameter set of the electronic component to be tested is determined to quantify the parasitic effect intensity and dynamic response characteristics of the component to be tested during the test process, which can provide basic data support for signal integrity analysis and high-frequency performance evaluation; further, based on the equivalent parasitic parameter set and combined with the transmission line segment of the test path, a signal path simulation network is constructed when the electronic component to be tested is tested to identify the coupling effect of distributed parasitic parameters and transmission line effects inside the electronic component and in the signal transmission path, and through the signal path The simulation network performs a test response analysis on the original test signal, and then obtains the signal pre-compensation coefficient of the original test signal during the transmission process, which can better restore the original target waveform of the test signal after it propagates through the real test path, and then compensate for the distortion of the test signal during the transmission process, thereby improving the fidelity and effectiveness of the test signal; then, the initial test signal is spectrally shaped according to the signal pre-compensation coefficient to obtain a spectrum-shaped test signal of the electronic component to be tested, and the spectrum-shaped test signal is applied to the electronic component to be tested, and the waveform fidelity of the actual response and the expected response of the spectrum-shaped test signal under the electronic component to be tested is determined to characterize the ability of the signal to maintain the original waveform characteristics after transmission or processing through the component, thereby effectively testing the electronic component to be tested; in summary, the technical solution provided by the present application can effectively test the electronic component to be tested when the test signal produces distortion deviation. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is an exemplary flow chart of an electronic component testing method according to some embodiments of the present application; Figure 2 is an exemplary flow chart of determining an equivalent parasitic parameter set according to some embodiments of the present application; Figure 3 is an exemplary flow chart of determining a signal path simulation network according to some embodiments of the present application; Figure 4 is a structural diagram of an electronic component testing system according to some embodiments of the present application; Figure 5 It is a structural diagram of a computer device for implementing an electronic component testing method according to some embodiments of the present application. DETAILED DESCRIPTION

[0018] In order to better understand the technical solution of the present application, the technical solution of the present application will be described in detail below with reference to the accompanying drawings and specific implementation methods.

[0019] refer to Figure 1 , which is an exemplary flow chart of an electronic component testing method according to some embodiments of the present application. The electronic component testing method mainly includes the following steps: In step 101, a pulse excitation signal is applied to an input terminal of an electronic component to be tested, and a set of equivalent parasitic parameters of the electronic component to be tested is determined.

[0020] In the specific implementation, a pulse excitation signal is applied to the input end of the electronic component to be tested through a signal generator. Specifically, first, a pulse excitation signal is generated by the signal generator, and the pulse excitation signal can effectively excite the electronic component to be tested so that it exhibits the requirements of observable characteristic changes; then, the pulse excitation signal is transmitted to the input end of the electronic component to be tested through a signal transmission cable. After the test signal is input, the oscilloscope collects the transient response waveform of the output end at the output end of the electronic component to be tested.

[0021] It should be noted that the transient response waveform in the present application represents the dynamic waveform of the voltage change over time of the electronic component to be tested after the test signal is input. The transient response waveform reflects the transient characteristics of the electronic component to be tested in the process of transitioning from one stable state to another stable state, and includes detailed features such as rising edge, falling edge, overshoot, oscillation, attenuation, etc. These features can intuitively show the dynamic response ability of the component to the input signal, and provide effective data support for analyzing the performance parameters of the electronic component to be tested; the pulse excitation signal in the present application represents a signal for pre-excitation testing of the electronic component to be tested. Usually, when testing electronic components, different electronic components have different electrical properties. Therefore, the electrical properties of the target electronic component can be pre-identified through the pulse excitation signal.

[0022] In some embodiments, reference Figure 2 As shown in FIG. 1 , this figure is an exemplary flow chart of determining an equivalent parasitic parameter set according to some embodiments of the present application. In this embodiment, determining the equivalent parasitic parameter set of the electronic component to be tested can be implemented by using the following steps: First, in step 1011, a transient response waveform of the output terminal of the electronic component to be tested is obtained; Then, in step 1012, the voltage overshoot amplitude and the oscillation decay time constant at the key time point are extracted from the transient response waveform; Finally, in step 1013, an equivalent parasitic parameter set of the electronic component to be tested is determined based on the voltage overshoot amplitude and the oscillation decay time constant.

[0023] In some embodiments, extracting the voltage overshoot amplitude and the oscillation decay time constant at the key time point from the transient response waveform can be achieved by using the following steps, namely: Performing noise reduction and filtering processing on the transient response waveform to obtain a preprocessed response waveform; Determine the first peak point of the rising edge of the waveform as the key time point based on the preprocessed response waveform, and use the difference between the voltage value corresponding to the key time point and the steady-state voltage value as the voltage overshoot amplitude; intercepting the decay oscillation segment waveform data after the key time point, and extracting all maximum value points in the decay oscillation segment waveform data to form an envelope sample sequence; An exponential function is fitted to the envelope sample sequence, and a time constant of an exponential decay term after the exponential function fitting is extracted as an oscillation decay time constant.

[0024] In the specific implementation, first, the sliding average filter in the prior art is used to perform noise reduction filtering on the transient response waveform to obtain a pre-processed response waveform; secondly, the first-order derivative of the pre-processed response waveform is calculated, and when the derivative changes from positive to negative, the first peak point of the rising edge of the waveform corresponding to this time is determined as the key time point, and the arithmetic mean of the voltage amplitude in the pre-processed response waveform is taken as the steady-state voltage value, and the difference between the voltage value corresponding to the key time point and the steady-state voltage value is taken as the voltage overshoot amplitude; then, the decay oscillation waveform data after the key time point is intercepted, and the decay oscillation segment is extracted. All the maximum points in the decay oscillation segment waveform data constitute an envelope sample sequence, that is, according to the conventional threshold time standard of 3 to 5 times the rising edge time, the waveform after the key time point is intercepted as the decay oscillation segment waveform data, and then all the maximum points in the decay oscillation segment waveform data are extracted through the existing local maximum detection algorithm, and all the maximum points are combined into an envelope sample sequence; finally, the envelope sample sequence is natural logarithm-transformed, and the exponential function is fitted using the least squares method, and the time constant of the exponential decay term after the exponential function fitting is used as the oscillation decay time constant.

[0025] It should be noted that, in this embodiment, the envelope sample sequence represents a voltage sequence composed of all the maximum points of the oscillation attenuation segment extracted from the transient response waveform in chronological order. The envelope sample sequence reflects the envelope trend of the oscillation waveform attenuating over time. Specifically, the waveform segment after the overshoot peak usually exhibits a high-frequency oscillation attenuation characteristic, and its upper envelope is monotonically decreasing. Therefore, by identifying and extracting all the local maximum points in this waveform segment, a gradually decaying peak sequence can be constructed. In mathematical processing, this sequence can be regarded as an envelope approximation of the actual oscillation signal, which can be used to fit the exponential decay model and then accurately extract the oscillation decay time constant. In this embodiment, the decaying oscillation segment waveform data represents the waveform portion of the transient response waveform that gradually tends to a steady state in an oscillating form after the voltage overshoot peak.

[0026] It should also be noted that the voltage overshoot amplitude in the present application represents the voltage offset reached when the waveform in the transient response waveform first rises and exceeds the steady-state level. The voltage overcharge amplitude reflects the transient energy accumulation capability of the circuit under excitation and the transient fluctuation intensity caused by parasitic parameters, and is an important basis for constructing a parasitic parameter model and optimizing the test signal waveform; the oscillation decay time constant in the present application represents the rate parameter at which the voltage amplitude in the oscillation waveform after the signal overshoot decays exponentially with time, and the oscillation decay time constant is used to measure the degree of influence of the equivalent parasitic inductance, capacitance and damping characteristics inside the electronic component on the transient response. The above-mentioned voltage overshoot amplitude and oscillation decay time constant jointly characterize the transient dynamic behavior of the electronic component under excitation, and are an important basis for constructing a parasitic parameter model and optimizing the test signal waveform.

[0027] In some embodiments, determining the equivalent parasitic parameter set of the electronic component to be tested based on the voltage overshoot amplitude and the oscillation decay time constant can be achieved by using the following steps, namely: Establishing an equivalent circuit model of the electronic component to be tested including parasitic resistance, parasitic inductance and parasitic capacitance; Substituting the voltage overshoot amplitude and the oscillation decay time constant into the time domain response equation of the equivalent circuit model; By using a numerical iterative algorithm, the parasitic resistance, parasitic inductance and parasitic capacitance parameters in the equivalent circuit model are optimized and adjusted with the goal of minimizing the error between the calculated value of the time domain response equation and the measured voltage overshoot amplitude and oscillation decay time constant; When the error between the calculated value of the time-domain response equation and the measured voltage overshoot amplitude and oscillation decay time constant meets the preset accuracy requirements, the optimized parasitic resistance, parasitic inductance and parasitic capacitance parameters constitute the equivalent parasitic parameter set of the electronic component to be tested.

[0028] In the specific implementation, first, based on the parasitic parameter characteristics of the electronic components to be tested, a resistance, inductance, and capacitance (RLC) series model is used as the equivalent circuit model of the electronic components to be tested. The topological structure and parameter type of the equivalent circuit model have formed a standard paradigm in the field of circuit analysis; secondly, the voltage overshoot amplitude and the oscillation decay time constant are substituted into the time domain response equation of the equivalent circuit. The time domain response equation is established based on Kirchhoff's voltage law and the volt-ampere characteristics of the component, such as the second-order differential equation of the RLC series circuit, and then the relationship between the theoretical calculation and the measured data is established; then, a well-known numerical iterative algorithm (such as the steepest descent method) is used to minimize the difference between the calculated value of the time domain response equation and the measured data. The error between the measured voltage overshoot amplitude and the oscillation decay time constant is used as the optimization target, and the parasitic resistance, parasitic inductance and parasitic capacitance parameters in the equivalent circuit model are iteratively updated. The parasitic resistance, parasitic inductance and parasitic capacitance parameters in the equivalent circuit model are adjusted according to the Jacobian matrix in each iteration; finally, an error threshold is set as a convergence condition. When the error between the calculated value of the time-domain response equation and the measured voltage overshoot amplitude and oscillation decay time constant meets the preset accuracy (such as the error is less than 0.5%, and the preset accuracy can be set according to actual needs), the optimized parasitic resistance, parasitic inductance and parasitic capacitance parameters are combined into the equivalent parasitic parameter set of the electronic component to be tested.

[0029] It should be noted that the equivalent circuit model in this embodiment represents a simplified circuit structure constructed based on parasitic resistance, parasitic inductance and parasitic capacitance, which is used to simulate the non-ideal electrical characteristics of the electronic components to be tested due to internal structure and packaging under high frequency or transient conditions; the time domain response equation in this embodiment represents the mathematical expression of the voltage change of the equivalent circuit model over time under pulse excitation, which is usually a second-order linear ordinary differential equation, which can be used to describe the dynamic behavior of the waveform in the transient process; the equivalent parasitic parameter set in this application represents the concentrated equivalent parameters that affect the circuit performance during the signal transmission process of the electronic components to be tested. The equivalent parasitic parameter set is used to quantify the parasitic effect intensity and dynamic response characteristics of the components to be tested during the test process, and can provide basic data support for signal integrity analysis and high-frequency performance evaluation.

[0030] In step 102, a signal path simulation network is constructed for testing the electronic component to be tested based on the equivalent parasitic parameter set and the test path of the electronic component to be tested, and then a test response analysis is performed on the initial test signal through the signal path simulation network to obtain a signal pre-compensation coefficient of the initial test signal during the transmission process.

[0031] It should be noted that the signal path simulation network in this application represents an equivalent simulation model of various electrical characteristics during the test signal excitation process of the electronic components to be tested. The signal path simulation network is composed of the transmission line parameters in the test path and the equivalent parasitic parameter set of the electronic components to be tested, and describes the behavioral changes of the signal in different media and structural transition points through a multi-segment cascade method. The signal path simulation network can restore the reflection, attenuation, distortion and delay phenomena in the signal transmission process in the time domain or frequency domain, and thus is an important modeling basis for test signal optimization, signal pre-compensation coefficient design and waveform fidelity analysis.

[0032] In some embodiments, reference Figure 3 As shown in FIG. 1 , this figure is an exemplary flow chart of determining a signal path simulation network according to some embodiments of the present application. In this embodiment, the signal path simulation network for testing the electronic component to be tested is constructed based on the equivalent parasitic parameter set in combination with the test path of the electronic component to be tested, which can be implemented by the following steps: First, in step 1021, the parasitic resistance, parasitic inductance and parasitic capacitance parameters in the equivalent parasitic parameter set are converted into corresponding simulation model elements; Next, in step 1022 , the transmission line segment of the test path is divided into a plurality of transmission sub-segments; Then, in step 1023, a frequency domain transmission matrix is ​​established for each transmission sub-line segment using the telegraph equation in transmission line theory; Finally, in step 1024, the simulation model elements and the frequency domain transmission matrix of each transmission sub-segment are cascaded, and the test source impedance and load impedance are connected at the same time to construct a signal path simulation network when the electronic component to be tested is tested.

[0033] In the specific implementation, first, according to the general rules in the field of circuit simulation, the parasitic resistance, parasitic inductance and parasitic capacitance parameters in the equivalent parasitic parameter set are directly converted into corresponding simulation model elements that can be recognized by the simulation software, wherein the parasitic resistance corresponds to the resistance element model, the parasitic inductance corresponds to the inductance element model, and the parasitic capacitance corresponds to the capacitance element model. The electrical characteristic equations of these element models have formed standard definitions in circuit simulation technology; secondly, the transmission line segment of the test path is divided into multiple transmission sub-segments, that is: the transmission line segment of the test path is divided into multiple transmission sub-segments by a discretization method (such as the finite difference method), which will not be repeated here, and each transmission sub-segment is regarded as a lumped parameter circuit; then, the telegraph equation in the transmission line theory is used to perform frequency conversion on each transmission sub-segment. Domain analysis, converting the telegraph equation into the frequency domain through Fourier transform, solving the frequency domain transmission matrix of each transmission sub-segment, which describes the voltage and current relationship of the test signal at both ends of the transmission line segment; finally, according to the transmission order of the test signal from source to load, the test source impedance is connected to the input end of the frequency domain transmission matrix of the first transmission sub-segment, the output end of the frequency domain transmission matrix is ​​connected to the corresponding simulation model element, the frequency domain transmission matrices of multiple transmission sub-segments are connected end to end in sequence and interspersed with corresponding simulation model elements, the simulation model element representing the output end of the electronic component to be tested is connected to the input end of the frequency domain transmission matrix of the last transmission sub-segment, the output end of the frequency domain transmission matrix is ​​connected to the load impedance, and thus a signal path simulation network for testing the electronic component to be tested is constructed.

[0034] It should be noted that the simulation model elements in this embodiment represent parasitic resistance, parasitic inductance and parasitic capacitance elements that can be called in a circuit simulation environment, which are used to simulate the internal structure of the device, electrode connection and packaging layout in a transient state; the transmission line sub-segment in this embodiment represents a transmission path unit composed of the same physical structure in the test path, and each sub-segment has a clear length, characteristic impedance and propagation constant, and can be regarded as a basic physical unit in the signal transmission process; the frequency domain transmission matrix in this embodiment represents a complex matrix obtained by modeling each transmission line sub-segment according to the telegraph equation, and is often in the form of an ABCD matrix or an S parameter matrix. Its function is to characterize the propagation delay, reflection loss and phase change characteristics of the input signal in the segment, and is the mathematical basis for connecting each simulation model element with the transmission line segment and performing frequency domain cascade analysis.

[0035] In some embodiments, performing a test response analysis on the initial test signal through the signal path simulation network to obtain a signal pre-compensation coefficient of the initial test signal during transmission can be achieved by using the following steps, namely: Inputting the initial test signal as stimulus into the signal path simulation network, and extracting the corresponding simulation response waveform at the network output end; constructing a system response function of the signal in the transmission path based on the amplitude and phase differences between the simulated response waveform and the initial test signal; A frequency domain inversion operation is performed on the system response function to obtain a signal pre-compensation coefficient of the initial test signal during the transmission process.

[0036] In a specific implementation, first, an initial test signal is input as an excitation source into the signal path simulation network, and a corresponding simulated response waveform is extracted at the output end of the signal path simulation network using the time domain simulation function of circuit simulation software (such as SPICE). Second, the simulated response waveform and the initial test signal are converted into the frequency domain using Fourier transform. Based on the difference between the amplitude spectrum and phase spectrum of the frequency domain signal, a system response function of the signal in the transmission path is constructed according to the system function definition (the ratio of the output signal spectrum to the input signal spectrum). The system response function characterizes the change characteristics of the test path to the signal amplitude and phase. Then, a frequency domain inversion operation is performed on the system response function (i.e., the inverse of the system response function is calculated), and the inverse of the system response function is used as the signal pre-compensation coefficient of the initial test signal during transmission. Finally, the distortion compensation factor is applied to the initial test signal to generate the signal pre-compensation coefficient of the initial test signal during transmission. That is, the distortion compensation factor is multiplied by the initial test signal in the frequency domain, and then converted back to the time domain using inverse Fourier transform to generate the signal pre-compensation coefficient of the initial test signal during transmission.

[0037] It should be noted that, in this embodiment, the simulated response waveform represents the simulated response result obtained at the output end after the initial test signal is input into the signal path simulation network; in this embodiment, the system response function represents the transmission function constructed by the ratio of the corresponding frequency components of the simulated response waveform and the initial test signal in the frequency domain, which is used to describe the amplitude attenuation and phase change characteristics of the entire signal path for different frequency components; in this embodiment, the distortion compensation factor represents the parameter for distortion compensation of the initial test signal to offset the distortion effect caused in the path; in this application, the signal pre-compensation coefficient represents the parameter for distortion compensation of the initial test signal. By determining the signal pre-compensation coefficient, the original target waveform of the test signal can be better restored after propagating through the real test path, thereby compensating for the distortion phenomenon of the test signal generated during the transmission process, thereby improving the fidelity and effectiveness of the test signal.

[0038] In step 103, spectrum shaping processing is performed on the initial test signal according to the signal pre-compensation coefficient to obtain a spectrum-shaped test signal of the electronic component under test. The spectrum-shaped test signal is applied to the electronic component under test, and the waveform fidelity between the actual response and the expected response of the spectrum-shaped test signal under the electronic component under test is determined.

[0039] In some embodiments, the following steps may be used to perform spectrum shaping processing on the initial test signal according to the signal pre-compensation coefficient to obtain a spectrum-shaped test signal of the electronic component to be tested, namely: Perform Fourier transform on the initial test signal to obtain a frequency domain signal; Multiplying the frequency domain signal by the signal pre-compensation coefficient point by point to obtain a compensated frequency domain signal; Perform inverse Fourier transform on the compensated frequency domain signal to obtain the spectrum shaping test signal of the electronic component to be tested.

[0040] In specific implementation, first, the initial test signal is Fourier transformed using discrete Fourier transform to obtain a frequency domain signal; secondly, the frequency domain signal is multiplied point by point with the signal pre-compensation coefficient to obtain a compensated frequency domain signal; the compensated frequency domain signal is inverse Fourier transformed and converted back to the time domain to obtain a spectrum shaping test signal of the electronic component to be tested.

[0041] It should be noted that the spectrum shaping test signal in this application represents the optimal detection signal after spectrum shaping. The signal distortion is compensated by the signal pre-compensation coefficient, so that the test signal can output a more realistic signal, which not only compensates for the signal distortion caused by the test path, but also optimizes the spectrum characteristics according to the test requirements. It is a target test signal for accurately stimulating the electronic components to be tested.

[0042] In some embodiments, applying the spectrum shaping test signal to the electronic component under test and determining the waveform fidelity between the actual response of the spectrum shaping test signal under the electronic component under test and the expected response can be achieved by using the following steps, namely: Loading the spectrum shaping test signal to the input port of the electronic component to be tested through a test instrument; Use high-precision data acquisition equipment to synchronously collect the actual output response waveform of the electronic components to be tested and the preset expected response waveform; The actual output response waveform and the expected response waveform are aligned in the time domain, and a normalized mean square error is used to calculate a similarity value between the actual output response waveform and the expected response waveform, and the similarity value is used as the waveform fidelity of the actual response and the expected response of the spectrum shaping test signal under the electronic component under test.

[0043] In a specific implementation, first, a radio frequency signal generator is used to load a spectrum-shaped test signal, the spectrum-shaped test signal, into the input port of the electronic component under test. Then, a high-precision data acquisition device (such as a high-sampling-rate oscilloscope) is used to synchronously acquire the actual output response waveform and the preset expected response waveform of the electronic component under test. Finally, the actual output response waveform and the expected response waveform are aligned in the time domain, and the normalized mean square error is used to calculate the similarity value between the actual output response waveform and the expected response waveform. This similarity value is used as the waveform fidelity of the actual response and the expected response of the spectrum-shaped test signal under the electronic component under test.

[0044] It should be noted that waveform fidelity in this embodiment indicates the degree of similarity between the actual output response waveform of the electronic component under test when stimulated by a test signal (such as a spectrum-shaped test signal) and the preset expected response waveform, thereby characterizing the ability of the signal to maintain the original waveform characteristics after being transmitted or processed by the component.

[0045] In step 104 , when the waveform fidelity exceeds a preset fidelity threshold, it is determined that the electronic component to be tested has passed the test.

[0046] In a specific implementation, the waveform fidelity is numerically compared with a preset fidelity threshold. If the waveform fidelity value is greater than or equal to the preset fidelity threshold, it indicates that the actual response of the electronic component under test under the spectrum shaping test signal is highly similar to the expected response, and the signal distortion is within the allowable range. The component is then judged to have passed the test; otherwise, it is judged to have failed. This achieves automated judgment on whether the component performance meets the standards. The fidelity threshold can be set according to actual needs or based on expert knowledge, and is not limited here.

[0047] In addition, in another aspect of the present application, in some embodiments, the present application provides an electronic component testing system, referring to Figure 4 , which is a schematic diagram of the structure of an electronic component testing system according to some embodiments of the present application. The electronic component testing system includes: an excitation module 201, a processing module 202, and an execution module 203, which are described as follows: The excitation module 201 in this application is mainly used to apply a pulse excitation signal to the input end of the electronic component to be tested and determine the equivalent parasitic parameter set of the electronic component to be tested; Processing module 202, in the present application, is mainly used to construct a signal path simulation network when testing the electronic component to be tested based on the equivalent parasitic parameter set and the test path of the electronic component to be tested, and then perform a test response analysis on the initial test signal through the signal path simulation network to obtain a signal pre-compensation coefficient of the initial test signal during the transmission process; The processing module 202 is further configured to perform spectrum shaping processing on the initial test signal according to the signal pre-compensation coefficient to obtain a spectrum shaped test signal for the electronic component under test, apply the spectrum shaped test signal to the electronic component under test, and determine the waveform fidelity between an actual response of the spectrum shaped test signal under the electronic component under test and an expected response; The execution module 203 in this application is mainly used to determine that the electronic component to be tested has passed the test when the waveform fidelity exceeds a preset fidelity threshold.

[0048] In addition, the present application also provides a computer device, which includes a memory and a processor, wherein the memory stores code, and the processor is configured to obtain the code and execute the above-mentioned electronic component testing method.

[0049] In some embodiments, reference Figure 5 , which is a schematic diagram of the structure of a computer device for implementing an electronic component testing method according to some embodiments of the present application. The electronic component testing method in the above embodiment can be Figure 5 The computer device shown in FIG3 is implemented as shown in FIG3 , which includes at least one processor 301 , a communication bus 302 , a memory 303 and at least one communication interface 304 .

[0050] The processor 301 may be a general-purpose central processing unit (CPU), or an application-specific integrated circuit (ASIC) or one or more processors for controlling the execution of the electronic component testing method of the present application.

[0051] The communication bus 302 may be used to transmit information between the aforementioned components.

[0052] Memory 303 may be, but is not limited to, a read-only memory (ROM) or other type of static storage device capable of storing static information and instructions, a random access memory (RAM) or other type of dynamic storage device capable of storing information and instructions, an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, an optical disc storage (including compact discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), a magnetic disk or other magnetic storage device, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer. Memory 303 may be independent and connected to processor 301 via communication bus 302. Memory 303 may also be integrated with processor 301.

[0053] Memory 303 is used to store program code for executing the solution of the present application, and is controlled by processor 301 for execution. Processor 301 is used to execute the program code stored in memory 303. The program code may include one or more software modules. Determining the electronic component testing method in the above embodiment can be implemented by processor 301 and one or more software modules in the program code in memory 303.

[0054] The communication interface 304 uses any device such as a transceiver to communicate with other devices or communication networks, such as Ethernet, radio access network (RAN), wireless local area network (WLAN), etc.

[0055] In a specific implementation, as an example, a computer device may include multiple processors, each of which may be a single-core (single-CPU) processor or a multi-core (multi-CPU) processor. A processor herein may refer to one or more devices, circuits, and / or processing cores for processing data (e.g., computer program instructions).

[0056] The aforementioned computer device can be a general-purpose computer device or a dedicated computer device. In a specific implementation, the computer device can be a desktop computer, a portable computer, a network server, a personal digital assistant (PDA), a mobile phone, a tablet computer, a wireless terminal device, a communication device, or an embedded device. The embodiments of this application do not limit the type of computer device.

[0057] In addition, the present application also provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the above-mentioned electronic component testing method is implemented.

[0058] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present application.

[0059] Obviously, those skilled in the art may make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalents, this application is intended to include these modifications and variations.

Claims

1. A method for testing electronic components, characterized in that: The steps include: Applying a pulse excitation signal to an input terminal of the electronic component to be tested, and determining a set of equivalent parasitic parameters of the electronic component to be tested; Constructing a signal path simulation network for testing the electronic component to be tested based on the equivalent parasitic parameter set and in combination with a test path of the electronic component to be tested, and then performing a test response analysis on an initial test signal through the signal path simulation network to obtain a signal pre-compensation coefficient of the initial test signal during transmission; performing spectrum shaping processing on the initial test signal according to the signal pre-compensation coefficient to obtain a spectrum-shaped test signal for the electronic component under test, applying the spectrum-shaped test signal to the electronic component under test, and determining the waveform fidelity between an actual response of the spectrum-shaped test signal under the electronic component under test and an expected response; When the waveform fidelity exceeds a preset fidelity threshold, it is determined that the electronic component to be tested has passed the test.

2. The method according to claim 1, wherein Determining the equivalent parasitic parameter set of the electronic component to be tested specifically includes: Obtain the transient response waveform of the output terminal of the electronic component under test; extracting the voltage overshoot amplitude and oscillation decay time constant at key time points from the transient response waveform; An equivalent parasitic parameter set of the electronic component to be tested is determined based on the voltage overshoot amplitude and the oscillation decay time constant.

3. The method according to claim 2, wherein Extracting the voltage overshoot amplitude and oscillation decay time constant at key time points from the transient response waveform specifically includes: Performing noise reduction and filtering processing on the transient response waveform to obtain a preprocessed response waveform; Determine the first peak point of the rising edge of the waveform as the key time point based on the preprocessed response waveform, and use the difference between the voltage value corresponding to the key time point and the steady-state voltage value as the voltage overshoot amplitude; intercepting the decay oscillation segment waveform data after the key time point, and extracting all the maximum value points in the decay oscillation segment waveform data to form an envelope sample sequence; An exponential function is fitted to the envelope sample sequence, and a time constant of an exponential decay term after the exponential function fitting is extracted as an oscillation decay time constant.

4. The method according to claim 1, wherein Constructing a signal path simulation network for testing the electronic component to be tested based on the equivalent parasitic parameter set and the test path of the electronic component to be tested specifically includes: Converting the parasitic resistance, parasitic inductance and parasitic capacitance parameters in the equivalent parasitic parameter set into corresponding simulation model elements; Dividing the transmission line segment of the test path into a plurality of transmission sub-line segments; The frequency domain transmission matrix of each transmission sub-line segment is established using the telegraph equation in transmission line theory; The simulation model elements and the frequency domain transmission matrix of each transmission sub-segment are cascaded, and the test source impedance and load impedance are connected at the same time to construct a signal path simulation network when the electronic component to be tested is tested.

5. The method according to claim 1, wherein Performing a test response analysis on the initial test signal through the signal path simulation network, and then obtaining a signal pre-compensation coefficient of the initial test signal during the transmission process specifically includes: Inputting the initial test signal as stimulus into the signal path simulation network, and extracting the corresponding simulation response waveform at the network output end; constructing a system response function of the signal in the transmission path based on the amplitude and phase differences between the simulated response waveform and the initial test signal; A frequency domain inversion operation is performed on the system response function to obtain a signal pre-compensation coefficient of the initial test signal during the transmission process.

6. The method according to claim 1, wherein Performing spectrum shaping processing on the initial test signal according to the signal pre-compensation coefficient to obtain a spectrum-shaped test signal of the electronic component to be tested specifically includes: Perform Fourier transform on the initial test signal to obtain a frequency domain signal; Multiplying the frequency domain signal by the signal pre-compensation coefficient point by point to obtain a compensated frequency domain signal; Perform inverse Fourier transform on the compensated frequency domain signal to obtain the spectrum shaping test signal of the electronic component to be tested.

7. The method according to claim 1, wherein A pulse excitation signal is applied to the input end of the electronic component to be tested through a signal generator.

8. An electronic component testing system, characterized in that: include: An excitation module, configured to apply a pulse excitation signal to an input terminal of the electronic component to be tested, and determine a set of equivalent parasitic parameters of the electronic component to be tested; a processing module, configured to construct a signal path simulation network for testing the electronic component to be tested based on the equivalent parasitic parameter set and the test path of the electronic component to be tested, and then perform a test response analysis on the initial test signal through the signal path simulation network to obtain a signal pre-compensation coefficient of the initial test signal during transmission; The processing module is further configured to perform spectrum shaping processing on the initial test signal according to the signal pre-compensation coefficient to obtain a spectrum shaped test signal for the electronic component under test, apply the spectrum shaped test signal to the electronic component under test, and determine the waveform fidelity between an actual response of the spectrum shaped test signal under the electronic component under test and an expected response; The execution module is used to determine that the electronic component to be tested has passed the test when the waveform fidelity exceeds a preset fidelity threshold.

9. A computer device, characterized in that: The computer device includes a memory and a processor, the memory stores codes, and the processor is configured to obtain the codes and execute the electronic component testing method according to any one of claims 1 to 7.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the electronic component testing method according to any one of claims 1 to 7 is implemented.

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