A coupling filter amplification attenuation multifunctional chip

Abstract

The application provides a coupling filter amplification attenuation multifunctional chip, and relates to the technical field of integrated circuits.The device comprises a single-pole single-throw switch, a coupler, a high-pass filter, a low-noise amplifier, a digital control attenuator and a positive voltage parallel driving network;the single-pole single-throw switch is connected with the coupler and the positive voltage parallel driving network;the high-pass filter is connected with the coupler and the low-noise amplifier;the low-noise amplifier is connected with the digital control attenuator;and the digital control attenuator is connected with the positive voltage parallel driving network.The application solves the problems of insufficient wide frequency band, low gain, low linearity, high power consumption, large high-low temperature fluctuation, low attenuation precision and low integration of the integrated circuit.

Description

Technical Field

[0001] This specification relates to the field of integrated circuit technology, and in particular to a multifunctional chip for coupling, filtering, amplification, and attenuation. Background Technology

[0002] With the large-scale application of phased array technology in base stations, radar, and satellite communication systems, the requirements for system performance, cost, and area are becoming increasingly stringent. Discrete devices, due to their single function and large size, require multiple devices to work together to achieve complex functions. This not only increases the complexity and cost of the system but also results in high signal transmission loss and poor anti-interference capability, making it difficult to meet the current demands for miniaturization and high performance. In contrast, multifunctional chips highly integrate multiple functional modules, greatly reducing the size of the device while effectively reducing signal transmission loss and power consumption, and significantly increasing anti-interference capability.

[0003] The radio frequency (RF) front-end is the core component for wireless communication in a system, responsible for signal transmission and reception, filtering, amplification, and other processing. Its performance directly affects the system's communication quality, power consumption, and stability. Couplers, filters, amplifiers, and digitally controlled attenuators are core components in the RF front-end. With the rapid development and iteration of semiconductor technology, these devices can be integrated on the same substrate using microwave monolithic integrated circuit technology to form a multi-functional chip for coupling, filtering, amplification, and attenuation. This greatly improves the integration, reliability, and consistency of RF components, while reducing their size and cost. The multi-functional chip for coupling, filtering, amplification, and attenuation is used in RF receiving circuits to perform functions such as signal coupling, filtering, gain amplification, and gain control, achieving a large dynamic control range. Traditional couplers, filters, amplifiers, and digitally controlled attenuators suffer from numerous problems, including insufficient operating bandwidth, inadequate out-of-band rejection, high power consumption, complex control and power-up, insufficient attenuation accuracy, and poor additional phase modulation. With the continuous advancement of radar, electronic countermeasures, satellite navigation, and wireless communication technologies, more and more system applications are placing higher demands on the bandwidth, out-of-band rejection, power consumption, control and power-up, attenuation accuracy, and additional phase modulation of multi-functional chips for coupling, filtering, amplification, and attenuation. Summary of the Invention

[0004] To address the aforementioned shortcomings in existing technologies, this invention provides a multi-functional chip for coupling, filtering, amplification, and attenuation, which solves the problems of insufficient operating bandwidth, low gain, low linearity, high power consumption, large high and low temperature fluctuations, low attenuation accuracy, and low integration density of integrated circuits.

[0005] To achieve the above-mentioned objectives, the technical solution adopted by this invention is: a multi-functional chip for coupling, filtering, amplification, and attenuation, comprising:

[0006] The system includes a single-pole single-throw switch, a coupler, a high-pass filter, a low-noise amplifier, a digitally controlled attenuator, and a positive-voltage parallel drive network. The single-pole single-throw switch is connected to the coupler and the positive-voltage parallel drive network; the high-pass filter is connected to the coupler and the low-noise amplifier; the low-noise amplifier is connected to the digitally controlled attenuator; and the digitally controlled attenuator is connected to the positive-voltage parallel drive network.

[0007] The beneficial effects of this invention are as follows: a multifunctional chip for coupling, filtering, amplification, and attenuation. The coupler employs a series-parallel resistor structure, significantly reducing its size and achieving ultra-wideband coupling accuracy. The filter adopts a lumped-parameter, seventh-order elliptic function high-pass filter structure, including three parallel LC-to-ground branches to generate multiple transmission zeros outside the frequency band, improving the frequency selectivity and out-of-band rejection of the high-pass filter. The low-noise amplifier uses a current-multiplexed common-source cascode amplification structure, introducing a parallel negative feedback network to achieve ultra-wideband, high-gain, high-linearity, low-power, and low-noise characteristics. Simultaneously, a novel active bias network is used to improve power over the ultra-wide operating frequency band and mitigate high and low temperature performance fluctuations. The attenuator uses multiple cascaded Π-type attenuator structures to achieve an ultra-wide dynamic range of gain and high attenuation accuracy. The single-pole single-throw switch adopts a two-stage, one-series, two-parallel structure to achieve low insertion loss and high isolation performance. The parallel drive network uses a positive voltage as a reference voltage, allowing it to share a power supply with the amplifier network, simplifying the power-on method and improving ease of use.

[0008] Furthermore, the single-pole single-throw switch includes:

[0009] Capacitors Cp1, Cp2, Cp3, Cp4, Cp5, and Cp6 are grounded. Resistors Rp1, Rp2, Rp4, Rp5, Rp7, Rp9, Rp10, Rp12, Rp13, and Rp14 are also present. Transmission lines TLp1, TLp2, TLp3, TLp4, TLp5, TLp6, and TLp7 are also present. Transistors Tp1, Tp2, Tp3, Tp4, Tp5, Tp6, and Tp7 are also present. One end of resistor Rp14 is connected to the input terminal VDD, and the other end of resistor Rp14 is connected to the grounding capacitor VDD. One end of capacitor Cp2 is connected to one end of transmission line TLp7, and the other end of capacitor Cp2 is connected to the coupling terminal CP. The other end of transmission line TLp7 is connected to the source of transistor Tp7 and one end of resistor Rp12. The other end of resistor Rp12 is connected to the drain of transistor Tp7, the drain of transistor Tp6, and one end of transmission line TLp6. The source of transistor Tp6 is connected to ground capacitor Cp6. The gate of transistor Tp6 is connected to one end of resistor Rp10. The other ends of resistor Rp10, one end of resistor Rp9, one end of capacitor Cp5, one end of capacitor Cp4, one end of resistor Rp5, and one end of resistor Rp4 are all connected to a positive voltage parallel drive network and grounded. The other end of resistor Rp9 is connected to the crystal... The gate of transistor Tp5 is connected to the circuit. The source of transistor Tp5 is connected to the other end of capacitor Cp5. The drain of transistor Tp5 is connected to the other end of transmission line TLp6 and one end of transmission line TLp5. The gate of transistor Tp7 is connected to one end of resistor Rp13. The other end of resistor Rp13, one end of resistor Rp1, and one end of resistor Rp7 are all connected to a positive voltage parallel drive network. The other end of resistor Rp1 is connected to the gate of transistor Tp1. The source of transistor Tp1 is connected to one end of transmission line TLp2 and one end of inductor Tp2. The other end of transmission line TLp2 is connected to one end of capacitor Cp1. The other end of capacitor Cp1 is connected to one end of transmission line TLp1. The other end of transmission line TLp1... One end of the resistor Rp2 is connected to the coupler. The other end of the resistor Rp2 is connected to the drain of transistor Tp1, the drain of transistor Tp2, and one end of transmission line TLp3. The source of transistor Tp2 is connected to ground capacitor Cp3. The gate of transistor Tp2 is connected to the other end of the resistor Rp4. The other end of transmission line TLp3 is connected to the drain of transistor Tp3 and one end of transmission line TLp4. The gate of transistor Tp3 is connected to the other end of the resistor Rp5. The source of transistor Tp3 is connected to one end of capacitor Cp4. The other end of transmission line TLp4 is connected to the drain of transistor Tp4. The source of transistor Tp4 is connected to the other end of transmission line TLp5. The gate of transistor Tp4 is connected to the other end of the resistor Rp7.

[0010] The single-pole single-throw switch employs a two-stage, one-series, two-parallel structure, achieving low insertion loss and high isolation performance over an ultra-wide operating bandwidth. A parallel resistor in the series transistor ensures that the port maintains VSWR performance even when the switch is off. The switch is controlled by positive voltage, provided by a parallel drive network. The power supply voltage is supplied to the main circuit through a large resistor Rp14 and can be shared with the amplifier.

[0011] Further, the coupler includes resistors Rpp1 and Rpp2, and the high-pass filter includes: inductor Lf1, ground inductor Lf2, inductor Lf3, capacitors Cf1, Cf2, Cf3, Cf4, ground capacitor Cf5, Cf6, Cf7, transmission lines TLf1, TLf2, TLf3, TLf4, and TLf5; wherein, the ground resistor Rpp2 is connected to the other end of transmission line TLp1 and one end of resistor Rpp1, the other end of resistor Rpp1 is connected to the input terminal IN and one end of capacitor Cf1 of the high-pass filter, and the other end of capacitor Cf1 is connected to one end of inductor Lf1 and one end of transmission line TLf1, and the other end of inductor Lf1... One end of the transmission line TLf1 is connected to the grounding capacitor Cf5. ​​The other end of the transmission line TLf1 is connected to one end of the capacitor Cf2. The other end of the capacitor Cf2 is connected to one end of the transmission line TLf2. The other end of the transmission line TLf2 is connected to one end of the inductor Lf2 and one end of the transmission line TLf3. The other end of the inductor Lf2 is connected to the grounding capacitor Cf6. The other end of the transmission line TLf3 is connected to one end of the capacitor Cf3. The other end of the capacitor Cf3 is connected to one end of the transmission line TLf4. The other end of the transmission line TLf4 is connected to one end of the inductor Lf3 and one end of the transmission line TLf5. The other end of the inductor Lf3 is connected to the grounding capacitor Cf7. The other end of the transmission line TLf5 is connected to one end of the capacitor Cf4. The other end of the capacitor Cf4 is connected to the low-noise amplifier.

[0012] The coupler is implemented using a series-parallel resistor structure. The required coupling degree is achieved by adjusting the values ​​of the two resistors. Compared with the traditional coupler structure, it has the characteristics of small size, wide bandwidth, and easy adjustment. The filter adopts a seventh-order elliptic function high-pass filter structure based on lumped parameter form. It includes three parallel LC-to-ground branches to generate multiple transmission zeros outside the frequency band, thereby improving the frequency selectivity and out-of-band rejection of the high-pass filter. Transmission lines TLf1~TLf5 are used to adjust the input and output standing waves within the operating frequency band.

[0013] Furthermore, the low-noise amplifier includes:

[0014] Capacitors MC1, MC2, MC3, MC6, MC7, MC8, MC9, and MC10; transmission lines ML1, ML2, ML3, ML4, ML5, ML6, ML7, ML9, and ML10; resistor MR8; grounding resistor MR9, MR10, MR11, MR12, MR13; grounding resistor MR14, MR15, MR17, and MR18; amplifiers T1, T2, and T3; and a novel active bias network. In this circuit, one end of capacitor MC1 is connected to the other end of capacitor Cf4, and the other end of capacitor MC1 is connected to one end of transmission line ML1. The other end of transmission line ML1 is connected to the novel active bias network, the gate of amplifier T1, and one end of transmission line ML10. The source of amplifier T1 is grounded, and the drain of amplifier T1 is connected to one end of transmission line ML2 and one end of transmission line ML4. The other end of transmission line ML10 is connected to one end of capacitor MC10, and the other end of capacitor MC10 is connected to one end of resistor MR18. The other end of resistor MR18 is connected to one end of resistor RL6, one end of transmission line ML9, and one end of transmission line ML7. The other end of transmission line ML2 is connected to one end of capacitor MC2, and the other end of capacitor MC2 is connected to one end of transmission line ML3. The other end of transmission line ML3 is connected to one end of resistor MR8 and the gate of amplifier T2. The source of amplifier T2 is connected to the other end of transmission line ML4 and one end of resistor MR11. The other end of resistor MR11 is connected to ground capacitor MC6. The drain of amplifier T2 is connected to one end of transmission line ML5, and the other end of transmission line ML5 is connected to the drain of amplifier T3. The source of amplifier T3 is connected to the other end of transmission line ML6. The gate of amplifier T3 is connected to one end of resistor MR12 and the gate of capacitor MC6. One end of resistor MR13 is connected to the grounding capacitor MC7. The other end of resistor MR8 is connected to one end of grounding resistor MR9 and resistor MR10 respectively. The other end of resistor MR13 is connected to one end of grounding resistor MR14 and resistor MR15 respectively. The other ends of resistor MR10, resistor MR15, resistor MR17, grounding capacitor MC8, and transmission line ML9 are all connected to the new active bias network. The other end of resistor MR17 is connected to grounding capacitor MC9. The other end of transmission line ML7 is connected to one end of capacitor MC3. The other end of capacitor MC3 is connected to the digitally controlled attenuator.

[0015] The low-noise amplifier employs a current-reused cascode structure, introducing an RLC parallel negative feedback network to achieve ultra-wideband, high-gain, high-linearity, low-power, and low-noise characteristics. T1 and T2 form a current-reused amplification network, while T2 and T3 form a cascode amplifier. In the current-reused network, the source stage of T2 and the gate of T3 in the cascode amplification network are connected in parallel with an RC suppression circuit to increase the stability of the amplifier network. The power supply port uses a parallel capacitor (C) and a series RC circuit to ground, primarily to suppress unstable high- and low-frequency signals from the power supply. A novel active bias network is used to power the amplifier transistor gates, achieving voltage self-biasing. Complementary transistors T4 and T5 are used, with a feedback loop of resistor MR4 and capacitor MC5, which improves amplifier stability, reduces gate current under high power, improves amplifier linearity, mitigates the impact of temperature on chip performance, and significantly simplifies the external power supply circuitry.

[0016] Furthermore, the novel active bias network includes:

[0017] Transmission line ML8, grounding capacitor MC4, capacitor MC5, resistor MR1, grounding resistor MR2, resistor MR3, resistor MR4, resistor MR5, resistor MR6, grounding resistor MR7, amplifier T4, and amplifier T5; wherein, one end of transmission line ML8 is connected to the other end of transmission line ML1, the gate of amplifier T1, and one end of transmission line ML10; the other end of transmission line ML8 is connected to grounding capacitor MC4, one end of resistor MR1, and one end of resistor MR3; the other end of resistor MR3 is connected to one end of capacitor MC5 and the gate of amplifier T4; amplifier... The source of amplifier T4 is connected to grounding resistor MR7. The drain of amplifier T4 is connected to one end of resistor MR4, one end of resistor MR6, and the gate of amplifier T5. The other end of resistor MR4 is connected to the other end of capacitor MC5. The other end of resistor MR1 is connected to grounding resistor MR2 and the source of amplifier T5. The drain of amplifier T5 is connected to one end of resistor MR5. The other ends of resistor MR5 and resistor MR6 are connected to the other ends of resistor MR10, resistor MR15, resistor MR17, grounding capacitor MC8, and transmission line ML9.

[0018] A novel active bias network is used to power the gate of the amplifier transistors, achieving voltage self-biasing. The complementary transistors T4 and T5 are used, and a feedback loop with resistor MR4 and capacitor MC5 is introduced. This can improve the stability of the amplifier, reduce the gate current under high power, improve the linearity of the amplifier, and also reduce the impact of temperature on chip performance, greatly simplifying the external power supply circuit.

[0019] Furthermore, the numerically controlled attenuator includes:

[0020] Grounding inductance La1, grounding inductance La2, resistors Ra1, Ra2, Ra3, Ra4, Ra5, Ra6, Ra7, Ra8, Ra9, Ra10, Ra11, Ra12, Ra13, Ra14, Ra15, Ra16, Ra17, Ra61, capacitors Ca1, Ca2, grounding capacitor Ca3, grounding capacitor Ca4, capacitor Ca5, transmission line TLa1, transmission line TLa1, transmission line TLa4, transmission line... Transmission line TLa5, transmission line TLa8, transistors Ts1, Ts2, Ts3, Ts4, Ts5, and Ts6; wherein, one end of resistor Ra1, one end of capacitor Ca1, and one end of resistor Ra3 are all connected to the other end of capacitor MC3, the other end of resistor Ra3 is connected to ground inductor La2, the other end of resistor Ra1 is connected to one end of capacitor Ca2, the other end of capacitor Ca1, and one end of resistor Ra2, the other end of resistor Ra2 is connected to ground inductor La1, and the other end of capacitor Ca2 is connected to... One end of transmission line TLa1 is connected to [connection point]. The other end of transmission line TLa1 is connected to one end of resistor Ra4, the drain of transistor Ts1, and the drain of transistor Ts3, respectively. The other end of resistor Ra4 is connected to one end of transmission line TLa4, the source of transistor Ts1, and the drain of transistor Ts2, respectively. The gate of transistor Ts2 is connected to one end of resistor Ra10. The source of transistor Ts2 is connected to one end of resistor Ra5. The gate of transistor Ts1 is connected to one end of resistor Ra6. The source of transistor Ts3 is connected to one end of resistor Ra7. The other end of 5 is connected to the other end of resistor Ra7 and one end of resistor Ra9 respectively. The other end of resistor Ra9 is connected to ground capacitor Ca3. The gate of transistor Ts3 is connected to one end of resistor Ra8. The other ends of resistor Ra8 and resistor Ra10 are both connected to positive voltage parallel drive network. The other end of resistor Ra6 is connected to positive voltage parallel drive network. The other end of transmission line TLa4 is connected to one end of resistor Ra61 and one end of transmission line TLa5 respectively. The other end of resistor Ra61 is connected to input terminal VDD. Transmission line TLa5;The other end is connected to one end of resistor Ra17, the drain of transistor Ts4, and the drain of transistor Ts6, respectively. The other end of resistor Ra17 is connected to one end of transmission line TLa8, the drain of transistor Ts5, and the source of transistor Ts4, respectively. The other end of transmission line TLa8 is connected to one end of capacitor Ca5, and the other end of capacitor Ca5 is connected to the output terminal OUT. The source of transistor Ts5 is connected to one end of resistor Ra14, and the source of transistor Ts6 is connected to one end of resistor Ra15. The other end of resistor Ra14 is connected to the other end of resistor Ra15 and one end of resistor Ra16, respectively. The other end of resistor Ra16 is connected to ground capacitor Ca4. The gate of transistor Ts5 is connected to one end of resistor Ra11, and the gate of transistor Ts6 is connected to one end of resistor Ra12. The other ends of resistors Ra11 and Ra12 are both connected to a positive voltage parallel drive network. The gate of transistor Ts1 is connected to one end of resistor Ra13, and the other end of resistor Ra13 is connected to a positive voltage parallel drive network.

[0021] The numerically controlled attenuation network employs a Π-type attenuator structure, with multiple cascaded attenuation units achieving an ultra-wide dynamic range of gain and high attenuation accuracy. The attenuator is controlled by positive current, with the control voltage provided by a parallel drive network. The power supply voltage is supplied to the main circuit through a large resistor Ra61 and can be shared with the amplifier. Capacitors Ca2~Ca5 serve to block DC current, preventing malfunctions caused by erratic control voltages to the switching transistors. A broadband equalizer structure is also incorporated into the network, giving it high gain flatness across the ultra-wideband.

[0022] Furthermore, the positive pressure parallel drive network includes:

[0023] Resistors Ra17, Ra19, Ra20, Ra22, Ra23, Ra24, Ra26, grounding resistance Ra27, Ra28, Ra29, Ra30, Ra31, Ra32, grounding resistance Ra33, Ra34, Ra35, Ra36, Ra37, Ra38, Ra39, Ra40, Ra42, Ra43, Ra45, Ra46, Ra48, Ra49, Ra50, Ra51, Ra52, Ra53, Ra54, Ra55, grounding resistance Ra 56. Grounding resistance Ra57, Grounding resistance Ra58, Grounding resistance Ra59, Resistance Ra60, Resistance Rs19, Resistance Rs20, Resistance Rs22, Resistance Rs23, Resistance Rs24, Resistance Rs26, Resistance Rs27, Resistance Rs28, Resistance Rs29, Resistance Rs30, Resistance Rs31, Resistance Rs32, Resistance Rs33, Resistance Rs34, Resistance Rs35, Resistance Rs37, Resistance Rs38, Transistor Tss1, Transistor Tss2, Transistor Tss3, Transistor Tss4, Transistor Tss5, Transistor Tss6, Transistor Ts7, Transistor Ts11, Transistor Ts12, Transistor Ts13, Transistor Ts14, Transistor T S15, Transistor Ts16, Transistor Tb1, Transistor Tb2, Transistor Tb3, Transistor Tb4, Transistor Tb5, Transistor Tb6, Transistor Tb7, Transistor Tb11, Transistor Tb12, Transistor Tb13, Transistor Tb14, Transistor Tb15, Transistor Tb16, Transistor Tb17, Transistor Tb18, Transistor Tb19, Transistor Tb20, Transistor Tb21, Transistor Tb22, Transistor Tb23, Transistor Tb27, Transistor Tb28, Transistor Tb29, Transistor Tb30, Transistor Tb31, Transistor Tb32, Diode D3, Diode D2, Diode D1, Diode D6, Diode D5, Diode D 4. Diodes D9, D7, and D8; wherein, one end of resistor Ra55, the drain of transistor Tb29, one end of resistor Ra51, one end of resistor Ra50, the drain of transistor Tb22, one end of resistor Ra39, the drain of transistor Tb17, one end of resistor Ra34, the drain of transistor Tb16, one end of resistor Ra29, one end of resistor Ra28, the drain of transistor Tb7, one end of resistor Ra17, the drain of transistor Tb2, one end of resistor Rs34, the drain of transistor Ts16, one end of resistor Rs29, one end of resistor Rs28, the drain of transistor Ts7, one end of resistor Rs17, and the drain of transistor Ts2 are all connected to the input terminal VDD.The other end of resistor Ra55 is connected to the source of transistor Tb20. The drain of transistor Tb30 is connected to the drain of transistor Tb31. The gate of transistor Tb30 is connected to one end of resistor Ra53. The gate of transistor Tb31 is connected to one end of grounding resistor Ra59 and resistor Ra60 respectively. The other end of resistor Ra60 is connected to the control terminal Vctrl1. The source of transistor Tb31 is connected to the drain of transistor Tb32 and the source of transistor Tb28 respectively. The gate of transistor Tb32 is connected to grounding resistor Ra58. The source of transistor Tb32 is connected to grounding resistor Ra57. The source of transistor Tb29 is connected to one end of resistor Ra54. The gate of transistor Tb29 is connected to resistor Ra54. One end of resistor Ra52 is connected to the ground resistor Ra54, and the other end of resistor Ra54 is connected to the drain of transistor Tb28. The gate of transistor Tb28 is connected to the other end of resistor Ra51 and ground resistor Ra56. The other end of resistor Ra52 is connected to the other end of resistor Ra53 and the gate of transistor Tb27. The drain of transistor Tb27 is connected to the other end of resistor Ra50. The source of transistor Tb27 is connected to the input of diode D7. The output of diode D7 is connected to the input of diode D8. The output of diode D8 is connected to the input of diode D9. The output of diode D9 is connected to the ground resistor Ra49 and one end of resistor Ra48. The source of transistor Tb22 is connected to resistor Ra49. One end of resistor 6 is connected; the other end of resistor Ra46, the gate of transistor Tb22, and the drain of transistor Tb23 are all connected to the other ends of resistors Ra11 and Ra12. The source of transistor Tb23 is grounded. The other end of resistor Ra39 is connected to the drain of transistor Tb21. The source of transistor Tb21 is connected to one end of resistor Ra45. The other end of resistor Ra45 is connected to the gate of transistor Tb21, one end of resistor Ra43, and one end of resistor Ra42, respectively. The source of transistor Tb17 is connected to one end of resistor Ra40. The other end of resistor Ra40 is connected to the other end of resistor Ra13, the gate of transistor Tb17, and the drain of transistor Tb18, respectively. Transistor Tb18... The source of transistor Tb18 is grounded. The gate of transistor Tb18 is connected to the other end of resistor Ra42 and the drain of transistor Tb19. The source of transistor Tb19 is grounded. The gate of transistor Tb19 is connected to the other end of resistor Ra43, the gate of transistor Tb23, and the drain of transistor Tb20. The source of transistor Tb20 is grounded. The gate of transistor Tb20 is connected to the other end of resistor Ra48. The other end of resistor Ra34 is connected to the source of transistor Tb15. The drain of transistor Tb15 is connected to the drain of transistor Tb13. The gate of transistor Tb15 is connected to one end of resistor Ra31. The gate of transistor Tb31 is connected to one end of grounding resistor Ra37 and resistor Ra38.The other end of resistor Ra38 is connected to the control terminal Vctrl2. The source of transistor Tb13 is connected to the drain of transistor Tb14 and the source of transistor Tb12, respectively. The gate of transistor Tb14 is connected to ground resistor Ra35. The source of transistor Tb14 is connected to ground resistor Ra36. The source of transistor Tb16 is connected to one end of resistor Ra32. The gate of transistor Tb16 is connected to one end of resistor Ra30. The other end of resistor Ra32 is connected to the drain of transistor Tb12. The gate of transistor Tb12 is connected to the other end of resistor Ra29 and ground resistor Ra33, respectively. The other end of resistor Ra30 is connected to the other end of resistor Ra31 and the gate of transistor Tb11, respectively. The drain of transistor Tb11 is connected to the other end of resistor Ra28. The source of transistor Tb11 is connected to the input of diode D4. The output of diode D4 is connected to the input of diode D5. The output of diode D5 is connected to the input of diode D6. The output of diode D6 is connected to one end of ground resistor Ra27 and resistor Ra26 respectively. The source of transistor Tb7 is connected to one end of resistor Ra24. The other end of resistor Ra24, the gate of transistor Tb7, and the drain of transistor Tb6 are all connected to the other ends of resistors Ra10 and Ra8. The source of transistor Tb6 is grounded. The other end of resistor Ra17 is connected to the drain of transistor Tb1. The source of transistor Tb1 is connected to resistor R... One end of resistor Ra19 is connected to the gate of transistor Tb1, one end of resistor Ra22, and one end of resistor Ra23. The source of transistor Tb2 is connected to one end of resistor Ra20. The other end of resistor Ra20 is connected to the other end of resistor Ra5, the gate of transistor Tb2, and the drain of transistor Tb3. The source of transistor Tb3 is grounded. The gate of transistor Tb3 is connected to the other end of resistor Ra22 and the drain of transistor Tb4. The source of transistor Tb4 is grounded. The gate of transistor Tb4 is connected to the other end of resistor Ra23, the gate of transistor Tb6, and the drain of transistor Tb5. The source of transistor Tb5 is grounded. The gate of transistor Tb5... The other end of resistor Ra26 is connected to the source of transistor Ts15. The drain of transistor Ts15 is connected to the drain of transistor Ts13. The gate of transistor Ts15 is connected to one end of resistor Rs31. The gate of transistor Ts31 is connected to one end of ground resistor Rs37 and resistor Rs38 respectively. The other end of resistor Rs38 is connected to the control terminal Vctrl2. The source of transistor Ts13 is connected to the drain of transistor Ts14 and the source of transistor Ts12 respectively. The gate of transistor Ts14 is connected to ground resistor Rs35. The source of transistor Ts14 is connected to ground resistor Rs36. The source of transistor Ts16 is connected to one end of resistor Rs32.The gate of transistor Ts16 is connected to one end of resistor Rs30, the other end of resistor Rs32 is connected to the drain of transistor Ts12, the gate of transistor Ts12 is connected to the other end of resistor Rs29 and ground resistor Rs33, the other end of resistor Rs30 is connected to the other end of resistor Rs31 and the gate of transistor Ts11, the drain of transistor Ts11 is connected to the other end of resistor Rs28, and the source of transistor Ts11 is connected to the input terminal of diode D1. Diode D... The output terminal of transistor Ts1 is connected to the input terminal of diode D2. The output terminal of diode D2 is connected to the input terminal of diode D3. The output terminal of diode D3 is connected to one end of grounding resistor Rs27 and resistor Rs26 respectively. The source of transistor Ts7 is connected to one end of resistor Rs24. The other end of resistor Rs24, the gate of transistor Ts7, and the drain of transistor Ts6 are all connected to the other end of resistor Rp13, one end of resistor Rp1, and one end of resistor Rp7 respectively. The source of transistor Ts6 is grounded. The other end of resistor Rs17 is connected to the drain of transistor Ts1. The source of transistor Ts1 is connected to one end of resistor Rs19. The other end of resistor Rs19 is connected to the gate of transistor Ts1, one end of resistor Rs22, and one end of resistor Rs23, respectively. The source of transistor Ts2 is connected to one end of resistor Rs20. The other end of resistor Rs20 is connected to the other end of resistor Rp10, one end of resistor Rp9, one end of capacitor Cp5, one end of capacitor Cp4, and one end of resistor Rp5, respectively. One end of resistor Rp4, the gate of transistor Ts2, and the drain of transistor Ts3 are connected. The source of transistor Ts3 is grounded. The gate of transistor Ts3 is connected to the other end of resistor Rs22 and the drain of transistor Ts4. The source of transistor Ts4 is grounded. The gate of transistor Ts4 is connected to the other end of resistor Rs23, the gate of transistor Ts6, and the drain of transistor Ts5. The source of transistor Ts5 is grounded. The gate of transistor Ts5 is connected to the other end of resistor Rs26.

[0024] The parallel drive network uses a positive voltage as a reference voltage and can share a power supply with the amplifier network, simplifying the power-up process. Through logic transistors and resistors, the parallel drive network achieves parallel output of control signals. Vctr1 and Vctr2 control the high and low levels to switch the attenuation state, while Vctr3 controls the high and low levels to switch the single-pole single-throw switch state. It is suitable for various TTL and LVTTL signals, solving the problems of traditional attenuators, multiple switch control ports, and complex power-up processes. Attached Figure Description

[0025] This specification will be further described by way of exemplary embodiments, which will be described in detail with reference to the accompanying drawings. These embodiments are not limiting; in these embodiments, the same reference numerals denote the same structures, wherein:

[0026] Figure 1 This is an exemplary schematic diagram of a multi-functional chip for coupling, filtering, amplification, and attenuation, as shown in some embodiments of this specification.

[0027] Figure 2 This is an exemplary schematic diagram of a coupler and a high-pass filter in a multi-functional chip for coupling, filtering, amplification, and attenuation, according to some embodiments of this specification;

[0028] Figure 3 This is an exemplary schematic diagram of a single-pole single-throw switch in a coupling, filtering, amplifying, and attenuating multifunctional chip according to some embodiments of this specification;

[0029] Figure 4 This is an exemplary schematic diagram of a low-noise amplifier in a coupling, filtering, amplifying, and attenuating multifunctional chip, as shown in some embodiments of this specification.

[0030] Figure 5 This is an exemplary schematic diagram of a digitally controlled attenuator in a multi-functional chip for coupling, filtering, amplification, and attenuation, as shown in some embodiments of this specification;

[0031] Figure 6(a) is a partial exemplary schematic diagram of a positive voltage parallel drive network in a coupled filtering amplification attenuation multifunctional chip according to some embodiments of this specification;

[0032] Figure 6(b) is a partial exemplary schematic diagram of a positive voltage parallel drive network in a coupled filtering amplification attenuation multifunctional chip according to some embodiments of this specification;

[0033] Figure 6(c) is a partial exemplary schematic diagram of a positive voltage parallel drive network in a coupled filtering amplification attenuation multifunctional chip according to some embodiments of this specification;

[0034] Figure 7 This is a conventional active bias schematic diagram provided according to some embodiments of this specification;

[0035] Figure 8 These are high and low temperature output power curves for novel and conventional active biasing provided according to some embodiments of this specification;

[0036] Figure 9 This is a graph showing the insertion loss and coupling degree of a coupler in a multi-functional chip for coupling, filtering, amplification, and attenuation, as illustrated in some embodiments of this specification. Detailed Implementation

[0037] The specific embodiments of the present invention are described below to enable those skilled in the art to understand the present invention. However, it should be understood that the present invention is not limited to the scope of the specific embodiments. For those skilled in the art, various changes are obvious as long as they are within the spirit and scope of the present invention as defined and determined by the appended claims. All inventions utilizing the concept of the present invention are protected.

[0038] Example

[0039] Figure 1 This is an exemplary schematic diagram of a multi-functional chip for coupling, filtering, amplification, and attenuation, as shown in some embodiments of this specification. Figure 1 As shown, a multi-functional chip for coupling, filtering, amplification, and attenuation includes: a single-pole single-throw switch, a coupler, a high-pass filter, a low-noise amplifier, a digitally controlled attenuator, and a positive-voltage parallel drive network; wherein, the single-pole single-throw switch is connected to the coupler and the positive-voltage parallel drive network, the high-pass filter is connected to the coupler and the low-noise amplifier, the low-noise amplifier is connected to the digitally controlled attenuator, and the digitally controlled attenuator is connected to the positive-voltage parallel drive network.

[0040] In some embodiments, such as Figure 3As shown, the single-pole single-throw switch includes: capacitors Cp1, Cp2, Cp3, Cp4, Cp5, and Cp6; resistors Rp1, Rp2, Rp4, Rp5, Rp7, Rp9, Rp10, Rp12, Rp13, and Rp14; transmission lines TLp1, TLp2, TLp3, TLp4, TLp5, TLp6, and TLp7; and transistors Tp1, Tp2, Tp3, Tp4, Tp5, Tp6, and Tp7. One end of resistor Rp14 is connected to the input terminal VDD, and resistor Rp1... The other end of 4 is connected to one end of capacitor Cp2 and one end of transmission line TLp7. The other end of capacitor Cp2 is connected to the coupling terminal CP. The other end of transmission line TLp7 is connected to the source of transistor Tp7 and one end of resistor Rp12. The other end of resistor Rp12 is connected to the drain of transistor Tp7, the drain of transistor Tp6, and one end of transmission line TLp6. The source of transistor Tp6 is connected to ground capacitor Cp6. The gate of transistor Tp6 is connected to one end of resistor Rp10. The other ends of resistor Rp10, one end of resistor Rp9, one end of capacitor Cp5, one end of capacitor Cp4, one end of resistor Rp5, and one end of resistor Rp4 are all connected to and grounded by a positive voltage parallel drive network. The other end is connected to the gate of transistor Tp5. The source of transistor Tp5 is connected to the other end of capacitor Cp5. The drain of transistor Tp5 is connected to the other end of transmission line TLp6 and one end of transmission line TLp5. The gate of transistor Tp7 is connected to one end of resistor Rp13. The other ends of resistor Rp13, one end of resistor Rp1, and one end of resistor Rp7 are all connected to a positive voltage parallel drive network. The other end of resistor Rp1 is connected to the gate of transistor Tp1. The source of transistor Tp1 is connected to one end of transmission line TLp2 and one end of inductor Tp2. The other end of transmission line TLp2 is connected to one end of capacitor Cp1. The other end of capacitor Cp1 is connected to one end of transmission line TLp1. The other end of resistor 1 is connected to the coupler. The other end of resistor Rp2 is connected to the drain of transistor Tp1, the drain of transistor Tp2, and one end of transmission line TLp3. The source of transistor Tp2 is connected to ground capacitor Cp3. The gate of transistor Tp2 is connected to the other end of resistor Rp4. The other end of transmission line TLp3 is connected to the drain of transistor Tp3 and one end of transmission line TLp4. The gate of transistor Tp3 is connected to the other end of resistor Rp5. The source of transistor Tp3 is connected to one end of capacitor Cp4. The other end of transmission line TLp4 is connected to the drain of transistor Tp4. The source of transistor Tp4 is connected to the other end of transmission line TLp5. The gate of transistor Tp4 is connected to the other end of resistor Rp7.

[0041] In some embodiments, such as Figure 2 As shown, the coupler includes resistors Rpp1 and Rpp2. The high-pass filter includes: inductor Lf1, ground inductor Lf2, inductor Lf3, capacitors Cf1, Cf2, Cf3, Cf4, ground capacitor Cf5, Cf6, Cf7, transmission lines TLf1, TLf2, TLf3, TLf4, and TLf5. The ground resistor Rpp2 is connected to the other end of transmission line TLp1 and one end of resistor Rpp1. The other end of resistor Rpp1 is connected to the input terminal IN and one end of capacitor Cf1 of the high-pass filter. The other end of capacitor Cf1 is connected to one end of inductor Lf1 and one end of transmission line TLf1. The other end of inductor Lf1... The transmission line TLf1 is connected to the grounding capacitor Cf5. ​​The other end of the transmission line TLf1 is connected to one end of the capacitor Cf2. The other end of the capacitor Cf2 is connected to one end of the transmission line TLf2. The other end of the transmission line TLf2 is connected to one end of the inductor Lf2 and one end of the transmission line TLf3. The other end of the inductor Lf2 is connected to the grounding capacitor Cf6. The other end of the transmission line TLf3 is connected to one end of the capacitor Cf3. The other end of the capacitor Cf3 is connected to one end of the transmission line TLf4. The other end of the transmission line TLf4 is connected to one end of the inductor Lf3 and one end of the transmission line TLf5. The other end of the inductor Lf3 is connected to the grounding capacitor Cf7. The other end of the transmission line TLf5 is connected to one end of the capacitor Cf4. The other end of the capacitor Cf4 is connected to the low-noise amplifier.

[0042] In some embodiments, such as Figure 4As shown, the low-noise amplifier includes: capacitors MC1, MC2, MC3, ground capacitors MC6, MC7, MC8, MC9, and MC10; transmission lines ML1, ML2, ML3, ML4, ML5, ML6, ML7, ML9, and ML10; resistor MR8; ground resistor MR9; resistor MR10; resistor MR11; resistor MR12; resistor MR13; ground resistor MR14; resistor MR15; resistor MR17; resistor MR18; amplifiers T1, T2, and T3; and a new... An active bias network is described; one end of capacitor MC1 is connected to the other end of capacitor Cf4, the other end of capacitor MC1 is connected to one end of transmission line ML1, the other end of transmission line ML1 is connected to the new active bias network, the gate of amplifier T1, and one end of transmission line ML10, respectively. The source of amplifier T1 is grounded, the drain of amplifier T1 is connected to one end of transmission line ML2 and one end of transmission line ML4, respectively, the other end of transmission line ML10 is connected to one end of capacitor MC10, the other end of capacitor MC10 is connected to one end of resistor MR18, and the other end of resistor MR18 is connected to one end of resistor RL6, one end of transmission line ML9, and one end of transmission line M One end of L7 is connected, the other end of transmission line ML2 is connected to one end of capacitor MC2, the other end of capacitor MC2 is connected to one end of transmission line ML3, the other end of transmission line ML3 is connected to one end of resistor MR8 and the gate of amplifier T2, the source of amplifier T2 is connected to the other end of transmission line ML4 and one end of resistor MR11, the other end of resistor MR11 is connected to ground capacitor MC6, the drain of amplifier T2 is connected to one end of transmission line ML5, the other end of transmission line ML5 is connected to the drain of amplifier T3, the source of amplifier T3 is connected to the other end of transmission line ML6, and the gate of amplifier T3 is connected to one end of resistor MR12. One end of resistor MR13 is connected to the other end of resistor MR12, which is connected to grounding capacitor MC7. The other end of resistor MR8 is connected to one end of grounding resistor MR9 and resistor MR10 respectively. The other end of resistor MR13 is connected to one end of grounding resistor MR14 and resistor MR15 respectively. The other ends of resistor MR10, resistor MR15, resistor MR17, grounding capacitor MC8, and transmission line ML9 are all connected to the new active bias network. The other end of resistor MR17 is connected to grounding capacitor MC9. The other end of transmission line ML7 is connected to one end of capacitor MC3. The other end of capacitor MC3 is connected to the digitally controlled attenuator.

[0043] In some embodiments, such as Figure 4As shown, the novel active bias network includes: transmission line ML8, ground capacitor MC4, capacitor MC5, resistor MR1, ground resistor MR2, resistor MR3, resistor MR4, resistor MR5, resistor MR6, ground resistor MR7, amplifier T4, and amplifier T5; wherein, one end of transmission line ML8 is connected to the other end of transmission line ML1, the gate of amplifier T1, and one end of transmission line ML10, respectively; the other end of transmission line ML8 is connected to ground capacitor MC4, one end of resistor MR1, and one end of resistor MR3, respectively; and the other end of resistor MR3 is connected to one end of capacitor MC5 and the gate of amplifier T4, respectively. The source of amplifier T4 is connected to ground resistor MR7. The drain of amplifier T4 is connected to one end of resistor MR4, one end of resistor MR6, and the gate of amplifier T5. The other end of resistor MR4 is connected to the other end of capacitor MC5. The other end of resistor MR1 is connected to ground resistor MR2 and the source of amplifier T5. The drain of amplifier T5 is connected to one end of resistor MR5. The other ends of resistor MR5 and resistor MR6 are connected to the other ends of resistor MR10, resistor MR15, resistor MR17, ground capacitor MC8, and transmission line ML9.

[0044] In some embodiments, such as Figure 5As shown, the numerically controlled attenuator includes: grounding inductor La1, grounding inductor La2, resistors Ra1, Ra2, Ra3, Ra4, Ra5, Ra6, Ra7, Ra8, Ra9, Ra10, Ra11, Ra12, Ra13, Ra14, Ra15, Ra16, Ra17, Ra61, capacitors Ca1 and Ca2, grounding capacitors Ca3 and Ca4, capacitors Ca5, and transmission line TLa1. Transmission lines TLa4, TLa5, TLa8, transistors Ts1, Ts2, Ts3, Ts4, Ts5, and Ts6; wherein, one end of resistor Ra1, one end of capacitor Ca1, and one end of resistor Ra3 are all connected to the other end of capacitor MC3, the other end of resistor Ra3 is connected to ground inductor La2, the other end of resistor Ra1 is connected to one end of capacitor Ca2, the other end of capacitor Ca1, and one end of resistor Ra2, the other end of resistor Ra2 is connected to ground inductor La1, and capacitor Ca... The other end of 2 is connected to one end of transmission line TLa1. The other end of transmission line TLa1 is connected to one end of resistor Ra4, the drain of transistor Ts1, and the drain of transistor Ts3, respectively. The other end of resistor Ra4 is connected to one end of transmission line TLa4, the source of transistor Ts1, and the drain of transistor Ts2, respectively. The gate of transistor Ts2 is connected to one end of resistor Ra10. The source of transistor Ts2 is connected to one end of resistor Ra5. The gate of transistor Ts1 is connected to one end of resistor Ra6. The source of transistor Ts3 is connected to one end of resistor Ra7. The other end of resistor Ra5 is connected to the other end of resistor Ra7 and one end of resistor Ra9 respectively. The other end of resistor Ra9 is connected to ground capacitor Ca3. The gate of transistor Ts3 is connected to one end of resistor Ra8. The other ends of resistor Ra8 and resistor Ra10 are both connected to the positive voltage parallel drive network. The other end of resistor Ra6 is connected to the positive voltage parallel drive network. The other end of transmission line TLa4 is connected to one end of resistor Ra61 and one end of transmission line TLa5 respectively. The other end of resistor Ra61 is connected to the input terminal VDD. Transmission line TLa5;The other end is connected to one end of resistor Ra17, the drain of transistor Ts4, and the drain of transistor Ts6, respectively. The other end of resistor Ra17 is connected to one end of transmission line TLa8, the drain of transistor Ts5, and the source of transistor Ts4, respectively. The other end of transmission line TLa8 is connected to one end of capacitor Ca5, and the other end of capacitor Ca5 is connected to the output terminal OUT. The source of transistor Ts5 is connected to one end of resistor Ra14, and the source of transistor Ts6 is connected to one end of resistor Ra15. The other end of resistor Ra14 is connected to the other end of resistor Ra15 and one end of resistor Ra16, respectively. The other end of resistor Ra16 is connected to ground capacitor Ca4. The gate of transistor Ts5 is connected to one end of resistor Ra11, and the gate of transistor Ts6 is connected to one end of resistor Ra12. The other ends of resistors Ra11 and Ra12 are both connected to a positive voltage parallel drive network. The gate of transistor Ts1 is connected to one end of resistor Ra13, and the other end of resistor Ra13 is connected to a positive voltage parallel drive network.

[0045] In some embodiments, as shown in Figures 6(a), 6(b), and 6(c), the positive voltage parallel drive network includes: resistors Ra17, Ra19, Ra20, Ra22, Ra23, Ra24, Ra26, grounding resistors Ra27, Ra28, Ra29, Ra30, Ra31, Ra32, grounding resistors Ra33, Ra34, Ra35, Ra36, Ra37, Ra38, Ra39, Ra40, and resistor R. a42, Resistor Ra43, Resistor Ra45, Resistor Ra46, Resistor Ra48, Resistor Ra49, Resistor Ra50, Resistor Ra51, Resistor Ra52, Resistor Ra53, Resistor Ra54, Resistor Ra55, Grounding Resistor Ra56, Grounding Resistor Ra57, Grounding Resistor Ra58, Grounding Resistor Ra59, Resistor Ra60, Resistor Rs19, Resistor Rs20, Resistor Rs22, Resistor Rs23, Resistor Rs24, Resistor Rs26, Resistor Rs27, Resistor Rs28, Resistor Rs29, Resistor Rs30, Resistor Rs31 Resistors Rs32, Rs33, Rs34, Rs35, Rs37, Rs38; Transistors Tss1, Tss2, Tss3, Tss4, Tss5, Tss6, Ts7, Ts11, Ts12, Ts13, Ts14, Ts15, Ts16; Transistors Tb1, Tb2, Tb3, Tb4, Tb5, Tb6, Tb7, Tb11. Transistors Tb12, Tb13, Tb14, Tb15, Tb16, Tb17, Tb18, Tb19, Tb20, Tb21, Tb22, Tb23, Tb27, Tb28, Tb29, Tb30, Tb31, Tb32; diodes D3, D2, D1, D6, D5, D4, D9, D7, and D7; among which,One end of resistor Ra55, the drain of transistor Tb29, one end of resistor Ra51, one end of resistor Ra50, the drain of transistor Tb22, one end of resistor Ra39, the drain of transistor Tb17, one end of resistor Ra34, the drain of transistor Tb16, one end of resistor Ra29, one end of resistor Ra28, the drain of transistor Tb7, one end of resistor Ra17, the drain of transistor Tb2, one end of resistor Rs34, the drain of transistor Ts16, one end of resistor Rs29, one end of resistor Rs28, the drain of transistor Ts7, one end of resistor Rs17, and the drain of transistor Ts2 are all connected to the input terminal VDD. The other end of resistor Ra55 is connected to transistor Tb29. The source of transistor Tb20 is connected to the source of transistor Tb31. The drain of transistor Tb30 is connected to the drain of transistor Tb31. The gate of transistor Tb30 is connected to one end of resistor Ra53. The gate of transistor Tb31 is connected to one end of grounding resistor Ra59 and resistor Ra60 respectively. The other end of resistor Ra60 is connected to the control terminal Vctrl1. The source of transistor Tb31 is connected to the drain of transistor Tb32 and the source of transistor Tb28 respectively. The gate of transistor Tb32 is connected to grounding resistor Ra58. The source of transistor Tb32 is connected to grounding resistor Ra57. The source of transistor Tb29 is connected to one end of resistor Ra54. The gate of transistor Tb29 is connected to one end of resistor Ra52. Resistor R... The other end of a54 is connected to the drain of transistor Tb28. The gate of transistor Tb28 is connected to the other end of resistor Ra51 and ground resistor Ra56. The other end of resistor Ra52 is connected to the other end of resistor Ra53 and the gate of transistor Tb27. The drain of transistor Tb27 is connected to the other end of resistor Ra50. The source of transistor Tb27 is connected to the input of diode D7. The output of diode D7 is connected to the input of diode D8. The output of diode D8 is connected to the input of diode D9. The output of diode D9 is connected to one end of ground resistor Ra49 and resistor Ra48. The source of transistor Tb22 is connected to one end of resistor Ra46. The other end of resistor Ra46, the gate of transistor Tb22, and the drain of transistor Tb23 are all connected to the other ends of resistors Ra11 and Ra12. The source of transistor Tb23 is grounded. The other end of resistor Ra39 is connected to the drain of transistor Tb21. The source of transistor Tb21 is connected to one end of resistor Ra45. The other end of resistor Ra45 is connected to the gate of transistor Tb21, one end of resistor Ra43, and one end of resistor Ra42, respectively. The source of transistor Tb17 is connected to one end of resistor Ra40. The other end of resistor Ra40 is connected to the other end of resistor Ra13, the gate of transistor Tb17, and the drain of transistor Tb18, respectively. The source of transistor Tb18 is grounded.The gate of transistor Tb18 is connected to the other end of resistor Ra42 and the drain of transistor Tb19. The source of transistor Tb19 is grounded. The gate of transistor Tb19 is connected to the other end of resistor Ra43, the gate of transistor Tb23, and the drain of transistor Tb20. The source of transistor Tb20 is grounded. The gate of transistor Tb20 is connected to the other end of resistor Ra48. The other end of resistor Ra34 is connected to the source of transistor Tb15. The drain of transistor Tb15 is connected to the drain of transistor Tb13. The gate of transistor Tb15 is connected to one end of resistor Ra31. The gate of transistor Tb31 is connected to one end of grounded resistor Ra37 and resistor Ra38. The other end is connected to the control terminal Vctrl2. The source of transistor Tb13 is connected to the drain of transistor Tb14 and the source of transistor Tb12, respectively. The gate of transistor Tb14 is connected to the grounding resistor Ra35. The source of transistor Tb14 is connected to the grounding resistor Ra36. The source of transistor Tb16 is connected to one end of resistor Ra32. The gate of transistor Tb16 is connected to one end of resistor Ra30. The other end of resistor Ra32 is connected to the drain of transistor Tb12. The gate of transistor Tb12 is connected to the other end of resistor Ra29 and the grounding resistor Ra33, respectively. The other end of resistor Ra30 is connected to the other end of resistor Ra31 and the gate of transistor Tb11, respectively. The drain of transistor Tb11... The source of transistor Tb11 is connected to the input of diode D4, the output of diode D4 is connected to the input of diode D5, the output of diode D5 is connected to the input of diode D6, and the output of diode D6 is connected to one end of grounding resistor Ra27 and resistor Ra26 respectively. The source of transistor Tb7 is connected to one end of resistor Ra24, the other end of resistor Ra24, the gate of transistor Tb7, and the drain of transistor Tb6 are all connected to the other ends of resistors Ra10 and Ra8. The source of transistor Tb6 is grounded. The other end of resistor Ra17 is connected to the drain of transistor Tb1, and the source of transistor Tb1 is connected to one end of resistor Ra19. Resistor R... The other end of a19 is connected to the gate of transistor Tb1, one end of resistor Ra22, and one end of resistor Ra23. The source of transistor Tb2 is connected to one end of resistor Ra20. The other end of resistor Ra20 is connected to the other end of resistor Ra5, the gate of transistor Tb2, and the drain of transistor Tb3. The source of transistor Tb3 is grounded. The gate of transistor Tb3 is connected to the other end of resistor Ra22 and the drain of transistor Tb4. The source of transistor Tb4 is grounded. The gate of transistor Tb4 is connected to the other end of resistor Ra23, the gate of transistor Tb6, and the drain of transistor Tb5. The source of transistor Tb5 is grounded. The gate of transistor Tb5 is connected to the other end of resistor Ra26.The other end of resistor Rs34 is connected to the source of transistor Ts15. The drain of transistor Ts15 is connected to the drain of transistor Ts13. The gate of transistor Ts15 is connected to one end of resistor Rs31. The gate of transistor Ts31 is connected to one end of ground resistor Rs37 and resistor Rs38 respectively. The other end of resistor Rs38 is connected to the control terminal Vctrl2. The source of transistor Ts13 is connected to the drain of transistor Ts14 and the source of transistor Ts12 respectively. The gate of transistor Ts14 is connected to ground resistor Rs35. The source of transistor Ts14 is connected to ground resistor Rs36. The source of transistor Ts16 is connected to one end of resistor Rs32. The gate of transistor Ts16 is connected to one end of resistor Rs30, the other end of resistor Rs32 is connected to the drain of transistor Ts12, the gate of transistor Ts12 is connected to the other end of resistor Rs29 and ground resistor Rs33, the other end of resistor Rs30 is connected to the other end of resistor Rs31 and the gate of transistor Ts11, the drain of transistor Ts11 is connected to the other end of resistor Rs28, the source of transistor Ts11 is connected to the input of diode D1, the output of diode D1 is connected to the input of diode D2, the output of diode D2 is connected to the input of diode D3, and the output of diode D3 is connected to ground. One end of resistors Rs27 and Rs26 is connected. The source of transistor Ts7 is connected to one end of resistor Rs24. The other end of resistor Rs24, the gate of transistor Ts7, and the drain of transistor Ts6 are all connected to the other end of resistor Rp13, one end of resistor Rp1, and one end of resistor Rp7. The source of transistor Ts6 is grounded. The other end of resistor Rs17 is connected to the drain of transistor Ts1. The source of transistor Ts1 is connected to one end of resistor Rs19. The other end of resistor Rs19 is connected to the gate of transistor Ts1, one end of resistor Rs22, and one end of resistor Rs23, respectively. The source of transistor Ts2 is connected to one end of resistor Rs20. The other end of resistor Rs20 is connected to the other end of resistor Rp10, one end of resistor Rp9, one end of capacitor Cp5, one end of capacitor Cp4, one end of resistor Rp5, one end of resistor Rp4, the gate of transistor Ts2, and the drain of transistor Ts3. The source of transistor Ts3 is grounded. The gate of transistor Ts3 is connected to the other end of resistor Rs22 and the drain of transistor Ts4. The source of transistor Ts4 is grounded. The gate of transistor Ts4 is connected to the other end of resistor Rs23, the gate of transistor Ts6, and the drain of transistor Ts5. The source of transistor Ts5 is grounded. The gate of transistor Ts5 is connected to the other end of resistor Rs26.

[0046] Working principle: The RF signal enters through either the input terminal IN or the coupling terminal CP. If it enters through the input terminal IN, it is filtered by a high-pass filter, amplified by a low-noise amplifier, and then amplified by a novel active bias network. The signal then passes through a digitally controlled attenuator to reduce its intensity before being output from the OUT port. If the RF signal enters through the coupling terminal CP, it passes through a single-pole single-throw (SPST) switch. The switch determines whether the signal enters the coupler. The coupled output signal then enters a high-pass filter, is amplified by a low-noise amplifier, and then passes through a digitally controlled attenuator to reduce its intensity before being output from the OUT port. A parallel drive network provides control signals for the SPST and attenuation networks.

[0047] The coupler consists of a series resistor Rp1 and a parallel resistor Rp2 connected to ground. The branch from the input terminal IN to the capacitor Cf1 is the direct-through branch of the coupler; the branch from the transmission line TLp1, through resistors Rp2 and Rp1, to the capacitor Cf1 is the coupling branch. The desired coupling degree is achieved by adjusting the values ​​of resistors Rp1 and Rp2. Compared to traditional coupler structures, this coupler is extremely small, easy to adjust, and has a wide range of coupling accuracy. The insertion loss and coupling degree of the coupler are as follows: Figure 9 As shown.

[0048] The high-pass filter adopts a seventh-order elliptic function high-pass filter structure based on lumped parameters. It includes three parallel LC-to-ground branches to generate multiple transmission zeros outside the frequency band to improve the frequency selectivity and out-of-band rejection of the high-pass filter. Transmission lines TLf1~TLf5 are used to adjust the input and output standing waves within the operating frequency band.

[0049] The low-noise amplifier employs a current-reused cascode structure, introducing an RLC parallel negative feedback network to achieve ultra-wideband, high-gain, high-linearity, low-power, and low-noise characteristics. T1 and T2 form a current-reused amplification network, while T2 and T3 form a cascode amplifier. In the current-reused network, the source stage of T2 and the gate stage of T3 in the cascode amplification network are connected in parallel with an RC suppression circuit to increase the stability of the amplifier network. The power supply port uses a parallel capacitor and a series RC circuit to ground, primarily to suppress unstable high and low frequency signals from the power supply. The power supply voltage is shared by transistors T1, T2, and T3. Resistors MR9, MR10, MR14, and MR15 determine the proportional relationship of the drain voltage distribution among the three transistors, while resistors MR8 and MR13 provide isolation between the power supply and the signal. Capacitor MC1 and transmission line ML1 achieve input impedance matching; transmission lines ML2, ML3, ML4, and ML5 and capacitor MC2 achieve inter-stage impedance matching; and transmission lines ML6, ML7, ML9, and capacitor MC3 achieve output impedance matching. A novel active bias network achieves self-biased voltage supply to the amplifier transistor gate. It employs complementary transistors T4 and T5, and introduces a feedback loop with resistor MR4 and capacitor MC5. This improves amplifier stability, reduces gate current at high power, enhances linearity, mitigates the impact of temperature on chip performance, and significantly simplifies the external power supply circuitry. Conventional active bias networks, such as… Figure 7 As shown, the comparison of high and low temperature output power between the novel active bias and the conventional active bias is as follows: Figure 8 As shown.

[0050] The numerically controlled attenuation network employs a Π-type attenuator structure, with multiple cascaded attenuation units achieving an ultra-wide dynamic range and high attenuation accuracy. The attenuator is controlled by positive current, with the control voltage provided by a parallel drive network. The power supply voltage is supplied to the main circuit via a large resistor Ra61. The attenuator consists of transmission lines TLa1~TLa8, capacitors Ca2~Ca5, series transistors Ts1 and Ts4, parallel transistors Ts2, Ts3, Ts5, and Ts6, and resistors Ra4, Ra5, Ra7, Ra9, and Ra14~Ra17. Capacitors Ca2~Ca5 serve to block DC current, preventing malfunctions caused by control voltage fluctuations in the switching transistors. A broadband equalizer structure is also incorporated into the network, giving it high gain flatness in the ultra-wideband.

[0051] The single-pole single-throw switch employs a two-stage, one-series, two-parallel structure, achieving low insertion loss and high isolation performance over an ultra-wide operating bandwidth. Resistors Rp2 and Rp12, connected in parallel with the series transistors, ensure excellent port VSWR performance even when the switch is off. The switch is controlled by positive voltage, provided by a parallel drive network, with the power supply voltage supplied to the main circuit via a large resistor Rp14. The gates of the series transistors Tp1, Tp4, and Tp7 are connected together via resistors, while the gates of the parallel transistors Tp2, Tp3, Tp5, and Tp6 are connected together via resistors, and then all are connected to the parallel drive network.

[0052] The parallel drive network uses a positive voltage as a reference voltage and can share a power supply with the amplifier network, simplifying the power-up process. Through logic transistors and resistors, the parallel drive network achieves parallel output of control signals. Vctr1 and Vctr2 control the high and low levels to switch the attenuation state, while Vctr3 controls the high and low levels to switch the single-pole single-throw switch state. It is suitable for various TTL and LVTTL signals, solving the problems of traditional attenuators, multiple switch control ports, and complex power-up processes.

[0053] In some embodiments of this specification, a multifunctional chip for coupling, filtering, amplification, and attenuation is provided. The coupler employs a series-parallel resistor structure, significantly reducing size and achieving ultra-wideband coupling accuracy. The filter uses a lumped-parameter, seventh-order elliptic function high-pass filter structure, including three parallel LC-to-ground branches to generate multiple transmission zeros outside the frequency band, improving the frequency selectivity and out-of-band rejection of the high-pass filter. The low-noise amplifier uses a current-multiplexed cascode amplification structure, introducing a parallel negative feedback network to achieve ultra-wideband, high-gain, high-linearity, low-power, and low-noise characteristics. Simultaneously, a novel active bias network is used to improve power over the ultra-wide operating frequency band and mitigate high and low temperature performance fluctuations. The attenuator uses multiple cascaded Π-type attenuator structures to achieve an ultra-wide dynamic range of gain and high attenuation accuracy. The single-pole single-throw switch uses a two-stage, one-series, two-parallel structure to achieve low insertion loss and high isolation performance. The parallel drive network uses a positive voltage as a reference voltage, allowing it to share a power supply with the amplifier network, simplifying the power-on method and improving ease of use.

Claims

1. A multi-functional chip for coupling, filtering, amplification, and attenuation, characterized in that, include: The system includes a single-pole single-throw switch, a coupler, a high-pass filter, a low-noise amplifier, a digitally controlled attenuator, and a positive-voltage parallel drive network. The single-pole single-throw switch is connected to the coupler and the positive-voltage parallel drive network; the high-pass filter is connected to the coupler and the low-noise amplifier; the low-noise amplifier is connected to the digitally controlled attenuator; and the digitally controlled attenuator is connected to the positive-voltage parallel drive network. The single-pole single-throw switch includes: Capacitors Cp1, Cp2, Cp3, Cp4, Cp5, and Cp6 are grounded. Resistors Rp1, Rp2, Rp4, Rp5, Rp7, Rp9, Rp10, Rp12, Rp13, and Rp14 are also present. Transmission lines TLp1, TLp2, TLp3, TLp4, TLp5, TLp6, and TLp7 are also present. Transistors Tp1, Tp2, Tp3, Tp4, Tp5, Tp6, and Tp7 are also present. One end of resistor Rp14 is connected to the input terminal VDD, and the other end of resistor Rp14 is connected to the grounding capacitor VDD. One end of capacitor Cp2 is connected to one end of transmission line TLp7. The other end of capacitor Cp2 is connected to the coupling terminal CP. The other end of transmission line TLp7 is connected to the source of transistor Tp7 and one end of resistor Rp12. The other end of resistor Rp12 is connected to the drain of transistor Tp7, the drain of transistor Tp6, and one end of transmission line TLp6. The source of transistor Tp6 is connected to ground capacitor Cp6. The gate of transistor Tp6 is connected to one end of resistor Rp10. The other end of resistor Rp10, one end of resistor Rp9, one end of capacitor Cp5, one end of capacitor Cp4, one end of resistor Rp5, and one end of resistor Rp4 are all connected to the positive voltage parallel drive network and grounded. The other end of resistor Rp9 is connected to the crystal... The gate of transistor Tp5 is connected to the circuit. The source of transistor Tp5 is connected to the other end of capacitor Cp5. The drain of transistor Tp5 is connected to the other end of transmission line TLp6 and one end of transmission line TLp5. The gate of transistor Tp7 is connected to one end of resistor Rp13. The other end of resistor Rp13, one end of resistor Rp1, and one end of resistor Rp7 are all connected to a positive voltage parallel drive network. The other end of resistor Rp1 is connected to the gate of transistor Tp1. The source of transistor Tp1 is connected to one end of transmission line TLp2 and one end of inductor Tp2. The other end of transmission line TLp2 is connected to one end of capacitor Cp1. The other end of capacitor Cp1 is connected to one end of transmission line TLp1. The other end of transmission line TLp1... One end of the resistor Rp2 is connected to the coupler. The other end of the resistor Rp2 is connected to the drain of transistor Tp1, the drain of transistor Tp2, and one end of transmission line TLp3. The source of transistor Tp2 is connected to ground capacitor Cp3. The gate of transistor Tp2 is connected to the other end of the resistor Rp4. The other end of transmission line TLp3 is connected to the drain of transistor Tp3 and one end of transmission line TLp4. The gate of transistor Tp3 is connected to the other end of the resistor Rp5. The source of transistor Tp3 is connected to one end of capacitor Cp4. The other end of transmission line TLp4 is connected to the drain of transistor Tp4. The source of transistor Tp4 is connected to the other end of transmission line TLp5. The gate of transistor Tp4 is connected to the other end of the resistor Rp7.

2. The multi-functional chip for coupling, filtering, amplification, and attenuation according to claim 1, characterized in that, The coupler includes resistors Rpp1 and Rpp2. The high-pass filter includes: inductor Lf1, ground inductor Lf2, inductor Lf3, capacitors Cf1, Cf2, Cf3, Cf4, ground capacitors Cf5, Cf6, Cf7, transmission lines TLf1, TLf2, TLf3, TLf4, and TLf5. The ground resistor Rpp2 is connected to the other end of transmission line TLp1 and one end of resistor Rpp1. The other end of resistor Rpp1 is connected to the input terminal IN and one end of capacitor Cf1 of the high-pass filter. The other end of capacitor Cf1 is connected to one end of inductor Lf1 and one end of transmission line TLf1. The other end of inductor Lf1... The transmission line TLf1 is connected to the grounding capacitor Cf5. ​​The other end of the transmission line TLf1 is connected to one end of the capacitor Cf2. The other end of the capacitor Cf2 is connected to one end of the transmission line TLf2. The other end of the transmission line TLf2 is connected to one end of the inductor Lf2 and one end of the transmission line TLf3. The other end of the inductor Lf2 is connected to the grounding capacitor Cf6. The other end of the transmission line TLf3 is connected to one end of the capacitor Cf3. The other end of the capacitor Cf3 is connected to one end of the transmission line TLf4. The other end of the transmission line TLf4 is connected to one end of the inductor Lf3 and one end of the transmission line TLf5. The other end of the inductor Lf3 is connected to the grounding capacitor Cf7. The other end of the transmission line TLf5 is connected to one end of the capacitor Cf4. The other end of the capacitor Cf4 is connected to the low-noise amplifier.

3. The multi-functional chip for coupling, filtering, amplification, and attenuation according to claim 2, characterized in that, The low-noise amplifier includes: Capacitors MC1, MC2, MC3, MC6, MC7, MC8, MC9, and MC10; transmission lines ML1, ML2, ML3, ML4, ML5, ML6, ML7, ML9, and ML10; resistor MR8; grounding resistor MR9, MR10, MR11, MR12, MR13; grounding resistor MR14, MR15, MR17, and MR18; amplifiers T1, T2, and T3; and a novel active bias network; among which, One end of capacitor MC1 is connected to the other end of capacitor Cf4. The other end of capacitor MC1 is connected to one end of transmission line ML1. The other end of transmission line ML1 is connected to the novel active bias network, the gate of amplifier T1, and one end of transmission line ML10. The source of amplifier T1 is grounded. The drain of amplifier T1 is connected to one end of transmission line ML2 and one end of transmission line ML4. The other end of transmission line ML10 is connected to one end of capacitor MC10. The other end of capacitor MC10 is connected to one end of resistor MR18. The other end of resistor MR18 is connected to one end of transmission line ML6, one end of transmission line ML9, and one end of transmission line ML7. The other end of transmission line ML2 is connected to one end of capacitor MC2. The other end of capacitor MC2 is connected to one end of transmission line ML3. The other end of transmission line ML3 is connected to one end of resistor MR8 and the gate of amplifier T2. The source of amplifier T2 is connected to the other end of transmission line ML4 and one end of resistor MR11. The other end of resistor MR11 is connected to ground capacitor MC6. The drain of amplifier T2 is connected to one end of transmission line ML5. The other end of transmission line ML5 is connected to the drain of amplifier T3. The source of amplifier T3 is connected to the other end of transmission line ML6. The gate of amplifier T3 is connected to one end of resistor MR12 and one end of resistor MR13. One end of the resistor is connected to the grounding capacitor MC7. The other end of the resistor MR8 is connected to one end of the grounding resistor MR9 and one end of the resistor MR10. The other end of the resistor MR13 is connected to one end of the grounding resistor MR14 and one end of the resistor MR15. The other ends of the resistors MR10, MR15, MR17, MC8, and ML9, as well as the new active bias network, are all connected to the input VDD. The other end of the resistor MR17 is connected to the grounding capacitor MC9. The other end of the transmission line ML7 is connected to one end of the capacitor MC3. The other end of the capacitor MC3 is connected to the digitally controlled attenuator.

4. The multi-functional chip for coupling, filtering, amplification, and attenuation according to claim 3, characterized in that, The novel active bias network includes: Transmission line ML8, grounding capacitor MC4, capacitor MC5, resistor MR1, grounding resistor MR2, resistor MR3, resistor MR4, resistor MR5, resistor MR6, grounding resistor MR7, amplifier T4, and amplifier T5; wherein, one end of transmission line ML8 is connected to the other end of transmission line ML1, the gate of amplifier T1, and one end of transmission line ML10; the other end of transmission line ML8 is connected to grounding capacitor MC4, one end of resistor MR1, and one end of resistor MR3; the other end of resistor MR3 is connected to one end of capacitor MC5 and the gate of amplifier T4; amplifier T4... The source is connected to the grounding resistor MR7. The drain of amplifier T4 is connected to one end of resistor MR4, one end of resistor MR6, and the gate of amplifier T5. The other end of resistor MR4 is connected to the other end of capacitor MC5. The other end of resistor MR1 is connected to the grounding resistor MR2 and the source of amplifier T5. The drain of amplifier T5 is connected to one end of resistor MR5. The other ends of resistor MR5 and resistor MR6 are connected to the other ends of resistor MR10, resistor MR15, resistor MR17, grounding capacitor MC8, transmission line ML9, and input terminal VDD.

5. The multi-functional chip for coupling, filtering, amplification, and attenuation according to claim 3, characterized in that, The numerically controlled attenuator includes: Grounding inductor La1, grounding inductor La2, resistors Ra1, Ra2, Ra3, Ra4, Ra5, Ra6, Ra7, Ra8, Ra9, Ra10, Ra11, Ra12, Ra13, Ra14, Ra15, Ra16, Ra17, Ra61, capacitors Ca1, Ca2, grounding capacitor Ca3, grounding capacitor Ca4, capacitor Ca5, transmission lines TLa1, TLa4, TLa5, TLa8, transistors Ts1, Ts2, Ts3, Ts4, Ts5, and Ts6;In this configuration, one end of resistor Ra1, one end of capacitor Ca1, and one end of resistor Ra3 are all connected to the other end of capacitor MC3. The other end of resistor Ra3 is connected to grounded inductor La2. The other end of resistor Ra1 is connected to one end of capacitor Ca2, the other end of capacitor Ca1, and one end of resistor Ra2. The other end of resistor Ra2 is connected to grounded inductor La1. The other end of capacitor Ca2 is connected to one end of transmission line TLa1. The other end of transmission line TLa1 is connected to one end of resistor Ra4, the drain of transistor Ts1, and the drain of transistor Ts3. The other end of resistor Ra4 is connected to one end of transmission line TLa4, the drain of transistor Ts1, and the drain of transistor Ts3. The source of transistor Ts1 is connected to the drain of transistor Ts2. The gate of transistor Ts2 is connected to one end of resistor Ra10. The source of transistor Ts2 is connected to one end of resistor Ra5. The gate of transistor Ts1 is connected to one end of resistor Ra6. The source of transistor Ts3 is connected to one end of resistor Ra7. The other end of resistor Ra5 is connected to the other end of resistor Ra7 and one end of resistor Ra9. The other end of resistor Ra9 is connected to ground capacitor Ca3. The gate of transistor Ts3 is connected to one end of resistor Ra8. The other ends of resistor Ra8 and resistor Ra10 are both connected to a positive voltage parallel drive network. Resistor R... The other end of a6 is connected to the positive voltage parallel drive network. The other end of transmission line TLa4 is connected to one end of resistor Ra61 and one end of transmission line TLa5. The other end of resistor Ra61 is connected to the input terminal VDD. The other end of transmission line TLa5 is connected to one end of resistor Ra17, the drain of transistor Ts4, and the drain of transistor Ts6. The other end of resistor Ra17 is connected to one end of transmission line TLa8, the drain of transistor Ts5, and the source of transistor Ts4. The other end of transmission line TLa8 is connected to one end of capacitor Ca5. The other end of capacitor Ca5 is connected to the output terminal OUT. Transistor Ts5... The source of transistor Ts6 is connected to one end of resistor Ra14. The source of transistor Ts6 is connected to one end of resistor Ra15. The other end of resistor Ra14 is connected to the other end of resistor Ra15 and one end of resistor Ra16. The other end of resistor Ra16 is connected to ground capacitor Ca4. The gate of transistor Ts5 is connected to one end of resistor Ra11. The gate of transistor Ts6 is connected to one end of resistor Ra12. The other ends of resistors Ra11 and Ra12 are both connected to a positive voltage parallel drive network. The gate of transistor Ts4 is connected to one end of resistor Ra13. The other end of resistor Ra13 is connected to a positive voltage parallel drive network.

6. The multi-functional chip for coupling, filtering, amplification, and attenuation according to claim 5, characterized in that, The positive pressure parallel drive network includes: Resistors Ra17, Ra19, Ra20, Ra22, Ra23, Ra24, Ra26, grounding resistance Ra27, Ra28, Ra29, Ra30, Ra31, Ra32, grounding resistance Ra33, Ra34, Ra35, Ra36, Ra37, Ra38, Ra39, Ra40, Ra42, Ra43, Ra45, Ra46, Ra48, Ra49, Ra50, Ra51, Ra52, Ra53, Ra54, Ra55, grounding resistance Ra 56. Grounding resistance Ra57, Grounding resistance Ra58, Grounding resistance Ra59, Resistance Ra60, Resistance Rs19, Resistance Rs20, Resistance Rs22, Resistance Rs23, Resistance Rs24, Resistance Rs26, Resistance Rs27, Resistance Rs28, Resistance Rs29, Resistance Rs30, Resistance Rs31, Resistance Rs32, Resistance Rs33, Resistance Rs34, Resistance Rs35, Resistance Rs37, Resistance Rs38, Transistor Tss1, Transistor Tss2, Transistor Tss3, Transistor Tss4, Transistor Tss5, Transistor Tss6, Transistor Ts7, Transistor Ts11, Transistor Ts12, Transistor Ts13, Transistor Ts14, Transistor T S15, Transistor Ts16, Transistor Tb1, Transistor Tb2, Transistor Tb3, Transistor Tb4, Transistor Tb5, Transistor Tb6, Transistor Tb7, Transistor Tb11, Transistor Tb12, Transistor Tb13, Transistor Tb14, Transistor Tb15, Transistor Tb16, Transistor Tb17, Transistor Tb18, Transistor Tb19, Transistor Tb20, Transistor Tb21, Transistor Tb22, Transistor Tb23, Transistor Tb27, Transistor Tb28, Transistor Tb29, Transistor Tb30, Transistor Tb31, Transistor Tb32, Diode D3, Diode D2, Diode D1, Diode D6, Diode D5, Diode D 4. Diodes D9, D8, and D7; wherein, one end of resistor Ra55, the drain of transistor Tb29, one end of resistor Ra51, one end of resistor Ra50, the drain of transistor Tb22, one end of resistor Ra39, the drain of transistor Tb17, one end of resistor Ra34, the drain of transistor Tb16, one end of resistor Ra29, one end of resistor Ra28, the drain of transistor Tb7, one end of resistor Ra17, the drain of transistor Tb2, one end of resistor Rs34, the drain of transistor Ts16, one end of resistor Rs29, one end of resistor Rs28, the drain of transistor Ts7, one end of resistor Rs17, and the drain of transistor Ts2 are all connected to the input terminal VDD.The other end of resistor Ra55 is connected to the source of transistor Tb30. The drain of transistor Tb30 is connected to the drain of transistor Tb31. The gate of transistor Tb30 is connected to one end of resistor Ra53. The gate of transistor Tb31 is connected to one end of grounding resistor Ra59 and resistor Ra60 respectively. The other end of resistor Ra60 is connected to the control terminal Vctrl1. The source of transistor Tb31 is connected to the drain of transistor Tb32 and the source of transistor Tb28 respectively. The gate of transistor Tb32 is connected to grounding resistor Ra58. The source of transistor Tb32 is connected to grounding resistor Ra57. The source of transistor Tb29 is connected to one end of resistor Ra54. The gate of transistor Tb29 is connected to resistor Ra54. One end of resistor Ra52 is connected to the ground resistor Ra54, and the other end of resistor Ra54 is connected to the drain of transistor Tb28. The gate of transistor Tb28 is connected to the other end of resistor Ra51 and ground resistor Ra56. The other end of resistor Ra52 is connected to the other end of resistor Ra53 and the gate of transistor Tb27. The drain of transistor Tb27 is connected to the other end of resistor Ra50. The source of transistor Tb27 is connected to the input of diode D7. The output of diode D7 is connected to the input of diode D8. The output of diode D8 is connected to the input of diode D9. The output of diode D9 is connected to the ground resistor Ra49 and one end of resistor Ra48. The source of transistor Tb22 is connected to resistor Ra49. One end of resistor 6 is connected; the other end of resistor Ra46, the gate of transistor Tb22, and the drain of transistor Tb23 are all connected to the other ends of resistors Ra11 and Ra12. The source of transistor Tb23 is grounded. The other end of resistor Ra39 is connected to the drain of transistor Tb21. The source of transistor Tb21 is connected to one end of resistor Ra45. The other end of resistor Ra45 is connected to the gate of transistor Tb21, one end of resistor Ra43, and one end of resistor Ra42, respectively. The source of transistor Tb17 is connected to one end of resistor Ra40. The other end of resistor Ra40 is connected to the other end of resistor Ra13, the gate of transistor Tb17, and the drain of transistor Tb18, respectively. Transistor Tb18... The source of transistor Tb18 is grounded. The gate of transistor Tb18 is connected to the other end of resistor Ra42 and the drain of transistor Tb19. The source of transistor Tb19 is grounded. The gate of transistor Tb19 is connected to the other end of resistor Ra43, the gate of transistor Tb23, and the drain of transistor Tb20. The source of transistor Tb20 is grounded. The gate of transistor Tb20 is connected to the other end of resistor Ra48. The other end of resistor Ra34 is connected to the source of transistor Tb15. The drain of transistor Tb15 is connected to the drain of transistor Tb13. The gate of transistor Tb15 is connected to one end of resistor Ra31. The gate of transistor Tb13 is connected to one end of grounding resistor Ra37 and resistor Ra38.The other end of resistor Ra38 is connected to the control terminal Vctrl2. The source of transistor Tb13 is connected to the drain of transistor Tb14 and the source of transistor Tb12, respectively. The gate of transistor Tb14 is connected to ground resistor Ra35. The source of transistor Tb14 is connected to ground resistor Ra36. The source of transistor Tb16 is connected to one end of resistor Ra32. The gate of transistor Tb16 is connected to one end of resistor Ra30. The other end of resistor Ra32 is connected to the drain of transistor Tb12. The gate of transistor Tb12 is connected to the other end of resistor Ra29 and ground resistor Ra33, respectively. The other end of resistor Ra30 is connected to the other end of resistor Ra31 and the gate of transistor Tb11, respectively. The drain of transistor Tb11 is connected to the other end of resistor Ra28. The source of transistor Tb11 is connected to the input of diode D4. The output of diode D4 is connected to the input of diode D5. The output of diode D5 is connected to the input of diode D6. The output of diode D6 is connected to one end of ground resistor Ra27 and resistor Ra26 respectively. The source of transistor Tb7 is connected to one end of resistor Ra24. The other end of resistor Ra24, the gate of transistor Tb7, and the drain of transistor Tb6 are all connected to the other ends of resistors Ra10 and Ra8. The source of transistor Tb6 is grounded. The other end of resistor Ra17 is connected to the drain of transistor Tb1. The source of transistor Tb1 is connected to resistor R... One end of resistor Ra19 is connected to the gate of transistor Tb1, one end of resistor Ra22, and one end of resistor Ra23. The source of transistor Tb2 is connected to one end of resistor Ra20. The other end of resistor Ra20 is connected to the other end of resistor Ra6, the gate of transistor Tb2, and the drain of transistor Tb3. The source of transistor Tb3 is grounded. The gate of transistor Tb3 is connected to the other end of resistor Ra22 and the drain of transistor Tb4. The source of transistor Tb4 is grounded. The gate of transistor Tb4 is connected to the other end of resistor Ra23, the gate of transistor Tb6, and the drain of transistor Tb5. The source of transistor Tb5 is grounded. The gate of transistor Tb5... The other end of resistor Ra26 is connected to the source of transistor Ts15. The drain of transistor Ts15 is connected to the drain of transistor Ts13. The gate of transistor Ts15 is connected to one end of resistor Rs31. The gate of transistor Ts13 is connected to one end of ground resistor Rs37 and resistor Rs38 respectively. The other end of resistor Rs38 is connected to the control terminal Vctrl3. The source of transistor Ts13 is connected to the drain of transistor Ts14 and the source of transistor Ts12 respectively. The gate of transistor Ts14 is connected to ground resistor Rs35. The source of transistor Ts14 is connected to ground resistor Rs36. The source of transistor Ts16 is connected to one end of resistor Rs32.The gate of transistor Ts16 is connected to one end of resistor Rs30, the other end of resistor Rs32 is connected to the drain of transistor Ts12, the gate of transistor Ts12 is connected to the other end of resistor Rs29 and ground resistor Rs33, the other end of resistor Rs30 is connected to the other end of resistor Rs31 and the gate of transistor Ts11, the drain of transistor Ts11 is connected to the other end of resistor Rs28, the source of transistor Ts11 is connected to the input of diode D1, and the output of diode D1... The input terminal of diode D2 is connected to the input terminal of diode D3. The output terminal of diode D3 is connected to one end of grounding resistor Rs27 and resistor Rs26 respectively. The source of transistor Ts7 is connected to one end of resistor Rs24. The other end of resistor Rs24, the gate of transistor Ts7, and the drain of transistor Ts6 are all connected to the other end of resistor Rp13, one end of resistor Rp1, and one end of resistor Rp7 respectively. The source of transistor Ts6 is grounded. The other end of resistor Rs17... One end of the resistor is connected to the drain of transistor Tss1. The source of transistor Tss1 is connected to one end of resistor Rs19. The other end of resistor Rs19 is connected to the gate of transistor Tss1, one end of resistor Rs22, and one end of resistor Rs23. The source of transistor Tss2 is connected to one end of resistor Rs20. The other end of resistor Rs20 is connected to the other end of resistor Rp10, one end of resistor Rp9, one end of capacitor Cp5, one end of capacitor Cp4, one end of resistor Rp5, and one end of resistor Rp4. One end of the resistor is connected to the gate of transistor Tss2 and the drain of transistor Tss3. The source of transistor Tss3 is grounded. The gate of transistor Tss3 is connected to the other end of resistor Rs22 and the drain of transistor Tss4. The source of transistor Tss4 is grounded. The gate of transistor Tss4 is connected to the other end of resistor Rs23, the gate of transistor Tss6, and the drain of transistor Tss5. The source of transistor Tss5 is grounded. The gate of transistor Tss5 is connected to the other end of resistor Rs26.

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