Parallel computing method and system for anticipated fault analysis graph of power system

By establishing a power system topology diagram and power flow model, converting it into a matrix form equation system, and using Gaussian elimination and GPU parallel computing, the problem of low computational efficiency in power system anticipated fault analysis is solved, and fast and effective fault analysis is achieved.

CN120653880APending Publication Date: 2025-09-16GUANGXI POWER GRID CORP
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
CN202510571060.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-06
Publication Date
2025-09-16

AI Technical Summary

Technical Problem

The existing parallel calculation and analysis method for anticipated faults in power systems has the problem of low computational efficiency.

Method used

Establish a power system topology diagram, construct a power flow model under anticipated faults, convert it into a matrix equation system, use the direct method of Gaussian elimination for parallel computing, and use the GPU to solve the power flow using the Newton-Raphson method.

Benefits of technology

The calculation speed and efficiency of power system anticipated fault analysis are improved, and the practicality of power grid static analysis is enhanced.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120653880A_ABST
    Figure CN120653880A_ABST
Patent Text Reader

Abstract

The invention belongs to the technical field of power system fault prediction, and particularly relates to an anticipated fault analysis chart parallel computing method and system.The method includes the steps that when parallel computing is conducted on a power system anticipated fault analysis chart, a power system topological structure chart is established firstly; establishing a power flow model of the power system under the expected fault according to the power topological graph; converting the power flow model into a matrix form to form a matrix form equation set; and finally, carrying out parallel calculation on the matrix form equation set. According to the scheme, rapid analysis under the anticipated fault of the power system can be realized, and the practicability of static analysis of the power grid is improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the technical field of power system fault prediction, and in particular to a method and system for parallel calculation of a power system anticipated fault analysis diagram. Background Art

[0002] The construction of a modern energy system is centered around electricity, the most convenient and important secondary energy source in the world today. As a unified entity for the production, transmission, distribution, and consumption of electricity, the power system is of strategic significance to economic and social development and the people's production and life. In recent years, the scale of renewable energy grid connection has gradually increased, and social electricity demand has grown rapidly. The power system must maintain a balance between energy supply and demand between continuously fluctuating sources and loads. Its stability characteristics and control mechanisms are becoming increasingly complex, and the safe and stable operation of large power systems faces severe challenges. Transient stability issues are one of the common causes of safety accidents in large power systems. Rapid and effective transient stability assessments are of great significance to ensuring the safe and stable operation of power systems. TSA focuses on whether the various generators in the power system can maintain synchronous operation after a major disturbance. Predicted power system faults refer to possible fault conditions that are analyzed and calculated during power system operation. Analyzing predicted faults can improve the static safety of the power system.

[0003] There are parallel calculation and analysis methods for anticipated faults in the prior art. For example, Chinese invention patent (CN109167354A) discloses a parallel analysis and calculation method for anticipated faults in a power system based on file exchange, which includes the following steps: Step 1, establish a task table, a computing resource table, and establish a system fault set; establish computing resource information and computing task information based on participating computing resource servers; Step 2, run the overall task scheduling process on the task scheduling server, and when each round of static safety analysis function operation cycle arrives, add a new power system static safety analysis calculation total task to the task table, and decompose the total task of the anticipated fault calculation of the static safety analysis into specific parallel computing tasks for each computing resource, and write them into the computing resource table; Step 3, on the computing resource server, calculate the resource daemon process; Step 4, on the task scheduling server, wait for the next static safety analysis calculation cycle to arrive; However, the above scheme has the problem of low computing efficiency when performing parallel computing. Summary of the Invention

[0004] In view of the above existing problems, the present invention is proposed.

[0005] Therefore, the present invention provides a method and system for parallel computing of a power system anticipated fault analysis diagram, which are used to improve the speed and efficiency of parallel computing.

[0006] To solve the above technical problems, the present invention provides the following technical solution: a parallel calculation method for a power system anticipated fault analysis diagram, comprising:

[0007] Establish a power system topology diagram;

[0008] establishing a power flow model of the power system under a predicted fault condition according to the power system topology diagram;

[0009] Converting the power flow model into a matrix form to form a matrix equation system;

[0010] The matrix form equations are calculated in parallel.

[0011] As a preferred solution of the parallel calculation method of the power system anticipated fault analysis diagram described in the present invention, the establishment of the power system topology diagram includes the loads, generators and buses in the power system as nodes in the topology diagram, and the transformers and transmission lines in the power system as edges in the topology diagram, and then inputting the nodes and edges into the graph database to construct a power system graph model to form the power system topology diagram.

[0012] As a preferred solution of the parallel calculation method of the power system anticipated fault analysis diagram of the present invention, wherein: the power flow model of the power system includes, the specific formula of the established power flow model is:

[0013]

[0014] Where V i is the voltage at power system node i, V j is the voltage at power system node j, G ij is the real part of the admittance matrix between power system nodes i and j, B ij is the imaginary part of the admittance matrix between power system nodes i and j, θ ij is the voltage phase angle difference between power system nodes i and j, P G,i is the adjustable active power at power system node i, P D,i is the active load at power system node i, ΔP i is the active power correction at power system node i, Q G,i is the reactive power at power system node i, Q D,i is the reactive load at power system node i, ΔQ i is the reactive power correction at power system node i.

[0015] As a preferred solution of the parallel calculation method of the power system anticipated fault analysis diagram of the present invention, wherein: the matrix form equation group includes performing Taylor expansion on the power flow model and extracting low-order terms of the expansion to form a matrix form equation group;

[0016] The matrix form equation system is:

[0017]

[0018] As a preferred solution of the method for parallel calculation of the power system anticipated fault analysis diagram of the present invention, wherein: the parallel calculation of the matrix form equation group includes parallel calculation of the matrix form equation group using a direct method of Gaussian elimination;

[0019] The direct method of Gaussian elimination is used to perform parallel calculations on the matrix equations as follows:

[0020] Solving the power flow of each transmission line in the matrix equation group under the condition of a k-node disconnection anticipated fault by Newton-Raphson method;

[0021] The Newton-Raphson method power flow solution process for each node under the expected fault condition is placed in the GPU for solution.

[0022] As a preferred solution of the parallel calculation method of the power system anticipated fault analysis diagram of the present invention, wherein: the Newton-Raphson method power flow solution includes, assuming a k-branch disconnected anticipated fault condition, converting the matrix form equation group into a k-node Newton-Raphson power flow equation;

[0023] The k-node Newton-Raphson power flow equation is specifically:

[0024]

[0025] Where ΔP ki is the active power correction value of the i-th iteration of the node k disconnection, ΔQ ki is the reactive power correction value of the i-th iteration when node k is disconnected; J ki is the Jacobian matrix of the i-th iteration of node k, X ki is the solution of the k-node Newton-Raphson power flow equation.

[0026] As a preferred solution of the parallel calculation method of the power system anticipated fault analysis diagram described in the present invention, the solution process is placed in the GPU, including inputting the calculation accuracy and maximum number of iterations of the Newton-Raphson method in the host computer system; then, under the control of the system, the Newton-Raphson power flow equations of different nodes are placed in the GPU respectively, and iteratively solved, and the solution results are input into the host computer system. The host computer system judges the accuracy based on the solution results. If the accuracy requirements are met, the solution result is output; otherwise, the corresponding GPU is instructed to continue iterative solution.

[0027] As a preferred solution of the parallel computing system of the power system anticipated fault analysis diagram described in the present invention, the system includes: a topology diagram establishment module, which is used to establish the power system topology diagram; a flow model diagram establishment module, which is used to establish the flow model of the power system under anticipated faults based on the power system topology diagram; a matrix form equation group determination module, which is used to convert the flow model into a matrix form to form a matrix form equation group; and a parallel computing module, which is used to perform parallel computing on the matrix form equation group.

[0028] A computer device includes a memory and a processor, wherein the memory stores a computer program, and is characterized in that when the processor executes the computer program, it implements the steps of a parallel calculation method for a power system anticipated fault analysis diagram.

[0029] A computer-readable storage medium stores a computer program thereon, wherein the computer program, when executed by a processor, implements the steps of a parallel calculation method for a power system anticipated fault analysis diagram.

[0030] The beneficial effects of the present invention are as follows: when performing parallel calculations on a power system anticipated fault analysis diagram, the present invention first establishes a power system topology diagram; then establishes a power flow model of the power system under anticipated faults based on the power topology diagram; then converts the power flow model into a matrix form to form a matrix form equation group; finally, parallel calculations are performed on the matrix form equation group; the above scheme can realize rapid analysis of the power system under anticipated faults and improve the practicality of static analysis of the power grid. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0032] Figure 1 A schematic flow chart of a parallel calculation method for a power system anticipated fault analysis diagram is provided in accordance with an embodiment of the present invention.

[0033] Figure 2 A flowchart of a parallel calculation method for a power system anticipated fault analysis diagram according to an embodiment of the present invention for performing parallel calculation on a matrix equation group. DETAILED DESCRIPTION

[0034] To make the above-mentioned objects, features, and advantages of the present invention more clearly understood, the following detailed description of the specific embodiments of the present invention is given in conjunction with the accompanying drawings. It is obvious that the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary persons in this field without creative work should fall within the scope of protection of the present invention.

[0035] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0036] Secondly, the term "one embodiment" or "embodiment" herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in various places throughout this specification does not necessarily refer to the same embodiment, nor does it refer to a separate or selective embodiment that is mutually exclusive of other embodiments.

[0037] The present invention is described in detail with reference to schematic diagrams. For ease of illustration, cross-sectional views of device structures may be partially enlarged and not to scale when describing embodiments of the present invention. Furthermore, the schematic diagrams are merely illustrative and should not limit the scope of the present invention. Furthermore, in actual production, the three-dimensional dimensions of length, width, and depth should be included.

[0038] In the description of the present invention, it should be noted that the terms "upper, lower, inner, and outer" and other references to orientations or positional relationships are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate and simplify the description of the present invention. They are not intended to indicate or imply that the devices or components referred to must have, be constructed, or operate in a specific orientation, and therefore should not be construed as limitations on the present invention. Furthermore, the terms "first, second, or third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0039] In this disclosure, unless otherwise specified or limited, the terms "mounted," "connected," and "connected" should be interpreted broadly. For example, they may refer to fixed, removable, or integral connections. They may also refer to mechanical, electrical, or direct connections, indirect connections through an intermediary, or internal communication between two components. Those skilled in the art will understand the specific meanings of these terms in this disclosure.

[0040] Example 1, with reference to Figure 1-Figure 2 , which is the first embodiment of the present invention, provides a parallel calculation method for a power system anticipated fault analysis diagram, comprising:

[0041] S1: Establish a power system topology diagram.

[0042] The establishment of the power system topology diagram includes: the loads, generators and buses in the power system are nodes in the topology diagram, the transformers and transmission lines in the power system are edges in the topology diagram, and then the nodes and edges are input into a graph database to construct a power system graph model to form a power system topology diagram.

[0043] S2: Establishing a power flow model of the power system under a predicted fault condition according to the power system topology diagram.

[0044] The power flow model of the power system includes the following specific formula:

[0045]

[0046] Where V i is the voltage at power system node i, V j is the voltage at power system node j, G ij is the real part of the admittance matrix between power system nodes i and j, B ij is the imaginary part of the admittance matrix between power system nodes i and j, θ ij is the voltage phase angle difference between power system nodes i and j, P G,i is the adjustable active power at power system node i, P D,i is the active load at power system node i, ΔP i is the active power correction at power system node i, Q G,i is the reactive power at power system node i, Q D,i is the reactive load at power system node i, ΔQ i is the reactive power correction at power system node i.

[0047] S3: Convert the power flow model into a matrix form to form a matrix equation group.

[0048] The matrix form equation group includes performing Taylor expansion on the power flow model and extracting low-order terms of the expansion to form a matrix form equation group;

[0049] The matrix form equation system is:

[0050]

[0051] The performing parallel calculation on the matrix form equation group includes performing parallel calculation on the matrix form equation group using a direct method of Gaussian elimination;

[0052] The direct method of Gaussian elimination is used to perform parallel calculations on the matrix equations as follows:

[0053] Solving the power flow of each transmission line in the matrix equation group under the condition of a k-node disconnection anticipated fault by Newton-Raphson method;

[0054] The Newton-Raphson method power flow solution process for each node under the expected fault condition is placed in the GPU for solution.

[0055] The Newton-Raphson method power flow solution includes converting the matrix equation group into a k-node Newton-Raphson power flow equation assuming a k-branch disconnected anticipated fault condition;

[0056] The k-node Newton-Raphson power flow equation is specifically:

[0057]

[0058] Where ΔP ki is the active power correction value of the i-th iteration of the node k disconnection, ΔQ ki is the reactive power correction value of the i-th iteration when node k is disconnected; J ki is the Jacobian matrix of the i-th iteration of node k, X ki is the solution of the k-node Newton-Raphson power flow equation.

[0059] The solution process is placed in the GPU, including inputting the calculation accuracy and maximum number of iterations of the Newton-Raphson method into the host computer system; then, under the control of the system, the Newton-Raphson power flow equations of different nodes are placed in the GPU respectively, and iteratively solved, and the solution results are input into the host computer system. The host computer system judges the accuracy based on the solution results. If the accuracy requirements are met, the solution result is output; otherwise, the corresponding GPU is instructed to continue iterative solution.

[0060] S4: performing parallel calculation on the matrix form equation group.

[0061] Embodiment 2 is the second embodiment of the present invention, which provides a parallel computing system for power system anticipated fault analysis diagrams, as follows.

[0062] The system includes a topology diagram establishment module for establishing a power system topology diagram; a flow model diagram establishment module for establishing a flow model of the power system under expected faults based on the power system topology diagram; a matrix form equation group determination module for converting the flow model into a matrix form to form a matrix form equation group; and a parallel calculation module for performing parallel calculations on the matrix form equation group.

[0063] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.

[0064] Example 3

[0065] The third embodiment of the present invention is different from the first two embodiments in that:

[0066] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0067] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the steps in the process. Figure 1a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0068] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0069] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0070] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present application.

[0071] Obviously, those skilled in the art may make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalents, this application is intended to include these modifications and variations.

Claims

1. A parallel calculation method for a power system anticipated fault analysis diagram, characterized by: include, Establish a power system topology diagram; establishing a power flow model of the power system under a predicted fault condition according to the power system topology diagram; Converting the power flow model into a matrix form to form a matrix equation system; The matrix form equations are calculated in parallel.

2. The method for parallel calculation of a power system predicted fault analysis diagram according to claim 1, characterized in that: The establishment of the power system topology diagram includes: the loads, generators and buses in the power system are nodes in the topology diagram, the transformers and transmission lines in the power system are edges in the topology diagram, and then the nodes and edges are input into a graph database to construct a power system graph model to form a power system topology diagram.

3. The method for parallel calculation of power system predicted fault analysis diagrams according to claim 2, characterized in that: The power flow model of the power system includes the following specific formula: Where V i is the voltage at power system node i, V j is the voltage at power system node j, G ij is the real part of the admittance matrix between power system nodes i and j, B ij is the imaginary part of the admittance matrix between power system nodes i and j, θ ij is the voltage phase angle difference between power system nodes i and j, P G,i is the adjustable active power at power system node i, P D,i is the active load at power system node i, ΔP i is the active power correction at power system node i, Q G,i is the reactive power at power system node i, Q D,i is the reactive load at power system node i, ΔQ i is the reactive power correction at power system node i.

4. The method for parallel calculation of power system predicted fault analysis diagrams according to claim 3, characterized in that: The matrix form equation group includes performing Taylor expansion on the power flow model and extracting low-order terms of the expansion to form a matrix form equation group; The matrix form equation system is:

5. The method for parallel calculation of power system predicted fault analysis diagrams according to claim 4, characterized in that: The performing parallel calculation on the matrix form equation group includes performing parallel calculation on the matrix form equation group using a direct method of Gaussian elimination; The direct method of Gaussian elimination is used to perform parallel calculations on the matrix equations as follows: Solving the power flow of each transmission line in the matrix equation group under the condition of a k-node disconnection anticipated fault by Newton-Raphson method; The Newton-Raphson method power flow solution process for each node under the expected fault condition is placed in the GPU for solution.

6. The method for parallel calculation of power system predicted fault analysis diagrams according to claim 5, characterized in that: The Newton-Raphson method power flow solution includes converting the matrix equation group into a k-node Newton-Raphson power flow equation assuming a k-branch disconnected anticipated fault condition; The k-node Newton-Raphson power flow equation is specifically: Where, ΔP ki is the active power correction value of the i-th iteration of the node k disconnection, ΔQ ki is the reactive power correction value of the i-th iteration when node k is disconnected; J ki is the Jacobian matrix of the i-th iteration of node k, X ki is the solution of the k-node Newton-Raphson power flow equation.

7. The method for parallel calculation of power system predicted fault analysis diagrams according to claim 6, characterized in that: The solution process is placed in the GPU, including inputting the calculation accuracy and maximum number of iterations of the Newton-Raphson method into the host computer system; then, under the control of the system, the Newton-Raphson power flow equations of different nodes are placed in the GPU respectively, and iteratively solved, and the solution results are input into the host computer system. The host computer system judges the accuracy based on the solution results. If the accuracy requirements are met, the solution result is output; otherwise, the corresponding GPU is instructed to continue iterative solution.

8. A system using the parallel calculation method for a power system predicted fault analysis diagram according to any one of claims 1 to 7, characterized in that: The system includes, A topology diagram building module is used to build a power system topology diagram; A power flow model diagram establishing module, configured to establish a power flow model of the power system under a predicted fault condition according to the power system topology diagram; A matrix form equation group determination module is used to convert the power flow model into a matrix form to form a matrix form equation group; The parallel computing module is used to perform parallel computing on the matrix equation group.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

Citation Information

Patent Citations

  • A parallel analysis and calculation method based on file exchange for predicted faults in power system

    CN109167354A