Boron doping method, boron doping structure and back contact battery

A uniform boron-doped structure is formed on the silicon wafer substrate by using gradient voltage change and gradient temperature increase methods, which solves the problem of uneven distribution of the boron-doped amorphous silicon layer and improves the photoelectric conversion efficiency of the back-contact battery.

CN120690681AActive Publication Date: 2025-09-23PINGMEI LONGI NEW ENERGY TECH CO LTD

Patent Information

Application Number
CN202510844005.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-23
Publication Date
2025-09-23
Estimated Expiration
2045-06-23

AI Technical Summary

Technical Problem

In the prior art, during the diffusion process of the boron-doped amorphous silicon layer, the boron element is unevenly distributed, resulting in low efficiency of the back contact cell and difficulty in achieving uniform boron element penetration on large-area silicon wafers.

Method used

The amorphous silicon layer in the silicon wafer substrate is pre-crystallized in an inert gas atmosphere by using a gradient voltage change method and converted into microcrystalline silicon. Boron diffusion is carried out by gradient temperature increase, combined with a push-through treatment, to form an ordered boron-doped structure.

Benefits of technology

The uniformity of boron doping and battery efficiency are improved, the probability of carrier recombination is reduced, the open circuit voltage and short circuit current are increased, and the photoelectric conversion efficiency is enhanced.

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Abstract

The invention discloses a boron doping method, a boron doping structure and a back contact battery. The method comprises the following steps: step 1) pre-crystallization treatment; step 2) pre-oxidation; (3) boron diffusion; wherein the pre-crystallization treatment is to treat the amorphous silicon layer in the silicon wafer base material in a gradient variable pressure mode in an inert gas atmosphere. According to the method, before pre-oxidation and boron diffusion, amorphous silicon is converted into microcrystalline silicon in a gradient transformation manner, and gradual crystallization is realized, so that lattice stress is reduced, gradient distribution of grain sizes can be realized, the problem of uneven grain sizes caused by a single crystallization condition and the problem of doping concentration fluctuation caused by an unordered structure of the amorphous silicon are avoided, and the yield of the amorphous silicon is improved. According to the method, the boron atoms can be transferred to a balance position more easily, an ordered structure is formed, the distribution is more uniform, the boron-doped structure with better sheet resistance uniformity is obtained, and the photoelectric conversion efficiency of the back contact battery based on the boron-doped structure is further improved.
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Description

Technical Field

[0001] The present invention relates to the field of solar cells, and in particular to a boron doping method, a boron doping structure and a back contact cell. Background Art

[0002] With the continuous development of photovoltaic technology, the pursuit of high-efficiency solar cells is becoming increasingly urgent. Traditional solar cell structures are gradually facing bottlenecks in improving conversion efficiency. Back-contact (BC) cells, as a new generation of high-efficiency crystalline silicon solar cell technology, completely eliminate the shading loss of traditional cell front grid lines by integrating all positive and negative electrodes on the back of the cell, thereby maximizing the utilization of incident photons and significantly improving cell efficiency.

[0003] In the back-contact positive electrode structure of a battery, a tunneling oxide layer is first grown on the back of the silicon wafer, followed by the deposition of an amorphous silicon layer to form a selective carrier transport channel. At this point, boron diffusion diffuses the boron element into the amorphous silicon layer of the silicon wafer, regulating the local electrical properties. This can not only optimize hole transport, but also improve the back surface field, reduce the probability of minority carrier recombination, increase the open circuit voltage, and ultimately significantly improve the battery conversion efficiency. Therefore, the boron diffusion process is a key step in forming the P-type emitter region (positive electrode), and its quality directly affects the battery's passivation effect and carrier transport efficiency.

[0004] However, the current preparation of boron-doped amorphous silicon layers still has many shortcomings. Due to the significant differences in the diffusion dynamics between boron atoms and the silicon substrate, concentration gradients are easily lost during high-temperature diffusion, resulting in uneven boron doping concentrations in different areas of the silicon wafer surface. Even using traditional liquid or solid source diffusion processes, it is difficult to achieve uniform boron penetration across large silicon wafers. Local high / low concentration areas often form due to differences in diffusion rates, causing the square resistance value to fluctuate far beyond the process requirements, thereby resulting in low efficiency of back-contact cells.

[0005] Therefore, how to solve the problem of uneven distribution of boron content in the P-type emitter region in the prior art has become an important technical problem to be solved by those skilled in the art. Summary of the Invention

[0006] In view of the above problems, the present invention aims to provide a boron doping method, a boron doping structure and a back contact cell that can improve the uniformity of boron content distribution. The technical solutions are as follows:

[0007] In one aspect, a boron doping method is provided, the method comprising:

[0008] Step 1) pre-crystallization treatment;

[0009] Step 2) pre-oxidation;

[0010] Step 3) Boron diffusion;

[0011] Wherein, in step 1), the pre-crystallization treatment is performed on the amorphous silicon layer in the silicon wafer substrate in an inert gas atmosphere by using a gradient voltage variation method.

[0012] Before pre-oxidation in step 2), amorphous silicon is converted into microcrystalline silicon by gradient voltage transformation, thereby reducing lattice stress and achieving a gradient distribution of grain size. This avoids the problem of uneven grain size caused by single crystallization conditions and the fluctuation of doping concentration caused by the disordered structure of amorphous silicon, so that subsequent boron atoms can more easily migrate to the equilibrium position, forming an ordered structure with a more uniform distribution.

[0013] In an exemplary embodiment, the gradient pressure range is 70-100 mBar.

[0014] Considering that under normal pressure, the silicon surface easily reacts with residual oxygen during high-temperature processing to form a silicon oxide layer (SiO2), a low-pressure environment reduces the demand for this side reaction by reducing the oxygen content, significantly lowering the oxygen partial pressure within the reaction chamber, thereby reducing the probability of amorphous silicon coming into contact with oxygen and directly suppressing the occurrence of oxidation reactions. Therefore, it is preferred to use low-pressure conditions to reduce oxygen demand and form a highly uniform doped shallow junction on the silicon base layer (amorphous / polycrystalline silicon), thereby reducing BO (boron-oxygen) recombination and improving light absorption efficiency.

[0015] In an exemplary embodiment, the inert gas atmosphere comprises:

[0016] The inert gas flow rate is 1500-2000 sccm.

[0017] In an exemplary embodiment, the pre-oxidation conditions include: a pre-oxidation pressure of 90-100 mBar; an oxygen gas flow rate of 500-700 sccm; an inert gas flow rate of 2600-2800 sccm; and a pre-oxidation time of 200-300 s.

[0018] In an exemplary embodiment, in step 3), boron diffusion is performed by a gradient temperature increase; the gradient temperature increase range is 800-1000°C.

[0019] In an exemplary embodiment, the method further includes a push-bonding process, wherein the push-bonding process conditions include: a push-bonding pressure of 90-100 mBar; a push-bonding temperature of 900-1000° C.; an inert gas flow rate of 1500-2500 sccm; and a push-bonding time of 180-360 s.

[0020] On the other hand, the present invention further provides a boron-doped structure, including a boron-doped structure prepared by any of the above methods.

[0021] On the other hand, the present invention also provides a back contact battery comprising the above-mentioned boron-doped structure.

[0022] The present invention discloses a boron doping method, comprising: step 1) pre-crystallization; step 2) pre-oxidation; and step 3) boron diffusion. The pre-crystallization treatment is performed on an amorphous silicon layer in a silicon wafer substrate using a gradient voltage change in an inert gas atmosphere. Prior to pre-oxidation and boron diffusion, the present invention converts amorphous silicon into microcrystalline silicon using a gradient voltage change, achieving gradual crystallization. This reduces lattice stress and achieves a gradient distribution of grain size. This avoids the uneven grain size caused by single crystallization conditions and the doping concentration fluctuations caused by the disordered structure of amorphous silicon. This allows subsequent boron atoms to more easily migrate to equilibrium positions, forming an ordered structure with a more uniform distribution. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] To more clearly illustrate the technical solution of the present invention, the following briefly introduces the drawings required for use in the embodiments or descriptions of the prior art. Obviously, the drawings described below are only some embodiments of the present invention, and those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0024] Figure 1 This is a flow chart of a boron doping method provided by an embodiment of the present invention;

[0025] Figure 2 It is a schematic structural diagram of a back-contact battery provided by an embodiment of the present invention.

[0026] The following is a supplementary description of the accompanying drawings:

[0027] 1-N-type silicon wafer; 2-P-region tunneling oxide layer; 3-P-poly layer; 4-N-region tunneling oxide layer; 5-N-poly layer; 6-aluminum oxide layer; 7-silicon nitride layer; 8-electrode. DETAILED DESCRIPTION

[0028] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0029] This application embodiment provides a boron doping method. For specific steps, please refer to Figure 1 , Figure 1 The flowchart of a boron doping method is shown below, wherein the method comprises the following steps:

[0030] Step 1) Pre-crystallization treatment

[0031] Step 2) pre-oxidation;

[0032] Step 3) Boron diffusion.

[0033] Specifically, the pre-crystallization treatment is to treat the amorphous silicon layer in the silicon wafer substrate in an inert gas atmosphere by using a gradient voltage change method.

[0034] For example, the silicon wafer substrate can be obtained by selecting an N-type silicon wafer as a base, polishing it, and then preparing a first tunneling oxide layer and an amorphous silicon layer using LPCVD (Low Pressure Chemical Vapor Deposition). It should be noted that the pre-crystallization, pre-oxidation, and boron diffusion in the embodiments of the present application are all targeted at the amorphous silicon layer region of the silicon wafer substrate.

[0035] The embodiments of the present application take into account that if the amorphous silicon layer area in the silicon wafer substrate is pre-crystallized in the LPCVD process, then cooled and transferred to a boron diffusion furnace for heating, and then pre-oxidation and boron diffusion are performed, this re-heating will result in secondary heat treatment, which will change the ideal grain size and structure, affect the uneven distribution of the doped boron source, and thereby reduce the defect state density and passivation effect of the doped polycrystalline silicon layer. Moreover, compared with the LPCVD process, boron diffusion is carried out under higher temperature conditions, which is conducive to the complete crystallization of amorphous silicon and the formation of a polycrystalline silicon layer with fewer grain boundaries and low defect density. Therefore, the pre-crystallization treatment, pre-oxidation and boron diffusion all need to be carried out in a boron diffusion furnace to enhance the passivation effect.

[0036] Therefore, preferably, pre-crystallization treatment, pre-oxidation and boron diffusion are carried out in sequence in the diffusion furnace. On the one hand, the process temperature and time in LPCVD are reduced, and the service life of the furnace tube in LPCVD is extended. On the other hand, it should be noted here that the pre-crystallization treatment is a preliminary crystallization and does not complete the crystallization process of the entire amorphous silicon layer. In the boron diffusion step, it is actually a process of edge crystallization and boron deposition, so that the boron doping distribution and the final grain structure are formed and stabilized in the same controlled heat treatment process, which is more conducive to obtaining a uniform doping distribution and reducing the density of grain boundary defects and interface states.

[0037] In the embodiment of the present application, the range of the gradient voltage change is 70-100 mBar.

[0038] Specifically, under low-pressure conditions, gradient voltage crystallization reduces the need for oxidation, forming a highly uniformly doped shallow junction on the silicon base layer (amorphous / polycrystalline silicon), reducing BO recombination and improving light absorption efficiency. The embodiments of the present application take into account that under normal pressure, the silicon surface easily reacts with residual oxygen to form a silicon oxide layer (SiO2) during high-temperature treatment. The low-pressure environment reduces the need for this side reaction by reducing the oxygen content, significantly lowering the oxygen partial pressure in the reaction chamber, thereby reducing the probability of amorphous silicon coming into contact with oxygen and directly suppressing the occurrence of oxidation reactions.

[0039] Specifically, the gradient voltage transformation may be performed in two steps, three steps, or more steps, depending on actual needs.

[0040] The embodiment of the present application takes into account that conditions below 70 mBar cause greater loss to the diffusion furnace, and to avoid causing instrument loss problems, no testing is performed under conditions below 70 mBar.

[0041] In the embodiment of the present application, the inert gas atmosphere includes:

[0042] The inert gas flow rate is 1500-2000 sccm.

[0043] Specifically, the inert gas can select a suitable type of inert gas and the size of the gas flow rate according to actual needs. For example, nitrogen is selected as the inert gas in the embodiment of the present application, which achieves the experimental effect while saving costs. Preferably, in the pre-crystallization treatment step, an inert gas with a certain flow rate within a gas flow rate of 1500-2000sccm can be first introduced into the diffusion furnace (pre-crystallization treatment device) for a certain period of time, and then the introduction of the inert gas is stopped. The introduction of inert gas in the early stage can reduce impurity contamination, stabilize the pressure in the furnace, inhibit oxidation and the formation of dangling bond defects, and promote uniform nucleation on the surface of amorphous silicon. In the later stage, no inert gas is introduced, which can drive grain growth, form a more complete lattice structure, and avoid the interference of inert gas on crystallization dynamics. In addition, if the flow rate of the inert gas is too small, it will be difficult to maintain a stable balance of the airflow in the diffusion furnace, which will cause an uneven atmosphere in the diffusion furnace and further lead to an uneven crystallization structure; and if the flow rate of the inert gas is too large, it may change the gas environment and pressure in the diffusion furnace, excessively slowing down the reaction rate of amorphous silicon to polycrystalline silicon, resulting in a high time cost and energy consumption.

[0044] In the embodiment of the present application, the pre-oxidation conditions include: pre-oxidation pressure of 90-100 mBar; oxygen gas flow rate of 500-700 sccm; inert gas flow rate of 2600-2800 sccm; and pre-oxidation time of 200-300 s.

[0045] Specifically, the purpose of this pre-oxidation step is to form a silicon oxide layer to facilitate subsequent boron source deposition. Due to the different solid solubility of boron in Si and SiO2, boron easily diffuses in SiO2. Therefore, after the amorphous silicon is converted to microcrystalline silicon, a layer of SiO2 is formed on the surface, and then the boron source is deposited to make the boron source in the surface SiO2 layer more evenly distributed. The pre-oxidation pressure, oxygen gas flow rate, inert gas flow rate, and pre-oxidation time are all environmental factors that affect the performance of the silicon oxide layer.

[0046] In the embodiment of the present application, in step 3), boron diffusion is performed by a gradient temperature increase method; the range of the gradient temperature increase is 800-1000°C.

[0047] Specifically, in the boron diffusion step, the boron source can be BCl3 or BBr3. The embodiment of the present application does not specifically limit the selection of the boron source.

[0048] The gradient temperature increase can be performed in two steps or in multiple steps. For example, a two-step gradient temperature increase is performed within 800-1000° C., thereby precisely controlling the diffusion depth and concentration distribution of boron.

[0049] In an embodiment of the present application, the method further includes a push-bonding process, and the conditions of the push-bonding process include: a push-bonding pressure of 90-100 mBar; a push-bonding temperature of 900-1000°C; an inert gas flow rate of 1500-2500 sccm; and a push-bonding time of 180-360 s.

[0050] Specifically, after the boron diffusion step, the silicon wafer continues to undergo a push-junction process in the boron diffusion furnace. The push-junction process is typically performed at a higher temperature than the boron diffusion process, creating conditions for the formation of a PN junction (an interface region with unique electrical properties formed when a P-type semiconductor and an N-type semiconductor come into contact, through the diffusion of carriers and the drift of the electric field. In silicon-based N-type solar cells, the PN junction is formed between the N-type substrate and the P-type doped layer). N-type silicon wafers refer to semiconductor materials formed by doping single-crystal silicon with pentavalent impurity elements (such as phosphorus (P), arsenic (As), and antimony (Sb)). P-type silicon wafers refer to semiconductor materials formed by doping single-crystal silicon with trivalent impurity elements (such as boron (B), aluminum (Al), and gallium (Ga).

[0051] An embodiment of the present application also provides a boron-doped structure, including a boron-doped structure obtained by any of the boron-doping methods provided in the embodiments of the present application.

[0052] Specifically, the boron-doped structure includes a silicon wafer obtained by boron-doping a silicon wafer substrate using any of the boron-doping methods provided in the embodiments of the present application.

[0053] The present invention has no special requirements for the preparation method of other parts other than the boron-doped structure obtained by any boron-doping method provided in the embodiments of this application. The conventional silicon wafer substrate preparation method in the field can be adopted. The specific preparation process is well known in the field of silicon wafer substrates and will not be described in detail here.

[0054] An embodiment of the present application also provides a back-contact battery, including a boron-doped structure provided in an embodiment of the present application.

[0055] For example, see Figure 2 , Figure 2 This is a schematic diagram of the structure of a back-contact cell provided by the present application. It should be noted that in the present embodiment, the silicon wafer substrate (N-type silicon wafer 1, P-region tunneling oxide layer 2 formed on the N-type silicon wafer, and N-region amorphous silicon layer formed on the P-region tunneling oxide layer 2) is subjected to pre-crystallization, pre-oxidation, boron diffusion, and push-junction treatment in sequence to obtain the boron-doped structure provided by the present embodiment. The boron-doped structure includes N-type silicon wafer 1, P-region tunneling oxide layer 2, and P-poly layer 3 (Doped p-type Polycrystalline Silicon Layer). Conventional back-contact cell preparation methods in the art can be used to further process the boron-doped structure to obtain the back-contact cell provided by the present embodiment.

[0056] The present invention has no special requirements for the preparation method of the back contact battery, and the conventional preparation method of the back contact battery in the art can be adopted. The specific preparation process is well known in the field of back contact batteries and will not be described here in detail.

[0057] The technical solution of this application is described below with reference to specific embodiments.

[0058] Example 1

[0059] The first tunneling oxide layer is formed on the N-type silicon wafer in LPCVD at 560°C, 150mtorr, and an oxygen gas flow rate of 28000sccm. After maintaining 560°C, the pressure value is maintained at 150mtorr, and the SiH4 gas flow rate is 1300sccm. After preparing the first tunneling oxide layer and amorphous silicon layer, the silicon wafer is loaded into a quartz boat and loaded into an 800°C boron diffusion furnace.

[0060] Pre-crystallization treatment: three-step gradient pressure change, at 75 mBar pressure, the temperature was raised to 900 ° C, the nitrogen gas flow rate was 2000 sccm, and the process time was 13 minutes; at 85 mBar pressure, the temperature was unchanged, the nitrogen gas flow rate was 2000 sccm, and the process time was 13 minutes; at 95 mBar pressure, the temperature was unchanged, the process time was 4 minutes, and no nitrogen was passed.

[0061] Pre-oxidation: Maintaining the pressure and temperature constant (pressure 95 mbar, temperature 900° C.), oxygen gas flow rate of 600 sccm and nitrogen gas flow rate of 2700 sccm were introduced for pre-oxidation before boron deposition. The process time was 210 s.

[0062] Boron diffusion: When the pressure and temperature remain unchanged, the first boron source deposition is performed with a gas flow rate of 200 sccm for the boron source, a gas flow rate of 600 sccm for the oxygen, and a gas flow rate of 3000 sccm for the nitrogen, and the process time is 150 s. The temperature is raised to 920°C, and the second boron source deposition is performed with a gas flow rate of 210 sccm for the boron source, a gas flow rate of 630 sccm for the oxygen, and a gas flow rate of 3150 sccm for the nitrogen, and the process time is 150 s.

[0063] Push-junction treatment: the temperature was raised to 940°C, and nitrogen gas was introduced at a gas flow rate of 2000 sccm for temperature-raising push-junction treatment, and the process time was 300 s.

[0064] Cool down to 800℃ and normal pressure before taking out of the boat.

[0065] Example 2

[0066] Compared with Example 1, the pre-crystallization treatment conditions were changed, and other conditions remained unchanged.

[0067] Pre-crystallization treatment: two-step gradient pressure change, at 85 mbar pressure, the temperature was raised to 900 ° C, the process time was 26 minutes, and the gas flow rate of nitrogen was 2000 sccm; at 95 mbar pressure, the temperature was unchanged, no gas was introduced, and the process time was 4 minutes.

[0068] Example 3

[0069] Compared with Example 1, the pre-crystallization treatment conditions were changed, and other conditions remained unchanged.

[0070] Pre-crystallization treatment: under a constant pressure of 95 mbar, the temperature was raised to 900° C., nitrogen was introduced at a gas flow rate of 2000 sccm, and the process time was 26 minutes; the pressure and temperature remained unchanged, no gas was introduced, and the process time was 4 minutes.

[0071] Example 4

[0072] Compared with Example 1, the pre-crystallization treatment conditions were changed, and other conditions remained unchanged.

[0073] Pre-crystallization treatment: three-step gradient pressure change, at 75 mBar pressure, the temperature was raised to 900 ° C, the process time was 13 minutes, and the nitrogen gas flow rate was 2000 sccm; at 85 mBar pressure, the temperature was unchanged, the nitrogen gas flow rate was 2000 sccm, and the process time was 13 minutes; at 95 mBar pressure, the temperature was unchanged, the nitrogen gas flow rate was 2000 sccm, and the process time was 4 minutes.

[0074] Example 5

[0075] Compared with Example 1, the pre-crystallization treatment conditions were changed, and other conditions remained unchanged.

[0076] The nitrogen gas flow rate in the first two steps was 1500 sccm.

[0077] Example 6

[0078] Compared with Example 1, the pre-crystallization treatment was performed under a pressure greater than 100 mBar, and other conditions remained unchanged.

[0079] At a pressure of 100 mBar, the temperature was raised to 900°C, the nitrogen gas flow rate was 2000 sccm, and the process time was 13 minutes; at a pressure of 110 mBar, the temperature remained unchanged, the nitrogen gas flow rate was 2000 sccm, and the process time was 13 minutes; at a pressure of 120 mBar, the temperature remained unchanged, the process time was 4 minutes, and no nitrogen was introduced.

[0080] Example 7

[0081] Compared with Example 1, the pre-crystallization treatment conditions were changed, and other conditions remained unchanged.

[0082] The gas flow rate of nitrogen in the first two steps was 1000 sccm.

[0083] Example 8

[0084] Compared with Example 1, the pre-crystallization treatment conditions were changed, and other conditions remained unchanged.

[0085] The gas flow rate of nitrogen in the first two steps was 3000 sccm.

[0086] Comparative Example 1

[0087] Compared with Example 1, no pre-crystallization treatment step is performed, and other conditions remain unchanged.

[0088] Comparative Example 2

[0089] Compared to Example 1, a first tunnel oxide layer was formed on an N-type silicon wafer using LPCVD at 560°C, 150 mtorr, and an oxygen flow rate of 28,000 sccm. The temperature was then raised to 620°C, the pressure maintained at 150 mtorr, and SiH₄ gas was introduced at a flow rate of 1300 sccm to form a polysilicon layer on the tunnel oxide layer. After forming the first tunnel oxide layer and polysilicon layer, the wafer was loaded into a quartz boat and placed in an 800°C boron diffusion furnace. No pre-crystallization step was performed, and all other conditions remained unchanged.

[0090] Comparative Example 3

[0091] A first tunnel oxide layer was formed on an N-type silicon wafer in an LPCVD process at 560°C, 150 mtorr, and an oxygen gas flow rate of 28,000 sccm. After maintaining 560°C, the pressure was maintained at 150 mtorr, and SiH4 was introduced at a flow rate of 1300 sccm. After forming an amorphous silicon layer on the first tunnel oxide layer, a pre-crystallization process was performed in the LPCVD process: a three-step pressure gradient was performed: at 130 mtorr, the temperature was raised to 700°C, the nitrogen gas flow rate was 1400 sccm, and the process time was 13 minutes; at 140 mtorr, the temperature was maintained constant, the nitrogen gas flow rate was 1400 sccm, and the process time was 13 minutes; at 150 mtorr, the temperature was maintained constant, the nitrogen gas flow rate was 4 minutes, and the process time was 4 minutes. The wafer was then transferred to a diffusion furnace for the subsequent steps under the same conditions as in Example 1. It should be noted that due to the limitations of the LPCVD process, the same conditions as those of the pre-crystallization treatment in Example 1 cannot be met.

[0092] Comparative Example 4

[0093] Compared with Example 1, the pre-crystallization treatment was carried out under conditions close to normal pressure, and other conditions remained unchanged.

[0094] At a pressure of 750 mBar, the temperature was raised to 900°C, the nitrogen gas flow rate was 2000 sccm, and the process time was 13 minutes. At a pressure of 850 mBar, the temperature remained unchanged, the nitrogen gas flow rate was 2000 sccm, and the process time was 13 minutes. At a pressure of 950 mBar, the temperature remained unchanged, the process time was 4 minutes, and no nitrogen was passed.

[0095] The boron-doped structures obtained in the examples and comparative examples were subjected to performance tests, and the sheet resistance and uniformity results are shown in Table 1.

[0096] Table 1. Performance test results of boron-doped structures obtained from different embodiments and comparative examples

[0097] Case Point 1 Point 2 Point 3 Point 4 Point 5 Mean (Ω) Uniformity Example 1 132.6 138.4 136.9 141.2 136.5 137.1 3.1% Example 2 134.5 130.8 141.2 139.0 137.4 136.6 3.8% Example 3 129.8 133.5 138.9 132.5 142.3 135.4 4.6% Example 4 132.3 140.3 140.6 133.2 130.7 135.4 3.7% Example 5 131.6 138.7 136.4 133.6 140.5 136.2 3.3% Example 6 136.8 135.9 143.4 130.8 137.9 137.0 4.6% Example 7 129.8 136.7 139.5 142.8 131.8 136.1 4.8% Example 8 140.3 135.4 129.6 128.6 139.5 134.7 4.3% Comparative Example 1 130.5 127.6 142.6 129.5 141.9 134.4 5.6% Comparative Example 2 133.9 140.5 143.0 128.2 126.9 134.5 6.0% Comparative Example 3 128.1 133.2 142.3 141.3 135.6 136.1 5.2% Comparative Example 4 127.9 143.8 126.9 139.5 140.1 135.6 6.2%

[0098] As shown in Table 1, compared with the conventional boron diffusion process, the process of the present invention performs gradient voltage crystallization on amorphous silicon, which has a lower surface concentration (the lower the surface concentration, the greater the sheet resistance), and effectively improves the uniformity of the boron diffusion sheet resistance. The sheet resistance of Example 1 is increased by about 2.7Ω / □ , the square resistance uniformity is improved by 2.5%.

[0099] Taking the preparation of back-contact cells as an example, an N-type silicon wafer is selected as the substrate. After polishing, deposition of a P-region tunneling oxide layer and an amorphous silicon layer on the back side, boron diffusion according to the embodiments and comparative examples, first grooving and cleaning, deposition of an N-region tunneling oxide layer and a polysilicon layer on the back side, phosphorus diffusion, second grooving and cleaning, double-sided aluminum oxide and silicon nitride, screen printing, sintering, light injection, and testing and sorting, a TBC cell is made. Performance testing of back-contact cells prepared with the boron-doped structure obtained based on the embodiments and comparative examples is performed. The performance test results are shown in Table 2. It should be noted that the process conditions for preparing back-contact cells with the boron-doped structure obtained based on the embodiments and comparative examples in the present application are the same.

[0100] Table 2. Performance test results of back-contact cells with boron-doped structures obtained from different examples and comparative examples

[0101]

[0102]

[0103] From the above results, it can be seen that the conversion efficiency of the embodiment is increased by 0.1-0.21% compared with the comparative example. By using the gradient voltage crystallization method, amorphous silicon is converted into microcrystalline silicon in advance, thereby reducing lattice stress and achieving a gradient distribution of grain size. This avoids the problem of uneven grain size caused by single crystallization conditions and the fluctuation of doping concentration caused by the disordered structure of amorphous silicon, making it easier for subsequent boron atoms to migrate to the equilibrium position. During the boron diffusion process, the pre-crystallized silicon layer continues to crystallize, and crystallizes while boron is deposited, forming an ordered structure with a more uniform distribution. Finally, boron doping is completed while converting to polycrystalline silicon. Secondly, the oxidation demand is reduced by gradient voltage crystallization, and a highly uniform doped shallow junction is formed on the silicon base layer (amorphous / polycrystalline silicon), reducing BO recombination and improving light absorption efficiency. Finally, by pre-stabilizing the structure of the doped area, a polysilicon layer with low defect density is formed, which improves the uneven doping during the boron diffusion process and makes the crystalline structure of the polysilicon layer after boron doping more uniform and dense. This step can reduce the density of grain boundary defects and interface states, and has better square resistance uniformity, thereby reducing the recombination loss of carriers at the interface. The recombination effect of photogenerated carriers is weaker, which improves the open circuit voltage and short circuit current of the battery, thereby improving the photoelectric conversion efficiency of the battery.

[0104] It can be seen from the above technical solutions of the embodiments of the present invention that the present invention discloses a boron doping method, wherein the method includes: step 1) pre-crystallization treatment; step 2) pre-oxidation; step 3) boron diffusion; the pre-crystallization treatment is to treat the amorphous silicon layer in the silicon wafer substrate by gradient voltage change in an inert gas atmosphere; before pre-oxidation and boron diffusion, the method first converts amorphous silicon into microcrystalline silicon by gradient voltage change, thereby reducing lattice stress and achieving a gradient distribution of grain size, avoiding the problem of uneven grain size caused by single crystallization conditions and the problem of doping concentration fluctuation caused by the disordered structure of amorphous silicon, making it easier for subsequent boron atoms to migrate to the equilibrium position, forming an ordered structure with a more uniform distribution, thereby obtaining a boron-doped structure with better square resistance uniformity, thereby improving the photoelectric conversion efficiency of the back contact based on the boron-doped structure.

[0105] The above description fully discloses the specific embodiments of the present invention. It should be noted that any modifications made by those skilled in the art to the specific embodiments of the present invention do not depart from the scope of the claims. Accordingly, the scope of the claims of the present invention is not limited solely to the foregoing specific embodiments.

Claims

1. A boron doping method, comprising the following steps: Step 1) pre-crystallization treatment; Step 2) pre-oxidation; Step 3) Boron diffusion; Wherein, in step 1), the pre-crystallization treatment is performed on the amorphous silicon layer in the silicon wafer substrate in an inert gas atmosphere by using a gradient voltage variation method. 2 . The boron doping method according to claim 1 , wherein the gradient voltage range is 70-100 mBar.

3. The boron doping method according to claim 1, wherein the inert gas atmosphere comprises: The inert gas flow rate is 1500-2000 sccm.

4. The boron doping method according to claim 1, wherein the pre-oxidation conditions include: The pre-oxidation pressure is 90-100 mBar; the oxygen gas flow rate is 500-700 sccm; the inert gas flow rate is 2600-2800 sccm; and the pre-oxidation time is 200-300 s. 5 . The boron doping method according to claim 1 , wherein in step 3), the boron diffusion is performed by a gradient temperature increase; the gradient temperature increase range is 800-1000° C.

6. The boron doping method according to claim 1 , further comprising a push-in process, wherein the conditions of the push-in process include: The pushing pressure is 90-100mBar; The pushing temperature is 900-1000°C; the inert gas flow rate is 1500-2500 sccm; and the pushing time is 180-360s.

7. A boron-doped structure, characterized in that: The boron-doped structure comprises a boron-doped structure prepared by any one of the methods described in claims 1 to 6.

8. A back contact battery, characterized in that: A boron-doped structure comprising the one described in claim 7.

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