Driving protection system for auxiliary release electromagnetic valve of tramcar

Abstract

The invention discloses a tramcar auxiliary release solenoid valve driving protection system which is realized through a pure hardware circuit and comprises an instruction pulse generation circuit, a single power-on limiting circuit, a blocking time timing circuit, a two-input AND gate and a driving module. The single-time power-on limiting circuit and the blocking time timing circuit respectively utilize a monostable multivibrator, a resistor and a capacitor combination to set the single-time power-on time and the forced rest time of the electromagnetic valve. The two-input AND gate is used for controlling logic processing of signals, ensuring that a new instruction is shielded in a blocking period, and preventing repeated triggering. The driving module controls on-off of a relay through a triode so as to control on-off of an electromagnetic valve. The system is simple and clear in structure and easy to implement and maintain, the reliability and safety of the braking system are remarkably improved, the overheating problem caused by too long continuous working time or too short repeated starting interval is effectively avoided, the system failure rate is reduced, and the vehicle operation efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of rail vehicle brake control systems, and in particular to a tram auxiliary relief solenoid valve drive protection system. Background Art

[0002] The tram auxiliary brake release solenoid valve is a safety-critical component of the vehicle's braking system, requiring extremely high reliability. If the auxiliary brake release solenoid valve fails when a vehicle requires rescue after braking, the non-powered bogie will be in a braking state. Due to the limited space under the vehicle, access to the braking system is impossible, preventing the vehicle from releasing the brake. This can cause the vehicle to occupy the operating route for extended periods, impacting operations. Therefore, a brake release solenoid valve is added to address this issue and reduce the time the vehicle occupies the operating route. However, a failure in the brake release solenoid valve itself can lead to major faults such as non-relief braking, seriously endangering vehicle safety and significantly impacting vehicle operations. The auxiliary brake release solenoid valve consumes high power and generates significant heat during operation, so it should not be energized for extended periods. Research has shown that failure of the auxiliary brake release solenoid valve itself is a key cause of non-relief braking.

[0003] In the existing technology, the drive of ordinary solenoid valves is generally controlled by a single-chip microcomputer, or a manual switch is used to directly control the power on and off of the solenoid valve. However, there are the following disadvantages: using single-chip microcomputer software control to assist in alleviating the risk of software failure of the solenoid valve; manually controlling the power-on time of the solenoid valve is difficult to accurately control. Summary of the Invention

[0004] The purpose of the present invention is to provide a tram auxiliary relief solenoid valve drive protection system, which realizes the drive control of the heat limit of the solenoid valve through a pure hardware circuit to solve the overheating problem caused by the solenoid valve continuously working for too long or the repeated start interval being too short.

[0005] To achieve the above object, the technical solution provided by the present invention is:

[0006] A tram auxiliary relief solenoid valve drive protection system includes a command pulse generating circuit, a single power-on limiting circuit, a blocking time timing circuit, a two-input AND gate and a drive module;

[0007] The command pulse generating circuit is composed of a control button S1, a third resistor R3 and a third capacitor C3 connected in series, and is used to generate an electric pulse signal In;

[0008] The single power-on limiting circuit is composed of a first monostable multivibrator U1A connected in series with a first resistor R1 and a first capacitor C1, and is used to generate an output signal QA;

[0009] The blocking time timing circuit is composed of a second monostable multivibrator U1B, a second resistor R2 and a second capacitor C2 connected in series, and is used to control the blocking timing duration of the circuit;

[0010] The two-input AND gate includes a first two-input AND gate U2A and a second two-input AND gate U2B; the first two-input AND gate U2A receives an electrical pulse signal In and a blocking signal / QB from the second monostable multivibrator U1B, and outputs an electrical pulse signal to the input end of the first monostable multivibrator U1A; the second two-input AND gate U2B receives an output signal QA from the first monostable multivibrator U1A and a blocking release signal QB from the second monostable multivibrator U1B, and outputs a driving signal Out to the transistor Q1;

[0011] The driving module is composed of a transistor Q1 connected in series with a relay RY1, the relay RY1 is connected in series with an electromagnetic valve Y1, and the freewheeling diode D1 and the electromagnetic valve Y1 are connected in parallel.

[0012] To optimize the above technical solutions, specific measures / limitations adopted also include:

[0013] The single power-on limiting circuit can output a pulse width from the output end of the first monostable multivibrator U1A by adjusting the first resistor R1 and the first capacitor C1, so as to set the single power-on time of the solenoid valve.

[0014] Furthermore, the single power-on time expression of the solenoid valve is tw1=K×R1×C1, where the constant K is the physical characteristic parameter of the internal circuit structure of the chip, R1 is the resistance value of the first resistor, and C1 is the capacitance of the first capacitor.

[0015] The blocking time timing circuit can output a pulse width from the output end of the second monostable multivibrator U1B by adjusting the second resistor R2 and the second capacitor C2, which is used to set the rest time of the forced solenoid valve.

[0016] Furthermore, the solenoid valve rest time is expressed as tw2=K×R2×C2, where the constant K is a physical characteristic parameter of the internal circuit structure of the chip, R2 is the resistance value of the second resistor, and C2 is the capacitance of the second capacitor.

[0017] Furthermore, the output terminal QA of the first monostable multivibrator U1A is connected to the input terminal AB of the second monostable multivibrator U1B, so as to ensure that the single power-on time of the solenoid valve and the forced rest time of the solenoid valve start timing at the same time.

[0018] When the input end of the first two-input AND gate U2A receives the electrical pulse signal In and the blocking release signal / QB is also high, the first two-input AND gate U2A outputs a high-level signal to the first monostable multivibrator U1A, triggering the timing of the single power-on limit circuit.

[0019] When the input end of the second two-input AND gate U2B receives a high-level QA signal and the blocking release signal QB is also high, the second two-input AND gate U2B outputs a driving signal Out to the transistor Q1 to energize the relay RY1, thereby turning on the solenoid valve Y1.

[0020] The first monostable multivibrator U1A and the second monostable multivibrator U1B may use different timing chips.

[0021] Furthermore, the drive protection system is implemented using a pure hardware circuit.

[0022] Compared with the prior art, the present invention has the following beneficial effects:

[0023] The tram auxiliary relief solenoid valve drive protection system proposed in the present invention realizes precise timing of the solenoid valve power-on time and overheat protection through a precisely designed hardware circuit, significantly improving the reliability and safety of the braking system. The system circuit adopts two precision monostable multivibrators, which respectively set the power-on limit time and the continuous trigger blocking time, effectively avoiding the overheating problem of the solenoid valve due to excessively long continuous working time or too short repeated start intervals. In addition, the system circuit structure is simple and clear, easy to implement and maintain, reducing the system failure rate and improving vehicle operation efficiency. The auxiliary relief solenoid valve drive protection system as described above has a simple and clear circuit structure and can be used for the drive and protection of the auxiliary relief solenoid valve of trams, thereby improving the reliability and safety of the braking system. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 Schematic diagram of the system principle of the present invention.

[0025] Figure 2 This is the timing relationship diagram of the control signal and the output signal. DETAILED DESCRIPTION

[0026] The following is a clear and complete description of the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0027] like Figure 1As shown, the present invention provides a tram auxiliary relief solenoid valve drive protection system, including a command pulse generating circuit, a single power-on limiting circuit, a blocking time timing circuit, a two-input AND gate and a drive module;

[0028] The command pulse generating circuit is composed of a control button S1, a third resistor R3 and a third capacitor C3 connected in series, and is used to generate an electrical pulse signal In;

[0029] The single power-on limiting circuit is composed of a first monostable multivibrator U1A connected in series with a first resistor R1 and a first capacitor C1, and is used to generate an output signal QA;

[0030] The blocking time timing circuit is composed of a second monostable multivibrator U1B, a second resistor R2 and a second capacitor C2 connected in series, and is used to control the blocking timing length of the circuit;

[0031] The first two-input AND gate U2A receives the electrical pulse signal In and the blocking signal / QB from the second monostable multivibrator U1B, and outputs the electrical pulse signal to the input terminal of the first monostable multivibrator U1A;

[0032] The second two-input AND gate U2B receives the output signal QA from the first monostable multivibrator U1A and the lock release signal QB from the second monostable multivibrator U1B, and outputs a driving signal Out to the transistor Q1;

[0033] The driving module controls the on and off of the relay RY1 by the transistor Q1, the output end of the relay is connected in series with the solenoid valve Y1, and the freewheeling diode D1 is connected in parallel with the solenoid valve Y1.

[0034] This drive protection system is implemented using pure hardware circuits, avoiding the risk of software failure, has high reliability, and is suitable for safety-critical systems.

[0035] like Figure 1 As shown, in some embodiments,

[0036] When the operator presses control button S1, the command pulse generating circuit generates an electrical pulse signal In, which is input to the input of the first two-input AND gate U2A. At this point, if the blocking signal / QB of the second monostable multivibrator U1B is high (i.e., unlocked), the first two-input AND gate U2A outputs a high signal to the AA terminal of the first monostable multivibrator U1A. Once triggered, the first monostable multivibrator U1A immediately outputs a high signal from the QA terminal, simultaneously initiating the tw1 timing. A portion of the QA signal is fed to the input of the second two-input AND gate U2B to drive the output, while the remaining portion is fed to the AB terminals of the second monostable multivibrator U1B, triggering the blocking timing.

[0037] After the second monostable multivibrator U1B is triggered by QA, the tw2 timing is synchronously started. Its blocking signal / QB immediately changes to a low level (blocking is effective). This signal is fed back to the input of the first two-input AND gate U2A, forming a logical blockade. (During tw2, even if the control button S1 is pressed again to generate the In pulse, the output of the first two-input AND gate U2A will be forced to lock at a low level.) At the same time, the blocking release signal QB of the second monostable multivibrator U1B changes to a high level (indicating that the blockade release countdown is in progress). This signal is input to the other input of the second two-input AND gate U2B. When both inputs of the second two-input AND gate U2B (QA and QB) are high, the second two-input AND gate U2B outputs a high-level Out signal, driving transistor Q1 to conduct, causing relay RY1 to attract, and solenoid valve Y1 to energize and operate.

[0038] After the solenoid valve is energized for tw1, the first monostable multivibrator U1A expires, QA automatically returns to a low level, and solenoid valve Y1 is de-energized. However, the second monostable multivibrator U1B continues to operate, and its blocking signal / QB remains low throughout tw2, continuously locking the first and second inputs of AND gate U2A and preventing new inputs. Only after tw2 expires does the blocking signal / QB return to a high level, releasing the blocking state and re-entering the system's standby state.

[0039] Preferably, the single power-on time of the solenoid valve is expressed as tw1=K×R1×C1, where the constant K is a physical characteristic parameter of the internal circuit structure of the chip, R1 is the resistance value of the first resistor, and C1 is the capacitance of the first capacitor;

[0040] Preferably, the solenoid valve rest time is expressed as tw2=K×R2×C2, where the constant K is the physical characteristic parameter of the internal circuit structure of the chip, R2 is the resistance value of the second resistor, and C2 is the capacitance of the second capacitor.

[0041] As an optimal design, the minimum time interval between two operations is guaranteed to be tw2-tw1 to ensure that the solenoid valve is fully cooled. Even if tw1 ends, it is still necessary to wait for the tw2 countdown to complete (blocking signal / QB returns to high level) before accepting new instructions.

[0042] The freewheeling diode D1 connected in parallel at both ends of the relay RY1 is used to absorb the reverse electromotive force generated when the coil is powered off, protecting the driver tube Q1 from voltage shock.

[0043] The first two-input AND gate U2A is controlled by the blocking signal / QB: during the blocking period (when the blocking signal / QB is at a low level), all new electrical pulse signal In instructions are shielded to prevent re-triggering.

[0044] The second two-input AND gate U2B is controlled by the blockade release signal QB: it outputs the driving signal OUT only when the blockade release countdown is in progress (blockade release signal QB is at a high level) and the output signal QA is valid.

[0045] The first monostable multivibrator U1A and the second monostable multivibrator U1B may use different timing chips.

[0046] In some embodiments, the system can adapt to the thermal parameters of different solenoid valves by replacing the resistor and capacitor values ​​and different timing chips; the system can be reused in multiple vehicle models, reducing customization costs.

[0047] like Figure 2 The figure below illustrates the operating timing logic of the entire drive protection system: When the electrical pulse signal In is input to the second two-input AND gate U2B, the output drive signal Out activates solenoid valve Y1, and the lock release signal QB simultaneously jumps to a high level, starting the lock timer. At this time, the lock signal / QB instantly switches to a low level, locking the system and prohibiting any new trigger commands. The duration of solenoid valve Y1's power supply is strictly limited to tw1 (i.e., the duration of QA's high level). Once tw1 expires, solenoid valve Y1 is immediately de-energized, but the system remains locked by the lock signal / QB until the total lock time tw2 expires, the lock release signal QB jumps back to a low level, and the lock signal / QB returns to a high level, releasing the lock. This timing design hard-locks the minimum interval between two operations to tw2-tw1, ensuring sufficient cooling of solenoid valve Y1 and eliminating the risk of overheating.

[0048] The above are only preferred embodiments of the present invention and do not constitute any form of limitation to the present invention. Any simple modification, equivalent replacement and improvement made by any technician familiar with the profession to the above embodiments without departing from the scope of the technical solution of the present invention and based on the technical essence of the present invention shall still fall within the scope of protection of the technical solution of the present invention.

Claims

1. A tram auxiliary relief solenoid valve drive protection system, characterized by: It includes a command pulse generating circuit, a single power-on limiting circuit, a blocking time timing circuit, a two-input AND gate and a driving module; The command pulse generating circuit is composed of a control button S1, a third resistor R3 and a third capacitor C3 connected in series, and is used to generate an electric pulse signal In; The single power-on limiting circuit is composed of a first monostable multivibrator U1A connected in series with a first resistor R1 and a first capacitor C1, and is used to generate an output signal QA; The blocking time timing circuit is composed of a second monostable multivibrator U1B, a second resistor R2 and a second capacitor C2 connected in series, and is used to control the blocking timing duration of the circuit; The two-input AND gate includes a first two-input AND gate U2A and a second two-input AND gate U2B; the first two-input AND gate U2A receives an electrical pulse signal In and a blocking signal / QB from the second monostable multivibrator U1B, and outputs an electrical pulse signal to the input end of the first monostable multivibrator U1A; the second two-input AND gate U2B receives an output signal QA from the first monostable multivibrator U1A and a blocking release signal QB from the second monostable multivibrator U1B, and outputs a driving signal Out to the transistor Q1; The driving module is composed of a transistor Q1 connected in series with a relay RY1, the relay RY1 is connected in series with an electromagnetic valve Y1, and the freewheeling diode D1 and the electromagnetic valve Y1 are connected in parallel.

2. The tram auxiliary relief solenoid valve drive protection system according to claim 1, characterized in that: The single power-on limiting circuit outputs a pulse width from the output terminal QA of the first monostable multivibrator U1A by adjusting the first resistor R1 and the first capacitor C1, which is used to set the single power-on time of the solenoid valve.

3. The tram auxiliary relief solenoid valve drive protection system according to claim 2, characterized in that: The single power-on time expression of the solenoid valve is tw1=K×R1×C1, where the constant K is the physical characteristic parameter of the internal circuit structure of the chip, R1 is the resistance value of the first resistor, and C1 is the capacitance of the first capacitor.

4. The tram auxiliary relief solenoid valve drive protection system according to claim 1, characterized in that: The blocking time timing circuit outputs a pulse width from the output terminal QB of the second monostable multivibrator U1B by adjusting the second resistor R2 and the second capacitor C2, which is used to set the rest time of the forced solenoid valve.

5. The tram auxiliary relief solenoid valve drive protection system according to claim 4, characterized in that: The solenoid valve rest time is expressed as tw2=K×R2×C2, where the constant K is the physical characteristic parameter of the internal circuit structure of the chip, R2 is the resistance value of the second resistor, and C2 is the capacitance of the second capacitor.

6. The tram auxiliary relief solenoid valve drive protection system according to claim 1, characterized in that: The output terminal QA of the first monostable multivibrator U1A is connected to the input terminal AB of the second monostable multivibrator U1B, so as to start timing the single power-on time of the solenoid valve and the forced rest time of the solenoid valve at the same time.

7. The tram auxiliary relief solenoid valve drive protection system according to claim 1, characterized in that: When the input end of the first two-input AND gate U2A receives the electrical pulse signal In and the blocking signal / QB is high, the first two-input AND gate U2A outputs a high-level signal to the first monostable multivibrator U1A, triggering the timing of the single power-on limiting circuit.

8. The tram auxiliary relief solenoid valve drive protection system according to claim 1, characterized in that: When the input end of the second two-input AND gate U2B receives a high-level QA signal and the blocking release signal QB is also high, the second two-input AND gate U2B outputs a driving signal Out to the transistor Q1 to energize the relay RY1, thereby turning on the solenoid valve Y1.

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