Fishbone-shaped nanosheet semiconductor device and preparation method thereof
By constructing a fishbone nanosheet structure in GAA-NS technology and combining the advantages of FinFET and GAA-NS, the problem of the electron mobility of nanosheet devices being higher than the hole mobility is solved, and the driving capability and electrical performance matching of semiconductor devices are improved.
Patent Information
- Application Number
- CN202410360594.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-27
- Publication Date
- 2025-10-03
Smart Images
Figure CN120751744A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor materials, and in particular to a fishbone-shaped nanosheet semiconductor device and a preparation method thereof. Background Art
[0002] With the development of ultra-large-scale integrated circuits (VLSI), the scaling of CMOS devices has reached the transistor limit. Various three-dimensional architectures have been proposed for technology nodes below 5 nanometers, such as gate-around-all-around nanometer transistors (GAA-NS), tunnel field-effect transistors (TFETs), and ultra-thin body transistors (ULBTs). Among them, GAA-NS is a potential alternative to FinFETs. On the one hand, its horizontally stacked NS provides higher drive current, better power optimization, additional area and gate length (Lg) expansion advantages, and better electrostatic control. On the other hand, compared with traditional FinFET devices, stacked NS devices have smaller manufacturing deviations and can reuse traditional integration and manufacturing technologies.
[0003] However, the manufacturing process of GAA-NS is relatively complex, and the electron mobility of its (100) crystal plane is much higher than the hole mobility, resulting in a mismatch in the electrical performance of GAA nanosheet NFETs and PFETs. Therefore, how to further improve the performance of NS devices in GAANS technology to alleviate the problem of the electron mobility of its (100) crystal plane being much higher than the hole mobility has become a technical problem that technicians in this field urgently need to solve. Summary of the Invention
[0004] In view of the above technical status, the present invention provides a fishbone-shaped nanosheet semiconductor device and a preparation method thereof, so as to improve the problem that the electron mobility of the crystal surface of the NS device (100) in the existing GAANS technology is much higher than the hole mobility.
[0005] In order to achieve the above object, the present invention provides the following technical solutions:
[0006] A fishbone-shaped nanosheet semiconductor device comprises: a substrate, a fishbone-shaped structure extending from the substrate;
[0007] The fishbone structure includes a trunk perpendicular to the substrate, the trunk including at least one stacked silicon germanium layer and silicon layer, wherein the silicon layer is above the silicon germanium layer; the trunk includes at least one level of annular groove; the annular groove is generated based on oxidation and etching of the silicon germanium layer.
[0008] Compared with the prior art, the fishbone-shaped nanosheet semiconductor device provided by the present invention constructs a nanosheet channel perpendicular to and parallel to the substrate through a fishbone-shaped structure, so that the fishbone-shaped nanosheet semiconductor device combines the advantages of FinFET and GAANS, effectively alleviating the problem of mismatch in electrical performance between NFET and PFET caused by the electron mobility of the crystal plane of the GAANS device (100) being much higher than the hole mobility in the prior art, thereby improving the driving capability of the semiconductor device.
[0009] The present invention also provides a method for preparing a fishbone-shaped nanosheet semiconductor device, comprising:
[0010] Depositing a trunk on a substrate, wherein the trunk is perpendicular to the substrate, and the trunk comprises at least one stacked silicon germanium layer and a silicon layer, wherein the silicon layer is on the silicon germanium layer;
[0011] The silicon germanium layer of the trunk is oxidized and etched in sequence to generate a fishbone structure, wherein the fishbone structure includes at least one level of annular groove.
[0012] In an optional embodiment of the present application, depositing the trunk on the substrate includes:
[0013] Growing at least one period of silicon germanium layer and silicon layer on the upper surface of the substrate by deposition;
[0014] sequentially growing a first compound and a second compound on the upper surface of the silicon layer by deposition;
[0015] Based on the growth position of the second compound, the silicon germanium layer, the silicon layer and the first compound deposited on the upper surface of the substrate are etched to obtain the trunk.
[0016] In an optional embodiment of the present application, the step of sequentially growing the first compound and the second compound on the upper surface of the silicon layer by deposition comprises:
[0017] growing a first compound on the upper surface of the silicon layer by deposition;
[0018] growing amorphous silicon on the upper surface of the first compound by deposition to obtain an amorphous silicon layer;
[0019] Based on a preset mandrel size, etching the amorphous silicon layer to obtain a mandrel layer;
[0020] A second compound is grown on the surface of the core shaft layer and the first compound by deposition.
[0021] In an optional embodiment of the present application, based on the growth position of the second compound, the silicon germanium layer, the silicon layer, and the first compound deposited on the upper surface of the substrate are etched to obtain the trunk, comprising:
[0022] performing an etching process on the second compound to form a sidewall formed by the second compound and located on a sidewall of the mandrel layer;
[0023] The silicon germanium layer, the silicon layer, and the first compound deposited on the upper surface of the substrate are etched along the sidewalls to obtain the trunk.
[0024] In an optional embodiment of the present application, the second compound is SiN;
[0025] The etching process on the second compound to form a sidewall formed of the second compound and located on the sidewall of the mandrel layer includes:
[0026] The second compound is anisotropically etched using a CF4 / CHF3 / Ar gas system to generate sidewalls composed of the second compound and located on sidewalls of the mandrel layer.
[0027] In an optional embodiment of the present application, etching the silicon germanium layer, the silicon layer, and the first compound deposited on the upper surface of the substrate along the sidewalls to obtain the trunk includes:
[0028] Anisotropically etching the first compound using a C4F6 / CO / O2 / Ar gas system to expose the silicon germanium layer and the silicon layer;
[0029] The exposed silicon germanium layer and silicon layer are anisotropically etched using a HBr / O2 / He system to obtain the backbone.
[0030] In an optional embodiment of the present application, the silicon germanium layer of the trunk is oxidized and etched in sequence to form a fishbone structure, including:
[0031] performing an O2 plasma room temperature oxidation treatment on the silicon germanium layer to form an oxide layer on the outer side wall of the silicon germanium layer;
[0032] The oxide layer on the outer sidewall of the silicon germanium layer is etched using a CF4 / C4F8 self-limiting selective etching method to etch a groove on the trunk to form the fishbone structure.
[0033] In an optional embodiment of the present application, the length of the core shaft layer is 3 μm.
[0034] In an optional embodiment of the present application, the thickness of the silicon germanium layer and the silicon layer is 10 nm.
[0035] Compared with the prior art, the beneficial effects of the method for preparing the fishbone-shaped nanosheet semiconductor device provided by the present invention are the same as the beneficial effects of the fishbone-shaped nanosheet semiconductor device described in the above technical solution, which will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:
[0037] Figure 1 A schematic diagram of the structure of a fishbone-shaped nanosheet semiconductor device provided in an embodiment of the present application;
[0038] Figure 2 A flow chart of a method for preparing a fishbone-shaped semiconductor device according to an embodiment of the present application;
[0039] Figure 3 Schematic diagram of a quasi-atomic layer etching scheme based on conventional ICP plasma self-limiting oxidation and CF-based gas self-limiting etching provided in an embodiment of the present application;
[0040] Figure 4 This is a flow chart of the preparation process of the fishbone-shaped nanosheet semiconductor device provided in the embodiments of the present application. DETAILED DESCRIPTION
[0041] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.
[0042] It should be noted that when an element is referred to as being “fixed on” or “disposed on” another element, it may be directly on the other element or indirectly on the other element. When an element is referred to as being “connected to” another element, it may be directly connected to the other element or indirectly connected to the other element.
[0043] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Thus, a feature specified as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined. "Several" means one or more, unless otherwise specifically defined.
[0044] In the description of the present invention, it should be understood that the terms "up", "down", "front", "back", "left", "right", etc., indicating directions or positional relationships, are based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as a limitation on the present invention.
[0045] In the description of the present invention, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they may refer to fixed, detachable, or integral connections; mechanical or electrical connections; direct or indirect connections through an intermediate medium; and may encompass internal communication between two components or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.
[0046] With the development of ultra-large-scale integrated circuits (VLSI), the scaling of CMOS devices has reached the transistor limit. Various three-dimensional architectures have been proposed for technology nodes below 5 nanometers, such as gate-around-all-around nanometer transistors (GAA-NS), tunnel field-effect transistors (TFETs), and ultra-thin body transistors (ULBTs). GAA-NS, as a potential alternative to FinFETs, offers higher drive current, better power optimization, additional area and gate length (Lg) expansion advantages, and improved electrostatic control thanks to its horizontally stacked NS. Furthermore, compared to traditional FinFET devices, stacked NS devices exhibit less manufacturing deviation, enabling extensive reuse of traditional integration and manufacturing technologies.
[0047] The mainstream GAA-NS manufacturing process is relatively complex, but is basically compatible with traditional FinFET manufacturing processes. It includes Si / SiGe stack epitaxial growth, inner spacer formation, source and drain epitaxy, Si channel release, and HKMG. However, because the electron mobility of the (100) crystal plane of existing GAA-NS is much higher than the hole mobility, its NFET and PFET electrical performance do not match.
[0048] To solve this technical problem, the present application provides a fishbone-shaped nanosheet semiconductor device and a preparation method thereof, which are described in detail one by one in the following embodiments.
[0049] The embodiment of the present application first provides a fishbone-shaped nanosheet semiconductor device, the core of which is to prepare a fishbone structure that combines nanoscale horizontal nanosheet channels and vertical nanosheet channels, so as to combine the advantages of both FinFET and GAANS, merge the (110) sidewall channel of FinFET and the (100) horizontal channel of GAA-NS, thereby alleviating the problem in the prior art that the electron mobility of the (100) crystal plane of GAA-NS is much higher than the hole mobility, and the electrical performance of NFET and PFET are not matched, thereby improving the driving capability of the semiconductor device.
[0050] For further information, please refer to Figure 1 , Figure 1 A schematic diagram of the structure of a fishbone-shaped nanosheet semiconductor device provided in an embodiment of the present application.
[0051] like Figure 1 As shown, the fishbone-shaped nanosheet semiconductor device includes: a substrate 101, and a fishbone-shaped structure 102 extending from the substrate 101;
[0052] The fishbone structure 102 includes a trunk perpendicular to the substrate 101, the trunk including at least one stacked silicon germanium layer 103 and silicon layer 104, wherein the silicon layer 104 is above the silicon germanium layer 103, and the trunk includes at least one level of annular groove 105, which is generated based on the oxidation and etching of the silicon germanium layer 103.
[0053] In the embodiment of the present application, the substrate 101 may be a silicon substrate with a (100) crystal plane.
[0054] like Figure 1 As shown, the fishbone-shaped nanosheet semiconductor structure provided by the present application constructs a nanosheet channel perpendicular to and parallel to the substrate by oxidizing and etching the silicon germanium layer, so that the fishbone-shaped nanosheet semiconductor device combines the advantages of FinFET and GAANS, effectively alleviating the problem of mismatch in electrical performance between NFET and PFET caused by the electron mobility of the crystal plane of the GAANS device (100) being much higher than the hole mobility in the prior art, thereby improving the driving capability of the semiconductor device.
[0055] Furthermore, this application also provides a method for preparing the fishbone-shaped nanosheet semiconductor device, please refer to Figure 2 , Figure 2 A flow chart of a method for preparing a fishbone-shaped semiconductor device provided in an embodiment of the present application.
[0056] like Figure 2 As shown, the method for preparing the fishbone-shaped semiconductor device includes the following steps S101 and S102:
[0057] S101 , depositing a trunk on a substrate, wherein the trunk is perpendicular to the substrate and comprises at least one stacked silicon germanium layer and silicon layer, wherein the silicon layer is on top of the silicon germanium layer.
[0058] During the preparation process, the substrate can be an 8-inch (100) crystal silicon substrate. In actual application, in order to improve the quality of the fishbone-shaped semiconductor device prepared subsequently, before depositing the backbone on the substrate, NH3.H2O and H2O2 can be used to clean the silicon substrate to remove particles on the substrate surface and reduce the defect density of the subsequent thin film. Afterwards, H2O2 and 100:1 DHF are used to remove organic matter and oxide layers on the substrate surface.
[0059] Furthermore, the step of depositing the backbone on the substrate includes the following steps S1 to S3:
[0060] S1, growing at least one period of silicon germanium layer and silicon layer on the upper surface of the substrate by deposition.
[0061] In the embodiment of the present application, the above S1 refers to the use of chemical vapor deposition to form at least one period of Si on the upper surface of the substrate. 0.72 Ge 0.28 / Si stacked epitaxial growth, wherein one cycle refers to depositing Si on the substrate once 0.72 Ge 0.28 , then, the deposited Si 0.72 Ge 0.28 Si continues to be deposited on the upper surface.
[0062] In an optional embodiment of the present application, the growth of the silicon germanium layer and the silicon layer by chemical vapor deposition can be achieved by a reduced pressure chemical vapor deposition device of model: ASM E2000 plus RPCVD, and the thickness of the silicon germanium layer and the silicon layer in each period is 10 nm.
[0063] S2, sequentially growing a first compound and a second compound on the upper surface of the silicon layer by deposition.
[0064] In the embodiment of the present application, the first compound specifically refers to SiO2, and the second compound specifically refers to SiN.
[0065] In an optional embodiment of the present application, the deposition may also be achieved by chemical vapor deposition.
[0066] After obtaining the silicon germanium layer, the silicon layer, the first compound and the second compound, each deposited layer can be etched based on the preset size of the fishbone-shaped semiconductor device to obtain the trunk of the unetched annular groove.
[0067] In actual application, the etching of each deposited layer based on the preset size of the fishbone-shaped semiconductor device refers to using a C4F6 / CO / O2 / Ar gas system to perform anisotropic etching of SiO2, thereby exposing the stacked silicon germanium layer and silicon layer, and then using an HBr / O2 / He gas system to perform anisotropic etching of the silicon germanium layer and the silicon layer to obtain the trunk.
[0068] In another optional embodiment of the present application, in order to improve the precision of the prepared fishbone-shaped semiconductor device, amorphous silicon (a-Si) may be deposited before depositing the second compound to construct a mandrel required for the sidewall transfer process.
[0069] Specifically, the above S2 includes:
[0070] First, a first compound is grown on the upper surface of the silicon layer by deposition;
[0071] Secondly, growing amorphous silicon on the upper surface of the first compound by deposition to obtain an amorphous silicon layer;
[0072] Then, etching the amorphous silicon layer based on a preset mandrel size to obtain a mandrel layer;
[0073] Finally, a second compound is grown on the surface of the core layer and the first compound by deposition.
[0074] In the embodiment of the present application, the first compound and the second compound are SiO2 and SiN, respectively. The thickness of the SiO2 is 5 nm. After forming the first SiO2 compound layer, 100 nm of amorphous silicon is deposited on the upper surface of the first compound layer to obtain an amorphous silicon layer for preparing the mandrel layer required for the subsequent sidewall transfer process.
[0075] After the amorphous silicon layer is generated, the mandrel layer with a feature size and spacing of 3 μm is prepared by I-line lithography and plasma anisotropic silicon etching.
[0076] After the mandrel layer is obtained, a second compound SiN with a thickness of 50 nm is grown on the upper surface of the mandrel layer and the first compound by using a PECVD method.
[0077] S3, etching the silicon germanium layer, the silicon layer and the first compound deposited on the upper surface of the substrate based on the growth position of the second compound to obtain the trunk.
[0078] In the embodiment of the present application, the above S2 includes:
[0079] First, etching the second compound SiN to form a sidewall formed of the second compound SiN and located on the sidewall of the mandrel layer;
[0080] Specifically, the purpose of etching the second compound SiN is to expose the mandrel layer and the upper surface of the first compound SiO2 while retaining the second compound grown on the sidewall of the mandrel layer, so as to use the second compound retained in the mandrel layer as the sidewall.
[0081] Specifically, etching the second compound SiN to form a sidewall formed of the second compound SiN and located on the sidewall of the mandrel layer includes:
[0082] First, the second compound is anisotropically etched using a CF4 / CHF3 / Ar gas system to form the sidewalls.
[0083] Then, the mandrel layer is selectively etched with tetramethylammonium hydroxide (TMAH) to remove the mandrel layer in contact with the sidewalls, so that only the sidewalls remain on the top layer of the trunk, so as to facilitate the subsequent generation of a trunk without an etched annular groove.
[0084] In an optional embodiment of the present application, the anisotropic etching of the second compound using the CF4 / CHF3 / Ar gas system can be achieved based on a Lam HPT CCP dielectric etcher.
[0085] After removing the mandrel layer, the silicon germanium layer, the silicon layer and the first compound SiO2 deposited on the upper surface of the substrate are etched along the reserved position of the sidewall to obtain a main body without the etched annular groove.
[0086] Specifically, the process of etching the deposits on the upper surface of the substrate along the sidewalls mainly includes:
[0087] First, anisotropically etching the first compound SiO2 using a C4F6 / CO / O2 / Ar gas system to expose the silicon germanium layer and the silicon layer;
[0088] Next, the exposed silicon germanium layer and silicon layer are anisotropically etched using a HBr / O2 / He gas system to obtain the backbone.
[0089] Specifically, anisotropic etching using a C4F6 / CO / O2 / Ar gas system can be achieved using a Lam HPTCCP dielectric etcher, and anisotropic etching using a HBr / O2 / He system can be achieved using a Lam9400DFM ICP etcher.
[0090] S102 , sequentially oxidizing and etching the silicon germanium layer of the trunk to generate a fishbone structure, wherein the fishbone structure includes at least one level of annular groove.
[0091] Specifically, the step of sequentially oxidizing and etching the silicon germanium layer of the trunk to form a fishbone structure means that the silicon germanium layer is oxidized and etched by cyclic operation of conventional ICP plasma self-limiting oxidation and CF-based gas self-limiting etching using quasi-atomic layer etching technology, specifically including:
[0092] First, the silicon germanium layer is subjected to an O2 plasma room temperature oxidation treatment to form an oxide layer on the outer side wall of the silicon germanium layer;
[0093] Secondly, a CF4 / C4F8 self-limiting selective etching method is used to etch the oxide layer on the outer sidewall of the silicon germanium layer, so as to etch a groove on the trunk to form the fishbone structure.
[0094] In order to facilitate the understanding of the above oxidation and etching process, the following Figure 3 The process is described in detail.
[0095] Please refer to Figure 3 , Figure 3 Schematic diagram of the quasi-atomic layer etching scheme based on conventional ICP plasma self-limiting oxidation and CF-based gas self-limiting etching provided in an embodiment of the present application.
[0096] like Figure 3 As shown, Figure 3 It involves the main trunk state 1 before oxidation etching, the main trunk state 2 during oxidation etching, and the main trunk state 3 after oxidation etching.
[0097] Among them, the trunk state 1 includes a substrate, a silicon germanium layer, and a silicon layer. First, when the trunk is in state 1, the trunk is subjected to O2 plasma room temperature oxidation to oxidize the outer wall surface of the silicon germanium layer to generate an oxide layer. O2 plasma room temperature oxidation has the characteristics of self-limitation. In the embodiment of the present application, the process can be 150sccm (Standard Cubic Centimeters per Minute) of O2, 500W excitation RF, and the bias RF power (Bias RF 0w) is not enabled to remove the bombardment of the plasma. At the same time, a certain processing time is set to allow the oxidation to reach a self-limiting saturation state, thereby generating the oxide layer. In the embodiment of the present application, the main component of the oxide layer is SiGe x O y .
[0098] The oxide layer is then isotropically etched using a 200 sccm CF4 / x sccm C4F8 process, 500 W RF excitation, and no bias RF power. In an optional embodiment of the present application, during the etching process, the flow rate of CF4 gas can be fixed while C4F8 gas, which has a heavier polymer content, is introduced to etch the oxide layer to achieve self-limiting etching.
[0099] Afterwards, the above two steps are repeated until the trunk state 3 after oxidation etching is obtained, generating a fishbone structure.
[0100] Further, in order to facilitate understanding of the preparation method of the fishbone-shaped nanosheet semiconductor device provided in the embodiment of the present application, the following is combined with Figure 4 The process is described in detail.
[0101] Please refer to Figure 4 , Figure 4 This is a flow chart of the preparation process of the fishbone-shaped nanosheet semiconductor device provided in the embodiments of the present application.
[0102] like Figure 4 As shown, the preparation process of the fishbone-shaped nanosheet semiconductor device includes:
[0103] (1) Substrate preparation:
[0104] (2) Growth of stacked materials: At least one period of silicon germanium layer SiGe and silicon layer Si is grown by deposition, wherein the thickness of the silicon germanium layer and the silicon layer is 10 nm. After obtaining at least one period of silicon germanium layer and silicon layer, a first compound SiO2 and an amorphous silicon layer (a-Si) are continuously deposited on the upper surface of the silicon layer, wherein the thickness of the first compound is 5 nm and the thickness of the amorphous silicon layer is 100 nm.
[0105] (3) Mandrel patterning: The amorphous silicon layer is subjected to I-line lithography and plasma anisotropic silicon etching to obtain a mandrel layer with a feature size and spacing of 3 μm.
[0106] (4) Sidewall growth: The second compound SiN is deposited on the upper surface of the core shaft layer and the first compound SiO2 by PECVD to provide preparation conditions for the formation of the sidewall, wherein the thickness of the second compound SiN is 50nm.
[0107] (5) Sidewall formation: Anisotropic etching of the second compound SiN is performed using a CF4 / CHF3 / Ar gas system to form sidewalls.
[0108] (6) Mandrel layer etching: Tetramethylammonium hydroxide (TMAH) is used to selectively etch the mandrel layer to remove the mandrel layer and retain the sidewall.
[0109] (7) Etching the backbone: Anisotropic etching of SiO2 is performed using a C4F6 / CO / O2 / Ar gas system to expose the silicon layer and the silicon germanium layer, and then anisotropic etching of the silicon layer and the silicon germanium layer is performed using a HBr / O2 / He gas system to form the backbone.
[0110] (8) Quasi-atomic layer isotropic etching: The backbone silicon germanium layer is oxidized and etched by combining O2 plasma-limited oxidation and CF4 / C4F8 self-limited selective etching to obtain a fishbone-shaped nanosheet semiconductor device with an annular groove. The width of the fishbone structure is 50nm to 60nm, and the depth of the groove is 20nm to 25nm.
[0111] In summary, the present application provides a method of oxidizing and etching the silicon germanium layer to construct a nanosheet channel perpendicular to and parallel to the substrate, so that the fishbone-shaped nanosheet semiconductor device combines the advantages of FinFET and GAANS, effectively alleviating the problem of mismatch in electrical performance between NFET and PFET caused by the electron mobility of the crystal plane of the GAANS device (100) being much higher than the hole mobility in the prior art, thereby improving the driving capability of the semiconductor device.
[0112] While the above description does not provide detailed technical details regarding patterning and etching of each layer, those skilled in the art will appreciate that various technical means can be employed to form layers, regions, and the like in desired shapes. Furthermore, those skilled in the art may devise methods that differ from those described above to form the same structure. Furthermore, while each embodiment has been described separately, this does not mean that the measures in each embodiment cannot be advantageously combined.
[0113] The above describes the embodiments of the present disclosure. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present disclosure. The scope of the present disclosure is defined by the appended claims and their equivalents. Without departing from the scope of the present disclosure, those skilled in the art may make various substitutions and modifications, which are intended to fall within the scope of the present disclosure.
Claims
1. A fishbone-shaped nanosheet semiconductor device, characterized in that: include: a substrate, a fishbone-shaped structure extending from the substrate; The fishbone structure includes a trunk perpendicular to the substrate, the trunk including at least one stacked silicon germanium layer and silicon layer, wherein the silicon layer is above the silicon germanium layer; the trunk includes at least one level of annular groove; the annular groove is generated based on oxidation and etching of the silicon germanium layer.
2. A method for preparing a fishbone-shaped nanosheet semiconductor device, characterized in that: include: Depositing a trunk on a substrate, wherein the trunk is perpendicular to the substrate, and the trunk comprises at least one stacked silicon germanium layer and a silicon layer, wherein the silicon layer is on the silicon germanium layer; The silicon germanium layer of the trunk is oxidized and etched in sequence to generate a fishbone structure, wherein the fishbone structure includes at least one level of annular groove.
3. The method according to claim 2, characterized in that Depositing a trunk on a substrate comprises: Growing at least one period of silicon germanium layer and silicon layer on the upper surface of the substrate by deposition; sequentially growing a first compound and a second compound on the upper surface of the silicon layer by deposition; Based on the growth position of the second compound, the silicon germanium layer, the silicon layer and the first compound deposited on the upper surface of the substrate are etched to obtain the trunk.
4. The method according to claim 3, characterized in that The step of sequentially growing the first compound and the second compound on the upper surface of the silicon layer by deposition comprises: growing a first compound on the upper surface of the silicon layer by deposition; growing amorphous silicon on the upper surface of the first compound by deposition to obtain an amorphous silicon layer; Based on a preset mandrel size, etching the amorphous silicon layer to obtain a mandrel layer; A second compound is grown on the surface of the core shaft layer and the first compound by deposition.
5. The method according to claim 4, characterized in that Based on the growth position of the second compound, etching the silicon germanium layer, the silicon layer, and the first compound deposited on the upper surface of the substrate to obtain the trunk includes: performing an etching process on the second compound to form a sidewall formed by the second compound and located on a sidewall of the mandrel layer; The silicon germanium layer, the silicon layer, and the first compound deposited on the upper surface of the substrate are etched along the sidewalls to obtain the trunk.
6. The method according to claim 5, characterized in that The second compound is SiN; The etching process on the second compound to form a sidewall formed of the second compound and located on the sidewall of the mandrel layer includes: The second compound is anisotropically etched using a CF4 / CHF3 / Ar gas system to generate sidewalls composed of the second compound and located on sidewalls of the mandrel layer.
7. The method according to claim 5, characterized in that The step of etching the silicon germanium layer, the silicon layer, and the first compound deposited on the upper surface of the substrate along the sidewalls to obtain the trunk comprises: Anisotropically etching the first compound using a C4F6 / CO / O2 / Ar gas system to expose the silicon germanium layer and the silicon layer; The exposed silicon germanium layer and silicon layer are anisotropically etched using a HBr / O2 / He system to obtain the backbone.
8. The method according to claim 2, characterized in that The step of sequentially oxidizing and etching the silicon germanium layer of the trunk to form a fishbone structure includes: performing an O2 plasma room temperature oxidation treatment on the silicon germanium layer to form an oxide layer on the outer side wall of the silicon germanium layer; The oxide layer on the outer sidewall of the silicon germanium layer is etched using a CF4 / C4F8 self-limiting selective etching method to etch a groove on the trunk to form the fishbone structure.
9. The method according to claim 4, characterized in that The length of the mandrel layer is 3 μm.
10. The method according to claim 2, characterized in that The thickness of the silicon germanium layer and the silicon layer is 10 nm.