Bidirectional crosstalk suppression driving circuit suitable for wide bandgap power semiconductor device

Abstract

A bidirectional crosstalk suppression driving circuit suitable for a wide bandgap power semiconductor device comprises a push-pull circuit and a crosstalk suppression auxiliary circuit, the push-pull circuit is connected with the crosstalk suppression auxiliary circuit, and the crosstalk suppression auxiliary circuit is connected with a grid electrode and a source electrode of the power semiconductor device. The push-pull circuit is used for generating a driving voltage signal to drive a power semiconductor device. When the power semiconductor device is subjected to positive crosstalk, positive voltage is generated through a negative voltage capacitor in the crosstalk suppression auxiliary circuit, and the influence of negative overvoltage generated on a driving resistor when the positive crosstalk occurs is reduced; when the power semiconductor device is subjected to negative crosstalk, gate equivalent driving impedance is reduced through an RD auxiliary branch in the crosstalk suppression auxiliary circuit, and reverse overvoltage caused by negative crosstalk is reduced. The circuit has compatibility and economical efficiency, and is simple in structure and easy to operate. The method is of great significance in improving the turn-on and turn-off reliability of a power semiconductor device and guaranteeing stable operation of a system.

Description

Technical Field

[0001] The present invention relates to a crosstalk suppression driving circuit for a power converter, in particular to a bidirectional crosstalk suppression driving circuit suitable for a wide bandgap power semiconductor device. Background Art

[0002] Compared with Si-based devices, GaN power devices have made outstanding progress in materials and structures, and are increasingly favored by the market due to their excellent performance such as higher operating frequency, higher blocking voltage and higher operating temperature. In the application of GaN power devices, the switching frequency of power converters can reach several MHz or even tens of MHz, effectively improving the power density. However, compared with traditional Si-based devices, GaN power devices have lower turn-on threshold voltage and smaller gate reverse voltage resistance, which makes them easily affected by higher voltage in applications such as high-power bridge circuits. dv / dt and di / dt The resulting crosstalk voltage spikes threaten to cause device mis-turn-on or gate reverse breakdown. In a traditional bridge circuit, when the upper arm is turned on, positive crosstalk is introduced into the lower arm power device. If the magnitude exceeds the device threshold voltage, it can cause mis-turn-on, leading to a bridge arm short circuit. When the upper arm is turned off, negative crosstalk can occur. Excessive negative voltage can cause reverse breakdown of the lower arm device gate, reducing system reliability. Therefore, suppressing the crosstalk voltage of power devices in the bridge arm circuit is an important research direction for improving the reliability of power electronic converters.

[0003] Current methods for mitigating crosstalk in bridge circuit applications include reducing the gate-source drive loop impedance and employing negative voltage shutdown. While reducing the gate-source drive loop impedance effectively suppresses the voltage drop caused by the Miller current, it adds additional transistors to the drive circuit, increasing circuit power loss. Adopting negative voltage shutdown primarily involves adding an additional negative voltage power supply or voltage divider circuit, using multiple power supplies and switching devices, introducing additional control signals, and increasing circuit design cost and complexity. Summary of the Invention

[0004] To address the above technical issues, the present invention proposes a bidirectional crosstalk suppression drive circuit for wide-bandgap power semiconductor devices. This circuit is designed to suppress crosstalk-induced misconduction and reverse breakdown in power semiconductor devices. The circuit is compatible and economical, with a simple and easy-to-operate structure. This circuit is of great significance for improving the on / off reliability of power semiconductor devices and ensuring stable system operation.

[0005] The technical solution adopted by the present invention is: A bidirectional crosstalk suppression driving circuit suitable for wide bandgap power semiconductor devices, the circuit comprising: A push-pull circuit and a crosstalk suppression auxiliary circuit, wherein the push-pull circuit is connected to the crosstalk suppression auxiliary circuit, and the crosstalk suppression auxiliary circuit is connected to the gate and source of the power semiconductor device.

[0006] The push-pull circuit is used to generate a driving voltage signal to drive a power semiconductor device.

[0007] When the power semiconductor device is subjected to positive crosstalk, the negative voltage capacitor in the crosstalk suppression auxiliary circuit generates a positive voltage, thereby reducing the impact of the negative overvoltage generated on the driving resistor when the positive crosstalk occurs; When a power semiconductor device is subjected to negative crosstalk, the RD (resistor-diode) auxiliary branch in the crosstalk suppression auxiliary circuit is used to reduce the gate equivalent drive impedance and lower the reverse overvoltage caused by the negative crosstalk.

[0008] The push-pull circuit includes a transistor J 1. J 2, among which, the transistor J The base of 1 and the transistor J The bases of transistors 2 are connected to the input of the square wave voltage signal. J 1 collector and power supply V cc connection, transistor J 1's emitter and transistor J 2's emitter is connected and serves as the output of the push-pull circuit; the transistor J The emitter of 2 is connected to the ground terminal.

[0009] The crosstalk suppression auxiliary circuit includes: a resistor R 1 、R 2 、R g2 , negative pressure capacitor C 1 ， diode D 2. Zener diode D 1. D 3. D 4. Field effect transistor S1, emitter follower A1; where: The output ends of the push-pull circuit are connected to the voltage regulator diodes D 1 cathode, negative voltage capacitor C 1 one end; Zener diode D 1's anode is connected to the negative voltage capacitor C 1The other end, Zener diode D 3 anode, resistor R g2 one end; resistance R g2 The other end is connected to the diodeD 2 the cathode, the gate of the power semiconductor device; a zener diode D 3 the cathode connected zener diode D 4 the cathode, the zener diode D 4 the anode connected drain of field effect transistor S1, the resistor R 1 one end; the resistor R 1 the other end connected diode D 2 the anode; the positive input of the emitter follower Al connected resistor R 2 one end, the resistor R 2 the other end connected voltage source V 1 the positive; voltage source V 1 the negative connected to ground; the output of the emitter follower Al connected gate of field effect transistor S1; the negative input of the emitter follower Al connected to its output; the source of field effect transistor S1, the source of the power semiconductor device connected to ground.

[0010] The power semiconductor device is selected to be any of SiC, GaN or MOSFET.

[0011] The power semiconductor device comprises an equivalent capacitance of the device C gd2 , C gs2 , C ds2 ; the capacitance C gd2 one end connected to the gate of the device; the capacitance C gs2 one end connected to the drain of the device; the capacitance C gd2 the other end connected to the source of the device; the capacitance C ds2 the other end connected to the source of the device. C gs2 the other end connected to the source of the device. C ds2 the other end connected to the source of the device.

[0012] A half bridge circuit for controlling a power semiconductor device, the half bridge circuit comprising an upper bridge arm, a lower bridge arm, The upper bridge arm comprises a drive resistor R g1 a parasitic inductance L g1 , Ld1 、 L s1 , parasitic capacitance C gs1 、 C gd1 、 C ds1 As well as driving voltage source DC1 and power semiconductor devices Q 1; The lower bridge arm includes a driving resistor R g2 , parasitic inductance L g2 、 L d2 、 L s2 , parasitic capacitance C gs2 、 C gd2 、 C ds2 And drive voltage source DC2 and power semiconductor devices Q 2; One end of the driving voltage source DC1 is connected to the parasitic inductor L g1 One end of the parasitic inductance L g1 The other end of the drive resistor is connected R g1 One end of the drive resistor R g1 The other end of the parasitic capacitor is connected to C gd1 One end of the parasitic capacitance C gs1 One end of the power semiconductor device Q 1's gate; parasitic capacitance C gd1 The other end of the parasitic inductor is connected to L d1 One end of the parasitic capacitance C ds1 One end of the power semiconductor device Q 1's drain; parasitic capacitance C gs1 The other end of the parasitic inductor is connected to L s1 One end of the power semiconductor device Q 1's source, parasitic capacitance C ds1 the other end; parasitic inductance L s1The other end of the drive voltage source DC1, the parasitic inductance L d2 the other end; One end of the driving voltage source DC2 is connected to the parasitic inductor L g2 One end of the parasitic inductance L g2 The other end of the drive resistor is connected R g2 One end of the drive resistor R g2 The other end of the parasitic capacitor is connected to C gd2 One end of the parasitic capacitance C gs2 One end of the power semiconductor device Q 2 gate; parasitic capacitance C gd2 The other end of the parasitic inductor is connected to L d2 One end of the parasitic capacitance C ds2 One end of the power semiconductor device Q 2's drain; parasitic capacitance C gs2 The other end of the parasitic inductor is connected to L s2 One end of the power semiconductor device Q 2 source, parasitic capacitance C ds2 the other end; parasitic inductance L s2 The other end of the drive voltage source DC2 is connected to the other end, and the two are connected to the ground terminal; Freewheeling inductor L One end of the drive voltage source DC1 is connected to the other end of the freewheeling inductor L The other end of is connected to the other end of the driving voltage source DC2; parasitic inductance L d1 The other end of the DC power supply is connected V dc The positive pole of the drive voltage source DC2 is connected to the DC power supply V dc of the negative electrode.

[0013] Power semiconductor devices in the above bridge arms Q 1 is the active tube, the power semiconductor device of the lower bridge arm Q 2 is a passive tube, and the working sequence of the half-bridge circuit is as follows Figure 3 As shown, the working principle of this circuit will be explained below in combination with the timing and working mode. The specific working process is as follows: Mode T1 t 0- t 1】:As shown in Figure 4 (a), the upper tube Q 1 is in the off state, the lower tube Q 2 is turned on. Diode D 2、 D 4 Reverse cutoff, at this time the negative voltage capacitor in loop N1 C 1Charge, forming a positive voltage on the left and a negative voltage on the right, the capacitor C The voltage final value of 1 is the voltage regulator tube D 1 voltage regulation value V D1 , down tube Q 2 The gate drive voltage is voltage V CC Subtract the forward voltage drop of the diode's negative capacitance and the gate drive resistor R g2 Voltage value on V Rg2 sum; Mode T2 t 1 -t 2】:As shown in Figure 4 (b), this stage is the dead zone length, the upper tube Q 1 and down tube Q 2 are both in the off state. At this stage, the diode D 2 and D 3 Reverse shutdown, diode D 1Forward conduction. Negative voltage capacitor C 1's discharge process speeds up the lower tube Q 2 shut-off speed; Mode T3 t 2- t 3】:As shown in Figure 4 (c), the lower tube Q 2 Keep the shutdown state, the upper tube Q 1Open, down pipe Q 2's drain-source voltage rises rapidly, generating Miller current, which Q 2 equivalent capacitance C gd2 、 C ds2 Charging and driving R g2 Generates a positive voltage on the right and a negative voltage on the left, making Q 2's gate voltage rises to generate positive crosstalk. At this time, the negative voltage capacitor C 1 The voltage is still positive on the right and negative on the left, which can be regarded as offset. R g2The pressure drop across Q 2 to achieve the effect of suppressing forward crosstalk.

[0014] Mode T4 t 3- t 4】:As shown in Figure 4 (d), the lower tube Q 1 Keep off, upper tube Q 2 remains on. At this time, the P-MOSFET is turned on, and the resistor R 2. Diode D 2. Driving resistance R g2 Constitute the discharge circuit N2, negative pressure capacitor C 1 passed R 2. D 2 and R g2 Discharge quickly while suppressing the gate reverse breakdown that may be caused by reverse crosstalk.

[0015] Mode T5 t 4- t 5】:As shown in Figure 4 (e), the lower tube Q 2 Keep off, upper tube Q 1 remains open. Capacitor C 1 continues to discharge to 0V level through loop N2.

[0016] Mode T6 t 5- t 6】:As shown in Figure 4 (f), the lower tube Q 2 Keep off, upper tube Q 1 starts to shut down. At this time, the lower tube Q The drain-source voltage of 2 drops rapidly, and Miller current is generated at the gate. D 2 conduction, D 3, Figure 4 (f) is equivalent to Figure 5 As shown in the circuit, the resistors in loop N3 and loop N4 in the crosstalk suppression auxiliary circuit are R 1 with resistor R g2 Forming a parallel relationship, the lower tube is equivalently reduced Q 2 gate drive resistance, when Miller current flows through the equivalent drive resistance, a negative right and positive left voltage is generated at the gate, resulting in negative crosstalk. At this time, the equivalent drive resistance is smaller than the original drive resistance. R g2 , thus reducing the reverse voltage of the negative crosstalk at the gate, thereby effectively suppressing the negative crosstalk.

[0017] Power semiconductor devices in the lower arm of a half-bridge circuit Q 2Affected by the power semiconductor devices of the upper bridge arm Q1. During forward crosstalk, the passive components of the auxiliary circuit generate a forward voltage at the source, which is equivalent to reducing the forward crosstalk applied to the power semiconductor device. Q 2. The overvoltage at the gate and source will cause the source forward voltage to return to 0V before the negative crosstalk occurs, without affecting the negative crosstalk. In the case of negative crosstalk, the RD auxiliary branch in the crosstalk suppression auxiliary circuit is used to reduce the power semiconductor devices of the lower bridge arm. Q 2 Gate equivalent driving resistance reduces the negative overvoltage generated at the gate due to Miller current.

[0018] The present invention provides a bidirectional crosstalk suppression driving circuit suitable for wide bandgap power semiconductor devices, and the technical effects are as follows: 1) Suppressing bidirectional crosstalk: This suppression circuit uses a negative voltage capacitor to generate a positive voltage at the source, which can effectively suppress positive crosstalk. At the same time, the turn-on of the P-MOSFET accelerates the discharge of the negative voltage capacitor and effectively reduces negative crosstalk. When negative crosstalk occurs, the RD auxiliary branch is used to reduce the equivalent impedance of the driving side gate to reduce the negative crosstalk and ensure the reliability of the semiconductor device in actual working conditions.

[0019] 2) High applicability: The crosstalk suppression drive circuit is suitable for various types of power semiconductor devices, such as MOSFET, GaN, SiC, etc., and has high applicability.

[0020] 3) Cost controllability: Compared with the traditional active negative voltage suppression positive crosstalk, it reduces the device dv / dt and di / dt The method of swing amplitude has the characteristics of simple structure and controllable cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The present invention will be further described below with reference to the accompanying drawings and embodiments: Figure 1 This is a structural diagram of the positive and negative crosstalk suppression circuit proposed in the present invention.

[0022] Figure 2 This is a structural diagram of a half-bridge circuit of a power semiconductor device.

[0023] Figure 3 It is a half-bridge circuit of power semiconductor devices and a P-MOSFET switching timing diagram.

[0024] FIG4 (a) is a circuit schematic diagram of the circuit of the present invention operating in mode T1; FIG4( b ) is a circuit schematic diagram of the circuit of the present invention operating in mode T2; FIG4( c ) is a circuit schematic diagram of the circuit of the present invention operating in mode T3; FIG4( d ) is a circuit schematic diagram of the circuit of the present invention operating in mode T4; FIG4( e ) is a circuit schematic diagram of the circuit of the present invention operating in mode T5; FIG4( f ) is a circuit schematic diagram of the circuit of the present invention operating in mode T6 .

[0025] Figure 5 for Figure 3 Circuit diagram of gate equivalent resistance in mode T6.

[0026] Figure 6 (a) is a traditional double-pulse simulation circuit diagram without the introduction of a crosstalk suppression circuit.

[0027] Figure 6 (b) is a bidirectional crosstalk diagram without a traditional crosstalk suppression circuit.

[0028] FIG7( a ) is a double-pulse simulation circuit diagram of the bidirectional crosstalk suppression circuit introduced in the present invention.

[0029] FIG7( b ) is a diagram showing the auxiliary suppression of bidirectional crosstalk by introducing the crosstalk suppression circuit proposed in the present invention.

[0030] FIG7 (c) is a timing diagram of a half-bridge circuit of a power semiconductor device and a P-MOSFET switch that introduces the bidirectional crosstalk suppression circuit proposed in the present invention. DETAILED DESCRIPTION

[0031] like Figure 1 As shown in the figure, the present invention is a bidirectional crosstalk suppression driving circuit suitable for wide bandgap semiconductor power devices. The implementation circuit of this method includes a push-pull circuit, a crosstalk suppression auxiliary circuit, a power semiconductor device Q 2.

[0032] The functions of each part of the circuit are introduced as follows: Push-pull circuit: used to generate driving voltage signals to drive power semiconductor devices; Crosstalk suppression auxiliary circuit: When the device is subjected to positive crosstalk, the negative voltage capacitor of the crosstalk suppression auxiliary circuit generates a positive voltage at the gate to reduce the impact of positive overvoltage during positive crosstalk. When the device is subjected to negative crosstalk, the RD auxiliary circuit reduces the gate equivalent drive resistance to reduce the reverse overvoltage during negative crosstalk.

[0033] Power semiconductor devices: You can choose different power devices including SiC, GaN and MOSFET; A bidirectional crosstalk suppression drive circuit suitable for wide bandgap semiconductor power devices, common half-bridge arm double pulse circuits such as Figure 2 As shown, L is the freewheeling inductor, V DC It is the power supply of the bridge arm circuit, where the upper bridge arm includes a driving resistor R g1 , parasitic inductanceL g1 、 L d1 、 L s1 , parasitic capacitance C gs1 、 C gd1 、 C ds1 And drive voltage source DC1 and power semiconductor devices Q 1. The lower bridge arm contains a driving resistor R g2 , parasitic inductance L g2 、 L d2 、 L s2 , parasitic capacitance C gs2 、 C gd2 、 C ds2 And drive voltage source DC2 and power semiconductor devices Q 2. Above bridge arm Q 1 is the active tube, lower bridge arm Q 2 is a passive tube, and the working sequence of the half-bridge circuit is as follows Figure 3 As shown, the working principle of this circuit will be explained below in combination with the timing and working mode. The specific working process is as follows: Mode T1 t 0- t 1】:As shown in Figure 4 (a), the upper tube Q 1 is in the off state, the lower tube Q 2 is turned on. Diode D 2、 D 4 Reverse cutoff, at this time the negative voltage capacitor in loop N1 C 1Charge, forming a positive voltage on the left and a negative voltage on the right, the capacitor C The voltage final value of 1 is the voltage regulator tube D 1 voltage regulation value V D1 , down tube Q 2 The gate drive voltage is voltage V CC Subtract the forward voltage drop of the diode's negative capacitance and the gate drive resistor R g2 Voltage value on V Rg2 sum.

[0034] Mode T2 t 1 -t2】:As shown in Figure 4 (b), this stage is the dead zone length, the upper tube Q 1 and down tube Q 2 are both in the off state. At this stage, the diode D 2 and D 3 Reverse shutdown, diode D 1Forward conduction. Negative voltage capacitor C 1's discharge process speeds up the lower tube Q 2 turn-off speed.

[0035] Mode T3 t 2- t 3】:As shown in Figure 4 (c), the lower tube Q 2 Keep the shutdown state, the upper tube Q 1Open, down pipe Q 2's drain-source voltage rises rapidly, generating Miller current, which Q 2 equivalent capacitance C gd2 、 C ds2 Charging and driving R g2 Generates a positive voltage on the right and a negative voltage on the left, making Q 2's gate voltage rises to generate positive crosstalk. At this time, the negative voltage capacitor C 1 The voltage is still positive on the right and negative on the left, which can be regarded as offset. R g2 The pressure drop across Q 2 to achieve the effect of suppressing forward crosstalk.

[0036] Mode T4 t 3- t 4】:As shown in Figure 4 (d), the lower tube Q 1 Keep off, upper tube Q 2 remains on. At this time, the P-MOSFET is turned on, and the resistor R 2. Diode D 2. Driving resistance R g2 Constitute the discharge circuit N2, negative pressure capacitor C 1 passed R 2. D 2 and R g2 Discharge quickly while suppressing the gate reverse breakdown that may be caused by reverse crosstalk.

[0037] Mode T5 t 4- t 5】:As shown in Figure 4 (e), the lower tube Q 2 Keep off, upper tube Q 1 remains open. Capacitor C1 continues to discharge to 0V level through loop N2.

[0038] Mode T6 t 5- t 6】:As shown in Figure 4 (f), the lower tube Q 2 Keep off, upper tube Q 1 starts to shut down. At this time, the lower tube Q The drain-source voltage of 2 drops rapidly, and Miller current is generated at the gate. D 2 conduction, D 3, Figure 4 (f) is equivalent to Figure 5 As shown in the circuit, the resistors in loop N3 and loop N4 in the crosstalk suppression auxiliary circuit are R 1 with resistor R g2 Forming a parallel relationship, the lower tube is equivalently reduced Q 2 gate drive resistance, when Miller current flows through the equivalent drive resistance, a negative right and positive left voltage is generated at the gate, resulting in negative crosstalk. At this time, the equivalent drive resistance is smaller than the original drive resistance. R g2 , thus reducing the reverse voltage of the negative crosstalk at the gate, thereby effectively suppressing the negative crosstalk.

[0039] In the above modes T1-T6, the lower bridge arm switch tube is Figure 2 in Q 1. The lower arm switch tube is Figure 2 in Q 2.

[0040] Example: In this embodiment, in order to verify the suppression effect of this circuit on positive and negative crosstalk, a double pulse test circuit was built based on AD's LTspice simulation platform for verification. The power semiconductor device selected in this embodiment is the GS61008P model of GaNsystem. Under normal operating conditions, the threshold voltage of this device is about 1.7V, and the maximum gate withstand voltage is -10~7V. The drain-source voltage applied in this double pulse experiment is 50V and the load current is 30A. The simulation model parameters of the positive and negative crosstalk suppression circuit proposed in this invention are as follows: resistance R 1 is 5Ω, resistance R 2 is 10KΩ, R g2 9Ω, capacitor C 1 is 7nf, voltage regulator diode D `1 The model is 1N750, the voltage regulator diode D 3 and D The model of 4 is 1N5818, the diode D The model of 2 is 1N5818.

[0041] The simulation results are shown in Figures 6(b) and 7(b). Figure 6(b) shows the dual-pulse waveform of a conventional circuit without crosstalk suppression. As can be seen from Figure 6(b), the positive crosstalk of the lower transistor is 1.85V, and the negative crosstalk is -3.05V. The positive crosstalk exceeds the device's threshold voltage of 1.7V. If the dead time is too short, there is a risk of a short circuit caused by simultaneous conduction of the upper and lower arms. Although the negative crosstalk does not exceed the tolerance value, long-term disconnection under these conditions will seriously affect device reliability.

[0042] Figure 7(b) shows the dual-pulse waveforms using the present invention's positive and negative crosstalk suppression circuit. As can be seen from Figure 7(b), the positive crosstalk of the lower transistor is reduced to 0.01V after compensation by the crosstalk suppression auxiliary circuit, and the negative crosstalk is reduced to -1.86V after reducing the equivalent drive resistance through the RD branch in the crosstalk suppression auxiliary circuit. This effectively reduces positive and negative crosstalk, improves device operational reliability, and also verifies the feasibility and effectiveness of the present invention's positive and negative crosstalk suppression circuit for the bridge arm of a power semiconductor device.

[0043] The present invention provides a bidirectional crosstalk suppression driving circuit suitable for wide bandgap semiconductor power devices, the circuit comprising a push-pull circuit, a crosstalk suppression auxiliary circuit, and a semiconductor power device. The push-pull circuit is connected to the crosstalk suppression auxiliary circuit, which is then connected to the semiconductor device through the crosstalk suppression auxiliary circuit; when the lower bridge arm power device is subjected to positive crosstalk, the present invention generates a left positive and right negative voltage at the source through the negative voltage capacitor of the crosstalk suppression auxiliary circuit to offset the left negative and right positive overvoltage generated on the device gate drive resistor by the positive crosstalk, and accelerates the negative voltage capacitor by introducing a P-MOSFET in the auxiliary circuit. C 1 discharge while simultaneously suppressing negative crosstalk. When subjected to negative crosstalk, the RD auxiliary branch in the crosstalk suppression auxiliary circuit reduces the equivalent drive resistance of the lower transistor gate, thereby reducing the negative overvoltage generated on the gate drive resistor by the Miller current. This circuit offers high applicability and cost control, with a simple and easy-to-use structure. It holds valuable implications for improving device on / off reliability and enhancing the reliability of power electronic converters.

Claims

1. A bidirectional crosstalk suppression driving circuit suitable for wide bandgap power semiconductor devices, characterized in that: The circuit includes: A push-pull circuit and a crosstalk suppression auxiliary circuit, wherein the push-pull circuit is connected to the crosstalk suppression auxiliary circuit, and the crosstalk suppression auxiliary circuit is connected to the gate and source of the power semiconductor device.

2. A bidirectional crosstalk suppression driving circuit suitable for wide bandgap power semiconductor devices according to claim 1, characterized in that: The push-pull circuit is used to generate a driving voltage signal to drive a power semiconductor device.

3. The bidirectional crosstalk suppression driving circuit for wide bandgap power semiconductor devices according to claim 1, characterized in that: When the power semiconductor device is subjected to positive crosstalk, the negative voltage capacitor in the crosstalk suppression auxiliary circuit generates a positive voltage, thereby reducing the impact of the negative overvoltage generated on the driving resistor when the positive crosstalk occurs; When the power semiconductor device is subjected to negative crosstalk, the gate equivalent drive impedance is reduced through the RD auxiliary branch in the crosstalk suppression auxiliary circuit, thereby reducing the reverse overvoltage caused by the negative crosstalk.

4. The bidirectional crosstalk suppression driving circuit for wide bandgap power semiconductor devices according to claim 2, characterized in that: The push-pull circuit includes a transistor J 1. J 2, among which, the transistor J The base of 1 and the transistor J The bases of transistors 2 are connected to the input of the square wave voltage signal. J 1 collector and power supply V cc connection, transistor J 1's emitter and transistor J 2's emitter is connected and serves as the output of the push-pull circuit; the transistor J The emitter of 2 is connected to the ground terminal.

5. The bidirectional crosstalk suppression driving circuit for wide bandgap power semiconductor devices according to claim 3, characterized in that: The crosstalk suppression auxiliary circuit includes: a resistor R 1 、R 2 、R g2 , negative pressure capacitor C 1 ， diode D 2. Zener diode D 1. D 3. D 4. Field effect transistor S1, emitter follower A1; where: The output ends of the push-pull circuit are connected to the voltage regulator diodes D 1 cathode, negative voltage capacitor C 1 one end; Zener diode D 1's anode is connected to the negative voltage capacitor C 1The other end, Zener diode D 3 anode, resistor R g2 one end; resistance R g2 The other end is connected to the diode D 2 cathode, gate of power semiconductor device; Zener diode D 3. The cathode of the Zener diode is connected to D 4 cathode, Zener diode D The anode of 4 is connected to the drain of field effect tube S1, the resistor R One end of 1; resistance R The other end of 1 is connected to the diode D 2 anode; Connect a resistor to the positive input of emitter follower A1 R One end of 2, resistor R The other end of 2 is connected to a voltage source V Positive terminal of 1; voltage source V The negative pole of 1 is connected to the ground terminal; The output of emitter follower A1 is connected to the gate of field effect transistor S1; The negative input terminal of emitter follower A1 is connected to its output terminal; The source of the field effect transistor S1 and the source of the power semiconductor device are commonly connected to the ground terminal.

6. The bidirectional crosstalk suppression driving circuit for wide bandgap power semiconductor devices according to claim 1, characterized in that: The power semiconductor device is any one of SiC, GaN or MOSFET.

7. A bidirectional crosstalk suppression driving circuit suitable for wide bandgap power semiconductor devices according to claim 6, characterized in that: The power semiconductor device includes an equivalent capacitance of the device C gd2 、 C gs2 、 C ds2 ;capacitance C gd2 One end of the capacitor C gs2 One end of the capacitor is connected to the gate of the device; C gd2 The other end of the capacitor C ds2 One end of each is connected to the drain of the device, and the capacitor C gs2 The other end of the capacitor C ds2 The other ends of the pins are connected to the source of the device.

8. A half-bridge circuit for controlling a power semiconductor device, characterized in that: The half-bridge circuit includes an upper bridge arm and a lower bridge arm. The upper bridge arm includes a driving resistor R g1 , parasitic inductance L g1 、 L d1 、 L s1 , parasitic capacitance C gs1 、 C gd1 、 C ds1 As well as the driving voltage source DC1 and power semiconductor devices Q 1; The lower bridge arm includes a driving resistor R g2 , parasitic inductance L g2 、 L d2 、 L s2 , parasitic capacitance C gs2 、 C gd2 、 C ds2 And drive voltage source DC2 and power semiconductor devices Q 2; One end of the driving voltage source DC1 is connected to the parasitic inductor L g1 One end of the parasitic inductance L g1 The other end of the drive resistor is connected R g1 One end of the drive resistor R g1 The other end of the parasitic capacitor is connected to C gd1 One end of the parasitic capacitance C gs1 One end of the power semiconductor device Q 1's gate; parasitic capacitance C gd1 The other end of the parasitic inductor is connected to L d1 One end of the parasitic capacitance C ds1 One end of the power semiconductor device Q 1's drain; parasitic capacitance C gs1 The other end of the parasitic inductor is connected to L s1 One end of the power semiconductor device Q 1's source, parasitic capacitance C ds1 the other end; parasitic inductance L s1 The other end of the drive voltage source DC1, the parasitic inductance L d2 the other end; One end of the driving voltage source DC2 is connected to the parasitic inductor L g2 One end of the parasitic inductance L g2 The other end of the drive resistor is connected R g2 One end of the drive resistor R g2 The other end of the parasitic capacitor is connected to C gd2 One end of the parasitic capacitance C gs2 One end of the power semiconductor device Q 2 gate; parasitic capacitance C gd2 The other end of the parasitic inductor is connected to L d2 One end of the parasitic capacitance C ds2 One end of the power semiconductor device Q 2's drain; parasitic capacitance C gs2 The other end of the parasitic inductor is connected to L s2 One end of the power semiconductor device Q 2 source, parasitic capacitance C ds2 the other end; parasitic inductance L s2 The other end of the drive voltage source DC2 is connected to the other end, and the two are connected to the ground terminal; Freewheeling inductor L One end of the drive voltage source DC1 is connected to the other end of the freewheeling inductor L The other end of is connected to the other end of the driving voltage source DC2; parasitic inductance L d1 The other end of the DC power supply is connected V dc The positive pole of the drive voltage source DC2 is connected to the DC power supply V dc of the negative electrode.

9. A half-bridge circuit for controlling a power semiconductor device according to claim 8, characterized in that: Power semiconductor devices in the above bridge arms Q 1 is the active tube, the power semiconductor device of the lower bridge arm Q 2 is a passive tube, and the specific working process of the half-bridge circuit is as follows: Mode T1: Top tube Q 1 is in the off state, the lower tube Q 2 open; diode D 2、 D 4 reverse cutoff, at this time the negative voltage capacitor in loop N1 C 1Charge, forming a positive voltage on the left and a negative voltage on the right, the capacitor C The voltage final value of 1 is the voltage regulator tube D 1 voltage regulation value V D1 , down tube Q 2 The gate drive voltage is voltage V CC Subtract the forward voltage drop of the diode negative capacitor and the gate drive resistor R g2 Voltage value on V Rg2 sum; Mode T2: This stage is the dead zone length, upper tube Q 1 and down tube Q 2 are both in the off state; at this stage the diode D 2 and D 3 Reverse shutdown, diode D 1Forward conduction; negative voltage capacitor C 1's discharge process speeds up the lower tube Q 2 shut-off speed; Mode T3: Tube Q 2 Keep the shutdown state, the upper tube Q 1Open, down pipe Q 2's drain-source voltage rises rapidly, generating Miller current, which Q 2 equivalent capacitance C gd2 、 C ds2 Charging and driving R g2 Generates a positive voltage on the right and a negative voltage on the left, making Q 2's gate voltage rises to produce positive crosstalk; at this time, the negative voltage capacitor C 1 The voltage is still positive on the right and negative on the left, which can be regarded as offset. R g2 The pressure drop across Q The gate voltage of 2 achieves the effect of suppressing forward crosstalk; Mode T4: Down tube Q 1 Keep off, upper tube Q 2 remains on; at this time, the P-MOSFET is turned on, and the resistor R 2. Diode D 2. Driving resistance R g2 Constitute the discharge circuit N2, negative pressure capacitor C 1 passed R 2. D 2 and R g2 Rapid discharge while suppressing gate reverse breakdown that may be caused by reverse crosstalk; Mode T5: Down tube Q 2 Keep off, upper tube Q 1Keep open; capacitor C 1. Continuously discharge to 0V level through loop N2; Mode T6: Down tube Q 2 Keep off, upper tube Q 1 starts to shut down; at this time, the lower tube Q The drain-source voltage of 2 drops rapidly, and Miller current is generated at the gate. D 2 conduction, D 3 is cut off, and the resistors in loop N3 and loop N4 in the crosstalk suppression auxiliary circuit are R 1 and resistor R g2 Forming a parallel relationship, the lower tube is equivalently reduced Q 2 gate drive resistance, when Miller current flows through the equivalent drive resistance, a negative right and positive left voltage is generated at the gate, resulting in negative crosstalk. At this time, the equivalent drive resistance is smaller than the original drive resistance. R g2 , thus reducing the reverse voltage of the negative crosstalk at the gate, thereby effectively suppressing the negative crosstalk.

10. A method for controlling a half-bridge circuit of a power semiconductor device using a bidirectional crosstalk suppression driving circuit according to any one of claims 1 to 7, characterized in that: Power semiconductor devices in the lower arm of a half-bridge circuit Q 2Affected by the power semiconductor devices of the upper bridge arm Q 1. During forward crosstalk, the passive components of the auxiliary circuit generate a forward voltage at the source, which is equivalent to reducing the forward crosstalk applied to the power semiconductor device. Q 2. The overvoltage at the gate and source will cause the source forward voltage to return to 0V before the negative crosstalk occurs, without affecting the negative crosstalk. In the case of negative crosstalk, the RD auxiliary branch in the crosstalk suppression auxiliary circuit is used to reduce the power semiconductor devices of the lower bridge arm. Q 2 Gate equivalent driving resistance reduces the negative overvoltage generated at the gate due to Miller current.

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