Real-time stability test platform and method for data acquisition of power distribution control chip

Abstract

The invention provides a real-time stability test platform and method for data acquisition of a power distribution control chip. The real-time stability test platform comprises a test power grid, an acquisition system, a to-be-tested control chip, a high-low temperature alternating box, an upper computer and a clock module, the upper computer is used for storing a plurality of test programs, controlling the high and low temperature alternating box and the test power grid to obtain different working conditions, calling the corresponding test programs according to the different working conditions, sending out corresponding control instructions, and performing stability analysis on the control chip to be tested according to the first test data and the second test data; and obtaining a stability test result. The problem that in the prior art, a single parameter testing method is difficult to comprehensively evaluate the stability of a control chip in an actual complex environment in real time is solved; according to the invention, the stability of the control chip is efficiently tested in real time, and the problems of difficult simulation of complex working conditions and multi-parameter coupling influence can be solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor testing, and particularly relates to a real-time stability test platform and method for data acquisition of a power distribution control chip. BACKGROUND

[0002] In order to improve the intelligent level of power dispatching, an automatic control system for electric power gradually becomes a core technology of a modern power grid, and an automatic control chip is a core device of the automatic control system for electric power. The automatic control chip is used for key tasks of real-time data processing, intelligent algorithm execution and accurate control instruction generation. Therefore, how to guarantee stable and reliable performance of the automatic control chip becomes a technology to be broken through, and especially, there is still a technical obstacle in stability testing of the control chip.

[0003] At present, the existing technology usually tests the stability of the automatic control chip by using a single parameter test method. However, in the operation process of the power system, the power system is often affected by various dynamic load changes and transient fault impacts, and complex and difficult-to-reproduce actual working conditions are generated. Under the mutual interweaving and interaction of multiple physical field factors, the single parameter test method causes a certain deviation between the test result and the actual situation. Therefore, the single parameter test method of the existing technology has a problem that it is difficult to evaluate the stability of the control chip in the actual complex environment in real time and comprehensively. SUMMARY

[0004] In order to solve the above problems, the present application provides a real-time stability test platform and method for data acquisition of a power distribution control chip, which realizes real-time and efficient stability testing of the control chip and can solve the problems of complex working condition simulation difficulty and multi-parameter coupling influence.

[0005] To achieve the above object, the embodiment of the present application provides a real-time stability test platform for data acquisition of a power distribution control chip, comprising: a test power grid, an acquisition system, a control chip to be tested, a high-low temperature alternating box, a host computer and a clock module; the control chip to be tested is placed in the high-low temperature alternating box; an output end of the control chip to be tested is electrically connected to the host computer; the control chip to be tested is electrically connected to the test power grid; the high-low temperature alternating box is electrically connected to the host computer; the acquisition system is electrically connected to the test power grid; an output end of the acquisition system is electrically connected to the host computer; the test power grid is electrically connected to the host computer; the clock module is electrically connected to the test power grid; the clock module is electrically connected to the acquisition system; the clock module is electrically connected to the control chip to be tested; the clock module is electrically connected to the high-low temperature alternating box; the clock module is electrically connected to the host computer; the high-low temperature alternating box is used for adjusting temperature; the test power grid is used for storing signal waveforms of several different voltage drop signals, and outputting a target voltage drop signal according to a control instruction sent by the host computer; the control chip to be tested is used for acquiring first test data according to the target voltage drop signal, and sending the first test data to the host computer; the acquisition system is used for acquiring second test data according to the target voltage drop signal, and sending the second test data to the host computer; the clock module is used for synchronizing the test power grid, the acquisition system, the control chip to be tested and the high-low temperature alternating box according to a clock synchronization control instruction sent by the host computer; the host computer is used for storing several test programs, controlling the high-low temperature alternating box and the test power grid to obtain different working conditions, calling corresponding test programs according to the different working conditions and sending corresponding control instructions, and analyzing the stability of the control chip to be tested according to the first test data and the second test data, to obtain a stability test result.

[0006] The embodiment of the present application provides a real-time stability test platform for data acquisition of a power distribution control chip, the high-low temperature alternating box is used for simulating temperature changes in actual complex environments, can simulate complex operating conditions, the test power grid provides a plurality of voltage drop signals, simulates power grid fluctuation conditions, and the synchronization function of the clock module ensures real-time coordination of the test power grid, the acquisition system, the control chip to be tested and the high-low temperature alternating box, realizes time sequence consistency of data acquisition, the control chip to be tested and the acquisition system respectively acquire first test data and second test data, provide double-dimensional data input under the influence of multi-parameter coupling, the host computer calls the stored test programs, sends control instructions, and analyzes the first test data and the second test data in real time based on the synchronous data, comprehensively evaluates the stability of the chip in the multi-parameter coupling environment such as voltage and temperature, thereby realizes efficient and real-time stability test, effectively copes with the challenges of complex conditions and multi-parameter influence, and realizes real-time and efficient stability test of the control chip.

[0007] Further, the acquisition system is used to acquire second test data according to the target voltage drop signal, and includes a signal preprocessing unit, a first axis coordinate construction unit, a first phase acquisition unit, a second phase acquisition unit, a second axis coordinate construction unit, and a data acquisition unit. The signal preprocessing unit is used to filter and preprocess the target voltage drop signal according to a preset filter to obtain an interference-free target voltage drop signal. The first axis coordinate construction unit is used to construct a first axis coordinate according to the interference-free target voltage drop signal. The first phase acquisition unit is used to obtain a first phase according to the first axis coordinate. The second phase acquisition unit is used to dynamically adjust a preset phase-locked loop according to the first phase to obtain a second phase. The second axis coordinate construction unit is used to construct a second axis coordinate according to the second phase. The data acquisition unit is used to obtain second test data according to the second axis coordinate, wherein the second test data includes a drop voltage and a jump phase.

[0008] In the above scheme, the filtering processing of the signal preprocessing unit eliminates the interference in the target voltage drop signal, ensures the accuracy of the data source, the first axis coordinate construction unit converts the signal into a calculable coordinate, provides a basis for phase analysis, the first phase acquisition unit extracts initial phase information, the second phase acquisition unit dynamically adjusts the phase-locked loop to correct the phase drift in real time, solves the problem of phase jump capture under complex working conditions, and the second axis coordinate construction unit reconstructs accurate coordinates based on the corrected phase, so that the data acquisition unit finally obtains second test data containing a drop voltage and a jump phase. Therefore, in the power grid fluctuation and temperature alternating coupling environment, high-precision voltage and phase double-dimensional dynamic parameters are provided for the upper computer, which directly supports the real-time and efficient stability test of the control chip under the influence of multi-parameter coupling.

[0009] Further, the first axis coordinate construction unit is used to construct a first axis coordinate according to the interference-free target voltage drop signal, and includes a first voltage acquisition subunit, a second voltage acquisition subunit, and a first axis coordinate acquisition subunit. The first voltage acquisition subunit is used to obtain an α-axis voltage according to the interference-free target voltage drop signal. The second voltage acquisition subunit is used to obtain a β-axis voltage through preset central difference calculation according to the α-axis voltage and a preset sampling interval. The first axis coordinate acquisition subunit is used to obtain the first axis coordinate according to the α-axis voltage and the β-axis voltage.

[0010] In the above scheme, the first voltage acquisition subunit directly extracts the alpha-axis voltage to represent the instantaneous voltage value, the second voltage acquisition subunit dynamically calculates the beta-axis voltage by using a preset center difference algorithm combined with a preset sampling interval, the beta-axis voltage represents the voltage change rate, and the dual-dimension representation of the voltage amplitude and the change trend is formed, the first-axis coordinate acquisition subunit integrates the alpha-axis voltage and the beta-axis voltage to construct the first-axis coordinate, and a two-dimensional data basis containing the voltage amplitude dynamic characteristic and the change rate is provided for subsequent phase analysis, thereby, under the condition of grid drop and temperature alternation coupling, the representation dimension of the voltage parameter is significantly enhanced, and the chip directly supports the stability test of the control chip in a complex dynamic environment in real time and efficiently.

[0011] Further, the second phase acquisition unit is configured to dynamically adjust the preset phase-locked loop according to the first phase to obtain a second phase, and includes a frequency correction amount acquisition subunit and a phase acquisition subunit; the frequency correction amount acquisition subunit is configured to construct an integral frequency adaptive term according to the first phase and the preset phase-locked loop to obtain a frequency correction amount; and the phase acquisition subunit is configured to dynamically adjust the preset phase-locked loop by using the frequency correction amount to obtain the second phase.

[0012] In the above scheme, the frequency correction amount acquisition subunit constructs the integral frequency adaptive term based on the first phase and the phase-locked loop to dynamically generate the frequency correction amount, and compensates the phase drift caused by the grid fluctuation and the temperature alternation in real time, and the phase acquisition subunit dynamically adjusts the phase-locked loop parameter by using the correction amount, so that the output second phase accurately tracks the real phase change in the voltage jump process, thereby significantly improving the real-time performance and anti-interference ability of the phase parameter under complex conditions, providing high-precision dynamic phase data support for chip stability evaluation, and further realizing the stability test of the control chip in real time and efficiently.

[0013] Further, the second-axis coordinate construction unit is configured to construct a second-axis coordinate according to the second phase, and includes an initial coordinate acquisition subunit and a second-axis coordinate acquisition subunit; the initial coordinate acquisition subunit is configured to obtain an initial conversion-axis coordinate according to a preset transformation algorithm, the first-axis coordinate and the second phase; and the second-axis coordinate acquisition subunit is configured to filter the initial conversion-axis coordinate by using a preset filter to obtain the second-axis coordinate.

[0014] In this solution, the initial coordinate acquisition subunit, combined with a preset transformation algorithm, spatially transforms the precisely corrected second phase with the first-axis coordinates, which include voltage amplitude and rate of change. This creates initial transformed axis coordinates that integrate both voltage dynamics and phase information. The second-axis coordinate acquisition subunit then uses a preset filter to eliminate high-frequency interference, ultimately outputting clean second-axis coordinates. This allows for direct generation of interference-resistant multidimensional coordinate data under coupled conditions of grid sag and temperature perturbations, providing key parameter support for chip stability assessment, reflecting both voltage transients and phase jumps. This enables real-time and efficient stability testing of control chips.

[0015] Furthermore, the host computer is used to store several test programs, call the corresponding test programs and issue corresponding control instructions according to different working conditions, and perform stability analysis on the control chip to be tested according to the first test data and the second test data to obtain stability test results, including: a test program acquisition unit, a control instruction acquisition unit, a test data acquisition unit and a stability analysis unit; the test program acquisition unit is used to control the high and low temperature alternating box and the test power grid to obtain the current test conditions, and call the test program that meets the current test conditions, wherein the test programs include: a step voltage drop interference test program, an electromagnetic interference test program, a comprehensive dynamic response and electromagnetic interference coupling test program, a temperature-voltage coupling test program and a long-term aging test program; the control instruction acquisition unit is used to obtain the corresponding control instruction according to the test program and send it to the corresponding device; the test data acquisition unit is used to execute the control instruction through each device, and synchronously record the first test data feedback from the control chip to be tested and the second test data feedback from the acquisition system; the stability analysis unit is used to calculate the output amplitude dynamic error and the output phase error according to the first test data and the second test data, and perform stability analysis on the control chip to be tested according to the output amplitude dynamic error and the output phase error to obtain stability test results.

[0016] In the above scheme, the test program acquisition unit calls five types of test programs such as step voltage drop and electromagnetic interference to accurately simulate actual complex working conditions. The control instruction acquisition unit converts the program into equipment control instructions to realize multi-stress coupling loading of the high and low temperature alternating box and the test power grid. The test data acquisition unit synchronously records the first test data of the chip to be tested and the second test data of the acquisition system to form a dual-source data comparison. The stability analysis unit calculates the output amplitude dynamic error and output phase error, and quantifies the dynamic response performance and anti-interference ability of the chip under complex working conditions in two dimensions, and finally completes a comprehensive evaluation of the chip stability in a multi-parameter coupling environment, thereby realizing real-time and efficient stability testing of the control chip.

[0017] Further, the stability analysis unit is used for calculating the output amplitude dynamic error and the output phase error according to the first test data and the second test data, and comprises an actual data acquisition subunit, a drop data acquisition subunit, a first error calculation subunit and a second error calculation subunit; the actual data acquisition subunit is used for obtaining actual voltage and actual phase according to the first test data output by the control chip to be tested; the drop data acquisition subunit is used for obtaining drop voltage and jump phase according to the second test data output by the acquisition system; the first error calculation subunit is used for calculating the output amplitude dynamic error according to the actual voltage and the drop voltage; and the second error calculation subunit is used for calculating the output phase error according to the actual phase and the jump phase.

[0018] In the above scheme, the actual data acquisition subunit extracts the actual voltage and phase output by the chip to be tested, the drop data acquisition subunit synchronously acquires the original drop voltage and jump phase recorded by the acquisition system, the first error calculation subunit compares the actual voltage with the drop voltage to calculate the amplitude dynamic error, quantifies the time domain tracking capability of the chip when the voltage suddenly changes, and the second error calculation subunit compares the actual phase with the jump phase to calculate the phase error, quantifies the frequency domain anti-interference performance of the chip when the phase jumps. Therefore, the coupling evaluation index of voltage stability and phase stability is directly generated under complex working conditions, the limitation of single parameter evaluation is broken through, multi-dimensional stability precise analysis is realized, and then real-time and efficient stability test of the control chip is realized.

[0019] The embodiment of the present application further provides a real-time stability test method for data acquisition of a power distribution control chip, comprising: controlling a high-low temperature alternating box and a test power grid to obtain different working conditions; calling a corresponding test program according to the different working conditions and issuing a corresponding control instruction; controlling the test power grid to output a target voltage drop signal through the control instruction; obtaining first test data output by a control chip to be tested and second test data output by an acquisition system according to the target voltage drop signal; and performing stability analysis on the control chip to be tested according to the first test data and the second test data to obtain a stability test result.

[0020] The embodiment of the application provides a real-time stability test method for data acquisition of a power distribution control chip, a high-low temperature alternating box is arranged to simulate temperature changes in actual complex environments, complex operation conditions can be simulated, a power grid provides a plurality of voltage drop signals, a fluctuation working condition of the power grid is simulated, a first test data and a second test data are collected by a to-be-tested control chip and a collection system respectively, two-dimensional data inputs under the influence of multiple parameters are provided, a host computer calls a stored test program, issues a control instruction, and based on synchronous data, the first test data and the second test data are analyzed in real time, the stability of the chip in a multi-parameter coupling environment such as voltage and temperature is comprehensively evaluated, thereby realizing efficient and real-time stability test, effectively dealing with the challenges of complex working conditions and multiple parameter influences, and realizing real-time and efficient stability test of the control chip.

[0021] Further, according to the target voltage drop signal, the first test data and the second test data are obtained, including: inputting the target voltage drop signal to the to-be-tested control chip to obtain the first test data output by the to-be-tested control chip. The target voltage drop signal is input to the collection system, the target voltage drop signal is preprocessed by filtering according to the preset filter to obtain the interference-free target voltage drop signal; the first axis coordinate is constructed according to the interference-free target voltage drop signal; the first phase is obtained according to the first axis coordinate; the preset phase-locked loop is dynamically adjusted according to the first phase to obtain the second phase; the second axis coordinate is constructed according to the second phase; and the second test data is obtained according to the second axis coordinate.

[0022] In the above scheme, the target voltage drop signal is input to the to-be-tested control chip to obtain the first test data output by the to-be-tested control chip, the target voltage drop signal is input to the collection system, the interference in the target voltage drop signal is eliminated by filtering processing to ensure the accuracy of the data source, then the signal is converted into a calculable coordinate to provide a basis for phase analysis, and then the initial phase information is extracted, the phase drift is corrected in real time by dynamically adjusting the phase-locked loop, the problem of phase jump capture under complex working conditions is solved, the accurate coordinate is reconstructed based on the corrected phase, and the second test data containing the drop voltage and the jump phase is finally obtained by the data collection unit. Thus, in the coupling environment of power grid fluctuation and temperature alternation, high-precision voltage and phase two-dimensional dynamic parameters are provided for the host computer, which directly supports real-time and efficient stability test of the control chip under the influence of multiple parameter coupling.

[0023] Further, the stability of the to-be-tested control chip is analyzed according to the first test data and the second test data to obtain a stability test result, including: according to the first test data and the second test data, the output amplitude dynamic error and the output phase error are calculated; and the stability of the to-be-tested control chip is analyzed according to the output amplitude dynamic error and the output phase error to obtain the stability test result.

[0024] In the above scheme, the first test data of the to-be-tested chip and the second test data of the acquisition system are recorded synchronously to form double-source data comparison, the stability analysis unit calculates the output amplitude dynamic error and the output phase error, the dynamic response performance and the anti-interference ability of the chip under complex working conditions are quantified in two dimensions, the comprehensive evaluation of the stability of the chip under the multi-parameter coupling environment is finally completed, and the stability test of the control chip is realized in real time and efficiently. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 A module structure schematic diagram of a real-time stability test platform for data acquisition of a power distribution control chip is provided for an embodiment of the application.

[0026] Figure 2 A module structure schematic diagram of an acquisition system of a real-time stability test platform for data acquisition of a power distribution control chip is provided for an embodiment of the application.

[0027] Figure 3 A single-phase voltage drop calculation flowchart of a real-time stability test platform for data acquisition of a power distribution control chip is provided for an embodiment of the application.

[0028] Figure 4 A module structure schematic diagram of a first-axis coordinate construction unit of a real-time stability test platform for data acquisition of a power distribution control chip is provided for an embodiment of the application.

[0029] Figure 5 A module structure schematic diagram of a second-phase acquisition unit of a real-time stability test platform for data acquisition of a power distribution control chip is provided for an embodiment of the application.

[0030] Figure 6 A module structure schematic diagram of a second-axis coordinate construction unit of a real-time stability test platform for data acquisition of a power distribution control chip is provided for an embodiment of the application.

[0031] Figure 7 A module structure schematic diagram of a host computer of a real-time stability test platform for data acquisition of a power distribution control chip is provided for an embodiment of the application.

[0032] Figure 8 A module structure schematic diagram of a stability analysis unit of a real-time stability test platform for data acquisition of a power distribution control chip is provided for an embodiment of the application.

[0033] Figure 9 A step flowchart of a real-time stability test method for data acquisition of a power distribution control chip is provided for an embodiment of the application. DETAILED DESCRIPTION

[0034] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0035] Example 1

[0036] See also Figure 1 , Figure 1 The module structure diagram of a real-time stability test platform for data acquisition of a power distribution control chip provided by an embodiment of the present invention is shown in FIG. Figure 1 As shown, the embodiment of the present invention proposes a real-time stability test platform for data acquisition of a power distribution control chip, comprising: a test grid 101, an acquisition system 102, a control chip to be tested 103, a high and low temperature alternating box 104, a host computer 105 and a clock module 106; the control chip to be tested 103 is placed inside the high and low temperature alternating box 104; the output end of the control chip to be tested 103 is electrically connected to the host computer 105; the control chip to be tested 103 is electrically connected to the test grid 101; the high and low temperature alternating box 104 is electrically connected to the host computer 105 is electrically connected; the acquisition system 102 is electrically connected to the test grid 101; the output end of the acquisition system 102 is electrically connected to the host computer 105; the test grid 101 is electrically connected to the host computer 105; the clock module 106 is electrically connected to the test grid 101; the clock module 106 is electrically connected to the acquisition system 102; the clock module 106 is electrically connected to the control chip to be tested 103; the clock module 106 is electrically connected to the high and low temperature alternating box 104; the clock module 106 is electrically connected to the host computer 105; The high and low temperature alternating box 104 is used to adjust the temperature; the test grid 101 is used to store signal waveforms of several different drop voltages, and output a target voltage drop signal according to the control instruction sent by the host computer 105; the control chip to be tested 103 is used to collect first test data according to the target voltage drop signal, and send the first test data to the host computer 105; the acquisition system 102 is used to collect second test data according to the target voltage drop signal, and send the second test data to the host computer 105; the clock module 106 is used to synchronize the clocks of the test grid 101, the acquisition system 102, the control chip to be tested 103 and the high and low temperature alternating box 104 according to the clock synchronization control instruction issued by the host computer 105; the host computer 105 is used to store several test programs, control the high and low temperature alternating box 104 and the test grid 101 to obtain different working conditions, call corresponding test programs according to different working conditions and issue corresponding control instructions, and perform stability analysis on the control chip to be tested 103 according to the first test data and the second test data to obtain stability test results.

[0037] In a specific embodiment, the to-be-tested control chip 103 is placed in the high-low temperature alternating box 104, the temperature variation range in the high-low temperature alternating box 104 can be set to -40℃-125℃, the precision is ±1℃, the output end of the to-be-tested control chip 103 is electrically connected with the upper computer 105, the to-be-tested control chip 103 is electrically connected with the test power grid 101, the high-low temperature alternating box 104 is electrically connected with the upper computer 105, the output end of the acquisition system 102 is electrically connected with the upper computer 105, the test power grid 101 is electrically connected with the upper computer 105, the test power grid 101 stores signal waveforms of different drop voltages; the acquisition system 102 is electrically connected with the test power grid 101; the acquisition system 102 is used for collecting data together with the to-be-tested control chip 103, and the stability of the control chip is analyzed through the collected data; the clock module 106 adopts IEEE 1588 precision clock in this embodiment, the IEEE 1588 precision clock is electrically connected with the test power grid 101, the to-be-tested control chip 103, the acquisition system 102, the high-low temperature alternating box 104 and the upper computer 105, and is used for synchronizing time sequence to ensure that each link can be performed simultaneously; the upper computer 105 stores test programs of voltage drop interference test, temperature interference test and electromagnetic interference test, in this embodiment, the essence of voltage drop is that the amplitude rapidly decreases, therefore, the differential method can amplify the characteristics of sudden change of signal, so as to quickly capture the change of drop. Therefore, the acquisition system 102 uses a voltage drop detection method based on differential method αβ transformation, using differential method αβ transformation can calculate virtual β axis components through independent differential channels for each phase, wherein, single-phase detection needs three-phase signals for calculation, the calculation amount is reduced compared with traditional method, multi-phase detection can perform αβ transformation on each phase respectively through hardware parallel calculation, so as to improve the calculation speed. Finally, the upper computer 105 controls the high-low temperature alternating box 104 to adjust temperature variation and controls the test power grid 101 to output different signal waveforms to complete simulation of different complex working conditions, finally, the test results of the acquisition system 102 and the to-be-tested control chip 103 under different complex working conditions are sent to the upper computer 105 for stability analysis, and the stability test result is obtained, wherein, the test result output by the to-be-tested control chip 103 is represented as first test data, and the test result output by the acquisition system 102 is represented as second test data.

[0038] The embodiment of the application provides a real-time stability test platform for data acquisition of a power distribution control chip, a high-low temperature alternating box 104 is arranged to simulate temperature change in an actual complex environment, complex operation conditions can be simulated, the test power grid 101 provides a plurality of voltage drop signals, a fluctuation working condition of a power grid is simulated, the real-time coordination of the test power grid 101, the acquisition system 102, the control chip 103 to be tested and the high-low temperature alternating box 104 is ensured by the synchronization function of the clock module 106, the timing consistency of data acquisition is realized, the control chip 103 to be tested and the acquisition system 102 acquire first test data and second test data respectively, double-dimensional data input under the influence of multiple parameters is provided, the host computer 105 calls a stored test program, issues a control instruction, and analyzes the first test data and the second test data in real time based on the synchronization data, the stability of the chip in a voltage, temperature and multiple parameter coupling environment is comprehensively evaluated, so that efficient and real-time stability test is realized, the challenge of complex working conditions and multiple parameter influence is effectively coped with, and real-time and efficient stability test is realized on the control chip.

[0039] A preferred mode, see Figure 2 , Figure 2 A module structure schematic diagram of an acquisition system of a real-time stability test platform for data acquisition of a power distribution control chip provided by an embodiment of the application; as shown in Figure 2 The acquisition system 102 is used for acquiring second test data according to a target voltage drop signal and includes a signal preprocessing unit 201, a first axis coordinate construction unit 202, a first phase acquisition unit 203, a second phase acquisition unit 204, a second axis coordinate construction unit 205 and a data acquisition unit 206; the signal preprocessing unit 201 is used for filtering and preprocessing the target voltage drop signal according to a preset filter to obtain an interference-free target voltage drop signal; the first axis coordinate construction unit 202 is used for constructing a first axis coordinate according to the interference-free target voltage drop signal; the first phase acquisition unit 203 is used for obtaining a first phase according to the first axis coordinate; the second phase acquisition unit 204 is used for dynamically adjusting a preset phase-locked loop according to the first phase to obtain a second phase; the second axis coordinate construction unit 205 is used for constructing a second axis coordinate according to the second phase; and the data acquisition unit 206 is used for obtaining the second test data according to the second axis coordinate, wherein the second test data includes a drop voltage and a jump phase.

[0040] In the above preferred scheme, see Figure 3 , Figure 3 A single-phase voltage drop calculation flowchart of a real-time stability test platform for data acquisition of a power distribution control chip provided by an embodiment of the application; as shown in Figure 3 In the embodiment, taking single-phase voltage drop detection as an example, the acquisition system 102 collects a single-phase voltage signal U a(t), to ensure high-precision detection, the sampling frequency is set to be consistent with the sampling frequency of the control chip, however, the collected original signal may contain various interference components, including but not limited to 2nd, 3rd, 5th harmonic and random noise, therefore, the single-phase voltage signal U a (t) is preprocessed through a non-delayed finite-length unit impulse response (FIR) filter, the order of the FIR filter is set to 50, and the frequency response characteristics satisfy the following conditions: first, the gain is 1 at the fundamental frequency, to ensure that the fundamental signal passes without attenuation; second, the harmonic frequency has significant attenuation effect, to effectively suppress harmonic interference; third, the processed signal is recorded as U α , wherein only the fundamental component is retained, and the harmonic and noise components are filtered out; after filtering out the harmonic interference through the FIR filter, the target voltage sag signal U α (t) without interference is obtained. α (t), which is characterized by U α = U α (t), the β-axis voltage is calculated by center difference calculation on the input signal, which is characterized by U β (t); the obtained αβ-axis coordinates are input into the phase detector of the phase-locked loop PLL (equivalent to a preset phase-locked loop), to calculate the error θ error , θ error characterized by the first phase, represents the instantaneous deviation between the actual grid voltage vector phase obtained by the αβ transformation of the collection system 102 and the current output phase θ of the PLL, and the calculation formula is as follows:

[0041]

[0042] , wherein θ error drives the PLL to dynamically adjust the output phase θ, so that it instantaneously tracks the real phase of the grid voltage, and more specifically, the collection system 102 will always output the output voltage for comparison with the control chip 103 to be tested, only in the collection process, θ error will always be compensated to the output phase, until θ error gradually decreases to 0, but will always remain output; and θ is a sine and cosine signal synchronized with the phase α voltage, characterized by the second phase, which needs to be obtained through dynamic adjustment of the phase-locked loop PLL, and the specific calculation formula is as follows:

[0043]

[0044] , wherein K p and K i are adjustable parameters in the phase-locked loop, and K pThe response to the instantaneous phase error is controlled to be strong, K i The correction strength to the cumulative phase error is controlled to eliminate the steady-state static error, tau is an integral operation mathematical variable and has no physical meaning, and omega0=2pi*50 rad / s.

[0045] Then, the alpha-beta axis coordinates are converted into dq coordinates through a park transformation, and the conversion relationship is as follows:

[0046]

[0047] After the high harmonic components of the dq axis are filtered through the FIR filter, U d and U q are obtained. ddc and U qdc are the direct current components of U ddc and U qdc , which are the second axis coordinates and are represented as follows:

[0048]

[0049] Finally, the drop voltage and the jump phase are calculated through the second axis coordinates U ddc and U qdc , that is, the second test data, and the specific calculation formula is as follows:

[0050]

[0051] Under normal conditions, the amplitude of U s is about the nominal voltage, and when the voltage drops, the amplitude of U s will decrease significantly. Similarly, alpha is about 0 under normal conditions, and will change abruptly when a fault occurs. The voltage drop detection method based on the above differential method can improve the real-time performance of detection.

[0052] In the above scheme, the filtering processing of the signal preprocessing unit 201 eliminates the interference in the target voltage drop signal, ensures the accuracy of the data source, the first axis coordinate construction unit 202 converts the signal into a calculable coordinate, provides a basis for phase analysis, the first phase acquisition unit 203 extracts initial phase information, the second phase acquisition unit 204 adjusts the phase-locked loop in real time to correct the phase drift, solves the problem of phase jump capture under complex working conditions, and the second axis coordinate construction unit 205 reconstructs accurate coordinates based on the corrected phase, so that the data acquisition unit 206 finally obtains the second test data containing the drop voltage and the jump phase. Thus, in the power grid fluctuation and temperature alternation coupling environment, high-precision voltage and phase double-dimensional dynamic parameters are provided for the upper computer 105, which directly supports the realization of real-time and efficient stability test on the control chip under the influence of multi-parameter coupling.

[0053] A preferred mode is shown in Figure 4 , Figure 4A module structure schematic diagram of a first axis coordinate construction unit of a real-time stability test platform for data acquisition of a power distribution control chip provided by some embodiments of the present application is shown in FIG. 2. Figure 4 As shown in FIG. 2, the first axis coordinate construction unit 202 is configured to construct a first axis coordinate according to the non-interference target voltage drop signal, and includes a first voltage acquisition subunit 301, a second voltage acquisition subunit 302, and a first axis coordinate acquisition subunit 303. The first voltage acquisition subunit 301 is configured to obtain an alpha-axis voltage according to the non-interference target voltage drop signal. The second voltage acquisition subunit 302 is configured to obtain a beta-axis voltage by preset central difference calculation according to the alpha-axis voltage and a preset sampling interval. The first axis coordinate acquisition subunit 303 is configured to obtain the first axis coordinate according to the alpha-axis voltage and the beta-axis voltage.

[0054] In the above preferred solution, after the harmonic interference is filtered out by the FIR filter, the alpha-beta coordinate is constructed, which is represented as the first axis coordinate, wherein the alpha-axis voltage directly uses the filtered signal U α α (t), and the beta-axis voltage is calculated by central difference calculation on the input signal. The specific calculation formula is as follows:

[0055]

[0056] In the formula, Δt is a preset sampling interval. Thus, the first axis coordinate (U α (t), U β (t)) is obtained.

[0057] In the above solution, the first voltage acquisition subunit 301 directly extracts the alpha-axis voltage to represent the instantaneous voltage value, the second voltage acquisition subunit 302 dynamically calculates the beta-axis voltage by using the preset central difference algorithm combined with the preset sampling interval, the beta-axis voltage represents the voltage change rate, forming a two-dimensional representation of the voltage amplitude and change trend, and the first axis coordinate acquisition subunit 303 integrates the alpha-axis voltage and the beta-axis voltage to construct the first axis coordinate, which provides a two-dimensional data basis containing the voltage amplitude dynamic characteristics and the change rate for subsequent phase analysis. Thus, under the condition of grid drop and temperature alternation coupling, the representation dimension of the voltage parameter is significantly enhanced, which directly supports the chip to realize real-time and efficient stability test of the control chip in a complex dynamic environment.

[0058] A preferred solution is shown in FIG. 3. Figure 5 Figure 5 A module structure schematic diagram of a second phase acquisition unit of a real-time stability test platform for data acquisition of a power distribution control chip provided by some embodiments of the present application is shown in FIG. 3. Figure 5 ​​As shown, the second phase acquisition unit 204 is configured to dynamically adjust the preset phase-locked loop according to the first phase to obtain the second phase, and includes a frequency correction amount acquisition subunit 401 and a phase acquisition subunit 402; the frequency correction amount acquisition subunit 401 is configured to construct an integral frequency adaptive term according to the first phase and the preset phase-locked loop to obtain the frequency correction amount; and the phase acquisition subunit 402 is configured to dynamically adjust the preset phase-locked loop by the frequency correction amount to obtain the second phase.

[0059] In the above preferred embodiment, the obtained αβ-axis coordinate is input into a phase discriminator of a phase-locked loop (PLL) (equivalent to the preset phase-locked loop), and an error θ error , θ error between an actual phase of the αβ coordinate system and an output phase θ of the phase-locked loop is calculated. error The first phase represents an instantaneous deviation between the actual grid voltage vector phase obtained by the αβ transformation of the acquisition system 102 and the current output phase θ of the PLL, and the calculation formula is as follows:

[0060]

[0061] The driving PLL dynamically adjusts the output phase θ to make it instantaneously track the actual phase of the grid voltage, and more specifically, the acquisition system 102 always outputs the output voltage for comparison with the to-be-tested control chip 103 in the next step, but in the acquisition process, θ error is always compensated to the output phase until θ error gradually decreases to 0, but the output is always maintained; and θ is a sine and cosine signal synchronized with the phase α voltage, representing the second phase, which needs to be obtained by dynamically adjusting the phase-locked loop PLL, and an improved PLL control algorithm is used, which introduces a frequency adaptive term:

[0062]

[0063] In the formula, K p and K i are adjustable parameters in the phase-locked loop, K p controls the response strength to the instantaneous phase error, K i controls the correction strength to the cumulative phase error, and is used to eliminate the steady-state static error, and τ is an integral operation mathematical variable without physical meaning.

[0064] After obtaining the frequency correction amount ω1, the output phase θ is updated using a voltage-controlled oscillator, and the specific calculation formula is as follows:

[0065]

[0066] In the formula, ω0=2π×50 rad / s.

[0067] In the above scheme, the frequency correction amount acquisition subunit 401 constructs an integral frequency adaptive term based on the first phase and the phase-locked loop, dynamically generates a frequency correction amount, and compensates for the phase drift caused by power grid fluctuation and temperature alternation in real time. The phase acquisition subunit 402 dynamically adjusts the phase-locked loop parameter using the correction amount, so that the output second phase accurately tracks the real phase change in the voltage jump process. Thus, the real-time performance and anti-interference ability of the phase parameter are significantly improved under complex working conditions, high-precision dynamic phase data support is provided for chip stability evaluation, and real-time and efficient stability testing of the control chip is realized.

[0068] A preferred scheme, see Figure 6 , Figure 6 A module structure diagram of a second-axis coordinate construction unit of a power distribution control chip data acquisition real-time stability test platform provided for an embodiment of the application; as shown in Figure 6 , the second-axis coordinate construction unit 205 is configured to construct a second-axis coordinate according to the second phase, and includes an initial coordinate acquisition subunit 501 and a second-axis coordinate acquisition subunit 502; the initial coordinate acquisition subunit 501 is configured to obtain an initial conversion-axis coordinate according to a preset conversion algorithm, the first-axis coordinate and the second phase; and the second-axis coordinate acquisition subunit 502 is configured to filter the initial conversion-axis coordinate according to a preset filter to obtain the second-axis coordinate.

[0069] In the above preferred scheme, the αβ-axis coordinate is converted into the dq coordinate through park conversion, and the conversion relationship is as follows:

[0070]

[0071] After filtering the high-order harmonic components of the dq axis through the FIR filter, the direct current components U d and U q of U ddc and U qdc are obtained, which are represented as the second-axis coordinate (U ddc , U qdc ) and expressed as follows:

[0072]

[0073] The second-axis coordinates U ddc and U qdc can be used to calculate the drop voltage U s and the jump phase α.

[0074] In the above scheme, the initial coordinate acquisition subunit 501 combines the preset transformation algorithm to perform space conversion on the second phase with the first axis coordinate containing the voltage amplitude and the rate of change, to form the initial conversion axis coordinate which simultaneously fuses the voltage dynamic characteristics and the phase information; the second axis coordinate acquisition subunit 502 further utilizes the preset filter to eliminate the high-frequency interference, and finally outputs the clean second axis coordinate. Thus, under the grid drop and temperature disturbance coupling condition, the anti-interference multi-dimensional coordinate data is directly generated, the key parameter support which simultaneously reflects the voltage transient and the phase jump is provided for the chip stability evaluation, and then the stability test of the control chip is realized in real time and efficiently.

[0075] A preferred scheme, see Figure 7 , Figure 7 A module structure schematic diagram of an upper computer of a power distribution control chip data acquisition real-time stability test platform provided for an embodiment of the present application; as shown in Figure 7 The upper computer 105 is used for storing a plurality of test programs, calling the corresponding test program according to different working conditions and issuing the corresponding control instruction, and performing stability analysis on the to-be-tested control chip 103 according to the first test data and the second test data to obtain the stability test result, including: a test program acquisition unit 601, a control instruction acquisition unit 602, a test data acquisition unit 603 and a stability analysis unit 604; the test program acquisition unit 601 is used for controlling the high-low temperature alternating box 104 and the test power grid 101 to obtain the current test working condition, and calling the test program meeting the current test working condition, wherein the test program includes: a step voltage drop interference test program, an electromagnetic interference test program, a comprehensive dynamic response and electromagnetic interference coupling test program, a temperature voltage coupling test program and a long-term aging test program; the control instruction acquisition unit 602 is used for acquiring the corresponding control instruction according to the test program, and sending it to the corresponding device; the test data acquisition unit 603 is used for executing the control instruction through each device, and synchronously recording the first test data fed back by the to-be-tested control chip 103 and the second test data fed back by the acquisition system 102; the stability analysis unit 604 is used for calculating the output amplitude dynamic error and the output phase error according to the first test data and the second test data, and performing stability analysis on the to-be-tested control chip 103 according to the output amplitude dynamic error and the output phase error to obtain the stability test result.

[0076] In the above preferred solution, the host computer 105 controls the test power grid 101 and the high-low temperature alternating box 104 to generate different operating conditions, and calls corresponding test programs according to the corresponding conditions. In the embodiment, the test programs include: a step voltage drop interference test program, an electromagnetic interference test program, a comprehensive dynamic response and electromagnetic interference coupling test program, a temperature voltage coupling test program and a long-term aging test program; by reading the corresponding test program, the control instructions stored in the test program are also sent to the corresponding devices, including the test power grid 101, the control chip under test 103, the acquisition system 102, the high-low temperature alternating box 104 and the IEEE 1588 precision clock; each device executes the corresponding control instruction to simulate the operation of each condition, the host computer 105 synchronously records the first test data fed back by the control chip under test 103 and the second test data fed back by the acquisition system 102, and calculates the output amplitude dynamic error and the output phase error to analyze the stability of the control chip under test 103, and obtains the stability test result. More specifically, the test scheme of each test program is explained. First, the step voltage drop interference test program includes: single-phase voltage drop test, double-phase voltage drop test, three-phase voltage drop test, rapid continuous drop test and composite condition test;

[0077] Specifically, the single-phase voltage drop test: covering A, B and C three phases, setting 80% (slight), 50% (moderate), 20% (severe) and 10% (extreme) four drop depths and 20ms (short time), 100ms (intermediate) and 300ms (long time) three duration combinations, triggering the preset drop at the zero point of the voltage over-phase error ±0.1° during the test, maintaining the specified duration, then stepping up to recover the rated voltage, and synchronously recording the output results of the control chip and the acquisition system 102;

[0078] The double-phase voltage drop test: for AB, AC and BC phase combinations, an unbalanced drop mode of A phase 50%+B phase 70% is used, the duration is set to two grades of 50ms and 150ms, and the test process maintains the negative sequence voltage ratio Wherein, V1 represents the positive sequence voltage rated value, V2 represents the negative sequence voltage rated value, the third phase voltage remains unchanged, and the output results of the control chip and the acquisition system 102 are synchronously recorded.

[0079] The three-phase voltage drop test: setting the depth combination of A phase 30%, B phase 50% and C phase 70%, implementing two modes of synchronous drop with a difference ≤100us and asynchronous drop with a phase sequence trigger difference ≥5ms, and respectively lasting for 100ms and 250ms, and synchronously recording the output results of the control chip and the acquisition system 102.

[0080] Fast continuous drop test: 8 continuous disturbances are performed, the drop depth is randomly distributed in the range of 50%-80%, the interval time is τ=20e -k / 3 msdecreases, where k is the number of drops, a ±0.5Hz frequency offset is injected after the last drop, and an IGBT solid-state power module with a switching speed ≤1μs is used to realize the drop interval t τ =1ms, in the step load mutation test, the grid load is stepped to 10%, 50%, 150% and 200% in 1ms, and the output results of the control chip and the acquisition system 102 are recorded synchronously.

[0081] Composite condition test: simulate the time and space coupling condition of voltage drop and grid load mutation, trigger 150% grid load step at 25ms after 70% voltage drop starts, repeat 10 times and decrease the interval time, record the output results of the control chip and the acquisition system 102 synchronously;

[0082] Second, build a full-wave anechoic chamber in the electromagnetic interference test environment, control the background noise to ≤6dBμV / m, among them, in the frequency band of 150kHz-30GHz, the test receiver bandwidth is 9kHz to ensure the interference injection accuracy ±1dB, configure an EMI signal generator with a frequency coverage of 150kHz-30GHz and a 0-60dB gain power amplifier, among them, the amplitude accuracy of the EMI signal generator is ±1dB, the test platform integrates a 50μH+5Ω line impedance stabilization network, a 30-300MHz biconical antenna and a 300MHz-3GHz log-periodic antenna, place the chip to be tested in the electromagnetic interference test environment, the upper computer 105, the test grid 101, the acquisition system 102 and the IEEE 1588 precision clock are placed in an interference-free environment, and the devices used in the electromagnetic interference test are controlled by the upper computer 105. In this experimental environment, the electromagnetic interference test program includes three-level stress cycles of conducted interference test, radiated interference test and ESD electrostatic discharge test. Specifically, the conducted interference test: a 1kHz 90% amplitude modulation sine wave is used, at 150kHz, 1MHz, 10MHz and 30MHz key frequency points, in 10kHz step sweep mode, interference is injected to the power line through the LISN network every time the frequency is changed, the interference level starts from 10Vpp, increases by 0.5dB step to 30Vpp, and each step is kept for 10s, the output results of the control chip and the acquisition system 102 are recorded synchronously, and when the communication data packet loss rate is detected to be >10 -6 %, record the failure threshold;

[0083] Radiated interference test: perform segmented field strength control, E=3+10log 10 f(V / m) to generate field strength below 80MHz, and E=30+3log10 (f / 80)(V / m), and corrected by the antenna calibration factor K(f), such as K = 1.2 at 3GHz, to ensure that the field strength uniformity is within ±2dB, radiate in the range of 30MHz-3GHz in alternating horizontal and vertical polarization, and expose for 10 minutes in each of the XYZ axes. The chip is 1 meter away from the antenna, and the output results of the control chip and the acquisition system 102 are recorded synchronously. When the communication data packet loss rate is detected to be greater than 10 -6 Record failure threshold when

[0084] The ESD electrostatic discharge test implements a three-level stress cycle: contact discharge is applied to the pins in a sequence of ±2kV, ±4kV, ±6kV, and ±8kV, and air discharge is applied to the connector gap in a sequence of ±8kV and ±15kV. After each discharge, the test is allowed to stand for 10 seconds and the discharge point location is recorded. Specifically, the needle tip discharge must be perpendicular to the pin surface, with a pressure of ≤0.5N. The non-volatile storage state is verified by a heavy communication data stream. The electrical fast transient pulse group test uses a direct injection probe with a decoupling network to generate a pulse group with a repetition frequency of 5kHz-100kHz and a pulse width of 50ns-100ns. The voltage is increased in steps of 0.5kV to 4kV, and the non-volatile storage state is verified by a heavy communication data stream.

[0085] Third, a comprehensive dynamic response and electromagnetic interference coupling test procedure was conducted in a darkroom. A 150kHz-30GHz EMI signal source was driven by a power amplifier into a biconical and log-periodic antenna array. A 50μH+5Ω LISN network provided a path for the conducted interference injection. The comprehensive dynamic response and electromagnetic interference coupling test procedure included: a voltage drop and conducted interference composite test, sustained stress phase monitoring, a three-phase imbalance test, a rapid voltage drop and ESD coupling test, and a load mutation and radiated interference test. Specifically, the voltage drop and conducted interference composite test was conducted independently on phases A, B, and C, with either a moderate operating condition of 50% and 100ms or a severe operating condition of 20% and 300ms. At the same time as the voltage zero-crossing triggered the drop, a 90% amplitude modulated sine wave with a frequency band of 1MHz-10MHz and 20Vpp was injected through the LISN.

[0086] Monitoring during the continuous stress phase: three-phase current imbalance with a threshold of 5%, dynamic control entropy value H_c based on the chip baseline, and CAN-FD communication delay. The initial threshold of the entropy value H_c is set to μ+2σ, where μ is the average entropy value of 100 chips and σ is the standard deviation. An entropy change ΔH_c greater than 0.3 or a delay increment greater than 15μs is considered performance degradation. After the stress is relieved, the output voltage is required to recover to 99% of the nominal value within 3ms.

[0087] Three-phase imbalance test: adopt A-phase 30%, B-phase 50% and C-phase 70% voltage configuration, last for 250ms, synchronously apply 30MHz-1GHz frequency band radiation field, realize omnidirectional radiation exposure through 10° / s three-axis rotating table, when the radiation frequency point coincides with the chip clock harmonic (such as 40MHz corresponding to 20MHz crystal oscillator), when the communication data packet loss rate >10 -6 is detected, record the failure threshold;

[0088] Fast voltage drop and ESD coupling test: execute 5 times of continuous working conditions of drop depth 60% / duration 50ms / interval 20ms±200us, apply ±4kV contact discharge to CAN bus pin at the third drop starting moment; when the communication data packet loss rate >10 -6 is detected, record the failure threshold;

[0089] Load mutation and radiation interference test: realize 100% to 200% load step in 1ms, synchronously open 1GHz-3GHz frequency band radiation field. When the communication data packet loss rate >10 -6 is detected, record the failure threshold;

[0090] Fourth, temperature and voltage coupling test procedure: the host computer 105 controls the high-low temperature alternating box 104 to rise to 85℃ at a rate of 5℃ / min, applies 50% 100ms voltage drop after constant temperature for 10 minutes, synchronously monitors the chip junction temperature and output error with an accuracy of ±0.5℃; the temperature range is expanded to-40℃-125℃, 3 drop tests are performed at each temperature point, and the threshold voltage drift is recorded, wherein the threshold voltage drift is required to be ≤50mV;

[0091] Finally, the long-term aging test procedure is the HTOL high-temperature bias life test: the chip is placed in a 125℃ environment, and a voltage of 1.2 times the rated voltage is applied for 1000 hours. The threshold voltage is sampled once every 100 hours with an accuracy of ±0.1mV, and the drift caused by electromigration is required to be ≤100mV.

[0092] In the above scheme, the test procedure acquisition unit 601 calls five types of test procedures such as step voltage drop and electromagnetic interference, accurately simulates actual complex working conditions, the control instruction acquisition unit 602 converts the program into device control instructions, realizes the multi-stress coupling loading of the high-low temperature alternating box 104 and the test power grid 101, the test data acquisition unit 603 synchronously records the first test data of the to-be-tested chip and the second test data of the collection system 102, forms double-source data comparison, the stability analysis unit 604 calculates the output amplitude dynamic error and the output phase error, quantifies the dynamic response performance and anti-interference ability of the chip in complex working conditions in two dimensions, and finally completes the comprehensive evaluation of the stability of the chip in the multi-parameter coupling environment, thereby realizing real-time and efficient stability test of the control chip.

[0093] A preferred solution, see Figure 8 , Figure 8 A module structure diagram of a stability analysis unit of a power distribution control chip data acquisition real-time stability test platform provided for an embodiment of the application; as shown in Figure 8 The stability analysis unit 604 is configured to calculate the output amplitude dynamic error and the output phase error according to the first test data and the second test data, and includes an actual data acquisition subunit 701, a drop data acquisition subunit 702, a first error calculation subunit 703, and a second error calculation subunit 704. The actual data acquisition subunit 701 is configured to obtain the actual voltage and the actual phase according to the first test data output by the control chip under test 103. The drop data acquisition subunit 702 is configured to obtain the drop voltage and the jump phase according to the second test data output by the acquisition system 102. The first error calculation subunit 703 is configured to calculate the output amplitude dynamic error according to the actual voltage and the drop voltage. The second error calculation subunit 704 is configured to calculate the output phase error according to the actual phase and the jump phase.

[0094] In the above preferred solution, the drop voltage and the jump phase obtained by the acquisition system 102 are denoted as U ideal and θ ideal The actual voltage and the actual phase obtained by the control chip under test 103 are denoted as U real and θ real The output amplitude dynamic error is calculated according to the actual voltage and the drop voltage, and the calculation formula is as follows:

[0095]

[0096] The output phase error is calculated according to the actual phase and the jump phase, and the calculation formula is as follows:

[0097] ∈ θ,dyn (t)=|θ real -θ ideal |;

[0098] According to the calculated output amplitude dynamic error and output phase error, the stability of the to-be-tested chip is further analyzed, specifically including: (1) recording the output amplitude dynamic error and the maximum value of the output amplitude dynamic error in real time, if the error peak value exceeds 5% of the nominal value, it is determined to be unstable; (2) recording the error build-up time of the output amplitude dynamic error and the error build-up time of the output amplitude dynamic error in real time; the output amplitude dynamic error build-up time is defined as the time when the maximum value of the output amplitude dynamic error decays to 5% of the output amplitude dynamic error; the error build-up time of the to-be-tested chip is required to be less than 20ms, otherwise it is determined to be unstable; (3) recording the output phase error in real time, if the output phase error is greater than 1°, it is determined to be unstable.

[0099] In the above scheme, the actual data acquisition subunit 701 extracts the actual voltage and phase output by the to-be-tested chip, the drop data acquisition subunit 702 synchronously acquires the original drop voltage and jump phase recorded by the collection system 102, the first error calculation subunit 703 compares the actual voltage with the drop voltage to calculate the amplitude dynamic error, quantifying the time domain tracking capability of the chip when the voltage suddenly changes, and the second error calculation subunit 704 compares the actual phase with the jump phase to calculate the phase error, quantifying the frequency domain anti-interference performance of the chip under phase jump. Thus, the coupling evaluation index of voltage stability and phase stability is directly generated under complex working conditions, breaking through the limitation of single parameter evaluation, realizing multi-dimensional stability precise analysis, and further realizing real-time and efficient stability test of the control chip.

[0100] Embodiment 2

[0101] Referring to Figure 9 , Figure 9 A step flowchart of a real-time stability test method for power distribution control chip data acquisition provided by an embodiment of the present application. As Figure 9 shown, the embodiment of the present application proposes a real-time stability test method for power distribution control chip data acquisition, including steps 101 to 106, and each step is specifically as follows:

[0102] Step 101, control the high-low temperature alternating box and the test power grid to obtain different working conditions;

[0103] Step 102, call the corresponding test program according to different working conditions, and issue the corresponding control instruction;

[0104] Step 103, control the test power grid to output the target voltage drop signal through the control instruction;

[0105] Step 104, according to the target voltage drop signal, acquire the first test data output by the to-be-tested control chip and the second test data output by the collection system;

[0106] In step 104, the stability of the control chip under test is analyzed according to the first test data and the second test data, and a stability test result is obtained.

[0107] In a specific embodiment, the real-time stability test platform for data acquisition of a power distribution control chip includes: the control chip under test 103 is placed in a high-low temperature alternating box 104, the temperature variation range in the high-low temperature alternating box 104 can be set to -40℃-125℃, the precision is ±1℃, the output end of the control chip under test 103 is electrically connected to the host computer 105, the control chip under test 103 is electrically connected to the test power grid 101, the high-low temperature alternating box 104 is electrically connected to the host computer 105, the output end of the acquisition system 102 is electrically connected to the host computer 105, the test power grid 101 is electrically connected to the host computer 105, and the test power grid 101 stores signal waveforms of different drop voltages; the acquisition system 102 is electrically connected to the test power grid 101; the acquisition system 102 is used to collect data together with the control chip under test 103, and the stability of the control chip is analyzed through the collected data; the clock module 106 in this embodiment adopts an IEEE 1588 precision clock, which is electrically connected to the test power grid 101, the control chip under test 103, the acquisition system 102, the high-low temperature alternating box 104 and the host computer 105, and is used to synchronize the time sequence to ensure that each link can be performed simultaneously; the host computer 105 stores test programs for voltage drop interference test, temperature interference test and electromagnetic interference test, in this embodiment, the essence of voltage drop is that the amplitude rapidly decreases, therefore, the differential method can amplify the characteristics of signal mutation, so as to quickly capture the change of drop. Therefore, the acquisition system 102 uses a voltage drop detection method based on differential αβ transformation, and the differential αβ transformation can calculate the virtual β-axis component through independent differential channels for each phase, wherein single-phase detection needs to calculate three-phase signals, and the calculation amount is reduced compared with the traditional method, and multi-phase detection can perform αβ transformation on each phase through hardware parallel calculation, so as to improve the calculation speed. Finally, the host computer 105 controls the high-low temperature alternating box 104 to adjust the temperature change and controls the test power grid 101 to output different signal waveforms to complete the simulation of different complex working conditions, and finally sends the test results of the acquisition system 102 and the control chip under test 103 under different complex working conditions to the host computer 105 for stability analysis, and obtains a stability test result, wherein the test result output by the control chip under test 103 is represented as first test data, and the test result output by the acquisition system 102 is represented as second test data.

[0108] The embodiment of the application provides a real-time stability test method for data acquisition of a power distribution control chip, a high-low temperature alternating box is arranged to simulate temperature changes in an actual complex environment, complex operation conditions can be simulated, a power grid provides a plurality of voltage drop signals, a fluctuation condition of the power grid is simulated, first test data and second test data are collected by a to-be-tested control chip and a collection system respectively, two-dimensional data inputs under the influence of multiple parameters are provided, a host computer calls a stored test program, issues a control instruction, and based on synchronous data, the first test data and the second test data are analyzed in real time, the stability of the chip in a multi-parameter coupling environment such as voltage and temperature is comprehensively evaluated, thereby realizing efficient and real-time stability test, effectively dealing with the challenges of complex conditions and multiple parameter influences, and realizing real-time and efficient stability test of the control chip.

[0109] In a preferred scheme, the first test data and the second test data are obtained according to the target voltage drop signal, including: inputting the target voltage drop signal to the to-be-tested control chip to obtain the first test data output by the to-be-tested control chip. The target voltage drop signal is input to the collection system, the target voltage drop signal is preprocessed by filtering according to a preset filter to obtain an interference-free target voltage drop signal; a first axis coordinate is constructed according to the interference-free target voltage drop signal; a first phase is obtained according to the first axis coordinate; the preset phase-locked loop is dynamically adjusted according to the first phase to obtain a second phase; a second axis coordinate is constructed according to the second phase; and the second test data is obtained according to the second axis coordinate.

[0110] In the above scheme, the target voltage drop signal is input to the to-be-tested control chip to obtain the first test data output by the to-be-tested control chip, the target voltage drop signal is input to the collection system, and the interference in the target voltage drop signal is eliminated by filtering processing to ensure the accuracy of the data source, and then the signal is converted into a calculable coordinate to provide a basis for phase analysis, and then the initial phase information is extracted, the phase drift is corrected in real time by dynamically adjusting the phase-locked loop, the problem of phase jump capture under complex conditions is solved, the accurate coordinate is reconstructed based on the corrected phase, and the second test data containing the drop voltage and the jump phase is finally obtained by the data collection unit, thereby providing high-precision voltage and phase two-dimensional dynamic parameters for the host computer in the coupling environment of power grid fluctuation and temperature alternation, directly supporting the real-time and efficient stability test of the control chip under the influence of multiple parameter coupling.

[0111] In a preferred scheme, the first test data and the second test data are obtained according to the target voltage drop signal, including: inputting the target voltage drop signal to the to-be-tested control chip to obtain the first test data output by the to-be-tested control chip. The target voltage drop signal is input to the collection system, the target voltage drop signal is preprocessed by filtering according to a preset filter to obtain an interference-free target voltage drop signal; a first axis coordinate is constructed according to the interference-free target voltage drop signal; a first phase is obtained according to the first axis coordinate; the preset phase-locked loop is dynamically adjusted according to the first phase to obtain a second phase; a second axis coordinate is constructed according to the second phase; and the second test data is obtained according to the second axis coordinate.

[0112] In the above scheme, the first test data of the to-be-tested chip and the second test data of the acquisition system are recorded synchronously to form double-source data comparison, the stability analysis unit calculates output amplitude dynamic error and output phase error, the dynamic response performance and anti-interference ability of the chip under complex working conditions are quantified in two dimensions, and finally the comprehensive evaluation of the stability of the chip under the multi-parameter coupling environment is completed, and the stability test of the control chip is realized in real time and efficiently.

[0113] The above only describes the preferred embodiments of the present application, and it should be noted that for ordinary skilled in the art, without departing from the technical principles of the present application, several improvements and modifications can be made, and these improvements and modifications should be considered as the protection scope of the present application.

[0114] In the description of the present specification, the description of the terms "one embodiment", "some embodiments", "example", "specific example" or "some examples" means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. Moreover, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in any one or more embodiments or examples. In addition, the person skilled in the art can combine and combine the different embodiments or examples described in the present specification and the features of the different embodiments or examples without contradiction.

[0115] In addition, the terms "first", "second" are only used for description purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise specifically limited.

Claims

1. A real-time stability test platform for power distribution control chip data acquisition, characterized in that: include: Test the power grid, acquisition system, control chip to be tested, high and low temperature alternating box, host computer and clock module; The control chip to be tested is placed inside the high and low temperature alternating box; the output end of the control chip to be tested is electrically connected to the host computer; the control chip to be tested is electrically connected to the test power grid; the high and low temperature alternating box is electrically connected to the host computer; the acquisition system is electrically connected to the test power grid; the output end of the acquisition system is electrically connected to the host computer; the test power grid is electrically connected to the host computer; the clock module is electrically connected to the test power grid; the clock module is electrically connected to the acquisition system; the clock module is electrically connected to the control chip to be tested; the clock module is electrically connected to the high and low temperature alternating box; the clock module is electrically connected to the host computer; The high and low temperature alternating box is used to adjust the temperature; The test grid is used to store signal waveforms of several different drop voltages and output a target voltage drop signal according to a control instruction sent by the host computer; The control chip to be tested is used to collect first test data according to the target voltage drop signal, and send the first test data to the host computer; The acquisition system is used to collect second test data according to the target voltage drop signal, and send the second test data to the host computer; The clock module is used to synchronize the clocks of the test grid, the acquisition system, the control chip to be tested and the high and low temperature alternating box according to the clock synchronization control instructions issued by the host computer; The host computer is used to store several test programs, control the high and low temperature alternating box and the test power grid to obtain different working conditions, call the corresponding test program according to different working conditions and issue corresponding control instructions, and perform stability analysis on the control chip to be tested based on the first test data and the second test data to obtain stability test results.

2. A real-time stability test platform for data acquisition of a power distribution control chip according to claim 1, characterized in that: The acquisition system is used to acquire second test data according to the target voltage drop signal, including: A signal preprocessing unit, a first axis coordinate construction unit, a first phase acquisition unit, a second phase acquisition unit, a second axis coordinate construction unit, and a data acquisition unit; The signal preprocessing unit is used to perform filtering preprocessing on the target voltage drop signal according to a preset filter to obtain an interference-free target voltage drop signal; The first-axis coordinate construction unit is used to construct the first-axis coordinate according to the non-interference target voltage drop signal; The first phase acquisition unit is configured to obtain a first phase according to the first axis coordinate; The second phase acquisition unit is used to dynamically adjust a preset phase-locked loop according to the first phase to obtain a second phase; The second-axis coordinate construction unit is used to construct the second-axis coordinate according to the second phase; The data acquisition unit is used to obtain second test data according to the second axis coordinate, wherein the second test data includes: drop voltage and jump phase.

3. A real-time stability test platform for data acquisition of a power distribution control chip according to claim 2, characterized in that: The first-axis coordinate construction unit is used to construct the first-axis coordinate according to the non-interference target voltage drop signal, including: a first voltage acquisition subunit, a second voltage acquisition subunit, and a first axis coordinate acquisition subunit; The first voltage acquisition subunit is used to obtain the α-axis voltage according to the non-interference target voltage drop signal; The second voltage acquisition subunit is configured to obtain the β-axis voltage by performing a preset central difference calculation based on the α-axis voltage and a preset sampling interval; The first-axis coordinate acquisition subunit is configured to obtain a first-axis coordinate according to the α-axis voltage and the β-axis voltage.

4. A real-time stability test platform for data acquisition of a power distribution control chip according to claim 2, characterized in that: The second phase acquisition unit is configured to dynamically adjust a preset phase-locked loop according to the first phase to obtain a second phase, including: Frequency correction amount acquisition subunit and phase acquisition subunit; The frequency correction value acquisition subunit is used to construct an integral frequency adaptive term according to the first phase and the preset phase-locked loop to obtain a frequency correction value; The phase acquisition subunit is used to dynamically adjust the preset phase-locked loop according to the frequency correction amount to obtain a second phase.

5. A real-time stability test platform for data acquisition of a power distribution control chip according to claim 2, characterized in that: The second-axis coordinate construction unit is used to construct the second-axis coordinate according to the second phase, including: An initial coordinate acquisition subunit and a second axis coordinate acquisition subunit; The initial coordinate acquisition subunit is used to obtain the initial conversion axis coordinates according to a preset transformation algorithm, the first axis coordinates and the second phase; The second-axis coordinate acquisition subunit is used to perform filtering processing on the initial conversion axis coordinates according to the preset filter to obtain second-axis coordinates.

6. A real-time stability test platform for data acquisition of a power distribution control chip according to claim 1, characterized in that: The host computer is used to store a plurality of test programs, call corresponding test programs according to different working conditions and issue corresponding control instructions, and perform stability analysis on the control chip to be tested according to the first test data and the second test data to obtain stability test results, including: Test program acquisition unit, control instruction acquisition unit, test data acquisition unit and stability analysis unit; The test program acquisition unit is used to control the high and low temperature alternating box and the test power grid to obtain the current test conditions and call the test program that meets the current test conditions, wherein the test program includes: a step voltage drop interference test program, an electromagnetic interference test program, a comprehensive dynamic response and electromagnetic interference coupling test program, a temperature-voltage coupling test program, and a long-term aging test program; The control instruction acquisition unit is used to acquire corresponding control instructions according to the test program and send them to the corresponding device; The test data acquisition unit is used to execute the control instruction through each of the devices, and synchronously record the first test data fed back by the control chip to be tested and the second test data fed back by the acquisition system; The stability analysis unit is used to calculate the output amplitude dynamic error and the output phase error according to the first test data and the second test data, and perform stability analysis on the control chip to be tested according to the output amplitude dynamic error and the output phase error to obtain a stability test result.

7. A real-time stability test platform for data acquisition of a power distribution control chip according to claim 6, characterized in that: The stability analysis unit is configured to calculate an output amplitude dynamic error and an output phase error based on the first test data and the second test data, including: an actual data acquisition subunit, a drop data acquisition subunit, a first error calculation subunit, and a second error calculation subunit; The actual data acquisition subunit is used to obtain the actual voltage and actual phase according to the first test data output by the control chip to be tested; The drop data acquisition subunit is used to obtain the drop voltage and jump phase according to the second test data output by the acquisition system; The first error calculation subunit is used to calculate the output amplitude dynamic error according to the actual voltage and the drop voltage; The second error calculation subunit is used to calculate an output phase error according to the actual phase and the jump phase.

8. A real-time stability test method for data acquisition of a power distribution control chip, characterized in that: A real-time stability test platform for data acquisition of a power distribution control chip according to any one of claims 1 to 7, executed by a host computer, comprising: Controlling the high and low temperature alternating box and the test grid to obtain different working conditions; Call the corresponding test program according to different working conditions and issue corresponding control instructions; Controlling the test grid to output a target voltage drop signal through the control instruction; Acquire first test data output by the control chip to be tested and second test data output by the acquisition system according to the target voltage drop signal; A stability analysis is performed on the control chip to be tested according to the first test data and the second test data to obtain a stability test result.

9. A real-time stability testing method for data acquisition of a power distribution control chip according to claim 8, characterized in that: Acquiring first test data and second test data according to the target voltage drop signal, including: Inputting the target voltage drop signal to the control chip to be tested to obtain first test data output by the control chip to be tested; The target voltage drop signal is input into the acquisition system, and the target voltage drop signal is filtered and preprocessed according to a preset filter to obtain an interference-free target voltage drop signal; a first axis coordinate is constructed according to the interference-free target voltage drop signal; a first phase is obtained according to the first axis coordinate; a preset phase-locked loop is dynamically adjusted according to the first phase to obtain a second phase; a second axis coordinate is constructed according to the second phase; and second test data is obtained according to the second axis coordinate.

10. A real-time stability testing method for data collection of a power distribution control chip according to claim 8, characterized in that: Performing stability analysis on the control chip to be tested according to the first test data and the second test data to obtain a stability test result includes: Calculating an output amplitude dynamic error and an output phase error according to the first test data and the second test data; A stability analysis is performed on the control chip to be tested according to the output amplitude dynamic error and the output phase error to obtain a stability test result.

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