Electric energy quality treatment method, system and equipment based on charging pile and medium

By integrating voltage transformers, current transformers and active filter inverter circuits in charging piles, identifying and compensating harmonics and reactive power, and combining them with power line carrier communication, the problems of harmonic pollution in charging piles and attenuation of wireless communication signals are solved, achieving improved power grid quality and reliable data transmission.

CN120810619APending Publication Date: 2025-10-17SHANDONG ARTAPLAY INTELLIGENT TECH CO LTD

Patent Information

Application Number
CN202511262875.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-09-05
Publication Date
2025-10-17

AI Technical Summary

Technical Problem

The harmonics generated by charging piles during the rectification and charging process will be transmitted along the power grid to peripheral equipment, causing frequent equipment freezes or burns. In addition, wireless communication signals are easily blocked and attenuated in scenarios such as underground parking lots, resulting in charging failures or maintenance delays.

Method used

By using voltage transformers and current transformers at the AC input end of the charging pile to collect three-phase voltage and current signals, a shared analog sampling circuit and main controller are used to identify harmonic components and reactive power components, and compensation current is injected through an active filter inverter circuit. Combined with the power line carrier communication module to transmit data, the communication link is automatically switched to ensure data transmission continuity.

Benefits of technology

It effectively reduces the total harmonic current content, increases the power factor, improves the grid waveform quality, ensures the continuity and reliability of data transmission during the charging process, and enhances the remote monitoring capability of charging piles.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The invention provides an electric energy quality treatment method, system and device based on a charging pile and a medium, and belongs to the technical field of charging piles, and the method is realized through the following steps: employing a mutual inductor to collect three-phase voltage / current; a common analog sampling and DSP processing circuit; harmonic / reactive power is identified based on the instantaneous reactive power theory, and a compensation instruction is generated; according to the compensation control instruction, driving an active filtering inverter circuit to inject compensation current into a power grid so as to reduce the total harmonic current content and improve the power factor; and the main controller generates charging state data according to the sampled voltage signal and current signal, and couples the data to an alternating current power line for transmission through the power line carrier communication module. The system guarantees the quality of the power grid, achieves the high efficiency and reliability of the operation of the charging pile, and gives consideration to the safety of the power grid and user experience.
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Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of charging piles, and particularly relates to an electric energy quality treatment method, system, device and medium based on a charging pile. BACKGROUND

[0002] As a clean and efficient means of transportation, electric vehicles are gradually becoming the development direction of the automobile industry. However, the popularity of electric vehicles cannot be achieved without the support of charging infrastructure, and charging piles serve as energy supply devices for electric vehicles. From the perspective of technological development trends, high power, fast charging, and intelligent management have become the main direction. The application of communication technology in charging piles is also becoming increasingly important. The combination of power line carrier communication and wireless communication can ensure the continuity and stability of communication and provide support for the intelligent operation and management of charging piles.

[0003] In related technologies, the sampling of electric parameters of charging piles and the processing of harmonics and reactive power use independent sampling circuits and processors. During the rectification charging process, a large amount of harmonics is generated by charging piles. If not processed or only filtered, the harmonics will be conducted along the power grid to the surrounding equipment. When a cluster of charging piles is running, the harmonics generated will cause the air conditioners, computers and other equipment in nearby office buildings to frequently shut down, and even burn out the power supply modules. At the same time, harmonics will increase the line loss of the power grid, causing the transformer to overheat and reducing its service life.

[0004] Moreover, charging piles rely on wireless communication to transmit data, but in underground parking lots, dense building groups and other scenarios, wireless signals are easily blocked and attenuated. For example, in underground parking lots, the charging piles often overcharge due to weak wireless signals, and the maintenance delay caused by the failure alarm not being uploaded. SUMMARY

[0005] The application provides an electric energy quality treatment method based on a charging pile, which ensures the continuity of data transmission through adaptive switching of communication links, realizes the reliability of charging pile operation, and balances the safety of the power grid and user experience.

[0006] The method comprises the following steps: Step S101: At the AC input end of the charging pile, three-phase voltage signals and three-phase current signals are collected by using a voltage transformer and a current transformer; Step S102: The voltage signals and current signals are sent to a common analog sampling circuit, and after analog-to-digital conversion, they are transmitted to a common main controller; Step S103: The main controller identifies the harmonic components and reactive power components of the received signals, and generates corresponding compensation control instructions; Step S104: According to the compensation control instructions, an active filter inverter circuit is driven to inject compensation current into the power grid to reduce the total harmonic current content and improve the power factor; Step S105: The main controller generates the charging state data according to the sampled voltage signal and current signal, and transmits the data to the AC power line through the power line carrier communication module.

[0007] It should be further explained that step S101 specifically includes the following steps: The voltage transformer and the current transformer are configured at the AC input end of the charging pile, the primary side is connected to the connection line between the charging pile and the power grid, and the secondary side outputs a low level matched with the rated voltage and current of the charging pile; The voltage transformer is configured with a number of turns and a core material for the fundamental wave of the power grid and typical harmonics of the charging pile; The secondary side output ends of the voltage transformer and the current transformer are directly connected to a common analog sampling circuit, the first stage of the analog sampling circuit is an anti-aliasing filter; The second stage is an operational amplifier that adjusts the signal amplitude to the analog-to-digital conversion input range of the main controller; The third stage is an isolation transformer that blocks the electrical connection between the high-voltage side of the charging pile and the low-voltage control side, improves the anti-interference ability and safety of the sampling circuit, and reduces the attenuation and distortion in the signal transmission process; The output end of the analog sampling circuit is connected to the main controller DSP through a synchronous sampling interface.

[0008] It should be further explained that step S103 specifically includes the following steps: The main controller synchronously samples and phase-aligns the received three-phase voltage signal and three-phase current signal; The sampling signal is processed by frequency band, the fundamental wave and the harmonic wave are separated, and independent detection thresholds are set for different frequency bands; The amplitudes and phases of the harmonics in each frequency band are monitored, and when the harmonic amplitude exceeds the set threshold for 3 consecutive periods, a compensation instruction is triggered to be generated; Combined with the current power grid voltage fluctuation range, the weight coefficient of reactive power compensation is adjusted, and the reactive power demand of the phase with low voltage is preferentially compensated; The compensation instruction is redundantly verified to verify the validity of the instruction, and if the verification fails, the valid instruction of the previous period is traced back; The compensation instruction is divided into a harmonic compensation component and a reactive compensation component, which are respectively output to the active filter inverter circuit through independent PWM channels; After the compensation instruction is executed, the feedback signal of the compensation current is collected, and the error is compared with the target instruction, and if the error exceeds 5%, the closed-loop adjustment of the inverter circuit is triggered.

[0009] It should be further explained that step S103 specifically includes the following steps: The main controller is configured with a first processing unit which synchronously latches instantaneous values of three-phase voltage and three-phase current according to a clock signal to form time-aligned voltage sample sequences and current sample sequences; The main controller is further configured with a second processing unit which respectively performs coordinate transformation on the voltage sample sequences and the current sample sequences according to preset first and second reference sequences to obtain orthogonal voltage values and orthogonal current values corresponding to harmonic components; The main controller is further configured with a third processing unit which obtains harmonic power characteristic values through numerical operation according to the orthogonal voltage values and the orthogonal current values, and outputs a harmonic existence indication signal according to the characteristic values; The main controller is further configured with a fourth processing unit which obtains reactive power characteristic values through numerical operation according to the orthogonal voltage values and the orthogonal current values, and outputs a reactive existence indication signal according to the characteristic values; The main controller is further configured with a fifth processing unit which generates a first compensation control word according to the harmonic existence indication signal and the reactive existence indication signal; The main controller is further configured with a sixth processing unit which generates a second compensation control word according to the reactive existence indication signal and a system target power factor; The main controller is further configured with a seventh processing unit which performs priority arbitration and amplitude limiting processing on the first compensation control word and the second compensation control word to form a final compensation control instruction.

[0010] It is further needed to be explained that step S104 specifically includes the following steps: The main controller decomposes the compensation control instruction into independent harmonic compensation components and reactive compensation components according to A-phase, B-phase and C-phase, and distributes them to corresponding PWM control channels; The PWM signal is converted into a gate control signal through an isolation driving circuit to drive IGBT devices in the active filter inverter circuit to turn on and off according to a set duty ratio; A bus capacitor is arranged at the DC side of the inverter circuit, and the capacitance value of the bus capacitor is calculated according to the compensation current peak value and the voltage fluctuation range to ensure the stability of the DC bus voltage; An inductance is arranged in series at the AC side of the inverter circuit, and the inductance value is matched according to the compensation current change rate and the switching frequency to suppress high-frequency burr current; The compensation current output by the inverter circuit is collected and fed back to the main controller through a current sensor for error comparison with the target compensation instruction; When the compensation current error exceeds a set threshold, the PWM duty ratio is automatically adjusted until the error is stabilized within the allowed range.

[0011] It is further needed to be explained that step S105 specifically includes the following steps: extracting a charging state parameter from the three-phase voltage and current signals received from the main controller DSP; packaging the extracted charging state parameter into a data frame according to a power line carrier communication protocol; converting the formatted data frame into a baseband signal according to the modulation requirements of the power line carrier communication module; adjusting the modulation parameters according to the current power line channel quality; converting the modulated baseband digital signal into an analog signal through a digital-to-analog converter and outputting it to the transmit end circuit of the power line carrier communication module; coupling the analog modulated signal to the AC power line through a capacitive coupling circuit, which is composed of a high-frequency coupling capacitor and a high-frequency choke coil, to realize safe transmission of the signal from the low-voltage control side to the high-voltage power line; setting a transmission state monitoring mode in the power line carrier communication module to detect the ACK confirmation frame and the bit error rate of the receiving end.

[0012] It should be further explained that the method further includes the following steps: The main controller is also in communication connection with the voltage transformer and the current transformer through a wireless communication module, and when connected through wireless communication, the power line carrier communication is not used; The main controller obtains the current wireless communication signal strength value through the signal strength detection interface of the wireless communication module; The main controller configures a communication parameter configuration table to store the wireless communication signal strength threshold and the heartbeat packet loss judgment condition; The main controller analyzes the heartbeat packet received by the wireless communication module and records the reception time of the last three heartbeat packets; if the difference between the current time and the last reception time exceeds 3 times the heartbeat packet interval, it is determined that the heartbeat packet is continuously lost; When the signal strength value is lower than the preset strength threshold or the continuously lost heartbeat packet is detected, the main controller triggers the communication link switching process and disables the transmit function of the wireless communication module before switching; The main controller sends an activation instruction to the power line carrier communication module to start the communication parameter configuration of the PLC module and establish a communication connection with the concentrator; After the communication link switching is completed, the main controller sends a status update to the cloud platform and records the switching log.

[0013] The application also provides an electric energy quality management system based on a charging pile, which comprises a charging pile, a voltage transformer, a current transformer, an analog sampling circuit, and a main controller. At the AC input end of the charging pile, the voltage transformer and the current transformer are used to collect three-phase voltage signals and three-phase current signals; The voltage signal and the current signal are input into a common analog sampling circuit, and after analog-digital conversion, are transmitted to a common main controller; The main controller identifies harmonic components and reactive power components of the received signals, and generates corresponding compensation control instructions; according to the compensation control instructions, the main controller drives an active filter inverter circuit to inject compensation current into the power grid, so as to reduce the total harmonic current content and improve the power factor; the main controller generates charging state data according to the sampled voltage signal and current signal, and transmits the data to the AC power line through a power line carrier communication module.

[0014] According to another embodiment of the present application, an electronic device is provided, including a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor implements the steps of the charging pile-based power quality management method when executing the program.

[0015] According to another embodiment of the present application, an electronic device is provided, including a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor implements the steps of the charging pile-based power quality management method when executing the program.

[0016] From the above technical solutions, the present application has the following advantages: The charging pile-based power quality management method provided by the present application can capture the changes of electrical parameters in the power grid and the charging process by real-time acquisition of three-phase voltage and current signals through voltage transformers and current transformers, thereby avoiding control inaccuracy caused by sampling errors. The common use of voltage and current signal analog sampling circuits and main controllers reduces the hardware redundancy of independent sampling modules and improves the signal processing efficiency.

[0017] The main controller identifies harmonic and reactive power components, which can target the source of power grid pollution and provide a basis for compensation. The active filter inverter circuit injects compensation current, which can actively cancel harmonic components and supplement reactive power, thereby improving the quality of power grid waveform and increasing the utilization rate of electrical energy. The main controller generates charging state data and transmits the data through power line carrier transmission. The data is generated based on the same sampling source, which ensures the time consistency of the charging state and the power grid parameters. The main controller automatically switches the communication link to the power line carrier when the wireless signal is weak, thereby solving the limitations of a single communication method, ensuring uninterrupted data transmission during the charging process, and improving the reliability of remote monitoring of the charging pile. BRIEF DESCRIPTION OF DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the present application, the drawings required in the description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0019] Figure 1 Flow chart of power quality treatment method based on charging pile; Figure 2 Flow chart of power quality treatment method based on charging pile; Figure 3 Flow chart of another embodiment of power quality treatment method based on charging pile; Figure 4 Schematic diagram of electronic device. DETAILED DESCRIPTION

[0020] The power quality treatment method based on charging pile provided by the application aims to suppress harmonic pollution, compensate for reactive power, and realize stable and anti-interference data transmission by using power lines as communication media, and is suitable for wireless signal scenes such as underground garages and industrial plants.

[0021] The application integrates an electric energy quality treatment module in the charging pile to detect and compensate for harmonic current and reactive power, and integrates a power line carrier communication module to realize data transmission by using power supply lines. When the communication signal is good, wireless communication is used preferentially, and when the signal is weak, the carrier communication is automatically switched to ensure communication continuity.

[0022] The power quality treatment method based on charging pile related to the application will be described in detail below. In order to illustrate but not to limit, specific details such as specific system structures, technologies, etc. are proposed to thoroughly understand the embodiments of the application. However, it should be clear to those skilled in the art that the application can also be implemented in other embodiments without these specific details.

[0023] It should be understood that when used in the specification of the application, the term "comprises" indicates the existence of the described features, whole, steps, operations, elements and / or components, but does not exclude the existence or addition of one or more other features, whole, steps, operations, elements, components and / or sets thereof. The terms "comprise", "include", "have" and their variants mean "including but not limited to", unless otherwise specifically emphasized.

[0024] In order to clearly describe the technical solutions of the application, the same items or similar items with basically the same function and role are distinguished by using "first", "second" and the like. Those skilled in the art can understand that "first", "second" and the like do not limit the quantity and execution order, and "first", "second" and the like do not necessarily mean different.

[0025] The phrase "one embodiment" or "some embodiments" appearing in the present application are intended to represent that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the application. The appearances of the phrase "in one embodiment", "in some embodiments", "in other embodiments", "in additional embodiments", and so on, are not necessarily all referring to the same embodiments, unless otherwise specifically stated.

[0026] The technical solutions in the embodiments of the application will be clearly and completely described below with reference to the drawings in the embodiments of the application. Obviously, the described embodiments are only some of the embodiments of the application, but not all the embodiments of the application. Based on the embodiments in the application, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the application.

[0027] Please refer to Figure 1 As shown in FIG. 1, which is a flowchart of a power quality treatment method based on a charging pile in an embodiment, the method comprises the following steps: Step S101: At the AC input end of the charging pile, a voltage transformer and a current transformer are used to collect three-phase voltage signals and three-phase current signals.

[0028] In some embodiments, an electromagnetic voltage transformer and a through-type current transformer are used, which are respectively installed at the three-phase live lines and the zero line at the AC input end of the charging pile, to collect the instantaneous values of the primary three-phase voltage and the three-phase current. The collected signals are transmitted through shielded wires to reduce electromagnetic interference. The high voltage and large current are isolated by the transformer, avoiding damage to the subsequent circuit and equipment caused by direct measurement, and ensuring the safety of measurement.

[0029] In some specific embodiments, step S101 specifically comprises the following steps: Step S1011: At the AC input end of the charging pile, a voltage transformer and a current transformer are configured, the primary side is connected to the connection line between the charging pile and the power grid, and the secondary side outputs a low-level signal matched with the rated voltage and current of the charging pile, so as to ensure that the collected three-phase voltage and current signals cover the amplitude range under the full load working condition of the charging pile, and avoid the problems of small signal missing detection or large signal saturation caused by insufficient range of traditional transformers.

[0030] Step S1012: The voltage transformer is configured with a number of turns ratio and a core material for the fundamental wave of the power grid and typical harmonics of the charging pile. Optionally, the typical harmonics of the charging pile are 5th, 7th, 11th, etc. 200Hz to 2500Hz frequency band.

[0031] The Rogowski coil is used in the current transformer to reduce the high-frequency impedance, so that the high-frequency harmonic signal can be accurately collected under the charging pile load.

[0032] Step S1013: The secondary side output end of the voltage and current transformer is directly connected to the common analog sampling circuit, the first stage of the analog sampling circuit is an anti-aliasing filter for filtering out the power grid background noise and charging pile IGBT switching noise; The second stage is an operational amplifier for adjusting the signal amplitude to the input range of the main controller analog-to-digital conversion; The third stage is an isolation transformer for blocking the electrical connection between the high-voltage side of the charging pile and the low-voltage control side, improving the anti-interference ability and safety of the sampling circuit, and reducing the attenuation and distortion in the signal transmission process.

[0033] Step S1014: The output end of the analog sampling circuit is directly connected to the common main controller DSP through a synchronous sampling interface, the DSP is configured with a high-precision clock to control the sampling time of the three-phase voltage and current signals to be strictly aligned, avoiding the harmonic phase detection error caused by the sampling time difference; The DSP adjusts the sampling frequency according to the charging pile load to ensure that the Nyquist sampling theorem is met under light load and heavy load conditions, improving the identification accuracy of harmonic components and reactive power components.

[0034] Step S101 of the embodiment acquires the voltage and current signals of the charging pile and the power grid interacting through the transformer, and transmits them to the processor for analysis after signal conditioning; at the same time, the transformer, the sampling circuit and the charging pile are connected through a short-distance shielded cable to reduce signal transmission loss, and a wideband transformer and a programmable sampling frequency optimized for the charging pile load characteristics are used to improve the sampling adaptability.

[0035] Step S102: The voltage signal and current signal are sent to the common analog sampling circuit and transmitted to the common main controller after analog-to-digital conversion.

[0036] In some embodiments, the common analog sampling circuit includes a second-order RC low-pass filter and an instrument amplifier, which filters and amplifies the weak signal output by the transformer to 0-3V, and then sends it to a 16-bit synchronous analog-to-digital converter. The ADC is connected to the main controller through the SPI interface and synchronously transmits the digital signals of the three-phase voltage and current.

[0037] The analog signal of the embodiment is first filtered to remove high-frequency noise, and then amplified and adjusted to the input range of the ADC. The ADC converts the continuous analog signal into discrete binary digital signal, which is transmitted to the DSP through the interface for processing, avoiding phase deviation and improving the accuracy of subsequent signal analysis.

[0038] Step S103: The main controller identifies the harmonic component and the reactive power component of the received signal and generates a corresponding compensation control instruction.

[0039] In some embodiments, the DSP performs 256-point per cycle discretization processing on the received digital signal, focuses on 2-30 harmonics when identifying the harmonic component by extracting continuous voltage and current data segments, calculates the phase difference between the voltage and the current when identifying the reactive power component, and generates the compensation control instruction containing the compensation amplitude of each harmonic, the current amplitude of the reactive compensation, and the phase parameter.

[0040] Optionally, the instruction is stored in a 16-bit binary data format. Here, based on the spectral characteristics of the voltage and current signals, the harmonic component and the reactive power component are separated by signal decomposition, and the compensation amount required to be injected is calculated according to the parameters of these components to form a specific control instruction.

[0041] In an embodiment of the present application, based on step S103, a possible embodiment will be given below to non-limitingly illustrate the specific implementation scheme. Step S103 specifically includes the following steps: Step S1031: The main controller synchronously samples and phase-aligns the received three-phase voltage signal and three-phase current signal, and ensures that the time consistency error of each phase signal does not exceed a preset error threshold; Step S1032: The sampled signal is processed by frequency band, the fundamental wave and the harmonic wave are separated, and independent detection thresholds are set for different frequency bands; Step S1033: The amplitude and phase of each frequency band harmonic are monitored, and when the harmonic amplitude exceeds the set threshold for three consecutive periods, the compensation instruction generation is triggered; Step S1034: The weight coefficient of the reactive power compensation is adjusted in combination with the current power grid voltage fluctuation range, and the reactive demand of the phase with low voltage is preferentially compensated; Step S1035: The compensation instruction is redundantly verified to verify the validity of the instruction, and if the verification fails, the valid instruction of the last period is traced back; Step S1036: The compensation instruction is split into harmonic compensation component and reactive compensation component, and is respectively output to the active filter inverter circuit through independent PWM channels; Step S1037: After the compensation instruction is executed, the feedback signal of the compensation current is collected, and the error is compared with the target instruction. If the error exceeds 5%, the closed-loop adjustment of the inverter circuit is triggered.

[0042] The step S103 of the present embodiment is based on the synchronous sampling signal, separates the fundamental wave and the harmonic component through frequency band processing, adjusts the compensation mode in combination with the power grid voltage state, generates the compensation instruction containing the harmonic component and the reactive component, and ensures the accuracy of the instruction execution through redundant verification and closed-loop feedback.

[0043] Step S104: According to the compensation control instruction, drive the active filter inverter circuit to inject compensation current into the power grid, so as to reduce the total harmonic current content and improve the power factor.

[0044] In some embodiments, the active filter inverter circuit consists of 6 IGBT power tubes in a three-phase full-bridge structure, the driving circuit adopts an optocoupler isolated driving chip IR2110 to convert the control instruction into a 15V driving voltage signal, control the on / off frequency of the IGBT, the DC side adopts an electrolytic capacitor for voltage stabilization, the compensation current generated by the inverter is injected into the power grid through the reactor, and the injected current has the same amplitude and opposite phase as the harmonic and reactive components of the grid current. In this way, the compensation amount can be adjusted to ensure stable compensation effect and effectively improve the power quality of the power grid.

[0045] Step S104 specifically includes the following steps: Step S1041: The main controller decomposes the compensation control instruction into independent harmonic compensation components and reactive compensation components according to the A phase, B phase and C phase, and distributes them to the corresponding PWM control channels; Step S1042: Convert the PWM signal into a gate control signal through an isolation driving circuit to drive the IGBT devices in the active filter inverter circuit to turn on / off according to the set duty cycle; Step S1043: Set a bus capacitor on the DC side of the inverter circuit, and the capacitance value of the bus capacitor is calculated according to the compensation current peak value and the voltage fluctuation range to ensure the stability of the DC bus voltage; Step S1044: Series inductance is connected on the AC side of the inverter circuit, and the inductance value is matched according to the compensation current change rate and the switching frequency to suppress high-frequency spur current; Step S1045: Collect the compensation current output by the inverter circuit and feed it back to the main controller through a current sensor for error comparison with the target compensation instruction; Step S1046: When the compensation current error exceeds the set threshold, automatically adjust the PWM duty cycle until the error is stable within the allowed range.

[0046] As can be seen, the compensation instruction is decomposed into three-phase independent harmonic and reactive components, and the digital PWM signal is converted into an IGBT gate control signal through an isolation driving circuit; a bus capacitor is set on the DC side of the inverter circuit to ensure the stability of the DC voltage; series inductance is connected on the AC side to suppress high-frequency spur. By controlling the on / off of the IGBT devices in the inverter circuit, compensation current with opposite phase and matched amplitude to the harmonic and reactive current of the power grid is generated, which cancels out the harmonic and reactive components after being injected into the power grid, thereby reducing the total harmonic current content and improving the power factor.

[0047] Step S105: The main controller generates the charging status data according to the sampled voltage signal and current signal, and transmits the data to the AC power line through the power line carrier communication module.

[0048] In some embodiments, the DSP generates the charging status data including charging voltage, current, power, charging duration, battery SOC estimation value by calculating the sampled voltage and current data, the power line carrier communication module adopts a narrowband OFDM modulation mode, couples the communication signal to the AC power line through a 2.2 μF coupling capacitor, and sets the transmission rate to 200 kbps.

[0049] As can be seen, the DSP obtains various charging status parameters by arithmetic operation using the existing voltage and current sampling data, the power line carrier module modulates these parameters onto a high-frequency carrier signal, loads the high-frequency signal onto the AC power line through the coupling capacitor, and transmits the data to the receiving end using the power line as the transmission medium, and the receiving end obtains the data by demodulation through the same module.

[0050] In an embodiment of the present application, based on step S103, a possible embodiment will be given below to illustrate the non-limiting specific implementation. As shown in Figure 2 The step S103 further includes the following steps: Step S2031: The main controller is configured with a first processing unit, and the first processing unit synchronously latches the instantaneous values of the three-phase voltage and the three-phase current according to a clock signal to form a time-aligned voltage sample sequence and a current sample sequence.

[0051] The first processing unit of the present embodiment is built-in with a synchronous trigger module, adopts a system clock with a frequency of 1 MHz, triggers the synchronous latching operation once every preset time interval; the instantaneous values of the three-phase voltage and the three-phase current are input into the first processing unit through independent signal channels, the instantaneous values of the 6 signals are frozen at the same time through the hardware trigger signal when latching, and are stored in the format of time stamp, A-phase voltage, B-phase voltage, C-phase voltage, A-phase current, B-phase current, and C-phase current, so as to ensure that the time marks of each group of samples are completely consistent. The synchronous latching of the present embodiment is triggered by the rising edge of the system clock, so as to ensure that the voltage sample sequence and the current sample sequence are captured at the same time.

[0052] Step S2032: The main controller is further configured with a second processing unit, and the second processing unit respectively performs coordinate transformation on the voltage sample sequence and the current sample sequence according to a preset first reference sequence and a second reference sequence to obtain orthogonal voltage values and orthogonal current values corresponding to harmonic components.

[0053] Optionally, the coordinate transformation adopts an orthogonal transformation matrix to map the three-phase instantaneous values to a two-phase orthogonal coordinate system, and outputs the orthogonal voltage values and the orthogonal current values.

[0054] The first reference sequence of the embodiment is the reference vector of the alpha axis of the two-phase orthogonal coordinate system, and the second reference sequence is the reference vector of the beta axis, which are pre-stored in the ROM of the DSP and are called synchronously with the sample sequence. The second processing unit performs matrix operation on each group of three-phase voltage values in the voltage sample sequence through an orthogonal transformation matrix to obtain the orthogonal voltage value at each time point. The transformed orthogonal value is stored in the form of 16-bit binary complement, and the value range corresponds to ±1.2 times the range of the original signal to avoid overflow.

[0055] Step S2033: The main controller is further configured with a third processing unit, which obtains a harmonic power characteristic value through numerical operation according to the orthogonal voltage value and the orthogonal current value, and outputs a harmonic existence indication signal according to the characteristic value.

[0056] Step S2034: The main controller is further configured with a fourth processing unit, which obtains a reactive power characteristic value through numerical operation according to the orthogonal voltage value and the orthogonal current value, and outputs a reactive existence indication signal according to the characteristic value.

[0057] Based on the instantaneous reactive power theory, the fundamental reactive power in the alpha-beta coordinate system can be calculated by integration, reflecting the size and nature of the fundamental reactive power in the power grid. The power factor is calculated by the ratio of the fundamental active power to the apparent power, which indirectly reflects the degree of influence of the reactive power.

[0058] Step S2035: The main controller is further configured with a fifth processing unit, which generates a first compensation control word according to the harmonic existence indication signal and the reactive existence indication signal, which is used to drive the harmonic compensation channel of the active filter inverter circuit subsequently.

[0059] The first compensation control word of the embodiment is 32-bit binary data, including a channel enable bit, a harmonic frequency coverage bit, a compensation current amplitude bit, a compensation direction bit, and a check bit. When the fifth processing unit receives a high-level harmonic existence indication signal, it determines the compensation current amplitude according to the harmonic current effective value calculated by the third processing unit, and determines the harmonic frequency to be covered according to the frequency characteristics of the harmonic component, and assembles a 32-bit control word in a predetermined format. If the harmonic existence indication signal is low, the channel enable bit is set to low, and the remaining bits are cleared to zero.

[0060] Step S2036: The main controller is further configured with a sixth processing unit, which generates a second compensation control word according to the reactive existence indication signal and the system target power factor, which is used to drive the reactive compensation channel of the active filter inverter circuit subsequently.

[0061] Step S2037: The main controller is further configured with a seventh processing unit, which performs priority arbitration and amplitude limiting processing on the first compensation control word and the second compensation control word, forms a final compensation control instruction, and outputs the same to the outside through an internal bus.

[0062] The embodiment is based on the hardware capability limitation of the active filter inverter circuit, and overloads and damages of IGBT caused by total current over-limiting when harmonics and reactive power are compensated simultaneously are avoided through priority processing. Harmonic compensation is preferentially ensured because the interference of harmonics on power grid equipment is more direct than that of reactive power. The amplitude limiting processing ensures that the compensation current does not exceed the maximum hardware capability through vector synthesis calculation of the total current. Through high-speed bus transmission, it is ensured that the driving module can synchronously receive the compensation parameters of harmonics and reactive power, and the action delay caused by separate sending is avoided.

[0063] The main controller of the embodiment receives the three-phase voltage signal and the three-phase current signal after analog-to-digital conversion, and utilizes a plurality of sequentially connected processing units inside to complete coordinate transformation, power feature extraction, compensation demand judgment and control word generation. Through integration of latching, coordinate transformation, feature extraction, arbitration and amplitude limiting functions in the same chip, the identification results of the harmonic and reactive components are directly converted into compensation control instructions that can be used to drive the active filter inverter circuit.

[0064] In an embodiment of the present application, based on step S105, a possible embodiment will be given below to non-restrictively illustrate the specific implementation scheme. As shown in the figure, Figure 3 Step S105 specifically includes the following steps: Step S1051: Extracting a charging state parameter from the three-phase voltage and current signals received by the main controller DSP; The charging state parameter includes: charging voltage, charging current, active power, cumulative charging capacity and current rate of change to determine: pre-charge in the current rising stage, constant current in the constant stage, and constant voltage in the falling stage.

[0065] Step S1052: The extracted charging state parameter is packaged into a data frame according to the power line carrier communication protocol, and the frame structure includes: frame header, data field, check code, frame tail, to ensure that the data format is compatible with the communication module.

[0066] Optionally, the data frame complies with the power line carrier communication protocol HPLC standard, the frame header includes the charging pile ID, the data field includes the voltage, current, power, capacity and stage, and the check code is the CRC cyclic redundancy check value of the data field, to ensure that the data is not tampered with during transmission.

[0067] Step S1053: According to the modulation requirements of the power line carrier communication module, the formatted data frame is converted into a baseband signal; and the modulation parameters are adjusted according to the current power line channel quality. Optionally, 16QAM modulation is used when the channel noise is low, and the modulation is reduced to QPSK modulation when the noise is high, so as to balance the transmission rate and reliability.

[0068] The OFDM modulation of the embodiment allocates data to a plurality of orthogonal subcarriers, and adjusts the modulation order of the subcarriers to adapt to the channel quality: when the channel noise is low, the subcarriers use high-order modulation, and 4 bits are transmitted per symbol to increase the rate; and when the noise is high, the modulation is reduced to low-order modulation, and 2 bits are transmitted per symbol to improve the anti-interference ability.

[0069] Step S1054: The modulated baseband digital signal is converted into an analog signal by a digital-to-analog converter and output to the transmitting end circuit of the power line carrier communication module; the transmitting end circuit includes a low-pass filter to filter out high-frequency stray components and ensure that the output analog signal meets the spectrum specification of power line transmission.

[0070] Step S1055: The analog modulated signal is coupled to the AC power line through a capacitive coupling circuit, which is composed of a high-frequency coupling capacitor and a high-frequency choke coil, to realize safe transmission of the signal from the low-voltage control side to the high-voltage power line, while blocking the power frequency current on the power line from entering the communication module.

[0071] Step S1056: A transmission state monitoring mode is set in the power line carrier communication module to detect the ACK confirmation frame and the error code rate of the receiving end; when transmission abnormalities are detected, the modulation parameters are adjusted or the data is retransmitted to ensure reliable transmission of the charging state data.

[0072] In the embodiment, the ACK confirmation frame of the receiving end is used to judge whether the transmission is successful, and if ACK is not received for 3 times in succession, the data is retransmitted; the error code rate is calculated through the CRC check result, and when the error code rate is greater than a preset threshold, the modulation order is reduced to ensure that the data is reliably arrived.

[0073] As can be seen, step S105 completes the generation and power line carrier transmission of the charging state data based on the main controller, calculates the charging parameters from the sampled voltage and current signals of the DSP, avoiding the data delay caused by the separate collection of multiple modules in the traditional scheme. The data is organized according to the frame structure defined in the HPLC standard and the like, ensuring the compatibility with the power line carrier communication module. The modulation parameters are adjusted according to the channel quality, solving the packet loss problem of the traditional fixed modulation mode under complex channels. The signal is transmitted in isolation from the power frequency power line through the capacitive coupling circuit, ensuring the safety of the low-voltage control circuit. The modulation parameters are automatically adjusted or the data is retransmitted through ACK confirmation and error code rate monitoring, improving the reliability.

[0074] In an embodiment of the present application, the method further comprises the following steps: the main controller is further connected with the voltage transformer and the current transformer through the wireless communication module, and when connected through the wireless communication, the power line carrier communication is not used.

[0075] The main controller monitors the wireless communication signal strength, and when it is determined that the signal strength is lower than a set threshold or the heartbeat packet is continuously lost, the communication link is switched from the wireless communication to the power line carrier communication to ensure the communication continuity.

[0076] In some embodiments, the main controller sets the signal strength threshold through the wireless module, the heartbeat packet can be sent at an interval of 5-8 seconds, and the loss of the heartbeat packet is determined for 3-5 times continuously. When switching, the main controller outputs a control signal to turn off the power supply of the wireless module, starts the power supply of the power line carrier module at the same time, and switches the transmission path of the communication data through the GPIO interface. The switching process is completed within 500 milliseconds.

[0077] In this way, the redundant backup of the communication link is realized, the continuous data interaction between the charging pile and the management system is ensured, and the stable operation of the remote monitoring is facilitated.

[0078] The following will give a possible embodiment to non-limitingly illustrate the specific implementation scheme. The method further comprises the following steps: Step S1061: The main controller acquires the current wireless communication signal strength value through the signal strength detection interface of the wireless communication module.

[0079] Step S1062: The main controller configures the communication parameter configuration table, and stores the wireless communication signal strength threshold and the heartbeat packet loss determination condition.

[0080] Optionally, the heartbeat packet loss determination condition can be set as the continuous loss of the heartbeat packet for multiple times, and the heartbeat packet sending interval is 12 seconds.

[0081] Step S1063: The main controller parses the heartbeat packet received by the wireless communication module, records the receiving time of the last 3 times of the heartbeat packet, and if the difference between the current time and the last receiving time exceeds 3 times of the heartbeat packet interval, it is determined that the heartbeat packet is continuously lost.

[0082] Step S1064: When the signal strength value is lower than the preset strength threshold or the continuously lost heartbeat packet is detected, the main controller triggers the communication link switching process, and disables the transmission function of the wireless communication module before switching to avoid signal conflict.

[0083] Step S1065: The main controller sends an activation instruction to the power line carrier communication module, starts the communication parameter configuration of the PLC module, and establishes a communication connection with the concentrator.

[0084] Step S1066: After the communication link switching is completed, the main controller sends a state update to the cloud platform, and records the switching log.

[0085] In this embodiment, the main controller directly acquires the signal strength through the RSSI interface of the wireless module, analyzes the timestamp of the heartbeat packet, and records the receiving time through the hardware timer. The preset strength threshold is set based on the minimum receiving sensitivity of the communication module, realizing the dual-mode redundant switching of wireless communication and power line carrier communication, and ensuring that the charging pile can still communicate stably in a weak signal scenario. The heartbeat packet loss determination combines the standard retransmission mode of the communication protocol. Through the cloud platform state update, remote monitoring of the communication state by the operation and maintenance personnel is realized, and the problem of charging interruption caused by charging pile communication interruption is solved.

[0086] It should be understood that the size of the serial number of each step in the above embodiment does not mean the order of execution, and the execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiment of the present application.

[0087] The following is an embodiment of a charging pile-based power quality management system provided by the embodiments of the present disclosure. The system and the charging pile-based power quality management method of each of the above embodiments belong to the same inventive concept. Details not described in detail in the embodiment of the charging pile-based power quality management system can be referred to the above embodiment of the charging pile-based power quality management method.

[0088] The system comprises a charging pile, a voltage transformer, a current transformer, an analog sampling circuit, and a main controller.

[0089] At the AC input end of the charging pile, the voltage transformer and the current transformer are used to collect three-phase voltage signals and three-phase current signals; the voltage signals and the current signals are sent to the common analog sampling circuit, and after analog-to-digital conversion, they are transmitted to the common main controller.

[0090] The main controller identifies the harmonic component and the reactive power component of the received signals, and generates corresponding compensation control instructions; according to the compensation control instructions, the active filter inverter circuit is driven to inject compensation current into the power grid to reduce the total harmonic current content and improve the power factor; the charging state data is generated according to the sampled voltage signals and current signals, and the data is coupled to the AC power line for transmission through the power line carrier communication module.

[0091] As shown in Figure 4 The present application also provides an electronic device, which comprises a display module 103, a memory 102, a processor 101, and a computer program stored on the memory and executable on the processor 101, wherein the processor 101 implements the steps of the charging pile-based power quality management method when executing the program.

[0092] In embodiments of the application, the electronic device includes, but is not limited to, a laptop computer, a desktop computer, a workstation, a personal digital assistant, a server, a blade server, a mainframe computer, and other suitable computers. The electronic device can also represent various forms of mobile devices such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections, and relationships, and their functions, are shown as examples only and are not meant to limit implementations of the applications described and / or claimed in this document.

[0093] In embodiments of the application, the processor 101 can be implemented by using at least one of application specific integrated circuits, programmable logic devices, field programmable gate arrays, processors, controllers, micro-controllers, microprocessors, electronic units designed to perform the functions described herein, and in some cases, such an implementation can be implemented in a controller. For software implementation, embodiments of the processes or functions can be implemented with separate software modules, which allow at least one function or operation to be performed. The software code can be implemented by a software application (or program) written in any suitable programming language, which can be stored in the memory and executed by the controller.

[0094] The display module 103 is configured to display information input by a user or information provided to the user. The display module 103 can include a display panel, which can be configured in the form of a liquid crystal display, an organic light emitting diode, or the like.

[0095] The memory 102 can be used to store software programs and various data. The memory 102 can include a high-speed random access memory, and can also include a non-volatile memory such as at least one magnetic disk storage device, a flash memory device, or other volatile solid-state memory device.

[0096] The application also provides a storage medium having a computer program stored thereon, wherein the computer program is executed by a processor to implement the steps of the method for charging pile based power quality treatment.

[0097] The storage medium can be any available medium that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code means in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or other

[0098] In this document, the terms "computer-readable medium" or "computer- readable media" is used to generally refer to media such as removable storage, volatile memory, non-volatile memory, or any other storage medium readable by a computer or a general purpose or special purpose computer. Exemplary computer-readable storage media includes storage mediums such as a magnetic, optical or semiconductor storage. The exemplary storage medium also can be any available medium that is located on a processing system, that can be accessed controllably by a processing system, or that includes one or more portions that are usable by a processing system such as main memory, ROM, or flash memory.

[0099] The foregoing description of the disclosed embodiments enables a person skilled in the art to implement or use the application. Numerous modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein can be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for managing power quality based on a charging pile, characterized in that: Methods include: S101: At the AC input end of the charging pile, use a voltage transformer and a current transformer to collect three-phase voltage signals and three-phase current signals; S102: sending the voltage signal and the current signal to a common analog sampling circuit, and transmitting them to a common main controller after analog-to-digital conversion; S103: The main controller identifies the harmonic components and reactive power components of the received signal and generates corresponding compensation control instructions; S104: driving the active filter inverter circuit to inject a compensation current into the power grid according to the compensation control instruction, so as to reduce the total harmonic current content and improve the power factor; S105: The main controller generates charging status data according to the sampled voltage signal and current signal, and couples the data to the AC power line for transmission via the power line carrier communication module.

2. The method for controlling power quality based on a charging pile according to claim 1, characterized in that: Step S101 specifically includes the following steps: A voltage transformer and a current transformer are configured at the AC input end of the charging pile. The primary side is connected to the connection line between the charging pile and the power grid, and the secondary side outputs a low level that matches the rated voltage and current of the charging pile. The voltage transformer is configured with a turns ratio and core material based on the grid fundamental wave and typical harmonics of the charging pile; Connecting the secondary output terminals of the voltage and current transformers directly to a common analog sampling circuit, wherein the first stage of the analog sampling circuit is an anti-aliasing filter; The second stage is an operational amplifier, which adjusts the signal amplitude to the input range of the main controller analog-to-digital conversion; The third stage is an isolation transformer, which blocks the electrical connection between the high-voltage side and the low-voltage control side of the charging pile, improves the anti-interference capability and safety of the sampling circuit, and reduces attenuation and distortion during signal transmission. The output end of the analog sampling circuit is connected to the main controller DSP through a synchronous sampling interface.

3. The method for controlling power quality based on a charging pile according to claim 1, characterized in that: Step S103 specifically includes the following steps: The main controller performs synchronous sampling and phase alignment on the received three-phase voltage signal and three-phase current signal; The sampling signal is processed into frequency bands to separate the fundamental wave and harmonics, and independent detection thresholds are set for different frequency bands; Monitor the amplitude and phase of harmonics in each frequency band. When the harmonic amplitude exceeds the set threshold for three consecutive cycles, a compensation instruction is generated. Adjust the weight coefficient of reactive power compensation based on the current grid voltage fluctuation range, giving priority to compensating the reactive power demand of the phase with low voltage; Perform redundancy check on the compensation instructions to verify the validity of the instructions. If the check fails, go back to the valid instructions of the previous cycle; The compensation command is split into harmonic compensation component and reactive compensation component, which are output to the active filter inverter circuit through independent PWM channels respectively; After the compensation instruction is executed, the feedback signal of the compensation current is collected and compared with the target instruction for error. If the error exceeds 5%, the closed-loop adjustment of the inverter circuit is triggered.

4. The method for controlling power quality based on a charging pile according to claim 1, characterized in that: Step S103 specifically includes the following steps: The main controller is equipped with a first processing unit, which synchronously latches the instantaneous values ​​of the three-phase voltage and the three-phase current according to the clock signal to form a time-aligned voltage sample sequence and current sample sequence; The main controller is further configured with a second processing unit, which performs coordinate transformation on the voltage sample sequence and the current sample sequence according to a preset first reference sequence and a second reference sequence, respectively, to obtain orthogonal voltage values ​​and orthogonal current values ​​corresponding to the harmonic components; The main controller is further configured with a third processing unit, which obtains a harmonic power characteristic value through numerical calculation based on the orthogonal voltage value and the orthogonal current value, and outputs a harmonic presence indication signal according to the characteristic value; The main controller is further configured with a fourth processing unit, which obtains a reactive power characteristic value through numerical calculation based on the orthogonal voltage value and the orthogonal current value, and outputs a reactive power presence indication signal according to the characteristic value; The main controller is further configured with a fifth processing unit, which generates a first compensation control word according to the harmonic presence indication signal and the reactive power presence indication signal; The main controller is further configured with a sixth processing unit, which generates a second compensation control word according to the reactive power presence indication signal and the system target power factor; The main controller is further configured with a seventh processing unit, which performs priority arbitration and limit processing on the first compensation control word and the second compensation control word to form a final compensation control instruction.

5. The method for controlling power quality based on a charging pile according to claim 1, characterized in that: Step S104 specifically includes the following steps: The main controller decomposes the compensation control instructions into independent harmonic compensation components and reactive compensation components according to phase A, phase B, and phase C, and distributes them to the corresponding PWM control channels; The PWM signal is converted into a gate control signal through an isolated drive circuit, driving the IGBT device in the active filter inverter circuit to turn on and off according to the set duty cycle; A bus capacitor is installed on the DC side of the inverter circuit. The capacitance of the bus capacitor is calculated based on the compensation current peak and voltage fluctuation range to ensure the stability of the DC bus voltage. An inductor is connected in series on the AC side of the inverter circuit. The inductance value matches the switching frequency according to the compensation current change rate to suppress high-frequency glitch current. Collect the compensation current output by the inverter circuit, feed it back to the main controller through the current sensor, and compare the error with the target compensation instruction; When the compensation current error exceeds the set threshold, the PWM duty cycle is automatically adjusted until the error stabilizes within the allowable range.

6. The method for controlling power quality based on a charging pile according to claim 1, characterized in that: Step S105 specifically includes the following steps: Extract charging state parameters from the three-phase voltage and current signals received by the main controller DSP; Encapsulating the extracted charging state parameters into data frames according to the power line carrier communication protocol; Convert the formatted data frame into a baseband signal according to the modulation requirements of the power line carrier communication module; adjust the modulation parameters according to the current power line channel quality; The modulated baseband digital signal is converted into an analog signal through a digital-to-analog converter and output to the transmitting end circuit of the power line carrier communication module; The analog modulated signal is coupled to the AC power line through a capacitive coupling circuit. The coupling circuit consists of a high-frequency coupling capacitor and a high-frequency choke coil to achieve safe transmission of the signal from the low-voltage control side to the high-voltage power line. A transmission status monitoring mode is set in the power line carrier communication module to detect the ACK confirmation frame and bit error rate of the receiving end.

7. The method for controlling power quality based on a charging pile according to claim 1, characterized in that: The method further comprises the steps of: The main controller is also connected to the voltage transformer and the current transformer through wireless communication modules, and when connected through wireless communication, power line carrier communication is not used; The main controller obtains the current wireless communication signal strength value through the signal strength detection interface of the wireless communication module; The main controller configures a communication parameter configuration table to store wireless communication signal strength thresholds and heartbeat packet loss determination conditions; The main controller parses the heartbeat packets received by the wireless communication module and records the reception time of the last three heartbeat packets; If the difference between the current time and the last received time exceeds 3 times the heartbeat packet interval, it is determined to be a continuous loss of heartbeat packets; When the main controller compares the signal strength value and finds it is lower than the preset strength threshold, or detects continuous loss of heartbeat packets, it triggers the communication link switching process and disables the transmission function of the wireless communication module before switching; The main controller sends an activation command to the power line carrier communication module, starts the communication parameter configuration of the PLC module, and establishes a communication connection with the concentrator; After the communication link switch is completed, the main controller sends a status update to the cloud platform and records the switch log.

8. A power quality management system based on charging piles, characterized in that: The system is used to implement the power quality management method based on the charging pile as described in any one of claims 1 to 7; The system includes: charging pile, voltage transformer, current transformer, analog sampling circuit and main controller; At the AC input end of the charging pile, a voltage transformer and a current transformer are used to collect three-phase voltage signals and three-phase current signals; The voltage signal and the current signal are sent to a common analog sampling circuit, and are transmitted to a common main controller after analog-to-digital conversion; The main controller identifies the harmonic components and reactive power components of the received signal and generates corresponding compensation control instructions. Based on the compensation control instructions, the main controller drives the active filter inverter circuit to inject compensation current into the power grid to reduce the total harmonic current content and improve the power factor. The main controller generates charging status data based on the sampled voltage and current signals, and couples the data to the AC power line for transmission through the power line carrier communication module.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the program, the steps of the power quality management method based on the charging pile are implemented as described in any one of claims 1 to 7.

10. A storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the power quality management method based on a charging pile as described in any one of claims 1 to 7 are implemented.

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