Modeling method, modeling device, digital twin model of traction system, electronic equipment and storage medium
By establishing a three-layer geometric simulation model of IGBT and iteratively correcting the thermal property parameters, the problem of insufficient simulation accuracy of IGBT modules was solved, achieving efficient simulation calculation and online monitoring, and improving the simulation accuracy and reliability of rail transit traction systems.
Patent Information
- Application Number
- CN202510710272.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-29
- Publication Date
- 2025-10-21
AI Technical Summary
In rail transit traction systems, existing technologies struggle to construct high-precision IGBT module simulation models. In particular, due to limitations in computer hardware performance, it is difficult to obtain detailed three-dimensional structures and parameters of IGBT devices, resulting in insufficient simulation accuracy and low computational efficiency.
A three-layer geometric simulation model of the IGBT and a three-dimensional simulation model of the heat sink are established. Boundary surface variables are defined, and the thermal properties of the intermediate layer are iteratively corrected until the thermal resistance of the chip meets the preset conditions, thus obtaining the equivalent thermal simulation model of the IGBT.
It improves simulation accuracy and computational efficiency, realizes efficient simulation of IGBT modules, supports system-level simulation and online monitoring, and ensures the safe and reliable operation of rail transit traction systems.
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Figure CN120822316A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of digital twin technology, and specifically to a modeling method, a modeling device, a digital twin model of a traction system, an electronic device, a chip, a computer-readable storage medium, and a computer program product. Background Art
[0002] In the field of power electronics for rail transit traction systems, high-precision, high-efficiency simulation models are a crucial foundation for virtual simulation, design optimization, and engineering applications. Building simulation models with appropriate characteristics, accuracy, and simulation speed tailored to specific needs at different design stages and application scenarios is a core modeling task.
[0003] In the simulation of a complete traction converter cabinet, due to the system's multiple components and the limitations of computer hardware performance, an equivalent model of the IGBT module is often used instead of its detailed model to ensure simulation feasibility and accuracy. Furthermore, in engineering practice, detailed 3D structural parameters within IGBT devices are often difficult to obtain; typically, only structural parameters at the chip and baseplate layers are available. Therefore, research on equivalent 3D simulation modeling of IGBTs is crucial for applications requiring high simulation accuracy. Summary of the Invention
[0004] Embodiments of the present application provide a modeling method, a modeling device, a digital twin model of a traction system, an electronic device, a chip, a computer-readable storage medium, and a computer program product.
[0005] The modeling method provided in the embodiment of the present application includes:
[0006] Establishing a three-layer geometric simulation model of the IGBT and a three-dimensional simulation model of the heat sink, and defining boundary surface variables of the three-layer geometric simulation model; the three-layer geometric simulation model includes: a chip layer, an intermediate layer, and a bottom plate layer;
[0007] Importing the three-layer geometric simulation model and the radiator three-dimensional simulation model into simulation software to obtain a thermal simulation model of the IGBT;
[0008] Assigning values to the thermal physical parameters of the chip layer, the middle layer, and the base layer; wherein the thermal physical parameters of the chip layer and the base layer are determined based on the thermal physical parameters of the chip layer and the base layer of an IGBT of the same structural type as the IGBT, and the thermal physical parameters of the middle layer are preset values;
[0009] Performing an iterative correction process to correct the thermal physical property parameters of the intermediate layer so that the chip thermal resistance of the thermal simulation model meets a preset condition;
[0010] The corrected thermal physical property parameters of the intermediate layer are determined to obtain an equivalent thermal simulation model of the IGBT.
[0011] The digital twin model of the traction system provided in the embodiment of the present application includes: a vehicle dynamics model, a lumped parameter equivalent digital circuit model, and a multi-field reduced-order model;
[0012] The vehicle dynamics model is at least used to simulate and obtain a first result; the first result includes: motor speeds corresponding to different motor torques, and the first result is transmitted to the lumped parameter equivalent digital circuit model;
[0013] The lumped parameter equivalent digital circuit model is at least used to simulate and obtain a second result based on the first result, and transmit the second result to the multi-field reduced-order model; the second result includes one or more of the following results: motor-related electrical parameters, converter-related electrical parameters, and converter electromagnetic losses; the converter electromagnetic losses include one or more of the following losses: insulated gate bipolar transistor (IGBT) losses, reactor losses, transformer losses, copper bus losses, and busbar losses;
[0014] The multi-field reduced-order model is at least used to simulate and obtain a third result based on the second result; the third result includes one or more of the following results: motor electromagnetic loss, motor temperature, converter temperature, and system structural stress; wherein, the IGBT equivalent thermal simulation model modeling operation used in the establishment process of the multi-field reduced-order model is obtained through the method provided in any embodiment of the present application.
[0015] The modeling device provided in the embodiment of the present application includes:
[0016] Modeling module: used to establish a three-layer geometric simulation model of the IGBT and a three-dimensional simulation model of the heat sink, and define boundary surface variables of the three-layer geometric simulation model; the three-layer geometric simulation model includes: a chip layer, an intermediate layer, and a base plate layer; the three-layer geometric simulation model and the three-dimensional simulation model of the heat sink are imported into the simulation software to obtain a thermal simulation model of the IGBT; the thermal physical parameters of the chip layer, the intermediate layer, and the base plate layer are assigned values; wherein the thermal physical parameters of the chip layer and the base plate layer are determined based on the thermal physical parameters of the chip layer and the base plate layer of an IGBT of the same structural type as the IGBT, and the thermal physical parameters of the intermediate layer are preset values;
[0017] Simulation module: used to perform an iterative correction process to correct the thermal physical parameters of the intermediate layer so that the chip thermal resistance of the thermal simulation model meets the preset conditions; determine the corrected thermal physical parameters of the intermediate layer to obtain the equivalent thermal simulation model of the IGBT.
[0018] The electronic device provided in an embodiment of the present application includes: a processor and a memory, the memory is used to store a computer program, and the processor is used to call and run the computer program stored in the memory to execute any modeling method provided in the embodiment of the present application.
[0019] The chip provided in the embodiment of the present application includes: a processor for calling and running a computer program from a memory, so that a device equipped with the chip executes any modeling method provided in the embodiment of the present application.
[0020] The computer-readable storage medium provided in the embodiments of the present application is used to store a computer program, and the computer program enables a computer to execute any modeling method provided in the embodiments of the present application.
[0021] The computer program product provided in the embodiments of the present application includes a computer program, which implements any modeling method provided in the embodiments of the present application when executed by a processor.
[0022] Through the modeling method provided in the embodiment of the present application, a thermal simulation model of the IGBT is established, and the thermal physical parameters of the chip layer and the base layer are assigned. Then, the thermal physical parameters of the middle layer are continuously corrected through an iterative correction process until the chip thermal resistance of the thermal simulation model meets the preset conditions. The corrected thermal physical parameters of the middle layer are obtained, and an equivalent thermal simulation model of the IGBT can be obtained through only one simulation calculation, thereby improving calculation efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:
[0024] Figure 1 A schematic cross-sectional view of the internal structure of an IGBT provided in an embodiment of the present application;
[0025] Figure 2 Schematic diagram of the implementation process of the modeling method provided in the embodiment of this application Figure 1 ;
[0026] Figure 3 A schematic diagram of the structure of a three-layer geometric simulation model provided in an embodiment of the present application;
[0027] Figure 4 Schematic diagram of the implementation process of the modeling method provided in the embodiment of this application Figure 2 ;
[0028] Figure 5 A schematic diagram of the two-dimensional layout of the IGBT provided in an embodiment of the present application;
[0029] Figure 6 A schematic diagram of a three-dimensional simulation model of an IGBT module and a heat sink provided in an embodiment of the present application;
[0030] Figure 7 A schematic diagram of parameter changes during the iterative correction process provided in an embodiment of the present application;
[0031] Figure 8 A schematic diagram of the structure of a digital twin model of a traction system provided in an embodiment of the present application;
[0032] Figure 9 A schematic diagram of the structure of the modeling device provided in an embodiment of the present application;
[0033] Figure 10 A schematic structural diagram of an electronic device provided in an embodiment of the present application;
[0034] Figure 11 This is a schematic structural diagram of the chip provided in an embodiment of the present application. DETAILED DESCRIPTION
[0035] The following will describe the technical solutions in the embodiments of this application in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.
[0036] It should be noted that in the embodiments of the present application, the term "and / or" is merely a description of the association relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent three situations: A exists alone, A and B exist at the same time, and B exists alone. In addition, in the embodiments of the present application, the character " / " generally indicates that the associated objects are in an "or" relationship.
[0037] In the description of the embodiments of the present application, the term "corresponding" may indicate a direct or indirect correspondence between the two, or an association relationship between the two, or a relationship between indication and being indicated, configuration and being configured, etc.
[0038] To facilitate understanding of the technical solutions of the embodiments of the present application, the relevant technologies of the embodiments of the present application are described below. The following relevant technologies can be arbitrarily combined with the technical solutions of the embodiments of the present application as optional solutions, and they all fall within the protection scope of the embodiments of the present application.
[0039] As a core component in high-speed train traction converters, the reliable operation of the IGBT module directly impacts the overall stability of the system. Understanding the junction temperature and thermal distribution of the IGBT module is a key focus of product design and reliability research. Due to device packaging limitations, it is difficult to directly determine the IGBT junction temperature through experimental means. However, using finite element numerical thermal simulation technology allows for quick and easy simulation of the IGBT module's thermal distribution, overcoming the limitations of experimental methods. Establishing a sound physical model is a prerequisite for finite element simulation.
[0040] The welded high-voltage IGBT module currently used in the rail transit traction field is a seven-layer structure. The internal structure section is as follows: Figure 1 As shown, Figure 1 This is a schematic cross-sectional view of the internal structure of an IGBT module provided in an embodiment of the present application. From top to bottom, it shows the chip layer (IGBT chip and FWD chip), solder layer, upper copper layer, ceramic layer, lower copper layer, solder layer, and base plate layer. The remaining space inside the IGBT module is filled with insulating silicone gel and encapsulated in a plastic housing.
[0041] In many engineering applications, the detailed internal three-dimensional structure and parameters of IGBT devices are usually not easy to obtain. Only the structure and parameters of the top chip and the bottom baseboard are known. In order to improve the simulation accuracy, an equivalent three-dimensional finite element simulation modeling study of IGBT is conducted. A feasible method is to merge the middle layers into one layer to build a three-layer structure simulation model of IGBT. In addition, when performing system-level simulation of the entire converter cabinet, even if the detailed internal three-dimensional structure and parameters of the IGBT device can be obtained, due to the limitations of computer hardware, in order to ensure the feasibility and high accuracy of the simulation, it is necessary to use a three-layer equivalent model of the IGBT module instead of a seven-layer detailed model. Whether it is simplified modeling or system-level simulation, the calculation of the thermal parameters of the equivalent layer is a key issue that needs to be solved.
[0042] Related technologies use a parameter trial-and-error method to simulate multiple sets of thermal parameter values, extract the model thermal resistance value, and compare and adjust it with the thermal resistance value given in the data sheet. This requires multiple finite element simulation calculations on multiple sets of thermal parameter values, which consumes a lot of computing time and cost.
[0043] Figure 2 Schematic diagram of the implementation process of the modeling method provided in the embodiment of this application Figure 1 ,like Figure 2 As shown, the method includes the following steps:
[0044] Step 201: Establish a three-layer geometric simulation model of the IGBT and a three-dimensional simulation model of the heat sink, and define the boundary surface variables of the three-layer geometric simulation model; the three-layer geometric simulation model includes: a chip layer, an intermediate layer and a bottom plate layer, such as Figure 3 As shown, Figure 3This is a schematic diagram of the structure of the three-layer geometric simulation model provided in the embodiment of the present application.
[0045] In this embodiment, a three-layer geometric simulation model of the IGBT module and a three-dimensional simulation model of the heat sink are constructed based on the two-dimensional layout of the chips within the IGBT module and the physical structure of the heat sink. The three-layer geometric simulation model of the IGBT consists of three layers: the chip layer, the intermediate layer, and the base plate layer, from top to bottom. The horizontal dimensions of the model are determined based on the annotated data of the two-dimensional layout diagram of the IGBT module, and the vertical dimensions are determined based on the known dimensional parameters of IGBTs of the same structure.
[0046] In the embodiment of the present application, the same structural type refers to that the external structure and internal composition of the IGBT are similar. For example, two welding-type IGBTs belong to the same type of IGBT structure, and two crimping-type IGBTs belong to the same type of IGBT.
[0047] In the embodiment of the present application, the IGBT may be an IGBT in the rail transit field, or an IGBT in the automotive field, photovoltaic field or other fields, and the embodiment of the present application does not limit this.
[0048] In the embodiment of the present application, the defined boundary surfaces include one or more of the following boundary surfaces: the top surface of the IGBT chip, the top surface of the FWD chip, the contact surface between the bottom plate and the heat sink, the contact surface between the chip layer and the middle layer, and the contact surface between the middle layer and the bottom plate layer. For example, the boundary names of the contact surface between the bottom plate and the heat sink, the top surface of the IGBT chip, and the top surface of the FWD chip are respectively Boundary Case 、Boundary Junction-IGBT and Boundary Junction-FWD .
[0049] In the embodiment of the present application, the variables include one or more of the following parameters: temperature, device loss, and junction-to-case thermal resistance.
[0050] In the embodiment of the present application, the middle layer is a structure between the IGBT module chip layer and the base plate layer, for example, Figure 1 The actual middle layer includes multiple layers: a solder layer, an upper copper layer, a ceramic layer, a lower copper layer, and a solder layer. During simulation, the middle layer of the multi-layer structure is simplified to a single layer structure based on actual conditions. In the embodiments of the present application, the middle layer can be adaptively adjusted according to the structure of the IGBT during simulation, but this embodiment of the present application does not limit this.
[0051] Step 202: Import the three-layer geometric simulation model and the heat sink three-dimensional simulation model into simulation software to obtain a thermal simulation model of the IGBT.
[0052] In the embodiment of the present application, the three-layer geometric simulation model of the IGBT module and the three-dimensional simulation model of the heat sink are imported into the simulation software for independence verification and convergence test, and converted into the IGBT device-level thermal simulation model Model IGBT .
[0053] In the embodiment of the present application, the simulation software may be CFD simulation software or other simulation software, and the embodiment of the present application does not limit this.
[0054] Step 203: Assigning values to the thermal physical parameters of the chip layer, the middle layer, and the bottom plate layer; wherein the thermal physical parameters of the chip layer and the bottom plate layer are determined based on the thermal physical parameters of the chip layer and the bottom plate layer of an IGBT of the same structural type as the IGBT, and the thermal physical parameters of the middle layer are preset values.
[0055] In the embodiment of the present application, it is necessary to assign material properties to the thermal simulation model. The chip layer and the bottom plate layer of the IGBT are on the outside, and the chip layer is invisible. The chip layer is generally silicon-based or SIC-based. The material information of the chip layer can be obtained from the IGBT datasheet. The bottom plate layer is visible from the outside, and the material used for the bottom plate layer can be determined from the appearance. Its thermal physical parameters can be determined by referring to the IGBT module of the same structural type; the thermal physical parameters of the middle layer are preset values, and the preset values can be determined by referring to the known thermal physical property range of the middle multilayer material of the IGBT module of the same structural type. For example, for the IGBT module of the same structural type, the maximum and minimum values of the thermal physical parameters of the middle multilayer material are determined by reference. Figure 1 For IGBT modules of the same structural type, the thermal properties of the materials in each layer, including the solder layer, upper copper layer, ceramic layer, lower copper layer, and solder layer, are determined. The maximum and minimum values of the thermal properties of each layer are determined. The thermal property range can be greater than or equal to the minimum value and less than or equal to the maximum value, and the preset value is within the thermal property range. Choosing reasonable preset values can reduce computing resource usage and improve computational efficiency.
[0056] Based on this, in an optional embodiment of the present application, the preset value is determined based on the range of thermophysical property parameters of the intermediate multilayer material of the IGBT of the same structural type as the IGBT.
[0057] In the embodiment of the present application, the thermophysical property parameters include one or more of the following parameters: thermal conductivity, specific heat capacity and density.
[0058] Step 204: performing an iterative correction process to correct the thermal physical property parameters of the intermediate layer so that the chip thermal resistance of the thermal simulation model meets a preset condition.
[0059] In an embodiment of the present application, the iterative correction process is to simulate the thermal simulation model after assigning the thermal physical parameters of the chip layer, the middle layer and the bottom plate layer under the set working conditions to obtain the chip thermal resistance. If the chip thermal resistance does not meet the preset conditions, the thermal physical parameters of the middle layer are continuously adjusted until the chip thermal resistance meets the preset conditions, and the iterative correction process is stopped to obtain the corrected thermal physical parameters of the middle layer.
[0060] In the embodiment of the present application, the preset condition includes: a difference between the chip thermal resistance and the chip thermal resistance value in the datasheet of the IGBT is within a preset range.
[0061] In an embodiment of the present application, the preset range can be 10% of the chip thermal resistance value in the IGBT datasheet, that is, the difference between the chip thermal resistance and the chip thermal resistance value in the IGBT datasheet is less than or equal to 10% of the chip thermal resistance value in the IGBT datasheet. It should be noted that other preset ranges can also be used as needed in actual applications, and the embodiment of the present application does not limit this.
[0062] In the embodiment of the present application, the IGBT three-layer equivalent thermal model function is constructed. Make equivalent model Model IGBT-equiv The deviation between the chip thermal resistance value obtained by simulation and the chip thermal resistance value in the IGBT module datasheet is within the preset range.
[0063] In the embodiment of the present application, the iterative correction process is described by taking the thermal conductivity as an example of the thermal property parameter of the intermediate layer. The thermal model is simulated under the set working conditions, and the function is extracted by the IGBT thermal model variable. Extract the temperature value of the boundary surface; for example, extract the boundary values corresponding to the contact surface between the base plate and the heat sink, the top surface of the IGBT chip, and the top surface of the FWD chip. Case 、Boundary Junction-IGBT and Boundary Junction-FWD The average temperature of the boundary surface T c 、T j-IGBT and T j-FWD , combined with the loss P of the IGBT chip and FWD chip IGBT and P FWD , use the IGBT module case thermal resistance formula to calculate the chip thermal resistance R jc-IGBT =(T j-IGBT -T c ) / P IGBT and R jc-FWD =(T j-FWD -T c ) / P FWD .
[0064] The mathematical function relationship between the thermal properties of the intermediate layer and the thermal resistance of the chip is established using Fourier's law of heat conduction. Right now:
[0065] in,
[0066] T j is the junction temperature of the IGBT module, where the junction temperature of the IGBT chip is T j-IGBT , that is, the Boundary corresponding to the top surface of the above-mentioned IGBT chip Junction-IGBT The average temperature of the boundary surface T j-IGBT , the junction temperature of the FWD chip is T j-FWD , that is, the Boundary corresponding to the top surface of the FWD chip Junction-FWD The average temperature of the boundary surface T j-FWD ;T c The shell temperature of the IGBT module, that is, the boundary temperature corresponding to the contact surface between the base plate and the heat sink Case The average temperature of the boundary surface T c ;
[0067] P is the device loss under the set working conditions, where the device loss of the IGBT chip is P IGBT , the device loss of the FWD chip is P FWD ;
[0068] R jc * The thermal resistance extracted by the simulation model during the previous round of iterative correction, where the thermal resistance of the IGBT chip is R jc-IGBT * , the thermal resistance of the FWD chip is R jc-FWD * ;
[0069] R is the thermal resistance in the datasheet provided by the IGBT module manufacturer, where the thermal resistance of the IGBT chip is R IGBT , the thermal resistance of the FWD chip is R FWD ;
[0070] λ' is the correction value of the thermophysical parameter; α is the thermophysical sub-relaxation factor; λ * is the thermophysical parameter value of the middle layer corresponding to the previous iterative correction process, and λ is the thermophysical parameter value of the middle layer corresponding to the current iterative correction process;
[0071] The thickness to effective heat transfer area ratio corresponding to the previous round of iterative correction process is the ratio of thickness to effective heat transfer area. The ratio is related to the thermophysical parameter value λ of the intermediate layer and the thermal resistance R of the model chip. jc Function, for example, f(λ,Rjc )=λ·R jc .
[0072] Based on this, in an optional implementation manner of the present application, each correction process of the iterative correction process includes:
[0073] If the chip thermal resistance obtained in the previous round of iterative correction process does not meet the preset conditions, the corrected value of the thermophysical property parameter of the intermediate layer is calculated according to the first parameter; the thermophysical property parameter of the intermediate layer is corrected according to the second parameter to obtain the first thermophysical property parameter, and the first thermophysical property parameter is used as the thermophysical property parameter of the intermediate layer in the current round of simulation process, and the thermal simulation model is simulated under the set working conditions to obtain the chip thermal resistance corresponding to the current iteration round; wherein, the first parameter includes: the chip thermal resistance obtained in the previous round of iterative correction process, the ratio of the thickness to the effective heat exchange area of the IGBT corresponding to the previous round of iterative correction process, and the chip thermal resistance value in the datasheet of the IGBT; the second parameter includes: the thermophysical property parameter of the intermediate layer in the previous round of iterative correction process, the thermophysical property sub-relaxation factor and the corrected value of the thermophysical property parameter;
[0074] If the chip thermal resistance obtained in the previous iterative correction process meets the preset conditions, the iterative correction process is stopped, and the first thermophysical property parameter in the previous iterative correction process is used as the corrected thermophysical property parameter of the intermediate layer.
[0075] Based on this, in an optional embodiment of the present application, the calculating of the corrected value of the thermophysical parameter of the intermediate layer according to the first parameter; and correcting the thermophysical parameter of the intermediate layer according to the second parameter to obtain the first thermophysical parameter include:
[0076] An iterative mathematical model is constructed based on Fourier's law of heat conduction and the thermal resistance definition formula. According to the first parameter, the thermophysical property parameter correction value is calculated by the iterative mathematical model; according to the second parameter, the first thermophysical property parameter is calculated by the iterative mathematical model.
[0077] Step 205: Determine the corrected thermal physical parameters of the intermediate layer to obtain an equivalent thermal simulation model of the IGBT.
[0078] In the embodiment of the present application, after an iterative correction process, the thermophysical property parameters of the intermediate layer can be determined, and further, an equivalent thermal simulation model of the IGBT can be obtained.
[0079] In an embodiment of the present application, various working conditions can also be converted into boundary excitation input conditions, and the equivalent thermal simulation model of the IGBT can be subjected to reduced-order analysis. The relationship between the third parameter and the fourth parameter is extracted based on the deep learning algorithm to generate a reduced-order model (ROM), wherein the third parameter includes: device loss of the IGBT, cooling fluid flow rate, and ambient temperature; the fourth parameter includes: junction temperature and field distribution of the IGBT.
[0080] Based on this, in an optional embodiment of the present application, a reduced-order analysis is performed on the equivalent thermal simulation model of the IGBT under various working conditions to obtain analysis results;
[0081] Based on a deep learning algorithm, the relationship between the third parameter and the fourth parameter in the analysis result is extracted to generate a reduced-order model to realize IGBT online monitoring; wherein, the third parameter includes: IGBT device loss, cooling fluid flow, and ambient temperature; the fourth parameter includes: IGBT junction temperature and field distribution.
[0082] In the embodiment of the present application, the reduced-order model can be used to quickly obtain the junction temperature variation law and temperature field distribution of the IGBT module, thereby achieving efficient online monitoring and fault prediction.
[0083] In the embodiment of the present application, if the IGBT is applied to the field of rail transportation, the various operating conditions include: normal operation of the line, line fault, and operation under extreme line conditions.
[0084] The solution of this application is further explained below using a certain type of IGBT in the rail transit field.
[0085] Figure 4 Schematic diagram of the implementation process of the modeling method provided in the embodiment of this application Figure 2 ,like Figure 4 As shown, the method includes the following steps:
[0086] Step 401: Create a three-layer geometric simulation model of the IGBT and a three-dimensional simulation model of the heat sink.
[0087] Based on the two-dimensional layout of the internal chip and the physical structure of the heat sink of a certain type of rail transit IGBT module, three-dimensional simulation models of the IGBT module and heat sink are established respectively, such as Figure 5 and Figure 6 As shown, Figure 5 This is a schematic diagram of the two-dimensional layout of the IGBT provided in the embodiment of the present application. Figure 6This is a schematic diagram of a three-dimensional simulation model of an IGBT module and a heat sink provided in an embodiment of the present application, wherein the three-dimensional simulation model of the IGBT module has a three-layer structure, namely, a chip layer, an intermediate layer, and a base plate layer from top to bottom. The heat sink can adopt a water-cooled substrate. The horizontal size of the model is determined according to the annotation data of the IGBT two-dimensional layout schematic diagram, and the vertical size is determined according to the known IGBT size parameters of the same structure type.
[0088] Step 402: Define the thermal simulation boundary of the IGBT.
[0089] Define the boundaries of the bottom surface of the base plate (i.e. the contact surface between the base plate layer and the heat sink) and the top surface of the chip (including the top surface of the IGBT chip and the top surface of the FWD chip) in the built IGBT three-dimensional simulation model. Case 、Boundary Junction-IGBT and Boundary Junction-FWD .
[0090] Step 403: Generate an IGBT device-level thermal simulation model.
[0091] Import the IGBT 3D simulation model and the radiator 3D simulation model with defined boundary names into the CFD simulation software for mesh independence verification and convergence test, and convert them into the IGBT device-level thermal simulation model. IGBT .
[0092] Step 404: Given the thermal physical property parameters of the middle layer of the thermal simulation model, simulation is performed according to the set working conditions to obtain the chip thermal resistance of the thermal simulation model.
[0093] Assign material properties to the IGBT device-level thermal simulation model, where the thermal properties of the chip layer and the base layer in the thermal simulation model are determined based on the known IGBT modules of the same structural type, and the initial value of the thermal property of the middle layer is given by referring to the thermal property range of the middle multilayer materials of the known IGBT modules of the same structural type. For example, the initial value of the thermal property of the middle layer is λ0. Simulate the thermal simulation model under the set working conditions, and extract the function through the IGBT thermal model variable. Extract the boundaries corresponding to the contact surface between the base plate and the radiator, the top surface of the IGBT chip, and the top surface of the FWD chip Case 、Boundary Junction-IGBT and Boundary Junction-FWD The average temperature of the boundary surface T c 、T j-IGBT and T j-FWD , combined with the loss P of the IGBT chip and FWD chip IGBT and P FWD, use the IGBT module case thermal resistance formula to calculate the chip thermal resistance R jc-IGBT =(T j-IGBT -T c ) / P IGBT and R jc-FWD =(T j-FWD -T c ) / P FWD .
[0094] Step 405: Determine whether the chip thermal resistance meets a preset condition.
[0095] The preset condition is that the difference between the chip thermal resistance and the chip thermal resistance value in the IGBT datasheet is within a preset range;
[0096] If the chip thermal resistance R jc If the difference between the chip thermal resistance value and the chip thermal resistance value in the IGBT datasheet is not within the preset range, execute step 406;
[0097] If the chip thermal resistance R jc If the difference between the chip thermal resistance value and the IGBT datasheet is within the preset range, execute step 407.
[0098] Step 406: Modify the thermal physical property parameters of the intermediate layer of the thermal simulation model.
[0099] The thermal physical properties of the middle layer of the thermal simulation model are corrected using the following calculation formula:
[0100]
[0101] λ=λ * ±α·λ', where
[0102] λ' is the correction value of the thermophysical parameter; α is the thermophysical sub-relaxation factor; λ * is the thermophysical parameter value of the middle layer corresponding to the previous iterative correction process, and λ is the thermophysical parameter value of the middle layer corresponding to the current iterative correction process;
[0103] The thickness to effective heat transfer area ratio corresponding to the previous round of iterative correction process is the ratio of thickness to effective heat transfer area. The ratio is related to the thermophysical parameter value λ of the intermediate layer and the thermal resistance R of the model chip. jc function.
[0104] refer to Figure 7 , Figure 7 This is a schematic diagram of parameter changes during the iterative correction process provided in the embodiment of the present application. Figure 7 The left figure is a schematic diagram of the change of chip thermal resistance of the IGBT thermal simulation model. Figure 7The figure on the right is a schematic diagram of the changes in the thermal physical parameters of the middle layer of the IGBT thermal simulation model. As the thermal physical parameters of the middle layer of the IGBT thermal simulation model change, the chip thermal resistance of the IGBT thermal simulation model gradually approaches the chip thermal resistance in the IGBT module datasheet.
[0105] The corrected thermal physical property parameters of the middle layer of the thermal simulation model are used as the thermal physical property parameters of the middle layer of the thermal simulation model, and step 404 is executed to perform simulation again under the set working conditions.
[0106] Step 407: Determine the thermal physical property parameters of the intermediate layer of the thermal simulation model to obtain an IGBT device-level equivalent thermal simulation model.
[0107] When the chip thermal resistance of the thermal simulation model meets the preset conditions, the thermal physical property parameters of the intermediate layer of the thermal simulation model can be determined to obtain the IGBT device-level equivalent thermal simulation model.
[0108] Step 408: Build a reduced-order model.
[0109] Based on the IGBT equivalent thermal simulation model, the actual vehicle line operation, fault, extreme and other operating conditions are converted into boundary excitation input conditions, and the model is reduced-order analysis is performed. Based on the deep learning algorithm, the relationship between device loss, cooling fluid flow, ambient temperature and IGBT module junction temperature and field distribution is extracted to generate a reduced-order model. The junction temperature variation law and temperature field distribution of the IGBT module can be quickly obtained, realizing efficient online monitoring and fault prediction.
[0110] refer to Figure 8 , Figure 8 A schematic diagram of the structure of a digital twin model of a traction system provided in an embodiment of the present application, wherein the digital twin model includes: a vehicle dynamics model, a lumped parameter equivalent digital circuit model, and a multi-field reduced-order model;
[0111] The vehicle dynamics model is at least used to simulate and obtain a first result; the first result includes: motor speeds corresponding to different motor torques, and the first result is transmitted to the lumped parameter equivalent digital circuit model;
[0112] The lumped parameter equivalent digital circuit model is at least used to simulate and obtain a second result based on the first result, and transmit the second result to the multi-field reduced-order model; the second result includes one or more of the following results: motor-related electrical parameters, converter-related electrical parameters, and converter electromagnetic losses; the converter electromagnetic losses include one or more of the following losses: insulated gate bipolar transistor (IGBT) losses, reactor losses, transformer losses, copper bus losses, and busbar losses;
[0113] The multi-field reduced-order model is at least used to simulate and obtain a third result based on the second result; the third result includes one or more of the following results: motor electromagnetic loss, motor temperature, converter temperature, and system structural stress; wherein, the IGBT equivalent thermal simulation model modeling operation used in the establishment process of the multi-field reduced-order model is obtained through the method provided in any embodiment of the present application.
[0114] The digital twin model provided in the embodiment of the present application can allow multiple models to participate in the simulation together. Multiple system parameters can be obtained in one simulation, which can comprehensively reflect the system status. In addition, the simulation results of each model can influence each other, which can improve the simulation accuracy of each model.
[0115] The digital twin model in the embodiment of the present application is a system-level simulation. When simulating the entire converter cabinet at the system level, the IGBT module is one of its components. Due to the limitations of computer hardware, the modeling method of the present application is used to obtain an equivalent thermal simulation model of the IGBT, replacing the seven-layer detailed model, to ensure the feasibility and high accuracy of the converter cabinet simulation.
[0116] In an embodiment of the present application, the multi-field reduced-order model further includes: a motor electromagnetic loss reduced-order model, a motor temperature field reduced-order model, and a stress field reduced-order model.
[0117] In the embodiment of the present application, the output frequency of the lumped parameter equivalent digital circuit model is 10 5 -10 7 Hz, the input frequency of the multi-field reduced-order model is 0.1-1 Hz, and the lumped parameter equivalent digital circuit model and the multi-field reduced-order model achieve temporal matching between the lumped parameter equivalent digital circuit model output data and the reduced-order model input data through a multi-time-scale data matching interface.
[0118] The modeling method provided in the embodiments of the present application can be applied to, but not limited to, simulation analysis under the following two working conditions:
[0119] One is that when simulating the entire converter cabinet at the system level, the detailed internal three-dimensional structure and parameters of the IGBT device are known. The cabinet contains many components, and the IGBT module is one of its components. Due to the limitations of computer hardware, in order to ensure the feasibility and high accuracy of the converter cabinet simulation, the modeling method of this application is used to obtain an equivalent thermal simulation model of the IGBT, replacing the seven-layer detailed model.
[0120] Another is engineering applications where the detailed internal three-dimensional structure and parameters of IGBT devices are difficult to obtain. When the structures and parameters of the top layer - chip and the bottom layer - baseboard are known, a three-layer equivalent model of the IGBT module is built for finite element simulation to improve simulation accuracy.
[0121] The modeling method provided in the embodiment of the present application uses the available IGBT three-dimensional structure or IGBT two-dimensional layout, and an IGBT module thermal parameter extraction method based on parameter-optimized thermal resistance to simplify the multi-layer structure composed of different materials between the chip and the base plate into a single-layer structure, namely the middle layer, and build an IGBT equivalent three-layer thermal simulation model to realize the monitoring of the IGBT junction temperature. The constructed thermal physical parameter approximation mathematical function only needs one simulation calculation and one input parameter setting to realize the calibration of the middle layer thermal parameters of the IGBT equivalent thermal model, which previously required multiple parameter trial simulation calculations, thereby improving the calculation efficiency. The IGBT reduced-order model built through reduced-order analysis can realize efficient visual monitoring and fault prediction of the entire field range of the IGBT module under line operating conditions, thereby ensuring the safe and reliable operation of the rail transit traction system.
[0122] Figure 9 A schematic diagram of the structure of the modeling device provided in the embodiment of the present application is shown in FIG. Figure 9 As shown, the modeling device provided in the embodiment of the present application includes:
[0123] Modeling module: used to establish a three-layer geometric simulation model of the IGBT and a three-dimensional simulation model of the heat sink, and define boundary surface variables of the three-layer geometric simulation model; the three-layer geometric simulation model includes: a chip layer, an intermediate layer, and a base plate layer; the three-layer geometric simulation model and the three-dimensional simulation model of the heat sink are imported into the simulation software to obtain a thermal simulation model of the IGBT; the thermal physical parameters of the chip layer, the intermediate layer, and the base plate layer are assigned values; wherein the thermal physical parameters of the chip layer and the base plate layer are determined based on the thermal physical parameters of the chip layer and the base plate layer of an IGBT of the same structural type as the IGBT, and the thermal physical parameters of the intermediate layer are preset values;
[0124] Simulation module: used to perform an iterative correction process to correct the thermal physical parameters of the intermediate layer so that the chip thermal resistance of the thermal simulation model meets the preset conditions; determine the corrected thermal physical parameters of the intermediate layer to obtain the equivalent thermal simulation model of the IGBT.
[0125] In an embodiment of the present application, the simulation module is used to calculate the corrected value of the thermophysical property parameters of the intermediate layer according to the first parameter if the chip thermal resistance obtained in the previous round of iterative correction process does not meet the preset conditions; correct the thermophysical property parameters of the intermediate layer according to the second parameter to obtain the first thermophysical property parameters, and use the first thermophysical property parameters as the thermophysical property parameters of the intermediate layer in the current round of simulation process, simulate the thermal simulation model under the set working conditions, and obtain the chip thermal resistance corresponding to the current iteration round; wherein the first parameter includes: the chip thermal resistance obtained in the previous round of iterative correction process, the ratio of the thickness to the effective heat exchange area of the IGBT corresponding to the previous round of iterative correction process, and the chip thermal resistance value in the datasheet of the IGBT; the second parameter includes: the thermophysical property parameters of the intermediate layer in the previous round of iterative correction process, the thermophysical sub-relaxation factor and the corrected value of the thermophysical property parameters; if the chip thermal resistance obtained in the previous round of iterative correction process meets the preset conditions, the iterative correction process is stopped, and the first thermophysical property parameters in the previous round of iterative correction process are used as the corrected thermophysical property parameters of the intermediate layer.
[0126] In an embodiment of the present application, the simulation module is used to build an iterative mathematical model based on Fourier's law of heat conduction and the thermal resistance definition formula, and to obtain the corrected value of the thermophysical property parameter by calculating the iterative mathematical model according to the first parameter; and to obtain the first thermophysical property parameter by calculating the iterative mathematical model according to the second parameter.
[0127] In the embodiment of the present application, the preset condition includes: a difference between the chip thermal resistance and the chip thermal resistance value in the datasheet of the IGBT is within a preset range.
[0128] In the embodiment of the present application, the preset value is determined based on the range of thermophysical property parameters of the intermediate layer of an IGBT of the same structural type as the IGBT.
[0129] In an embodiment of the present application, the simulation module is also used to perform reduced-order analysis on the equivalent thermal simulation model of the IGBT under multiple working conditions to obtain analysis results; based on a deep learning algorithm, the relationship between the third parameter and the fourth parameter in the analysis results is extracted to generate a reduced-order model to realize online monitoring of the IGBT; wherein, the third parameter includes: device loss of the IGBT, cooling fluid flow rate, and ambient temperature; the fourth parameter includes: junction temperature and field distribution of the IGBT.
[0130] It should be understood by those skilled in the art that Figure 9 The implementation functions of each module in the modeling device shown can be understood by referring to the relevant description of the aforementioned method. Figure 9 The functions of the modules in the modeling device shown can be implemented by a program running on a processor, or by a specific logic circuit.
[0131] Figure 10 It is a schematic structural diagram of an electronic device 1000 provided in an embodiment of the present application. Figure 10 The electronic device 1000 shown includes a processor 1010, which can call and run a computer program from a memory to implement the method in the embodiment of the present application.
[0132] Alternatively, as Figure 10 As shown, the electronic device 1000 may further include a memory 1020. The processor 1010 may call and execute a computer program from the memory 1020 to implement the method in the embodiment of the present application.
[0133] The memory 1020 may be a separate device independent of the processor 1010 , or may be integrated into the processor 1010 .
[0134] Alternatively, as Figure 10 As shown, the electronic device 1000 may further include a transceiver 1030 , and the processor 1010 may control the transceiver 1030 to communicate with other devices. Specifically, it may send information or data to other devices, or receive information or data sent by other devices.
[0135] The transceiver 1030 may include a transmitter and a receiver. The transceiver 1030 may further include an antenna, and the number of antennas may be one or more.
[0136] The electronic device 1000 can specifically be a modeling device in an embodiment of the present application, and the electronic device 1000 can implement the corresponding processes implemented by the modeling device in each method in the embodiment of the present application. For the sake of brevity, they will not be repeated here.
[0137] Illustratively, an embodiment of the present application further provides a computer program product, including a computer program, which can be executed by the processor 1010 of the electronic device 1000 to complete the steps of any of the aforementioned methods.
[0138] Figure 11 It is a schematic structural diagram of the chip of an embodiment of the present application. Figure 11 The chip 1100 shown includes a processor 1110, which can call and run a computer program from a memory to implement the method in the embodiment of the present application.
[0139] Alternatively, as Figure 11 As shown, the chip 1100 may further include a memory 1120. The processor 1110 may call and execute a computer program from the memory 1120 to implement the method in the embodiment of the present application.
[0140] The memory 1120 may be a separate device independent of the processor 1110 , or may be integrated into the processor 1110 .
[0141] Optionally, the chip 1100 may further include an input interface 1130. The processor 1110 may control the input interface 1130 to communicate with other devices or chips, and specifically, may obtain information or data sent by other devices or chips.
[0142] Optionally, the chip 1100 may further include an output interface 1140. The processor 1110 may control the output interface 1140 to communicate with other devices or chips, and specifically, may output information or data to other devices or chips.
[0143] The chip can be applied to the electronic devices in the embodiments of the present application, and the chip can implement the corresponding processes implemented by the electronic devices in the various methods in the embodiments of the present application. For the sake of brevity, they will not be described here.
[0144] It should be understood that the chip mentioned in the embodiments of the present application can also be called a device-level chip, a device chip, a chip device or an on-chip device chip, etc.
[0145] It should be understood that the processor of the embodiments of the present application may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method embodiment can be completed by hardware integrated logic circuits in the processor or software instructions. The above processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. The various methods, steps, and logic block diagrams disclosed in the embodiments of the present application can be implemented or executed. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in the embodiments of the present application can be directly implemented as a hardware decoding processor, or can be implemented by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium mature in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, etc. The storage medium is located in the memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.
[0146] It is understood that the memory in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct RAM bus random access memory (DR RAM). It should be noted that the memory of the apparatus and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.
[0147] It should be understood that the above-mentioned memories are exemplary but not restrictive. For example, the memories in the embodiments of the present application may also be static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct RAM RAM (DR RAM), etc. In other words, the memories in the embodiments of the present application are intended to include, but are not limited to, these and any other suitable types of memories.
[0148] The present application also provides a computer-readable storage medium for storing a computer program. The computer-readable storage medium can be applied to the electronic device in the present application, and the computer program causes a computer to execute the corresponding processes implemented by the electronic device in the various methods of the present application. For the sake of brevity, these are not further described here.
[0149] Those skilled in the art will appreciate that the modules and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0150] In the several embodiments provided in this application, it should be understood that the disclosed devices, apparatuses and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules is merely a logical function division. In actual implementation, there may be other division methods, such as multiple modules or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.
[0151] The modules described as separate components may or may not be physically separate, and the components shown as modules may or may not be physical modules, that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules may be selected to achieve the purpose of the present embodiment according to actual needs.
[0152] In addition, each functional module in each embodiment of the present application may be integrated into one processing module, or each module may exist physically separately, or two or more modules may be integrated into one module.
[0153] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or an electronic device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.
[0154] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.
Claims
1. A modeling method, characterized in that: The method comprises: Establishing a three-layer geometric simulation model of the IGBT and a three-dimensional simulation model of the heat sink, and defining boundary surface variables of the three-layer geometric simulation model; the three-layer geometric simulation model includes: a chip layer, an intermediate layer, and a bottom plate layer; Importing the three-layer geometric simulation model and the radiator three-dimensional simulation model into simulation software to obtain a thermal simulation model of the IGBT; Assigning values to the thermal physical parameters of the chip layer, the middle layer, and the bottom plate layer; wherein the thermal physical parameters of the chip layer and the bottom plate layer are determined based on the thermal physical parameters of an IGBT of the same structural type as the IGBT, and the thermal physical parameters of the middle layer are preset values; Performing an iterative correction process to correct the thermal physical property parameters of the intermediate layer so that the chip thermal resistance of the thermal simulation model meets a preset condition; The corrected thermal physical property parameters of the intermediate layer are determined to obtain an equivalent thermal simulation model of the IGBT.
2. The method according to claim 1, characterized in that Each correction process of the iterative correction process includes: If the chip thermal resistance obtained in the previous round of iterative correction process does not meet the preset conditions, then calculate the corrected value of the thermophysical parameter of the intermediate layer based on the first parameter; correct the thermophysical parameter of the intermediate layer based on the second parameter to obtain the first thermophysical parameter, use the first thermophysical parameter as the thermophysical parameter of the intermediate layer in the current round of simulation, simulate the thermal simulation model under the set working conditions, and obtain the chip thermal resistance corresponding to the current iterative round; The first parameter includes: the chip thermal resistance obtained in the previous round of iterative correction process, the ratio of the thickness to the effective heat exchange area of the IGBT corresponding to the previous round of iterative correction process, and the chip thermal resistance value in the datasheet of the IGBT; the second parameter includes: the thermophysical property parameters of the intermediate layer in the previous round of iterative correction process, the thermophysical property sub-relaxation factor, and the thermophysical property parameter correction value; If the chip thermal resistance obtained in the previous iterative correction process meets the preset conditions, the iterative correction process is stopped, and the first thermophysical property parameter in the previous iterative correction process is used as the corrected thermophysical property parameter of the intermediate layer.
3. The method according to claim 2, characterized in that calculating a correction value of the thermophysical property parameter of the intermediate layer according to the first parameter; Correcting the thermophysical parameter of the intermediate layer according to the second parameter to obtain the first thermophysical parameter includes: Building an iterative mathematical model based on Fourier's law of heat conduction and a definition formula for thermal resistance, and calculating the corrected value of the thermophysical property parameter through the iterative mathematical model according to the first parameter; The first thermophysical property parameter is calculated using the iterative mathematical model according to the second parameter.
4. The method according to claim 1, wherein The preset condition includes: a difference between the chip thermal resistance and a chip thermal resistance value in the IGBT datasheet is within a preset range.
5. The method according to claim 1, wherein The preset value is determined based on the range of thermophysical property parameters of the intermediate multilayer material of an IGBT of the same structural type as the IGBT.
6. The method according to any one of claims 1 to 5, characterized in that The method further comprises: Performing reduced-order analysis on the equivalent thermal simulation model of the IGBT under various operating conditions to obtain analysis results; Based on a deep learning algorithm, the relationship between the third parameter and the fourth parameter in the analysis result is extracted to generate a reduced-order model to realize IGBT online monitoring; wherein, the third parameter includes: IGBT device loss, cooling fluid flow, and ambient temperature; the fourth parameter includes: IGBT junction temperature and field distribution.
7. A modeling device, characterized in that: The device comprises: Modeling module: used to establish a three-layer geometric simulation model of the IGBT and a three-dimensional simulation model of the heat sink, and define boundary surface variables of the three-layer geometric simulation model; the three-layer geometric simulation model includes: a chip layer, an intermediate layer, and a base plate layer; the three-layer geometric simulation model and the three-dimensional simulation model of the heat sink are imported into the simulation software to obtain a thermal simulation model of the IGBT; the thermal physical parameters of the chip layer, the intermediate layer, and the base plate layer are assigned values; wherein the thermal physical parameters of the chip layer and the base plate layer are determined based on the thermal physical parameters of the chip layer and the base plate layer of an IGBT of the same structural type as the IGBT, and the thermal physical parameters of the intermediate layer are preset values; Simulation module: used to perform an iterative correction process to correct the thermal physical parameters of the intermediate layer so that the chip thermal resistance of the thermal simulation model meets the preset conditions; determine the corrected thermal physical parameters of the intermediate layer to obtain the equivalent thermal simulation model of the IGBT.
8. A digital twin model of a traction system, characterized in that: The digital twin model includes: a vehicle dynamics model, a lumped parameter equivalent digital circuit model, and a multi-field reduced-order model; The vehicle dynamics model is at least used to simulate and obtain a first result; the first result includes: motor speeds corresponding to different motor torques, and the first result is transmitted to the lumped parameter equivalent digital circuit model; The lumped parameter equivalent digital circuit model is at least used to simulate and obtain a second result based on the first result, and transmit the second result to the multi-field reduced-order model; the second result includes one or more of the following results: motor-related electrical parameters, converter-related electrical parameters, and converter electromagnetic losses; the converter electromagnetic losses include one or more of the following losses: insulated gate bipolar transistor (IGBT) losses, reactor losses, transformer losses, copper bus losses, and busbar losses; The multi-field reduced-order model is at least used to simulate and obtain a third result based on the second result; the third result includes one or more of the following results: motor electromagnetic loss, motor temperature, converter temperature, and system structural stress; wherein the IGBT equivalent thermal simulation model modeling operation used in the process of establishing the multi-field reduced-order model is obtained by the method described in any one of claims 1 to 6.
9. An electronic device, characterized in that: include: A processor and a memory, the memory being used to store a computer program, the processor being used to call and run the computer program stored in the memory to execute the modeling method according to any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that Used to store a computer program, wherein the computer program causes a computer to execute the modeling method according to any one of claims 1 to 6.
