Slice coordination

By adopting a local coordination mechanism in a distributed information processing system, using a dedicated data bus and local event tags, and asynchronously executing write and read requests, the data consistency problem between multiple nodes is solved, and the coordination efficiency and timing performance of the system are improved.

CN120826672APending Publication Date: 2025-10-21QUALCOMM INC
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Patent Information

Application Number
CN202480017434.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-03-15
Filing Date
2024-02-07
Publication Date
2025-10-21

AI Technical Summary

Technical Problem

In distributed information processing systems, existing technologies have difficulty in efficiently maintaining data consistency among multiple nodes, especially when slicing is coordinated, which may lead to read-after-write risks and performance impacts.

Method used

A local coordination mechanism is adopted to asynchronously execute write and read requests by using a dedicated data bus and local event tags in each slice, ensuring data consistency within each slice and indicating the completion of batch execution through local coordination signals.

Benefits of technology

It reduces the execution delay of the distributed information processing system, improves the timing performance, avoids the performance overhead caused by global coordination, and improves the coordination efficiency of the system.

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Abstract

Aspects of the present disclosure relate to coordination. According to one aspect, an apparatus includes a plurality of slices, where each slice of the plurality of slices is configured for distributed information processing; and a plurality of dedicated data buses, where each of the plurality of slices is coupled to one of the plurality of dedicated data buses, and each of the plurality of slices is configured for local coordination of distributed information processing.
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Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims priority to pending U.S. non-provisional application No. 18 / 184,381, filed on March 15, 2023, which is assigned to the assignee of the present application and is hereby expressly incorporated herein by reference as if fully set forth below and for all applicable purposes. Technical Field

[0003] The present disclosure relates generally to the field of coordination, and in particular to slice coordination. Background Art

[0004] Most information processing and communication systems have multiple nodes in a distributed system. These multiple nodes include multiple producers of messages and data, as well as multiple consumers of messages and data. Generally speaking, a certain level of coordination and control over these multiple nodes is required to maintain data consistency. In other words, as messages and data are updated, it is important to maintain consistency across the multiple nodes. An example of a distributed system is a computing system with multiple processing cores or slices that require coordination. In a distributed information processing system, it is desirable to maintain data consistency across the multiple processing cores or slices through an efficient coordination solution. Summary of the Invention

[0005] In order to provide a basic understanding of one or more aspects of the present disclosure, a summary of these aspects is provided below. This summary is not an extensive overview of all anticipated features of the present disclosure and is neither intended to identify key or important elements of all aspects of the present disclosure nor to delineate the scope of any or all aspects of the present disclosure. Its sole purpose is to provide some concepts of one or more aspects of the present disclosure in a simplified form as a prelude to the more detailed description that will be provided later.

[0006] In one aspect, the present disclosure provides an apparatus for performing local coordination. Thus, an apparatus includes: a plurality of slices, wherein each slice of the plurality of slices is configured for distributed information processing; and a plurality of dedicated data buses, wherein each slice of the plurality of slices is coupled to one of the plurality of dedicated data buses, and each slice of the plurality of slices is configured for local coordination of the distributed information processing.

[0007] In one example, each of the plurality of slices includes a memory unit. In one example, each of the plurality of slices is a processing unit. In one example, the apparatus further includes a plurality of current workload batches. In one example, each current workload batch of the plurality of current workload batches is stored in the memory unit of the each of the plurality of slices.

[0008] In one example, each current workload batch in the plurality of current workload batches is different from another current workload batch in the plurality of current workload batches. In one example, at least two current workload batches in the plurality of current workload batches are the same. In one example, the apparatus further comprises a plurality of external memory units configured to store a plurality of future workload batches, wherein each slice in the plurality of slices is associated with a future workload batch in the plurality of future workload batches.

[0009] In one example, the apparatus further includes a plurality of data producers, wherein each of the plurality of data producers is configured to execute a write request in each of the plurality of slices. In one example, the apparatus further includes a plurality of data consumers, wherein each of the plurality of data consumers is configured to execute a read request in each of the plurality of slices.

[0010] Another aspect of the present disclosure provides a method for implementing slice coordination, the method comprising: utilizing local coordination in each of a plurality of slices to execute a write request in a first batch of a plurality of batches; setting a local event tag in the first batch of the plurality of batches in each of the plurality of slices; monitoring the write request in the first batch of the plurality of batches in each of the plurality of slices; after monitoring the write request, utilizing the local coordination in each of the plurality of slices to execute a read request in the first batch of the plurality of batches; and monitoring the read request in the first batch of the plurality of batches in each of the plurality of slices.

[0011] In one example, the write request in each of the plurality of slices is executed asynchronously relative to other slices in the plurality of slices. In one example, the method further includes: each of the plurality of slices supplying a local output coordination signal to indicate completion of the execution of the batch in each of the plurality of slices.

[0012] In one example, monitoring the write request is performed until all previous write requests in the path are completed. In one example, monitoring the write request is performed until the path has a verified receipt of the local event tag. In one example, monitoring the write request is performed until the write request in the first of the plurality of batches is completed. In one example, monitoring the write request is performed until two or more of the following occur: a) all previous write requests in the path are completed; b) the path has a verified receipt of the local event tag; c) the write request in the first of the plurality of batches is completed.

[0013] In one example, the read request in each of the plurality of slices is executed asynchronously with respect to the other slices in the plurality of slices. In one example, monitoring the read request is performed until all previous read requests in the path are completed. In one example, monitoring the read request is performed until the path has a verified receipt of the local event tag. In one example, monitoring the read request is performed until the read request in the first of the plurality of batches is completed. In one example, monitoring the read request is performed until two or more of the following occur: a) all previous read requests in the path are completed; b) the path has a verified receipt of the local event tag; c) the read request in the first of the plurality of batches is completed.

[0014] Another aspect of the present disclosure provides an apparatus for implementing slice coordination, the apparatus comprising: a component for executing a write request in a first batch of a plurality of batches using local coordination in each slice of a plurality of slices; a component for setting a local event tag in the first batch of the plurality of batches in each slice of the plurality of slices; a component for monitoring the write request in the first batch of the plurality of batches in each slice of the plurality of slices; a component for executing a read request in the first batch of the plurality of batches using the local coordination in each slice of the plurality of slices after completing monitoring the write request; and a component for monitoring the read request in the first batch of the plurality of batches in each slice of the plurality of slices.

[0015] In one example, the component for performing the write request is configured to perform asynchronously relative to other slices in the plurality of slices, and wherein the component for performing the read request is configured to perform asynchronously relative to the other slices in the plurality of slices. In one example, the component for monitoring the write request is configured to perform monitoring until one or more of the following occurs: a) all previous write requests in the path are completed; b) the path has received a verification of the local event tag; c) the write request in the first batch of the plurality of batches is completed. In one example, the component for monitoring the read request is configured to perform monitoring until one or more of the following occurs: a) all previous read requests in the path are completed; b) the path has received a verification of the local event tag; c) the read request in the first batch of the plurality of batches is completed.

[0016] Another aspect of the present disclosure provides a non-transitory computer-readable medium storing computer executable code, which is operable on a device comprising at least one processor and at least one memory coupled to the at least one processor, wherein the at least one processor is configured to implement slice coordination, the computer executable code comprising: instructions for causing a computer to utilize local coordination in each slice of a plurality of slices to execute a write request in a first batch of a plurality of batches; instructions for causing the computer to set a local event tag in the first batch of the plurality of batches in each slice of the plurality of slices; instructions for causing the computer to monitor the write request in the first batch of the plurality of batches in each slice of the plurality of slices; instructions for causing the computer to utilize the local coordination in the first batch of the plurality of batches in each slice of the plurality of slices after monitoring completion of the write request; and instructions for causing the computer to monitor the read request in the first batch of the plurality of batches in each slice of the plurality of slices.

[0017] In one example, the non-transitory computer-readable media further include instructions for causing the computer to execute the write request asynchronously relative to other slices in the plurality of slices and to execute the read request asynchronously relative to the other slices in the plurality of slices. In one example, the non-transitory computer-readable media further include instructions for causing the computer to monitor the write request until one or more of the following occurs: a) all previous write requests in the path complete; b) the path has received verification of the local event tag; c) the write request in the first of the plurality of batches completes. In one example, the non-transitory computer-readable media further include instructions for causing the computer to monitor the read request until one or more of the following occurs: a) all previous read requests in the path complete; b) the path has received verification of the local event tag; c) the read request in the first of the plurality of batches completes.

[0018] These and other aspects of the present disclosure will be more fully understood upon reading the following detailed description. Other aspects, features, and implementations of the present disclosure will be apparent to those of ordinary skill in the art after studying the following description of specific exemplary implementations of the present invention in conjunction with the accompanying drawings. Although features of the present invention may be discussed below with respect to certain implementations and drawings, all implementations of the present invention may include one or more of the advantageous features discussed herein. In other words, although one or more implementations may be discussed as having certain advantageous features, one or more of such features may also be used according to the various implementations of the present invention discussed herein. In a similar manner, although exemplary implementations may be discussed below as device, system, or method implementations, it will be understood that such exemplary implementations may be implemented in various devices, systems, and methods. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A first example information processing system having multiple slices is illustrated.

[0020] Figure 2 A second example information processing system with multiple slices and global coordination is illustrated.

[0021] Figure 3 An example distributed information processing system having multiple slices is illustrated.

[0022] Figure 4 An example flow chart for performing local coordination in a distributed information processing system is illustrated. DETAILED DESCRIPTION

[0023] The detailed description set forth below in conjunction with the accompanying drawings is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described herein may be practiced. The detailed description includes specific details to provide a thorough understanding of the various concepts. However, it will be apparent to those skilled in the art that these concepts may be practiced without these specific details. In some instances, well-known structures and components are shown in block diagram form to avoid obscuring the concepts.

[0024] Although for the purpose of simplifying explanation, method is shown and described as a series of actions, it should be understood and appreciated that method is not limited by the order of actions, because according to one or more aspects, some actions can occur in an order different from the order shown and described herein and / or concurrently with other actions. For example, those skilled in the art will understand and appreciate that method can alternatively be represented as a series of related states or events, such as in a state diagram. In addition, not all exemplified actions are required to implement a method according to one or more aspects.

[0025] A distributed information processing system (e.g., a computing system having multiple slices) requires a coordination scheme between multiple nodes to ensure data consistency. In one example, a slice is a processing core or subset of a computing system. For example, each slice may have at least one processing unit. In one example, data consistency means the consistency of shared data between multiple nodes (such as slices and associated memory units). In one example, the associated memory units may form a memory hierarchy having the following: local memory dedicated to each slice, global memory shared among all slices, and other memory units with various degrees of shared access (e.g., level 2 (L2) cache memory).

[0026] In one example, the coordination scheme may operate on a global basis (i.e., across all slices) as global coordination or global synchronization. In another example, the coordination scheme may operate on a local basis (i.e., individually on each slice) as local coordination or local synchronization. That is, the coordination scheme may be global coordination or local coordination. For example, a coordinating node may be one of a plurality of nodes that enforces data consistency between other nodes accessing the same data. In one example, the coordinating node may enforce data consistency by controlling coordination signals or executing state transitions that may be accessible between some of the plurality of nodes. In one example, slice coordination is local coordination.

[0027] Figure 1A first example information processing system 100 is illustrated having a plurality of slices. In one example, a slice is a processing unit or core. In one example, the first information processing system 100 may be a graphics processing unit (GPU) or a central processing unit (CPU). In one example, Figure 1 The first information processing system 100 includes a first slice 110, a second slice 120, a third slice 130, and an Nth slice 140. Generally speaking, the first information processing system 100 may have any number of slices. Multiple slices may have multiple memory units. Multiple slices may have multiple memory units. Multiple slices may be interconnected via a common data bus (not shown) to transmit messages and data between the multiple slices. Figure 1 In the example of , N slices are illustrated. Those skilled in the art will know that N is any integer number.

[0028] Figure 1 Also illustrated are multiple workload batches 150, such as a first batch 151, a second batch 152, an Nth batch 153, etc. In one example, a workload batch or batch is a subset of a workload. In one example, a batch is a sequence of operations that can be performed by a slice. Figure 1 In the example of , N batches are illustrated. Those skilled in the art will know that N is any integer number.

[0029] In one example, in the first information processing system 100, the input can be self-generated. In one example, the first information processing system 100 includes multiple data producers and multiple data consumers. For example, the first information processing system 100 can execute workloads in multiple batches. In one example, the data producer is a processing unit having a software algorithm configured to generate data. In one example, the data producer executes a write request (i.e., a request to write data to a memory unit). In one example, the data consumer is a processing unit having a software algorithm configured to read data. In one example, the data producer executes a read request (i.e., a request to read data into a memory unit).

[0030] In one example, a first data consumer operating on a current batch (e.g., batch N) may need to read data generated from a previous batch (e.g., batch N-1). In one example, the first information processing system 100 may need a coordination scheme to maintain data consistency and avoid read-after-write hazards. In one example, the coordination scheme may be global coordination.

[0031] In one example, an event tag can be included as a discrete message or token as part of an operation sequence to facilitate coordination between multiple nodes in a distributed information processing system. For example, if the coordination scheme is global coordination, a global event tag can be used as a coordination message or token. For example, if the coordination scheme is local coordination, a local event tag can be used as a coordination message.

[0032] In one example, global coordination may insert a global event tag into the operation sequence to ensure that all data producers have written data to the target cache memory, buffer memory, or main memory before any data consumer begins a read operation on the operation sequence.

[0033] In one example, global coordination performed by the data producer may execute the following sequence of write requests:

[0034] {write request in batch 0 -> global event label -> write request in batch 1}.

[0035] In one example, global coordination performed by a data consumer may execute the following sequence of read requests:

[0036] {read request in batch 0 -> global event tag -> read request in batch 1}.

[0037] In one example, when a coordinating node (e.g., L2 cache memory) receives a global event tag, it may push back all subsequent requests from the common path until the following conditions are met:

[0038] 1. All previous requests in the common path complete.

[0039] 2. The global event tag is received in other paths within the same slice, and the requests in those other paths are completed.

[0040] 3. The global event tag is received in other paths in other slices, and the requests in those other paths are completed.

[0041] In one example, requests in a path are completed when all write data is visible in cache memory and all read requests return data.

[0042] In one example, for the first information processing system 100, the data path can be divided into multiple channels or slices. For example, different slices can operate on different batches. In one example, the coordination of the first information processing system 100 may stop all slices and introduce significant performance impact. For example, the slice running first must wait for the slice running later to complete (i.e., introducing large bubbles in the execution). In one example, for large-scale information processing systems, performance overhead may increase.

[0043] Figure 2 A second example information processing system 200 with multiple slices and global coordination is illustrated. In one example, the multiple slices include a first slice 210, a second slice 220, a third slice 230, an Nth slice 240, and so on. Figure 2 In the example shown, N slices are illustrated. Those skilled in the art will appreciate that N is any integer number. Generally speaking, the second information processing system 200 may have any number of slices. The multiple slices may be interconnected via a common data bus 201 to transmit messages and data between the multiple slices.

[0044] Figure 2 A plurality of current workload batches 250 are also illustrated, including a first current batch 251, a second current batch 252, a third current batch 253, and an Nth current batch 254. Figure 2 In the example of , N current batches are illustrated. Those skilled in the art will know that N is any integer number.

[0045] For example, the first slice 210 is operating with the first current batch 251, the second slice 220 is operating with the second current batch 252, the third slice 230 is operating with the third current batch 253, and the Nth slice 240 is operating with the Nth current batch 254. Figure 2 A plurality of future workload batches 260 are also illustrated, such as a first future batch 261, a second future batch 262, a third future batch 263, an Nth future batch 264, etc. Figure 2 In the example of , N future batches are illustrated. Those skilled in the art will know that N is any integer number.

[0046] In one example, after the plurality of current workload batches 250 have been fully executed, the plurality of future workload batches 260 are synchronously input to the plurality of slices via the common data bus 201. In one example, synchronous input means that a single state transition or a single trigger causes all of the plurality of slices to provide updated input.

[0047] exist Figure 2 In the example, each slice in the plurality of slices supplies an output coordination signal to indicate completion of execution of the batch in the slice. For example, the first slice 210 supplies a first output synchronization signal 211, the second slice 220 supplies a second output synchronization signal 221, the third slice 230 supplies a third output synchronization signal 231, the Nth slice 240 supplies an Nth output synchronization signal 241, and so on. In one example, the first output synchronization signal 211, the second output synchronization signal 221, the third output synchronization signal 231, the Nth output synchronization signal 241, and so on are provided to the coordination module 270. Figure 2In the example of , N output synchronization signals are illustrated. Those skilled in the art will know that N is any integer number.

[0048] In one example, coordination module 270 generates a global coordination signal 271 having a global state that depends on the global states of first output synchronization signal 211, second output synchronization signal 221, third output synchronization signal 231, Nth output synchronization signal 241, etc. In one example, when each state of first output synchronization signal 211, second output synchronization signal 221, third output synchronization signal 231, Nth output synchronization signal 241, etc. has transitioned to an active state, the global state of global coordination signal 271 transitions from a first global state to a second global state. For example, the first global state indicates an unsynchronized global state. For example, the second global state indicates a synchronized global state. In other words, the transition from the first global state to the second global state transitions from unsynchronized to synchronized for multiple slices.

[0049] In one example, each transition in the global state of global coordination signal 271 occurs synchronously. That is, each slice can operate using global coordination. In one example, the first slice 210, the second slice 220, the third slice 230, the Nth slice 240, and so on, operate synchronously with respect to batch execution. That is, global coordination ensures data consistency across all slices, but increases execution latency due to the inherent need for global coordination between all slices.

[0050] In one example, a global coordination signal 271 is transmitted to the common data bus 201. In one example, the global coordination signal 271 manages the transition from the multiple current workload batches 250 to the multiple future workload batches 260 as input to the multiple slices. For example, the transition from the multiple current workload batches 250 to the multiple future workload batches 260 operates synchronously.

[0051] Figure 3 An example distributed information processing system 300 having multiple slices is illustrated. In one example, a slice is a processing unit or processing core. In one example, the distributed information processing system 300 may be a graphics processing unit (GPU) or a central processing unit (CPU). In one example, the multiple slices include a first slice 310, a second slice 320, a third slice 330, an Nth slice 340, and so on. In general, the distributed information processing system 300 may have any number of slices. The multiple slices may include multiple memory units. In one example, each slice includes a memory unit. In another example, each slice in the multiple slices may be coupled to one or more memory units in the multiple memory units, where the multiple memory units are shared among the multiple slices.

[0052] Each slice in the plurality of slices uses one of the plurality of dedicated data buses to transmit messages and data. For example, the first slice 310 may have a first dedicated data bus 301, the second slice 320 may have a second dedicated data bus 302, the third slice 330 may have a third dedicated data bus 303, the Nth slice 340 may have an Nth dedicated data bus 304, and so on. In one example, the distributed information processing system 300 may have a common data bus (not shown) that interconnects the plurality of slices. Figure 3 In the example of , N slices and N dedicated data buses are illustrated. Those skilled in the art will know that N is any integer number.

[0053] Figure 3 A plurality of current workload batches 350 are also illustrated, including a first current batch 351, a second current batch 352, a third current batch 353, an Nth current batch 354, etc. In one example, the first slice 310 is operating with the first current batch 351, the second slice 320 is operating with the second current batch 352, the third slice 330 is operating with the third current batch 353, and the Nth slice 340 is operating with the Nth current batch 354. Figure 3 In the example of , N current batches are illustrated. Those skilled in the art will appreciate that N is any integer number. In one example, multiple current workload batches 350 are stored in multiple memory units.

[0054] also, Figure 3 A plurality of future workload batches 360 are also illustrated, such as a first future batch 361, a second future batch 362, a third future batch 363, an Nth future batch 364, and so on. For example, after each current workload batch in the plurality of current workload batches 350 has been individually executed, each future workload batch in the plurality of future workload batches 360 is asynchronously input to each of the plurality of slices via a plurality of dedicated data buses. In one example, asynchronous input means that a plurality of independent state transitions or a plurality of triggers cause each of the plurality of slices to independently and asynchronously provide updated input. Figure 3 In the example of FIG, N future batches are illustrated. Those skilled in the art will appreciate that N is any integer number. In one example, multiple future workload batches 360 are stored in multiple external memory units. In one example, the multiple external memory units are different from the multiple memory units storing multiple current workload batches 350.

[0055] exist Figure 3In , each slice in the plurality of slices supplies a local output coordination signal to indicate completion of execution of the batch in the slice. For example, the first slice 310 supplies a first local output synchronization signal 311, the second slice 320 supplies a second local output synchronization signal 321, the third slice 330 supplies a third local output synchronization signal 331, the Nth slice 340 supplies an Nth local output synchronization signal 341, and so on. Figure 3 In the example of , N local output synchronization signals are illustrated. Those skilled in the art will know that N is any integer number.

[0056] In one example, the first local output synchronization signal 311 is provided to the first dedicated data bus 301, the second local output synchronization signal 321 is provided to the second dedicated data bus 302, the third local output synchronization signal 331 is provided to the third dedicated data bus 303, the Nth local output synchronization signal 341 is provided to the Nth dedicated data bus 304, and so on.

[0057] In one example, the first local output synchronization signal 311, the second local output synchronization signal 321, the third local output synchronization signal 331, and the Nth local output synchronization signal 341 are all asynchronous relative to each other. In one example, the first local output synchronization signal 311 has a first local state, the second local output synchronization signal 321 has a second local state, the third local output synchronization signal 331 has a third local state, the Nth local output synchronization signal 341 has an Nth local state, and so on. Figure 3 In the example of , N local states are illustrated. Those skilled in the art will know that N is any integer number.

[0058] In one example, when the first slice 310 completes execution of a batch within the first slice 310, the first local state transitions from the asynchronous state to the synchronous state. In one example, when the second slice 320 completes execution of a batch within the second slice 320, the second local state transitions from the asynchronous state to the synchronous state. In one example, when the third slice 330 completes execution of a batch within the third slice 330, the third local state transitions from the asynchronous state to the synchronous state. In one example, when the Nth slice 340 completes execution of a batch within the Nth slice 340, the Nth local state transitions from the asynchronous state to the synchronous state.

[0059] In one example, each transition of each local state of each local output synchronization signal occurs asynchronously. That is, each slice can operate using local coordination. That is, each slice can complete the execution of the batch within its slice and operate using local coordination rather than global coordination. In one example, the first slice 310, the second slice 320, the third slice 330, the Nth slice 340, and so on operate asynchronously with respect to the batch execution. In one example, slice X operates on its batch (i.e., batch X) asynchronously with respect to another slice (e.g., slice Y) operating on its batch (i.e., batch Y). In this example, slice X and slice Y are two different slices in the plurality of slices.

[0060] In one example, operating each of the multiple slices using local output coordination signals improves the timing performance of the distributed information processing system 300 by reducing execution latency. In other words, timing performance can be improved by ensuring data consistency within a slice rather than across all slices. In one example, execution latency can be reduced by employing local coordination within each slice rather than global coordination across all slices.

[0061] In one example, when a processing application (e.g., graphics processing) performs most of its processing locally (e.g., in pixels) using local memory access rather than global memory access, local coordination rather than global coordination is feasible. For example, data producers and data consumers in a given slice can be independent of data producers and data consumers in other slices. That is, batch execution for each slice can proceed asynchronously and independently of batch execution for other slices, which reduces timing performance overhead.

[0062] In one example, data producers and data consumers in each slice require local coordination and data consistency only within that slice. In one example, the timing deviation of batch execution within a slice is much smaller than across multiple slices, which results in improved timing performance using local coordination rather than global coordination.

[0063] In one example, local coordination may insert local event tags into an operation sequence to ensure that all data producers have written data to slice memory, buffer memory, or main memory before any data consumer begins a read operation on the operation sequence.

[0064] In one example, local coordination performed by a data producer may execute the following sequence of write requests:

[0065] {write request in batch 0 -> local event tag -> write request in batch 1}.

[0066] In one example, local coordination performed by a data consumer may execute the following sequence of read requests:

[0067] {read request in batch 0 -> local event tag -> read request in batch 1}.

[0068] In one example, when a local coordinating node (e.g., a slice memory) receives a local event tag, it may push back all subsequent requests from the same path until the following conditions are met:

[0069] 1. All previous requests in the same path complete.

[0070] 2. The local event tag is received in other paths within the same slice, and the requests in those other paths are completed.

[0071] In one example, requests in the same path are completed when all write data is visible in the slice memory and all read requests return data. In one example, local coordination of a distributed information processing system can be used in many scenarios, such as rendering to texture, slice memory sub-transfers, local data consistency between compute kernels, machine learning, etc.

[0072] Figure 4 An example flowchart 400 for performing local coordination in a distributed information processing system is illustrated. At block 410, a workload is broken down into a plurality of batches in the information processing system. In one example, the plurality of batches includes a first batch, a second batch, a third batch, and so on, up to an Nth batch. For example, the plurality of batches are organized to be executed in a sequential order. In one example, the plurality of batches are stored in a global memory of the information processing system.

[0073] In block 420, a first batch of the plurality of batches is loaded from the global memory into the local memory of each of the plurality of slices in the distributed information processing system. In one example, a dedicated data bus of each slice is used to load the first batch from the global memory into each local memory.

[0074] In block 430, a first batch of the plurality of batches is processed in each of the plurality of slices. In one example, each slice includes a plurality of data producers. In one example, each slice includes a plurality of data consumers. In one example, each of the plurality of data producers provides data to one or more of the plurality of data consumers. In one example, the processing step may include operations such as, but not limited to, mathematical operations, sorting operations, storage operations, retrieval operations, logical operations, symbolic operations, and the like.

[0075] In block 440, a write request is executed in a first batch of the plurality of batches using local coordination in each slice of the plurality of slices. In one example, the write request is executed by a data producer of the plurality of data producers. In one example, the write request in each slice of the plurality of slices is executed asynchronously relative to other slices of the plurality of slices.

[0076] In block 450, a local event tag is set in a first batch of the plurality of batches in each slice of the plurality of slices. In one example, each slice of the plurality of slices supplies a local output coordination signal to indicate completion of execution of the batch in the slice.

[0077] In block 460, in each of the plurality of slices, a first batch of the plurality of batches is monitored for write requests. In one example, monitoring is performed until all previous write requests in the path are completed. In one example, monitoring is performed until the path has received a validation of a local event tag. In one example, monitoring is performed until a write request in a first batch of the plurality of batches is completed. In one example, monitoring is performed until two or more of the following occur: a) all previous write requests in the path are completed; b) the path has received a validation of the local event tag; c) the write request in the first batch of the plurality of batches is completed. In one example, monitoring in each of the plurality of slices is performed asynchronously with respect to the other slices of the plurality of slices.

[0078] In block 470, after the write request monitoring is completed, a read request is executed in a first batch of the plurality of batches using local coordination in each slice of the plurality of slices. In one example, the read request is executed by a data consumer of the plurality of data consumers. In one example, each data consumer of the plurality of data consumers receives data from one or more data producers of the plurality of data producers. In one example, the read request in each slice of the plurality of slices is executed asynchronously with respect to the other slices of the plurality of slices.

[0079] In block 480, a read request is monitored in a first batch of the plurality of batches in each slice of the plurality of slices. In one example, monitoring is performed until all previous read requests in the path are completed. In one example, monitoring is performed until the path has a verified receipt of a local event tag. In one example, monitoring is performed until a read request in a first batch of the plurality of batches is completed. In one example, monitoring is performed until two or more of the following occur: a) all previous read requests in the path are completed; b) the path has a verified receipt of the local event tag; c) the read request in the first batch of the plurality of batches is completed.

[0080] In block 490, after the read request monitoring is complete, the second batch is loaded from the global memory into the local memory of each of the plurality of slices in the distributed information processing system. In one example, a dedicated data bus of each slice is used to load the second batch from the global memory into each local memory.

[0081] In one aspect, Figure 4 One or more of the steps in may be performed by one or more processors, which may include hardware, software, firmware, etc. In one aspect, Figure 4 One or more of the steps in the steps may be performed by one or more processors, which may include hardware, software, firmware, etc. For example, the one or more processors may be used to perform the execution Figure 4 Software shall be construed broadly to mean instructions, instruction sets, code, code segments, program code, programs, subroutines, software modules, applications, software applications, software packages, routines, subroutines, objects, executables, threads of execution, procedures, functions, etc., whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise.

[0082] The software may reside on a computer-readable medium. The computer-readable medium may be a non-transient computer-readable medium. Non-transient computer-readable media, by way of example, include magnetic storage devices (e.g., hard disks, floppy disks, magnetic strips), optical disks (e.g., compact discs (CDs) or digital versatile discs (DVDs)), smart cards, flash memory devices (e.g., cards, sticks, or key drives), random access memories (RAMs), read-only memories (ROMs), programmable ROMs (PROMs), erasable PROMs (EPROMs), electrically erasable PROMs (EEPROMs), registers, removable disks, and any other suitable medium for storing software and / or instructions that can be accessed and read by a computer. By way of example, the computer-readable medium may also include carrier waves, transmission lines, and any other suitable medium for sending software and / or instructions that can be accessed and read by a computer. The computer-readable medium may reside in a processing system, outside a processing system, or distributed across multiple entities including the processing system. The computer-readable medium may be implemented in a computer program product. By way of example, a computer program product may include a computer-readable medium in packaging materials. The computer-readable medium may include software or firmware. Those skilled in the art will recognize how best to implement the described functionality presented throughout this disclosure depending on the particular application and the overall design constraints imposed on the overall system.

[0083] Any circuits included in the processor are provided by way of example only, and other components for performing the described functions may be included within various aspects of the present disclosure, including but not limited to instructions stored in a computer-readable medium, or any other suitable device or component described herein and utilizing, for example, the processes and / or algorithms described herein with respect to the example flow diagrams.

[0084] Within this disclosure, the word "exemplary" is used to mean "serving as an example, instance, or illustration." Any specific implementation or aspect described herein as "exemplary" is not necessarily to be construed as superior or preferred over other aspects of the disclosure. Likewise, the term "aspect" does not require that all aspects of the disclosure include the discussed feature, advantage, or mode of operation. The term "coupled" is used herein to refer to a direct or indirect coupling between two objects. For example, if object A physically contacts object B, and object B contacts object C, objects A and C may still be considered to be coupled to each other, even if they are not in direct physical contact with each other. The terms "circuitry" are used broadly, and are intended to include both hardware implementations of electronic devices and conductors (wherein these electronic devices and conductors, when connected and configured, enable the performance of the functions described in this disclosure, without limitation as to the type of electronic circuitry) and software implementations of information and instructions (wherein these information and instructions, when executed by a processor, enable the performance of the functions described in this disclosure).

[0085] One or more of the components, steps, features and / or functions illustrated in the accompanying drawings may be rearranged and / or combined into a single component, step, feature or function, or embodied in several components, steps or functions. Additional elements, components, steps and / or functions may also be added without departing from the novel features disclosed herein. The devices, equipment and / or components illustrated in the accompanying drawings may be configured to perform one or more of the methods, features or steps described herein. The novel algorithms described herein may also be effectively implemented in software and / or embedded in hardware.

[0086] It should be understood that the specific order or hierarchy of steps in the disclosed methods is an illustration of exemplary processes. It should be understood that the specific order or hierarchy of steps in these methods may be rearranged based on design preferences. The accompanying method claims present elements of the various steps in a sample order and are not intended to be limited to the specific order or hierarchy presented unless expressly stated herein.

[0087] The foregoing description is provided to enable anyone skilled in the art to practice the various aspects described herein. Various modifications to these aspects will be apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects. Accordingly, the claims are not intended to be limited to the aspects shown herein, but rather to the full scope consistent with the text of the claims, wherein, unless expressly stated otherwise, reference to an element in the singular is not intended to mean "one and only one," but rather "one or more." Unless otherwise specifically stated, the term "some" refers to one or more. A phrase referring to "at least one" of a list of items refers to any combination of those items, including individual members. As an example, "at least one of a, b, or c" is intended to encompass: a; b; c; a and b; a and c; b and c; and a, b, and c. All structural and functional equivalents to the elements of the various aspects described throughout this disclosure that are or will later become known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be covered by the claims. In addition, nothing disclosed herein is intended to be dedicated to the public, regardless of whether such disclosure is expressly recited in the claims. No element of a claim shall be construed under 35 U.S.C. § 112, sixth paragraph, unless the element is expressly recited using the phrase “means for” or, in the case of a method claim, the element is recited using the phrase “step for”.

[0088] Those skilled in the art will appreciate that various features of the different embodiments may be combined or modified and still remain within the spirit and scope of the present disclosure.

Claims

1. A device, comprising: a plurality of slices, wherein each slice of the plurality of slices is configured for distributed information processing; and A plurality of dedicated data buses, wherein each slice of the plurality of slices is coupled to one of the plurality of dedicated data buses, and each slice of the plurality of slices is configured for local coordination of the distributed information processing. 2 . The apparatus of claim 1 , wherein each of the plurality of slices comprises a memory cell. The apparatus of claim 2 , wherein each of the plurality of slices is a processing unit.

4. The apparatus according to claim 2, further comprising: Multiple current workload batches. 5 . The apparatus of claim 4 , wherein each current workload batch of the plurality of current workload batches is stored within the memory unit of the each slice of the plurality of slices. 6 . The apparatus of claim 5 , wherein each current workload batch of the plurality of current workload batches is different from another current workload batch of the plurality of current workload batches. The apparatus of claim 5 , wherein at least two current workload batches among the plurality of current workload batches are the same.

8. The apparatus according to claim 2, further comprising: A plurality of external memory units are configured to store a plurality of future workload batches, wherein each slice of the plurality of slices is associated with a future workload batch of the plurality of future workload batches.

9. The apparatus according to claim 1, further comprising: A plurality of data producers, wherein each data producer of the plurality of data producers is configured to execute a write request in each slice of the plurality of slices.

10. The apparatus according to claim 1, further comprising: A plurality of data consumers, wherein each data consumer of the plurality of data consumers is configured to perform a read request in each slice of the plurality of slices.

11. A method for implementing slice coordination, the method comprising: executing the write request in a first batch of the plurality of batches utilizing local coordination in each of the plurality of slices; setting a local event tag in the first of the plurality of batches in the each of the plurality of slices; monitoring the write request in the first of the plurality of batches in the each of the plurality of slices; executing a read request in the first of the plurality of batches utilizing the local coordination in the each of the plurality of slices after monitoring the write request for completion; as well as The read request is monitored in the first of the plurality of batches in the each of the plurality of slices. 12 . The method of claim 11 , wherein the write request in the each of the plurality of slices is performed asynchronously with respect to other slices in the plurality of slices.

13. The method according to claim 12, further comprising: The each of the plurality of slices supplies a local output coordination signal to indicate completion of the execution of a batch in the each of the plurality of slices. The method of claim 13 , wherein monitoring the write request is performed until all previous write requests in a path are completed.

15. The method of claim 13, wherein monitoring the write request is performed until a path has verified receipt of the local event tag.

16. The method of claim 13, wherein monitoring the write request is performed until the write request in the first of the plurality of batches is completed.

17. The method of claim 13, wherein monitoring the write request is performed until two or more of the following occur: a) all previous write requests in a path are completed; b) the path has receipt of verification of the local event tag; c) the write request in the first batch of the multiple batches is completed.

18. The method of claim 11, wherein the read request in the each of the plurality of slices is performed asynchronously with respect to other slices in the plurality of slices.

19. The method of claim 18, wherein monitoring the read request is performed until all previous read requests in a path are completed.

20. The method of claim 18, wherein monitoring the read request is performed until a path has verified receipt of the local event tag.

21. The method of claim 18, wherein monitoring the read request is performed until the read request in the first of the plurality of batches is completed.

22. The method of claim 18, wherein monitoring the read request is performed until two or more of the following occur: a) all previous read requests in a path are completed; b) the path has receipt of a verification of the local event tag; c) the read request in the first of the plurality of batches is completed.

23. An apparatus for implementing slice coordination, the apparatus comprising: means for executing the write request in a first batch of the plurality of batches utilizing local coordination in each slice of the plurality of slices; means for setting a local event tag in said first of said plurality of batches in said each of said plurality of slices; means for monitoring, in said each of said plurality of slices, said write request in said first of said plurality of batches; means for executing a read request in the first of the plurality of batches utilizing the local coordination in the each of the plurality of slices after monitoring the write request for completion; and means for monitoring, in said each of said plurality of slices, said read request in said first of said plurality of batches.

24. The apparatus of claim 23, wherein the means for executing the write request is configured to execute asynchronously relative to other slices of the plurality of slices, and wherein the means for executing the read request is configured to execute asynchronously relative to the other slices of the plurality of slices.

25. An apparatus according to claim 24, wherein the component for monitoring the write request is configured to perform monitoring until one or more of the following occurs: a) all previous write requests in the path are completed; b) the path has received a verification of the local event tag; c) the write request in the first batch of the multiple batches is completed.

26. The apparatus of claim 24 , wherein the component for monitoring the read request is configured to perform monitoring until one or more of the following occurs: a) all previous read requests in a path are completed; b) the path has receipt of a verification of the local event tag; c) the read request in the first of the plurality of batches is completed.

27. A non-transitory computer-readable medium storing computer-executable code operable on a device comprising at least one processor and at least one memory coupled to the at least one processor, wherein the at least one processor is configured to implement slice coordination, the computer-executable code comprising: instructions for causing a computer to utilize local coordination in each slice of the plurality of slices to execute the write request in a first batch of the plurality of batches; instructions for causing the computer to set a local event tag in the first of the plurality of batches in the each of the plurality of slices; instructions for causing the computer to monitor the write request in the first of the plurality of batches in the each of the plurality of slices; instructions for causing the computer to execute a read request in the first of the plurality of batches utilizing the local coordination in the each of the plurality of slices after monitoring the write request for completion; and Instructions for causing the computer to monitor the read requests in the first batch of the plurality of batches in the each slice in the plurality of slices.

28. The non-transitory computer-readable medium of claim 27, further comprising: Instructions for causing the computer to execute the write request asynchronously with respect to other slices of the plurality of slices and to execute the read request asynchronously with respect to the other slices of the plurality of slices.

29. The non-transitory computer-readable medium of claim 28, further comprising: Instructions for causing the computer to monitor the write request until one or more of the following occurs: a) all previous write requests in a path complete; b) the path has received verification of the local event tag; c) the write request in the first of the plurality of batches is completed.

30. The non-transitory computer-readable medium of claim 28, further comprising: Instructions for causing the computer to monitor the read request until one or more of the following occurs: a) all previous read requests in a path complete; b) the path has receipt of verification of the local event tag; c) the read request in the first of the plurality of batches is completed.