SPWM (Sinusoidal Pulse Width Modulation) method for load test of single direct current power supply three-level equipment

Abstract

The invention discloses an SPWM (sinusoidal pulse width modulation) method for a load test of three-level equipment powered by a single direct-current power supply, and belongs to the technical field of power electronics. The method is based on an SPWM modulation system, initial sinusoidal modulation waves are generated by inputting modulation parameters, two paths of modulation waveforms are generated after upper and lower bus voltages are collected, the two paths of modulation waveforms are compared with triangular carrier waves to obtain switching signals, the switching signals are synthesized into three-level switching signals, and then operation of a power device is controlled. The method is characterized in that positive and negative half shafts are respectively modulated and then integrated, the problems of bus voltage dynamic unbalance and load current fluctuation under single power supply are solved, extra closed-loop control is not needed, the system complexity and cost are reduced, the sine degree of output voltage and the stability of load current are ensured, and the reliability of the system is improved. The method is suitable for three-level equipment with various topological structures, such as a wind power converter and an energy storage PCS.

Description

Technical Field

[0001] This invention belongs to the field of power electronics technology, and in particular relates to an SPWM modulation method for load testing of a three-level device powered by a single DC power supply. Background Technology

[0002] In the field of power electronics, three-level inverters are widely used in high-voltage applications due to their unique advantages. The typical topology of a three-level inverter is the Type I three-level topology, which distributes the DC bus voltage evenly across multiple switching devices, reducing the voltage stress on each power device to half that of the DC bus voltage, thus significantly improving system reliability. During the factory load testing of three-level inverters, a specific connection method is typically used: the AC side of the power unit is connected to one end of the load reactor, and the DC neutral point is connected to the other end of the load reactor. Through precise control of the load current amplitude and frequency, the inverter power unit's rated values ​​are achieved. Traditional three-level inverter power supply schemes often employ dual DC power supplies, such as symmetrical positive and negative buses, to power the inverter's positive and negative DC buses. However, to ensure output current quality, this scheme places extremely stringent requirements on the dual power supplies, namely, strict isolation and voltage balance. In practical applications, meeting these requirements undoubtedly increases system complexity significantly and leads to a substantial increase in cost. Therefore, a single DC bus power supply scheme has emerged. This scheme, through a single DC power supply combined with a capacitor voltage divider structure, significantly reduces hardware costs and size, and greatly simplifies power acquisition, requiring only a single rectifier or energy storage device for power supply. In practical applications, it demonstrates excellent economic efficiency and convenience. In three-level inverters powered by a single DC power supply, SPWM modulation is a commonly used modulation method. However, traditional SPWM modulation methods exhibit several problems under single DC power supply conditions. The traditional method obtains the modulation wave by directly dividing a given output voltage by the DC bus voltage, which leads to two major issues. First, the voltage divider capacitor structure introduces a current injection effect, causing dynamic imbalance between the upper and lower bus voltages. Since the modulation wave is directly obtained by dividing the given output voltage by the DC bus voltage, the modulation ratio remains constant. When the midpoint voltage fluctuates, the output voltage also fluctuates, leading to load current fluctuations. To ensure load current stability, current sampling must be added for closed-loop control, which not only increases testing costs but also significantly increases control complexity. Second, if the upper and lower bus voltages deviate from normal conditions for an extended period, the duty cycle of the positive and negative half-cycles of the modulation wave will become asymmetrical due to the actual voltage division imbalance. This modulation asymmetry leads to uneven charging and discharging of the midpoint current, further widening the voltage deviation between the upper and lower bus voltages, thus exacerbating the deviation trend. If the inverter remains in this state of deviation for an extended period, the voltage of a capacitor may exceed its rated value, ultimately leading to accelerated capacitor aging or even breakdown, severely impacting the normal operation and lifespan of the inverter.

[0003] In summary, existing SPWM modulation methods for load testing of three-level inverters powered by a single DC power supply have significant shortcomings and cannot meet the performance, stability, and reliability requirements of inverters in practical applications. Therefore, there is an urgent need to develop a novel SPWM modulation method for load testing of three-level devices powered by a single DC power supply to solve the aforementioned technical problems and improve the operating performance and reliability of three-level inverters in single DC power supply mode. Summary of the Invention

[0004] The purpose of this invention is to address the shortcomings of the existing technology by proposing an SPWM modulation method for load testing of a three-level device powered by a single DC power supply. This method uses separate modulation of the positive and negative half-axis followed by synthesis to ensure the sinusoidal nature of the output voltage even when the bus voltage fluctuates, thereby ensuring the sinusoidal nature of the load current and achieving stable load current under single power supply.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: The SPWM modulation method for load testing of a three-level device powered by a single DC power supply is based on an SPWM modulation system. The SPWM modulation system includes a power module, a sampling circuit, a control unit, a drive circuit, and a main circuit topology. The power module is connected to the main circuit topology for power supply. The control unit is electrically connected to the main circuit topology through the sampling circuit and is connected to the main circuit topology for control through the drive circuit. The SPWM modulation method includes the following steps: S1, input modulation parameters to the control unit according to load requirements, and use the control unit to generate an initial sinusoidal modulation wave. The sampling circuit is used to collect the upper bus voltage of the power module and main circuit topology. and lower bus voltage and voltage and lower bus voltage Input control unit; S2 utilizes the control unit to generate two modulation waveforms based on the initial sinusoidal modulation wave and the upper and lower bus voltages, respectively. and ; S3, based on the triangular carrier given by the control unit After preprocessing by the control unit, the two modulated waveforms are respectively coupled with triangular carrier waves. By comparison, obtain and Two-way switch signal waveforms; S4, the control unit is based on and Two-way switch signal waveforms generate one-way three-level switch signal waveform ; S5, the control unit based on the three-level switch signal waveform Level output switching sequence The drive circuit controls the operation of the power switching devices in the main circuit topology.

[0006] Preferably, in step S1, the modulation parameters include the modulation wave frequency. and modulation amplitude The control unit is based on the formula Generate initial sinusoidal modulated wave ;in, Indicates time.

[0007] Preferably, the power supply module of the SPWM modulation system includes a single DC power supply and a voltage divider capacitor network; the two ends of the voltage divider capacitor network are respectively connected to the positive and negative terminals of the single DC power supply, and are connected to the upper bus capacitor bank. and lower bus capacitor bank The series configuration divides the DC voltage of a single DC power supply into upper and lower parts, forming the basic power supply voltage for a three-level device.

[0008] Preferably, in step S1, a sampling circuit is used to collect the upper bus capacitor pool. Voltage as upper bus voltage Collect the lower bus capacitor bank Voltage as lower bus voltage .

[0009] Preferably, in step S2, the control unit generates two modulation waveforms based on the analog divider, that is, the two modulation waveforms are respectively represented as: ; .

[0010] Preferably, in step S3, a triangular carrier wave is given. The peak value is 1 and the trough value is -1.

[0011] Preferably, in step S3, the preprocessing of the two modulated waveforms by the control unit includes: based on the analog subtractor in the sinusoidal modulated waveform Subtract the triangular carrier wave The amplitude, i.e. Zero point is Based on analog adders in sinusoidal modulation waveforms Add a triangular carrier The amplitude, i.e. The zero point is 1.

[0012] Preferably, in step S3, the control unit uses an analog comparator to compare the two preprocessed modulation waveforms with a triangular carrier wave. To make a comparison, that is and The waveforms of the two switch signals are represented as follows: ; .

[0013] Preferably, in step S3, the control unit uses an analog adder to... and The three-level switch signal waveform is obtained by adding the two switch signal waveforms together. ,Right now .

[0014] Preferably, the main circuit topology of the SPWM modulation system includes four insulated-gate bipolar transistors, namely... , , and ;in, The collector is connected to the positive polarity of the power module. Drain and The collector is connected. Drain and The collector is connected. Drain and The collector is connected. The drain of the device is connected to the negative terminal of the power module.

[0015] Preferably, in step S5, the switching sequence Expressed as: ; in, , , and These represent the insulated-gate bipolar transistors in the main circuit topology. , , and The switch signal is 1 for on and 0 for off.

[0016] The beneficial effects of this invention are: 1) This technical solution uses a single DC power supply combined with a voltage divider capacitor network (upper bus capacitor bank and lower bus capacitor bank), requiring only a single rectifier or energy storage device for power supply, significantly reducing hardware costs and system size, and simplifying power acquisition. The single power supply solution avoids the technical challenges of dual power supply isolation design, reduces the use of isolation devices, and further reduces system complexity and cost.

[0017] 2) This technical solution uses a sampling circuit to collect the upper and lower bus voltages in real time, and combines them with an initial sinusoidal modulation wave to generate two independent modulation waveforms. and Based on two independent modulation waveforms and Independent modulation of the positive and negative half-axis is achieved. When the bus voltage fluctuates, the corresponding modulation wave amplitude is automatically adjusted, and the charging time of the upper and lower buses is dynamically balanced through switching logic to suppress the aggravation of voltage deviation. In addition, this technical solution generates two switching signals by preprocessing the two modulation waves (subtracting / adding the triangular carrier amplitude) and independently comparing them with the triangular carrier. and Then synthesize a three-level switching signal. Ensure balanced charging and discharging of the midpoint current to suppress bus voltage deviation from the source.

[0018] 3) This technical solution, through "separate modulation and synthesis of positive and negative half-axis," can maintain the sinusoidal nature of the output voltage even with bus voltage fluctuations by dynamically adjusting the comparison logic between the modulation wave and the triangular carrier wave, thereby maintaining the stability of the load current. In wind power converter load tests, the effective value fluctuation range of the grid-side converter load current using the traditional method was 1068A, while this technical solution reduced it to 285A; the turbine-side converter's effective value decreased from 2318A to 885A. In the single-phase ANPC power unit of the energy storage PCS, the fluctuation range using the traditional method was 3350A, while this technical solution only had 1A, verifying a significant improvement in load current stability.

[0019] 4) This technical solution suppresses current fluctuations directly at the modulation stage by improving the modulation method, eliminating the need for additional closed-loop control, simplifying control logic, and reducing testing costs. The output switching sequence is designed using a state machine. By combining dead time to prevent power device shoot-through, the safety and accuracy of switching action are ensured, and device damage or output voltage instability caused by unreasonable switching logic is avoided, thereby further improving system reliability.

[0020] This technical solution is not only applicable to traditional three-level equipment topologies, but can also be applied to different topologies such as wind power converter power units and energy storage PCS single-phase ANPC power units. By adjusting the modulation parameters, it can be adapted to different load requirements and has broad engineering application prospects. Attached Figure Description

[0021] Figure 1 A basic implementation flowchart of the SPWM modulation method for load testing of a three-level device powered by a single DC power supply; Figure 2 A flowchart of SPWM modulation signal processing for a load test of a three-level device powered by a single DC power supply; Figure 3 A schematic diagram of the topology of a wind power converter power unit load experimental device powered by a single power source. Figure 4 for Figure 3 A schematic diagram of the effective value waveform of the load current modulated by the traditional direct division by the bus voltage in the grid-side converter. Figure 5 for Figure 3 A schematic diagram of the effective value waveform of the load current modulated by the traditional direct division by the bus voltage in the machine-side converter. Figure 6 for Figure 3 A schematic diagram of the effective value waveform of the load current modulated by this technical solution in the grid-side converter; Figure 7 for Figure 3 A schematic diagram of the effective value waveform of the load current modulated by this technical solution in the machine-side converter; Figure 8 A schematic diagram of the topology of a single-phase ANPC power unit load experimental device for a single-power-supply energy storage PCS. Figure 9 for Figure 8 A schematic diagram of the effective value waveform of the load current modulated by the traditional direct division by the bus voltage in the topology; Figure 10 for Figure 8 A schematic diagram of the effective value waveform of the load current modulated using this technical solution in the topology. Detailed Implementation

[0022] To make the purpose, technical solution and advantages of the invention clearer, the technical solution of the invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of the invention, but not all embodiments.

[0023] Therefore, the following detailed description of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0024] Example 1 This embodiment discloses an SPWM modulation method for load testing of a three-level device powered by a single DC power supply. As a preferred embodiment of the invention, its SPWM modulation system includes a power module, a sampling circuit, a control unit, a drive circuit, and a main circuit topology. The power module is connected to the main circuit topology for power supply. The control unit is electrically connected to the main circuit topology through the sampling circuit and is connected to the main circuit topology for control through the drive circuit. Based on this, as... Figure 1 As shown, the SPWM modulation method of this technical solution includes the following steps: S1, input modulation parameters to the control unit according to load requirements, and use the control unit to generate an initial sinusoidal modulation wave. The sampling circuit is used to acquire the upper bus voltage of the power module and main circuit topology. and lower bus voltage and the upper bus voltage and lower bus voltage Input control unit. Specifically: Modulation parameters are input to the control unit (such as a DSP or FPGA) through a human-machine interface (such as a touch screen or host computer software). The control unit generates a high-precision initial sine modulated wave based on DDS (Direct Digital Frequency Synthesis) technology, using a phase accumulator and a sine lookup table. Meanwhile, the sampling circuit employs a voltage divider resistor network paired with a 12-bit or higher ADC chip (such as ADS1115), and combines it with a differential amplifier circuit (such as INA240) to suppress common-mode interference. The sampling circuit separately acquires the upper bus voltage of the power module and the main circuit topology. and lower bus voltage The sampling frequency is set to more than 10 times the modulation wave frequency to satisfy the Nyquist sampling theorem, and finally the collected voltage signal is input to the control unit.

[0025] The core principle of this process lies in the fact that sinusoidal modulation wave generation relies on digital signal processing to achieve precise waveform synthesis, ensuring matching with the load voltage level; voltage sampling utilizes the voltage divider principle to convert the high-voltage signal into a low-voltage signal that the ADC can receive, and differential sampling eliminates the influence of power supply ground noise, ensuring the accuracy of the acquired upper bus voltage. and lower bus voltage Accurately reflects the actual voltage. Traditional solutions use a fixed DC bus voltage (e.g., Normalization cannot adapt to voltage fluctuations under a single-supply voltage divider capacitor structure (such as...). This technical solution acquires real-time voltage fluctuation data from the upper and lower busbars, providing a dynamic reference for subsequent modulation waveform normalization. It avoids sudden changes in the modulation ratio due to voltage deviation, suppresses load current fluctuations at the source, and generates a modulation waveform that matches the load voltage level, ensuring that the output voltage of the three-level equipment meets the load requirements and providing a standard waveform for subsequent normalization processing.

[0026] S2 utilizes the control unit to generate two modulation waveforms based on the initial sinusoidal modulation wave and the upper and lower bus voltages, respectively. and Specifically: The control unit uses an analog divider (such as the four-quadrant analog divider chip AD734) to modulate the initial sinusoidal wave. Divide by the collected upper bus voltage respectively and lower bus voltage The output consists of two modulated waveforms, which are represented as follows: ; .

[0027] This technical solution, based on the fundamental nature of division, scales the modulation wave amplitude according to the actual bus voltage, forming a normalized waveform that matches the upper and lower bus voltages. Furthermore, the four-quadrant divider can handle both positive and negative signals, ensuring correct normalization throughout both the positive and negative half-cycles of the modulation wave. Traditional solutions use only a single fixed voltage for normalization, when… and When imbalance occurs, the modulation ratio deviates from the actual requirement, leading to an imbalance in the midpoint current. This technical solution addresses this by implementing independent normalization. and Reflecting the modulation requirements of the upper and lower buses respectively, ensuring that during voltage deviation (such as...) The amplitudes of the two modulated waves can still be adaptively adjusted to maintain the balance of the midpoint current. For example: if rise, The amplitude decreases, which corresponds to a decrease in the duty cycle of the upper bus switch, reducing the charging time of the upper bus capacitor, suppressing further voltage rise, and forming a dynamic balance mechanism.

[0028] S3, based on the triangular carrier given by the control unit After preprocessing by the control unit, the two modulated waveforms are respectively coupled with triangular carrier waves. By comparison, obtain and Two-channel switching signal waveforms. Traditional solutions compare only one modulated waveform with the carrier wave, which cannot handle voltage fluctuations between the upper and lower bus lines. This technical solution uses preprocessing to compare both modulated waveforms separately with a triangular carrier wave, thus... and The switching logic corresponds to the upper and lower buses respectively. When the voltage deviates, the duty cycle of the upper and lower buses is adjusted independently to prevent the midpoint voltage deviation from aggravating, thereby suppressing load current fluctuations. At the same time, the analog modulation wave is converted into a digital switching signal to provide discrete logic states for three-level synthesis, which is convenient for the control unit to process and the drive circuit to execute.

[0029] S4, the control unit is based on and Two-way switch signal waveforms generate one-way three-level switch signal waveform Specifically: The control unit is an analog adder with a differential input structure (such as AD8276), which... and The voltage signals of the two-way switching signal waveforms are converted into current signals, and then converted into voltage outputs through a resistor to obtain the three-level switching signal waveforms. This ensures the amplitude accuracy of the three-level switching signal waveform.

[0030] This technical solution is based on the superposition principle. The input impedance matching of the adder ensures that the signal is not attenuated and is superimposed. The output voltage is proportional to the sum of the input voltage, thus achieving... The physical calculations are as follows. Traditional solutions only compare one modulation waveform with the carrier wave, and the directly obtained three-level switching waveform cannot accurately reflect the fluctuations of the upper and lower buses. The technical solution combines two two-level signals into a three-level signal. The generated three-level switching signal can accurately reflect the voltage fluctuations of the upper and lower buses, providing a foundation for the subsequent drive main circuit topology and ensuring the sinusoidal nature of the output voltage and the stability of the load current.

[0031] S5, the control unit based on the three-level switch signal waveform Level output switching sequence The drive circuit controls the operation of power switching devices in the main circuit topology. Traditional solutions may lead to power device damage or unstable output voltage due to unreasonable switch sequence design. However, this technical solution ensures the correctness and safety of the switch sequence, prevents power device damage, and guarantees the accuracy of the three-level output. It converts digital switch signals into physical switch actions, controls the three-level voltage required by the main circuit topology output, drives the load, and achieves stable control of the load current, meeting the load testing requirements of three-level equipment powered by a single DC power supply.

[0032] Example 2 This embodiment discloses an SPWM modulation method for load testing of a three-level device powered by a single DC power supply. As a preferred embodiment of the present invention, based on Embodiment 1, in step S1, the modulation parameters include the modulation wave frequency. and modulation amplitude The control unit is based on the formula Generate initial sinusoidal modulated wave .in, Indicates time, modulation amplitude. It is determined by the peak voltage required by the load.

[0033] Example 3 This embodiment discloses an SPWM modulation method for load testing of a three-level device powered by a single DC power supply. As a preferred embodiment of the invention, based on embodiment 1 or 2, the power module of its SPWM modulation system includes a single DC power supply and a voltage divider capacitor network; the two ends of the voltage divider capacitor network are respectively connected to the positive and negative polarities of the single DC power supply, and are connected to the upper bus capacitor bank. and lower bus capacitor bank The series connection divides the DC voltage of a single power supply into upper and lower parts, forming the basic power supply voltage for a three-level device. Therefore, in step S1, the sampling circuit collects the upper bus capacitor pool data. Voltage as upper bus voltage Collect the lower bus capacitor bank Voltage as lower bus voltage .

[0034] Example 4 This embodiment discloses an SPWM modulation method for load testing of a three-level device powered by a single DC power supply. As a preferred embodiment of the present invention, based on any of embodiments 1-3, in step S3, the triangular carrier wave is given by the control unit. The PWM module of the control unit generates a symmetrical triangular carrier wave with a peak value of 1 and a valley value of -1. Its frequency is set to several tens of times the modulation frequency, and the waveform symmetry is ensured by adjusting the counter period and comparison value. The principle of this process is: triangular carrier... Generated via timer interrupts, the symmetrical characteristics ensure that the duty cycle of the modulated wave is balanced in both the positive and negative half-cycles.

[0035] Example 5 This embodiment discloses an SPWM modulation method for load testing of a three-level device powered by a single DC power supply. As a preferred embodiment of the present invention, based on embodiment 4, step S3 involves the control unit preprocessing the two modulation waveforms, including: using an analog subtractor (such as an LM324 operational amplifier) ​​on the sinusoidal modulation waveform. minus triangular carrier The amplitude (the reference voltage is set to the amplitude of the triangular carrier wave, 1, and implemented through a resistor divider network), that is... Zero point offset to Based on analog adders in sinusoidal modulation waveforms Add a triangular carrier The amplitude (the reference voltage is set to the amplitude of the triangular carrier wave, which is achieved through a non-inverting amplifier circuit), that is... The zero point is shifted to 1.

[0036] The principle behind this process is that the operational amplifier operates in the linear region, and signal addition and subtraction are performed through a feedback resistor network, making... and Offset to triangular carrier The range of matches.

[0037] Example 6 This embodiment discloses an SPWM modulation method for load testing of a three-level device powered by a single DC power supply. As a preferred embodiment of the present invention, based on any one of embodiments 1-5, in step S3, the control unit uses an analog comparator (such as LM339), with the non-inverting input connected to the two pre-processed modulation waveforms. and The inverting end is connected to a triangular carrier. The output is connected to a 3.3V power supply through a pull-up resistor to form an open-collector (OC) gate structure, which outputs... and Two-way switch signal waveforms, where: ; .

[0038] The principle behind this process is that the threshold triggering mechanism of the analog comparator enables the digital conversion of the waveform, and the output level is compatible with the logic input of the control unit.

[0039] Example 7 This embodiment discloses an SPWM modulation method for load testing of a three-level device powered by a single DC power supply. As a preferred embodiment of the present invention, based on any one of embodiments 1-6, the main circuit topology of its SPWM modulation system includes four insulated-gate bipolar transistors, namely... , , and ;in, The collector is connected to the positive polarity of the power module. Drain and The collector is connected. Drain and The collector is connected. Drain and The collector is connected. The drain of the device is connected to the negative terminal of the power module.

[0040] Based on this, the control unit uses the three-level switching signal waveform The voltage level is determined using a state machine design, and the corresponding switching sequence is output through software logic. Switch sequence Expressed as: ; in, , , and These represent the insulated-gate bipolar transistors in the main circuit topology. , , and The switching signal is 1 for on and 0 for off, with a dead time added to prevent the insulated-gate bipolar transistor from shooting through. The switching sequence is amplified by an optocoupler-isolated driver circuit (such as HCPL-3120 or 2SC0435T) to control the gate voltage of the insulated-gate bipolar transistor in the main circuit topology (e.g., 0V for off and 15V for on), thereby controlling the operation of the power switching device.

[0041] The specific principle is as follows: the state machine is based on... level value Mapped to corresponding switch combinations, the dead time is implemented through a timer interrupt to prevent simultaneous conduction of the upper and lower bridge arm IGBTs, which could lead to a power supply short circuit. The switching state of the IGBT is controlled by the gate voltage, and different switch combinations achieve three-level output (e.g., ...). hour, and On, output Level).

[0042] Example 8 This embodiment discloses an SPWM modulation method for load testing of a three-level device powered by a single DC power supply. As a preferred embodiment of the present invention, it is applied to a wind power converter power unit load test device, the topology of which is as follows: Figure 3 As shown, it includes: a DC power supply Upper bus capacitor bank and lower bus capacitor bank Grid-side converters and generator-side converters. Among them, the DC power supply... voltage , .

[0043] The grid-side converter includes insulated-gate bipolar transistors. , , , 、 、 and load reactor .in, Indicates the net side, then , , and This is the main circuit topology of the grid-side converter. , , and ). The collector is connected to a DC power supply. The positive polarity, drain connection The collector, Drain connection The collector, drain connection The collector, The drain is connected to the DC power supply. The negative polarity; collector connection The drain electrode, drain connection The collector, drain connection The collector. Load reactor. Connect the two ends respectively Drain and The drain of the load reactor. Rated phase voltage of grid-side converter Rated current of grid-side converter .

[0044] The machine-side converter includes insulated-gate bipolar transistors. , , , , , and load reactor .in, Indicates the machine side, then , , and This is the main circuit topology of the grid-side converter. , , and ). The collector is connected to a DC power supply. The positive polarity, drain connection The collector, Drain connection The collector, drain connection The collector, The drain is connected to the DC power supply. The negative polarity; collector connection The drain electrode, drain connection The collector, drain connection The collector. Load reactor. Connect the two ends respectively Drain and The drain of the load reactor. Rated phase voltage of machine-side converter Rated current of machine-side converter .

[0045] Drain and collector connection Drain and The collector. Upper bus capacitor. One end connection collector and The collector (also a DC power supply) (positive polarity), upper bus capacitor The other end is the same as the lower bus capacitor. Connect one end together Drain and collector, lower bus capacitor The other end connects Drain and The drain (also the DC power supply) (Negative polarity). Based on this, the upper bus capacitor Voltage acquisition module I is connected at both ends to collect the voltage of the upper bus. Lower bus capacitor Voltage acquisition module II is connected at both ends to collect the voltage of the lower bus. .

[0046] Both the grid-side converter and the generator-side converter adopt this technical solution. Figure 2 The SPWM modulation method is shown. In this embodiment, the modulation wave frequency of the grid-connected converter is... The modulation frequency of the machine-side converter is Since the application steps of this technical solution are exactly the same in both grid-side converters and generator-side converters, for ease of description, the following steps are only described using... This indicates the frequency of the modulating wave. The steps are as follows: S1, input the modulation wave frequency to the control unit according to the load demand. and modulation amplitude The control unit generates the initial sinusoidal modulated wave. The sampling circuits (voltage acquisition module I and voltage acquisition module II) are used to collect data from the upper bus capacitor pool. and lower bus capacitor bank The voltage is used as the upper bus voltage. and lower bus voltage Input control unit.

[0047] S2 utilizes the control unit to generate two modulation waveforms based on the initial sinusoidal modulation wave and the upper and lower bus voltages, respectively. and The two modulation waveforms are represented as follows: and .

[0048] S3, based on the triangular carrier given by the control unit After preprocessing by the control unit, the two modulated waveforms are respectively coupled with triangular carrier waves. By comparison, obtain and Two-channel switch signal waveforms. Among them, a given triangular carrier wave... The range is The preprocessing of the two modulated waveforms includes: based on an analog subtractor in the sinusoidal modulated waveform Subtract the triangular carrier wave The amplitude, i.e. Zero point is Based on analog adders in sinusoidal modulation waveforms Add a triangular carrier The amplitude, i.e. The zero point is 1. This is achieved by using a triangular carrier wave. respectively with and By comparing, the range is obtained. and range Two-level waveforms and , represented as: ; .

[0049] S4, and The three-level switch signal waveform is obtained by adding the two switch signal waveforms together. ,Right now .

[0050] S5, the control unit based on the three-level switch signal waveform Level output switching sequence The drive circuit controls the operation of the power switching devices in the main circuit topology. The switching sequence... Expressed as: ; in, , , and These represent the switching signals of the four Insulated Gate Bipolar Transistors (IGBTs) in the main circuit topology, where 1 indicates on and 0 indicates off. In the grid-side converter, the four switching signals are represented as follows: , , and and corresponding access , , and The gate; in the machine-side converter, the four switching signals are respectively represented as , , and and corresponding access , , and The gate.

[0051] Figure 4 and Figure 5 This section describes the fluctuation of the effective load current values ​​of the grid-side converter and the generator-side converter when using the traditional modulation method of directly dividing by the bus voltage. Figure 4The waveform of the effective value of the load current of the grid-side converter is shown, with a fluctuation range of 1068A between 8s and 10s. Figure 5 The waveform of the effective value of the load current of the machine-side converter is shown. The fluctuation range of 8s to 10s is 2318A.

[0052] Figure 6 and Figure 7 This document describes the fluctuation of the effective load current values ​​of the grid-side converter and the generator-side converter when using the SPWM modulation method for load testing of a three-level device powered by a single DC power supply, as proposed in this technical solution. Figure 6 The waveform of the effective value of the load current of the grid-side converter has a fluctuation range of 285A from 8s to 10s. Figure 7 The waveform of the effective value of the load current of the machine-side converter is shown, with a fluctuation range of 885A from 8s to 10s.

[0053] contrast Figure 4 and Figure 6 ,as well as Figure 5 and Figure 7 The effective value fluctuations of the load current on both the machine side and the grid side were significantly reduced, verifying the effectiveness of this technical solution.

[0054] Example 12 This embodiment discloses an SPWM modulation method for load testing of a three-level device powered by a single DC power supply. As a preferred embodiment of the present invention, it is applied to a load testing device for a single-phase ANPC power unit of an energy storage PCS, the topology of which is as follows: Figure 8 As shown, it includes: a DC power supply Upper bus capacitor bank Lower bus capacitor bank And a single-phase ANPC topology. The DC power supply... voltage , .

[0055] Single-phase ANPC topology includes , Main circuit topology ( , , and and load reactor . The collector is connected to a DC power supply. The positive polarity, drain connection The collector, Drain connection The collector, drain connection The collector, The drain is connected to the DC power supply. The negative polarity; collector connection The drain electrode, drain connection The collector, drain connection The collector. Load reactor. Connect the two ends respectively Drain and The drain of the load reactor. The rated phase voltage of the power unit is 658V, and the rated current of the power unit is 1880A.

[0056] If this technical solution is adopted, Figure 2 The SPWM modulation method shown below has the following steps: S1, input the modulation wave frequency to the control unit according to the load demand. and modulation amplitude The control unit generates the initial sinusoidal modulated wave. The sampling circuits (voltage acquisition module I and voltage acquisition module II) are used to collect data from the upper bus capacitor pool. and lower bus capacitor bank The voltage is used as the upper bus voltage. and lower bus voltage Input control unit.

[0057] S2 utilizes the control unit to generate two modulation waveforms based on the initial sinusoidal modulation wave and the upper and lower bus voltages, respectively. and The two modulation waveforms are represented as follows: and .

[0058] S3, based on the triangular carrier given by the control unit After preprocessing by the control unit, the two modulated waveforms are respectively coupled with triangular carrier waves. By comparison, obtain and Two-channel switch signal waveforms. Among them, a given triangular carrier wave... The range is The preprocessing of the two modulated waveforms includes: based on an analog subtractor in the sinusoidal modulated waveform Subtract the triangular carrier wave The amplitude, i.e. Zero point is Based on analog adders in sinusoidal modulation waveforms Add a triangular carrier The amplitude, i.e. The zero point is 1. This is achieved by using a triangular carrier wave. respectively with and By comparing, the range is obtained. and range Two-level waveforms and , represented as: ; .

[0059] S4, and The three-level switch signal waveform is obtained by adding the two switch signal waveforms together. ,Right now .

[0060] S5, the control unit based on the three-level switch signal waveform Level output switching sequence The drive circuit controls the operation of the power switching devices in the main circuit topology. The switching sequence... Expressed as: ; in, , , and These represent the switching signals of the four insulated-gate bipolar transistors in the main circuit topology of the power unit topology of the energy storage PCS, with 1 indicating on and 0 indicating off. , , and Corresponding to , , , .

[0061] Figure 9 The fluctuation of the effective value of the load current of a single-phase ANPC power unit in an energy storage PCS is shown when using the traditional SPWM modulation method of directly dividing by the bus voltage. The fluctuation range difference is 3350A from 8s to 10s.

[0062] Figure 10 The fluctuation of the effective value of the load current of the single-phase ANPC power unit of the energy storage PCS is shown when using the SPWM modulation method for load testing of a three-level device powered by a single DC power supply proposed in this technical solution. The fluctuation range difference is 1A from 8s to 10s.

[0063] contrast Figure 9 and Figure 10 The effective value fluctuation of the load current of the single-phase ANPC power unit of the energy storage PCS was significantly reduced, verifying the effectiveness of this technical solution.

Claims

1. An SPWM modulation method for load testing of a three-level device powered by a single DC power supply, characterized in that, The method implements SPWM modulation based on an SPWM modulation system. The SPWM modulation system includes a power supply module, a sampling circuit, a control unit, a drive circuit, and a main circuit topology. The power supply module is connected to the main circuit topology for power supply. The control unit is electrically connected to the main circuit topology through the sampling circuit and is connected to the main circuit topology for control through the drive circuit. The SPWM modulation method includes the following steps: S1, input modulation parameters to the control unit according to load requirements, and use the control unit to generate an initial sinusoidal modulation wave. The sampling circuit is used to collect the upper bus voltage of the power module and main circuit topology. and lower bus voltage and voltage and lower bus voltage Input control unit; S2 utilizes the control unit to generate two modulation waveforms based on the initial sinusoidal modulation wave and the upper and lower bus voltages, respectively. and ; S3, based on the triangular carrier given by the control unit After preprocessing by the control unit, the two modulated waveforms are respectively coupled with triangular carrier waves. By comparison, obtain and Two-way switch signal waveforms; S4, the control unit is based on and Two-way switch signal waveforms generate one-way three-level switch signal waveform ; S5, the control unit based on the three-level switch signal waveform Level output switching sequence The drive circuit controls the operation of the power switching devices in the main circuit topology.

2. The SPWM modulation method for load testing of a three-level device powered by a single DC power supply as described in claim 1, characterized in that, In step S1, the modulation parameters include the modulation wave frequency. and modulation amplitude The control unit is based on the formula Generate initial sinusoidal modulated wave ;in, Indicates time.

3. The SPWM modulation method for load testing of a three-level device powered by a single DC power supply as described in claim 1, characterized in that, The power supply module of the SPWM modulation system includes a single DC power supply and a voltage divider capacitor network; the two ends of the voltage divider capacitor network are respectively connected to the positive and negative terminals of the single DC power supply, and are connected to the upper bus capacitor bank. and lower bus capacitor bank The series configuration divides the DC voltage of a single DC power supply into upper and lower parts, forming the basic power supply voltage for a three-level device.

4. The SPWM modulation method for load testing of a three-level device powered by a single DC power supply as described in claim 3, characterized in that, In step S1, the sampling circuit is used to collect the upper bus capacitor pool. Voltage as upper bus voltage Collect the lower bus capacitor bank Voltage as lower bus voltage .

5. The SPWM modulation method for load testing of a three-level device powered by a single DC power supply as described in claim 1, characterized in that, In step S2, the control unit generates two modulation waveforms based on the analog divider, namely, the two modulation waveforms are represented as follows: ； 。 6. The SPWM modulation method for load testing of a three-level device powered by a single DC power supply as described in claim 1, characterized in that, In step S3, a triangular carrier wave is given. The peak value is 1 and the trough value is -1.

7. The SPWM modulation method for load testing of a three-level device powered by a single DC power supply as described in claim 6, characterized in that, In step S3, the preprocessing of the two modulated waveforms by the control unit includes: Based on analog subtractors in sinusoidal modulation waveforms Subtract the triangular carrier wave The amplitude, i.e. Zero point is ; Based on analog adders in sinusoidal modulation waveforms Add a triangular carrier The amplitude, i.e. The zero point is 1.

8. The SPWM modulation method for load testing of a three-level device powered by a single DC power supply as described in claim 1, characterized in that, In step S3, the control unit uses an analog comparator to compare the two preprocessed modulation waveforms with a triangular carrier wave. To make a comparison, that is and The waveforms of the two switch signals are represented as follows: ； 。 9. The SPWM modulation method for load testing of a three-level device powered by a single DC power supply as described in claim 1, characterized in that, In step S3, the control unit uses an analog adder to... and The three-level switch signal waveform is obtained by adding the two switch signal waveforms together. ,Right now .

10. The SPWM modulation method for load testing of a three-level device powered by a single DC power supply as described in claim 1, characterized in that, The main circuit topology of the SPWM modulation system includes four insulated-gate bipolar transistors, namely... , , and ;in, The collector is connected to the positive polarity of the power module. Drain and The collector is connected. Drain and The collector is connected. Drain and The collector is connected. The drain of the device is connected to the negative terminal of the power module.

11. The SPWM modulation method for load testing of a three-level device powered by a single DC power supply as described in claim 10, characterized in that, In step S5, the switching sequence Represented as: ； in, , , and These represent the insulated-gate bipolar transistors in the main circuit topology. , , and The switch signal is 1 for on and 0 for off.

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