Electric energy quality comprehensive treatment system based on cooperative control of APF and SVG

Abstract

The invention provides an APF and SVG cooperative control-based electric energy quality comprehensive treatment system, and belongs to the technical field of intelligent power grid industry and electric energy quality comprehensive treatment, and the system comprises the steps of obtaining a power grid current signal and a voltage signal, and detecting a harmonic component and a voltage deviation through a harmonic detection module; a collaborative decision controller is adopted to determine a compensation strategy according to the harmonic component and the voltage deviation, and compensation tasks of an active power filter channel and a static var generator channel are distributed; harmonic compensation current is generated through an active power filter channel, and high-frequency harmonics are suppressed; reactive compensation current is generated through a static var generator channel, and voltage fluctuation is stabilized; and the compensation current is filtered through the filtering module and is output to a power grid. The electric energy quality comprehensive treatment system can effectively inhibit power grid harmonic waves, stabilize voltage fluctuation and improve electric energy quality, and is suitable for a complex power grid environment.

Description

TECHNICAL FIELD

[0001] The present application relates to the intelligent power grid industry, the power quality comprehensive treatment technical field, and particularly relates to a power quality comprehensive treatment system based on active power filter APF and static var generator SVG collaborative control. BACKGROUND

[0002] The harmonic and voltage fluctuation problems in the power grid have long plagued the operation of the power system, seriously affecting the power quality and the safety of the electrical equipment. The traditional compensation method often regards harmonic suppression and voltage stability as independent problems, and uses a separate solution, which is difficult to cope with the coupling influence of harmonic and voltage fluctuation in complex power grid environment. How to collaboratively handle harmonic and voltage fluctuation at the system level to achieve comprehensive treatment of power quality in full frequency band and high precision has become a technical problem to be solved. This involves many challenges: first, how to accurately obtain full-band harmonic data and voltage deviation information; second, how to establish a coupling model of harmonic and voltage fluctuation and develop an optimal compensation strategy; third, how to coordinate active filtering and reactive power compensation devices to achieve fast and accurate compensation control; finally, how to ensure the reliable operation of the compensation device in the harsh power grid environment. These problems are interrelated and constitute a complex systematic problem, which requires overall consideration and innovative breakthroughs from detection, decision-making, control, implementation and other aspects to achieve collaborative compensation of power grid harmonic and voltage fluctuation and comprehensively improve power quality. SUMMARY

[0003] The present application provides a power quality comprehensive treatment system based on APF and SVG collaborative control, mainly comprising: The power grid current signal and voltage signal are obtained, and the harmonic component and voltage deviation are detected by the harmonic detection module; the compensation strategy is determined by the collaborative decision controller according to the harmonic component and voltage deviation, and the compensation tasks of the active power filter channel and the static var generator channel are distributed; the harmonic compensation current is generated through the active power filter channel to suppress high-frequency harmonic; the reactive power compensation current is generated through the static var generator channel to stabilize voltage fluctuation; the compensation current is filtered by the filtering module and output to the power grid.

[0004] Further, the power grid current signal and voltage signal are obtained, and the harmonic component and voltage deviation are detected by the harmonic detection module, including: the power grid current signal is collected by a wideband current transformer, and full-band harmonic data is obtained by using high-frequency sampling technology; the power grid voltage signal is collected by a voltage sensor, and voltage deviation data is detected; the current signal and voltage signal are subjected to anti-aliasing filtering by a pre-processing module to generate filtered signals; the filtered signals are synchronously sampled by an analog-to-digital converter to obtain the harmonic component and voltage deviation.

[0005] Further, the compensation strategy is determined according to the harmonic component and the voltage deviation by using the cooperative decision controller, including: obtaining the total harmonic distortion rate of the harmonic component and the deviation amplitude of the voltage deviation; judging whether the deviation amplitude exceeds the preset voltage deviation threshold, if yes, preferentially allocating the static var generator channel to perform voltage stability compensation; judging whether the total harmonic distortion rate exceeds the preset harmonic threshold, if yes, allocating the active power filter channel to perform harmonic compensation; when neither the deviation amplitude nor the total harmonic distortion rate exceeds the preset threshold, using the preset proportion to allocate the active power filter channel and the static var generator channel to perform preventive compensation.

[0006] Further, the harmonic compensation current is generated through the active power filter channel, including: obtaining high-frequency harmonic data in the harmonic component; generating the compensation current instruction according to the high-frequency harmonic data through the hysteresis comparator; controlling the inverter to generate the high-frequency harmonic compensation current according to the compensation current instruction; and injecting the high-frequency harmonic compensation current into the power grid to offset the high-frequency harmonic.

[0007] Further, the reactive compensation current is generated through the static var generator channel, including: obtaining the voltage deviation and the active power change data of the power grid; calculating the reactive compensation demand based on a preset voltage fluctuation model, wherein the voltage fluctuation model determines the compensation amount according to the active power change and the integral thereof; generating the reactive compensation current instruction through the quasi-proportional resonant controller; controlling the inverter to generate the reactive compensation current according to the reactive compensation current instruction; and injecting the reactive compensation current into the power grid to stabilize the power grid voltage.

[0008] Further, the compensation current is filtered through the filter module, including: obtaining the compensation current generated by the active power filter channel and the static var generator channel; calculating the power grid impedance parameter through the real-time identification module; dynamically adjusting the filter parameter based on the power grid impedance parameter; and filtering the compensation current through the filter to generate the output current meeting the power grid standard.

[0009] Further, the device adopts a layered closed architecture, including: a power layer, a control layer, a redundancy layer and a heat dissipation layer. The power layer realizes power conversion through an insulated gate bipolar transistor module and optimizes the conduction performance by using a direct current circuit technology; the control layer realizes high-speed operation through a field programmable gate array and enhances the anti-interference ability by using an optical coupling isolation and shielding design; the redundancy layer realizes automatic fault switching through parallel power units; and the heat dissipation layer supports a wide temperature operating environment through a temperature control heat dissipation system.

[0010] The technical scheme provided by the embodiment of the application can include the following beneficial effects: The application discloses an electric energy quality comprehensive treatment system based on APF and SVG collaborative control, which can realize collaborative compensation of power grid harmonics and voltage fluctuation, acquires full-band harmonic data through wideband current transformer and high-frequency sampling technology, detects voltage deviation through a voltage sensor, determines a compensation strategy according to harmonic components and voltage deviation by a collaborative decision controller, and distributes compensation tasks of an active power filter and a static var generator. The active power filter generates high-frequency harmonic compensation current through a hysteresis comparator, the static var generator generates reactive compensation current based on a voltage fluctuation model and a proportional-resonant controller, and harmonic suppression and voltage stability are realized. The application adopts a hierarchical closed architecture, configures a power layer and a control layer, and improves reliability through parallel redundancy and temperature control and heat dissipation. The electric energy quality comprehensive treatment system can effectively suppress power grid harmonics, stabilize voltage fluctuation, improve electric energy quality, and is suitable for complex power grid environments. BRIEF DESCRIPTION OF DRAWINGS

[0011] Figure 1 FIG. 1 is a flowchart of an electric energy quality comprehensive treatment system based on APF and SVG collaborative control in the application. DETAILED DESCRIPTION

[0012] The technical solutions of the application will be described clearly and completely below in conjunction with embodiments. Obviously, the described embodiments are only some of the embodiments of the application, but not all the embodiments. Based on the embodiments in the application, all other embodiments obtained by those skilled in the art without creative work are within the protection scope of the application.

[0013] Embodiment one As Figure 1 described, the electric energy quality comprehensive treatment system based on APF and SVG collaborative control in the embodiment can specifically include: S101, acquire power grid current signals and voltage signals, detect harmonic components and voltage deviation through a harmonic detection module.

[0014] Step S101 specifically includes the following steps S1011-S1014: S1011, acquire power grid current signals through a wideband current transformer, and acquire full-band harmonic data through high-frequency sampling technology.

[0015] Specifically, the power grid current signals are acquired through a wideband CT sensor, nanocrystalline magnetic core material is adopted to realize 0.5-3KHZ frequency band response, and linearity error is less than 0.1% in a 100A-5000A current range. A ROGOWSKI coil samples the current signals at a frequency of 50KHZ, and ensures that 3-37 harmonic components generated by devices such as a crusher and a juicing motor in a sugar production line are captured.

[0016] S1012, collect the grid voltage signal through the voltage sensor, and detect voltage deviation data.

[0017] Specifically, the current signal is subjected to anti-aliasing filtering processing, the cutoff frequency is set to 25KHZ, and high-frequency noise interference is filtered out. The 16-bit ADC sampling circuit cooperates with the 8-channel synchronous sampling technology, and adopts the OSR=128 oversampling mode to improve the detection precision of weak harmonic signals, and the quantization time is controlled within 1US.

[0018] S1013, the current signal and the voltage signal are subjected to anti-aliasing filtering processing by using a pre-processing module to generate filtered signals.

[0019] Specifically, the FPGA preprocessing unit in the preprocessing module is used to preliminarily process the sampling data, and extract the fundamental component and each harmonic component. The improved IP-IQ algorithm is combined with a wave trap to reduce the traditional detection delay from 50MS to 10MS, and the total harmonic distortion THDI value is calculated in real time.

[0020] S1014, the filtered signals are synchronously sampled by using an analog-to-digital converter to obtain harmonic components and voltage deviations.

[0021] Specifically, the analog-to-digital converter synchronously collects the 10KV bus voltage signal, detects the voltage deviation ΔU caused by the fluctuation of the bagasse fuel supply of the self-provided power plant. The voltage deviation calculation adopts the per-unit value, and when |ΔU| exceeds 0.05 per-unit value, the voltage fluctuation early warning is triggered.

[0022] S102, a collaborative decision controller is used to determine a compensation strategy according to the harmonic components and the voltage deviation, and to allocate compensation tasks of the active power filter channel and the static var generator channel.

[0023] Step S102 specifically includes the following steps S1021-S1024: S1021, the total harmonic distortion of the harmonic component and the deviation amplitude of the voltage deviation are obtained.

[0024] Specifically, the collaborative decision controller executes the division compensation strategy according to the harmonic spectrum analysis result. The active power filter APF channel is specially responsible for compensating 13-50 high-frequency harmonics, generates compensation current by using a hysteresis comparator, and the response time is controlled within 50US. The static var generator SVG channel undertakes the compensation of 2-13 low-frequency harmonics and dynamic reactive power adjustment tasks, and adopts a quasi-PR controller to realize 5-500HZ bandwidth coverage.

[0025] In an embodiment, when the crusher frequency converter generates 25 times, 37 times harmonic peak values, the collaborative decision controller immediately allocates these high-frequency harmonics to the APF channel processing. According to the detection result of the harmonic current amplitude 300A, the APF channel generates a reverse compensation current through the Infineon IGBT module to realize the rapid suppression of high-frequency harmonics. At the same time, the 5th, 7th and 11th harmonics generated during the start-stop process of the juicer motor are allocated to the SVG channel, and the SVG channel combines the comprehensive treatment of the reactive power compensation demand.

[0026] S1022, whether the deviation amplitude exceeds the preset voltage deviation threshold value, if it exceeds, the static var generator channel is preferentially allocated for voltage stability compensation.

[0027] A voltage fluctuation model is established, and the transfer function is ΔU=0.15·ΔP+0.02·∫ΔPDT. When the active power variation ΔP of the self-provided power plant exceeds the preset threshold value, the SVG channel calculates the required reactive power compensation according to the model. The 0.15 coefficient in the model reflects the direct influence of active power variation on voltage, and the 0.02·∫ΔPDT integral term considers the cumulative effect of power variation.

[0028] Specifically, when the bagasse generator output fluctuates due to unstable fuel supply, the active power variation ΔP can reach ±200KW. According to the voltage fluctuation model calculation, the SVG channel needs to provide ±300KVAR of dynamic reactive power compensation. After receiving the compensation instruction, the SVG channel completes the reactive power output adjustment within 100MS, and controls the voltage fluctuation rate within ±2%.

[0029] S1023, whether the total harmonic distortion rate exceeds the preset harmonic threshold value, if it exceeds, the active power filter channel is allocated for harmonic compensation.

[0030] Specifically, the priority control logic is executed, when the voltage deviation |ΔU| is greater than 0.05 per unit, the collaborative decision controller preferentially puts into the SVG channel for voltage stability control. When THDI exceeds 8%, the APF channel is started for harmonic compensation. Under normal working conditions, the APF and the SVG perform preventive compensation according to the ratio of 3:1, the APF channel undertakes 75% of the harmonic control task, and the SVG channel undertakes 25% of the low-frequency harmonic and all reactive power compensation tasks.

[0031] S1024, when the deviation amplitude and the total harmonic distortion rate do not exceed the preset threshold value, the preset proportion is used to allocate the active power filter channel and the static var generator channel for preventive compensation.

[0032] Specifically, the recursive least squares method is used to identify the grid impedance parameters in real time, and the inductance and capacitance values of the LCL filter are dynamically adjusted. When the grid impedance changes, the filter parameters are automatically tracked and adjusted to avoid the drift of the system resonance point. The grid impedance identification period is set to 10 seconds to ensure that the filter parameters match the grid state.

[0033] In one possible implementation, during the heating process of the crystallization tank, the grid impedance changes from 0.8Ω to 1.2Ω. After the recursive least squares method detects the impedance change, the inductance value of the LCL filter is automatically adjusted from 2.5mH to 3.1mH, and the capacitance value is adjusted from 150μF to 120μF, keeping the filter resonance frequency stable at 1.8KHZ, avoiding resonance with the main harmonic frequency in the grid.

[0034] Further, a modular thermal redundancy control mechanism is established to support N+1 parallel operation of power units. When an IGBT power module fails due to over-temperature or over-current, the fault detection circuit identifies the fault state within 1US and automatically switches to the redundant module for continuous operation. After the faulty module is isolated, the remaining modules redistribute the compensation tasks to ensure that the overall compensation capability of the device is not affected.

[0035] It should be noted that in the sugar mill application case, the device is configured with 6 APF power modules of 300A and 4 SVG power modules of 400KVAR. When one of the APF modules fails, the remaining 5 modules automatically assume the original compensation task, and the single-module compensation current is increased from 300A to 360A, still meeting the harmonic control requirements of the crusher frequency converter. The SVG module also has automatic fault switching function to ensure stable voltage supply for key equipment such as crystallization tank and honey separator.

[0036] Preferably, the cooperative decision controller uses KINTEX-7 FPGA for high-speed operation, and is configured with an optical coupling isolation circuit to provide electrical isolation of 2500V or more, and a double-layer metal shielding design to achieve an EMC level of III or higher. The controller has a built-in temperature monitoring function that starts forced air cooling when the ambient temperature exceeds 45℃, and stops the cooling fan when the temperature drops to 35℃, adapting to the harsh environment of high temperature and high humidity in sugar mills.

[0037] S103, generating harmonic compensation current through the active power filter channel to suppress high-frequency harmonics.

[0038] S103 specifically includes the following steps S1031-S1034: S1031, obtaining high-frequency harmonic data in the harmonic component.

[0039] Specifically, the detected 3-50 harmonic components are tracked and controlled in real time by using a hysteresis comparator. The hysteresis comparator sets upper and lower threshold values, and when the harmonic current deviation exceeds the preset hysteresis bandwidth, the switching state is immediately triggered. The hysteresis bandwidth is set to 0.5% of the fundamental current, ensuring the tracking accuracy of the harmonic compensation current. When the difference between the detected harmonic current and the reference current exceeds the upper limit of the hysteresis, the control signal outputs a high level to drive the IGBT to turn on; when the difference is lower than the lower limit of the hysteresis, the output is low, making the IGBT turn off.

[0040] S1032, generating a compensation current instruction according to the high-frequency harmonic data through a hysteresis comparator.

[0041] Specifically, the fast generation of harmonic compensation current is realized based on Infineon FF1400R17IP4 IGBT module. The IGBT module works at 1700V voltage level, and the DCB ceramic substrate technology is used to reduce the conduction loss by 30%. The built-in temperature sensor monitors the junction temperature in real time, and when the junction temperature exceeds 125℃, it automatically runs at reduced capacity to ensure the safety of the device. The response time of the short-circuit protection circuit is controlled within 1 microsecond, and the short-circuit fault is identified by detecting the change of collector-emitter voltage, and the IGBT is immediately turned off to avoid damage to the device.

[0042] S1033, controlling the inverter to generate a high-frequency harmonic compensation current according to the compensation current instruction.

[0043] Specifically, the DC bus voltage is converted into harmonic compensation current through a three-phase bridge inverter circuit. The DC bus voltage is stabilized at 800V, and the voltage is maintained stable through double closed-loop control of voltage outer loop and current inner loop. The voltage outer loop adopts PI controller, the proportional coefficient is set to 0.8, and the integral time constant is 50 milliseconds; the current inner loop adopts quasi-proportional resonant controller, and the resonant point is set at the characteristic harmonic frequencies of 3 times, 5 times, and 7 times, to realize accurate compensation of specific harmonic.

[0044] S1034, injecting the high-frequency harmonic compensation current into the power grid to offset the high-frequency harmonic.

[0045] Specifically, the space vector pulse width modulation technology is used to generate IGBT drive signal. The carrier frequency is set to 20kHz, and the PWM signal is generated by comparing the triangular carrier with the modulation wave. The dead time is set to 2 microseconds to prevent the upper and lower bridge arms from being short-circuited. The modulation degree is controlled within 0.9 to avoid harmonic distortion caused by over-modulation. The drive circuit uses optical coupling isolation, and the isolation voltage reaches 2500V, effectively suppressing the electromagnetic interference of the power loop to the control loop.

[0046] In an embodiment, for the 25th and 37th characteristic harmonics generated by the sugar mill crusher frequency converter, the APF channel calculates the harmonic current effective value to be about 300A by detecting the fundamental current 1667A and the total harmonic distortion rate 18%. The hysteresis comparator sets the hysteresis bandwidth to 8.3A, and when the 25th harmonic current deviation exceeds this threshold, the IGBT switching state is immediately adjusted. The IGBT module works at a switching frequency of 20kHz, and through space vector modulation, a compensation current equal in amplitude and opposite in phase to the 25th harmonic is generated, achieving harmonic cancellation effect.

[0047] S104, generating a reactive compensation current through the static var generator channel to stabilize voltage fluctuations.

[0048] Step S104 includes the following steps S1041-S1045: S1041, obtain voltage deviation and grid active power change data.

[0049] Specifically, a quasi-proportional resonant controller is used to track the reactive current reference value. The transfer function of the quasi-PR controller is Gc(s)=Kp+2Krs / (s 2 +ωc 2 ), where Kp is the proportional coefficient, Kr is the resonant coefficient, and ωc is the resonant frequency. The proportional coefficient Kp is set to 1.2 to provide wideband control capability; the resonant coefficient Kr is set to 800 to provide high gain at power frequency 50Hz, achieving zero-static tracking of fundamental reactive current. The controller bandwidth covers the frequency range of 5-500Hz, and can track the rapidly changing reactive demand.

[0050] S1042, calculate the reactive compensation demand based on a preset voltage fluctuation model, wherein the voltage fluctuation model determines the compensation amount according to the active power change and its integral.

[0051] Specifically, the reactive compensation amount is calculated based on the voltage fluctuation model. The voltage fluctuation model is: ΔU=0.15·ΔP+0.02·∫ΔPDT By detecting the active power change ΔP and its integral term, the voltage fluctuation trend is predicted. When an active power increase of 100kW is detected, the voltage will rise by 15V according to the model, and the SVG channel will immediately output inductive reactive power for compensation. The integral term coefficient 0.02 ensures the cumulative compensation effect for persistent power changes, avoiding long-term voltage deviation.

[0052] S1043, generate a reactive compensation current instruction through a quasi-proportional resonant controller.

[0053] Specifically, the grid impedance is identified in real time to optimize the reactive power compensation strategy. The recursive least squares method is used to identify the equivalent impedance of the grid, and the forgetting factor is set to 0.98 to balance the tracking speed and noise resistance. When the grid impedance is identified to increase, the same reactive power change has a greater impact on the voltage, and the compensation coefficient is automatically adjusted to improve the compensation accuracy. The impedance identification result is used to dynamically adjust the LCL filter parameters to optimize the system damping characteristics.

[0054] In S1044, the inverter generates a reactive compensation current according to the reactive compensation current instruction, and injects the reactive compensation current into the grid to stabilize the grid voltage.

[0055] Specifically, ±300kVar dynamic reactive power compensation output is achieved. The SVG channel adopts a three-level topology structure, and the midpoint clamping technology is used to reduce the voltage stress of the device. The output inductor inductance is 0.8mH, and the switch ripple current amplitude is limited within 5%. The reactive power regulation range is-300kVar to +300kVar, and the response time is controlled within 20 milliseconds. When the grid needs capacitive reactive power, the SVG outputs leading current; when the grid needs inductive reactive power, the SVG outputs lagging current, achieving four-quadrant reactive power regulation.

[0056] In an embodiment, when the sugar mill juice extraction motor set is started, a 300kVar reactive power impact is generated, and the SVG channel detects a 8V bus voltage drop through the voltage fluctuation model. The quasi-PR controller immediately calculates the reactive compensation reference value, and outputs 300kVar capacitive reactive power through the three-level inverter. The output inductor limits the switch ripple current within 15A, and the compensated current is injected into the grid after LCL filtering. The entire compensation process is completed within 15 milliseconds, effectively suppressing voltage fluctuations and ensuring the normal operation of other production equipment.

[0057] It should be noted that the APF channel and the SVG channel are powered by independent DC buses to avoid mutual interference. The APF DC bus voltage is 800V, mainly responsible for harmonic compensation; the SVG DC bus voltage is 1200V, specifically used for reactive power compensation. The two channels are coordinated and controlled through optical fiber communication, and the response time difference is controlled within 5 microseconds, ensuring the synchronization of compensation actions.

[0058] In S105, the compensation current is filtered by the filtering module and output to the grid.

[0059] Step S105 includes the following steps S1051-S1054: In S1051, the compensation currents generated by the active power filter channel and the static var generator channel are obtained.

[0060] Specifically, the grid impedance is identified in real time based on the recursive least squares method, and the impedance value is calculated by collecting the grid voltage and current signals. The recursive least squares method is an iterative algorithm that uses historical data and current measurements to update model parameters step by step. For example, the initial impedance model is set as Z(k) = R + jωL, where R is the resistance, L is the inductance, and ω is the angular frequency. The values of R and L are updated by minimizing the sum of squared errors to ensure that the identification accuracy is within 0.5%.

[0061] S1052, calculating the grid impedance parameters through the real-time identification module.

[0062] Specifically, the parameters of the LCL filter are dynamically adjusted based on the identified grid impedance, such as adjusting the values of inductors L1, L2 and capacitor C, so that the filter resonance frequency avoids the grid harmonic frequency band, avoiding the risk of resonance, where the LCL filter is a three-element filter circuit composed of two inductors and one capacitor, used to suppress high-frequency switching ripple, and the adjustment process is to solve the poles of the filter transfer function to ensure that the system gain is below -3dB.

[0063] S1053, dynamically adjusting the filter parameters based on the grid impedance parameters.

[0064] Specifically, the compensation current is input into the adjusted LCL filter for filtering, and the output is output to the grid after eliminating high-frequency noise.

[0065] For example, in the sugar production line crusher inverter load scenario, when the compensation current contains 25th and 37th harmonic components, the grid impedance is identified as 5Ω + j10Ω through step S1051, and then step S502 adjusts L1=1mH, L2=0.5mH, C=10μF, so that the filter cutoff frequency is above 2kHz, ensuring that the output current THDI is reduced to below 4%. This can effectively suppress harmonic injection into the grid, improve equipment stability and production efficiency, and reduce motor temperature rise by 60%.

[0066] In one possible implementation, for the reactive power compensation scenario of the juicer motor load, the filter processing of step S105 also combines the voltage fluctuation model. When ΔU exceeds 0.05 p.u., the compensation current input filter of the SVG channel is adjusted first, and the output stable voltage fluctuation is within ±2%, which is beneficial to maintain the temperature deviation of the crystallization tank within ±3℃ and improve the quality of sucrose.

[0067] Specifically, this dynamic filtering method can adapt to changes in the grid caused by fluctuations in fuel supply, and the actual annual electricity savings are 1.2 million degrees, with a 40% reduction in maintenance costs.

[0068] S1054, filtering the compensation current through the filter to generate an output current that meets the grid standard.

[0069] Embodiment Two Further, the power quality comprehensive management system adopts a hierarchical closed architecture, including: a power layer, a control layer, a redundancy layer, and a heat dissipation layer. The power layer realizes power conversion through an insulated gate bipolar transistor module, and adopts direct current circuit technology to optimize conduction performance; the control layer realizes high-speed operation through a field programmable gate array, and adopts optical coupling isolation and shielding design to enhance anti-interference ability; the redundancy layer realizes automatic fault switching through parallel power units; and the heat dissipation layer supports a wide temperature operating environment through a temperature control heat dissipation system.

[0070] Specifically, the power layer realizes power conversion through an insulated gate bipolar transistor module, and adopts direct current circuit technology to optimize conduction performance. An Infineon FF1400R17IP4 insulated gate bipolar transistor module is selected as a power conversion core device, which has a rated voltage of 1700V and a rated current of 1400A, and can withstand current surges generated when high-power equipment in the sugar production line is started and stopped. The insulated gate bipolar transistor module integrates a gate drive circuit and a protection circuit inside, realizes fast switching action through voltage control, and the switching frequency can reach 20kHz, meeting the frequency requirement of 3-50 harmonic compensation. Direct current circuit technology is adopted to optimize the packaging of the insulated gate bipolar transistor module, and the power chip is directly welded on the ceramic substrate, which has high thermal conductivity and low thermal resistance characteristics. Direct current circuit technology reduces the conduction loss by 30% by reducing the intermediate conductive layer, and at the same time improves the heat dissipation efficiency. The thickness of the ceramic substrate is 0.63mm, and the thermal conductivity reaches 24W / mK, ensuring that the temperature of the power module is controlled below 85℃ when running under high load. A temperature sensor is integrated inside the insulated gate bipolar transistor module to monitor the chip junction temperature in real time. When the junction temperature exceeds 125℃, the temperature protection circuit automatically reduces the switching frequency or suspends the output to avoid overheating damage. The short-circuit protection circuit adopts a desaturation detection method, detects the change of the collector-emitter voltage, and when a short-circuit fault is detected, the protection circuit turns off the insulated gate bipolar transistor within 1 microsecond, and the protection response time is much faster than that of the traditional fuse protection.

[0071] Specifically, the control layer realizes high-speed operation through a field programmable gate array (FPGA), and adopts optical coupling isolation and shielding design to enhance anti-interference capability. An XILINX KINTEX-7 FPGA is selected as the control core. The device is manufactured by using a 28-nm process, and integrates 468K logic units and 1540 digital signal processing units. The FPGA can simultaneously process multiple harmonic detection and compensation control algorithms through a parallel processing architecture, and the operation speed is increased by more than 5 times compared with a traditional digital signal processor. The logic units can be reconfigured, and support hardware acceleration implementation of the improved IP-IQ algorithm. An optical coupling isolation circuit is configured outside the FPGA. The optical coupling isolator is an HCPL-3120 high-speed optical coupler, the isolation voltage reaches 2500V, and the response time is less than 100ns. The optical coupling isolation circuit completely isolates the control signal from the power circuit, and blocks the common-mode interference propagation path. When a large-power equipment in the sugar production line is started or stopped, electromagnetic interference is propagated through the power line. The optical coupling isolation circuit can effectively block the interference signal from entering the control circuit, and ensure accurate execution of the control algorithm. A double-layer metal shielding design is adopted to electromagnetically shield and protect the control circuit. The inner shielding layer is made of 0.5-mm-thick aluminum alloy plate, and the outer shielding layer is made of 0.3-mm-thick galvanized steel plate. The double-layer shielding structure has a shielding effectiveness of more than 80 dB for electromagnetic interference in the frequency band of 20 MHz-1 GHz. Absorbing material is filled between the inner and outer shielding layers to further attenuate high-frequency interference signals. The shielding shell is sealed with conductive rubber strips to ensure the shielding continuity of the joint, and the overall electromagnetic compatibility level reaches the III-level standard. The hardware accelerator for the improved IP-IQ algorithm is realized inside the FPGA. The instantaneous power calculation is completed through a special multiplier and an accumulator. The algorithm converts the three-phase current signal into two-phase orthogonal components, separates the active current and reactive current components, and shortens the detection delay from 50 ms of the traditional software algorithm to 10 ms. The hardware accelerator adopts a pipeline architecture, and can process a group of sampling data in each clock cycle, which meets the real-time processing requirement of a 50-kHz sampling frequency.

[0072] Specifically, the redundant layer realizes automatic fault switching through parallel power units. N+1 modular redundancy design is adopted to divide the device power capacity into multiple independent power unit modules, each with a rated capacity of 100 kVA. When the total capacity of the device is 500 kVA, 6 power units are configured, 5 of which are in normal operation and 1 is a hot backup. Each power unit is connected through a parallel bus, each unit is equipped with independent control and protection circuits, and units communicate and coordinate through CAN bus. A fault detection circuit is integrated in each power unit to monitor the operating state, output current waveform and temperature parameters of the insulated gate bipolar transistor in real time. The fault detection circuit uses multiple criterion logic. When overcurrent, overtemperature, output waveform distortion and other abnormal conditions are detected, it is determined that the power unit has failed. The fault detection algorithm compares the deviation between the actual output current and the command current. When the deviation exceeds 10% and the duration is greater than 100 ms, a fault alarm is triggered. The fault automatic switching controller receives the status information of each power unit. When a fault is detected in a unit, the faulty unit is isolated from the parallel system within 50 ms, and the standby unit is started to operate. The switching process uses soft start, and the output current of the standby unit gradually increases from zero to the rated value, avoiding switching impact on the power grid. After the faulty unit is isolated, the remaining normal units automatically adjust the output power to ensure that the overall compensation effect of the device is not affected. A current sharing control strategy is used between the power units to ensure that the load current is evenly distributed when operating in parallel. The current sharing controller calculates the average current value by detecting the output current of each unit and adjusts the output command of each unit to make the output current consistent. The current sharing accuracy is controlled within 5%, avoiding the situation where some units are overloaded and others are lightly loaded due to uneven load, improving the overall operation efficiency and reliability of the device.

[0073] Specifically, the heat dissipation layer over-temperature control cooling system supports a wide temperature operating environment. The protective shell is made of 316L stainless steel, with a protective level of IP54 standard, providing dust and splash protection. The inside of the shell is equipped with a forced air cooling system. When the ambient temperature reaches 45°C, the cooling fan starts automatically, and when the temperature drops to 35°C, it stops running. The cooling system combines heat pipe uniform temperature technology to support a wide temperature range of -25°C to +60°C, meeting the harsh environmental requirements of sugar mills with high temperature and high humidity.

[0074] In one embodiment, the selection of the insulated gate bipolar transistor module needs to consider the load characteristics of the sugar industry production line. For example, the frequency converter of the crusher will produce a 5 times rated current impact during startup, with a duration of about 2 seconds, so the power module must have sufficient overload capacity. The overload multiple of the FF1400R17IP4 module can reach 2 times, and by connecting two modules in parallel, it can withstand 4 times overload, meeting the requirements of crusher startup. The application of direct current circuit technology makes the temperature rise control of the module more effective during overload operation, avoiding power derating due to excessive temperature.

[0075] In an embodiment, the configuration of the optical coupling isolation circuit needs to be optimized for the special electromagnetic environment of the sugar factory. The power of the juice extraction motor group in the sugar factory is usually above 1000 kW, and the electromagnetic interference generated during start and stop has a frequency spectrum ranging from several tens of kHz to several MHz. The high-speed response characteristics of the HCPL-3120 optical coupler can accurately transmit control signals, and its 2500V isolation voltage is sufficient to block common-mode interference. In the double-layer metal shielding design, the inner aluminum alloy plate mainly shields low-frequency magnetic field interference, and the outer galvanized steel plate mainly shields high-frequency electric field interference, and the two layers cooperate to achieve full-band shielding protection.

[0076] In an embodiment, the capacity configuration of the N+1 redundancy design needs to be determined according to the harmonic characteristics of the load of the sugar factory. The 3-37th harmonic content is high in the sugar production line, and the 5th and 7th harmonics account for more than 60% of the total harmonics. Each 100kVA power unit can compensate about 150A of harmonic current, and when 5 units are connected in parallel, the total harmonic compensation capacity reaches 750A, which can reduce the current total harmonic distortion rate from 15% to below 4%. The presence of standby units ensures that even in the event of unit failure, the device can still maintain more than 80% of the compensation capacity, ensuring the continuity of sugar production.

[0077] It should be noted that the response time of the automatic fault switching is crucial to the stable operation of the sugar production line. The crystallization tank in the sugar factory is extremely sensitive to voltage fluctuations, and voltage fluctuations exceeding 3% will affect the crystallization quality. The 50ms switching time can control the voltage fluctuation within 2%, avoiding the impact on the production process. The use of soft start further reduces the voltage impact during switching, and the output current of the standby unit increases at a rate of 2A per millisecond, ensuring smooth transition during switching.

[0078] Specifically, the hardware implementation of the improved IP-IQ algorithm significantly improves the harmonic detection accuracy. The traditional software algorithm is limited by the processor operation speed, and the sampling frequency is usually not more than 10kHz, making it difficult to accurately detect high-order harmonics. The parallel processing capability of the field programmable gate array allows the sampling frequency to be increased to 50kHz, enabling accurate detection of all harmonic components up to 50 times. The use of hardware multipliers avoids the rounding errors of software floating-point operations, and the harmonic detection accuracy is improved to 0.2%, providing a reliable data foundation for accurate compensation.

[0079] The above is only a preferred embodiment of the present application, and does not limit the patent scope of the present application, and any equivalent structure or equivalent flow transformation using the content of the specification and drawings, or direct or indirect application in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A power quality comprehensive treatment system based on APF and SVG cooperative control, characterized in that, The method comprises the following steps: Obtain power grid current signal and voltage signal, detect harmonic component and voltage deviation through harmonic detection module; Determine compensation strategy according to the harmonic component and the voltage deviation by using collaborative decision controller, and allocate compensation tasks of active power filter channel and static var generator channel; Generate harmonic compensation current through the active power filter channel to suppress high-frequency harmonic; Generate reactive compensation current through the static var generator channel to stabilize voltage fluctuation; Filter the compensation current through the filter module and output to the power grid.

2. The comprehensive power quality management system of claim 1, wherein, The method comprises the following steps: Collect power grid current signal through wideband current transformer, and obtain full-band harmonic data by using high-frequency sampling technology; Collect power grid voltage signal through voltage sensor, and detect voltage deviation data; Perform anti-aliasing filter processing on the current signal and the voltage signal by using the preprocessing module to generate filtered signal; Synchronously sample the filtered signal through analog-to-digital converter to obtain the harmonic component and the voltage deviation.

3. The comprehensive power quality management system of claim 1, wherein, The method comprises the following steps: Obtain total harmonic distortion rate of the harmonic component and deviation amplitude of the voltage deviation; Determine whether the deviation amplitude exceeds the preset voltage deviation threshold, if yes, preferentially allocate the static var generator channel for voltage stabilization compensation; Determine whether the total harmonic distortion rate exceeds the preset harmonic threshold, if yes, allocate the active power filter channel for harmonic compensation; When the deviation amplitude and the total harmonic distortion rate do not exceed the preset threshold, allocate the active power filter channel and the static var generator channel for preventive compensation by using preset proportion.

4. The comprehensive power quality management system of claim 1, wherein, The method comprises the following steps: Obtain high-frequency harmonic data in the harmonic component; Generate compensation current instruction according to the high-frequency harmonic data through hysteresis comparator; Control inverter to generate high-frequency harmonic compensation current according to the compensation current instruction; Inject the high-frequency harmonic compensation current into the power grid to offset high-frequency harmonic.

5. The comprehensive power quality management system of claim 1, wherein, The method comprises the following steps: Obtain voltage deviation and power grid active power change data; Calculate reactive compensation demand based on preset voltage fluctuation model, wherein the voltage fluctuation model determines compensation amount according to active power change amount and integral thereof; Generate reactive compensation current instruction through proportional-resonant controller; Control inverter to generate reactive compensation current according to the reactive compensation current instruction; Inject the reactive compensation current into the power grid to stabilize power grid voltage.

6. The comprehensive power quality management system of claim 1, wherein, The method comprises the following steps: Obtain compensation current generated by the active power filter channel and the static var generator channel; Calculate power grid impedance parameter through real-time identification module; Dynamically adjust filter parameter based on the power grid impedance parameter; Filter the compensation current through filter to generate output current meeting power grid standard.

7. The comprehensive power quality management system of claim 1, wherein, The system uses a layered closed architecture, including a power layer, a control layer, a redundancy layer and a heat dissipation layer; The power layer realizes power conversion through insulated gate bipolar transistor modules and optimizes conduction performance using direct current circuit technology; The control layer realizes high-speed operation through field programmable gate arrays and enhances anti-interference capability using optical coupling isolation and shielding design; The redundancy layer realizes automatic fault switching through parallel power units; The heat dissipation layer supports wide temperature operation environment through a temperature control heat dissipation system.

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