Non-contact chip interconnection structure stress test method and system
By using non-contact measurement and multiphysics coupling analysis, a three-dimensional stress tensor field is reconstructed, which solves the problem of insufficient accuracy and reliability in the stress testing of chip interconnect structures in existing technologies, and realizes accurate risk location and lifetime prediction of chip interconnect structures.
Patent Information
- Application Number
- CN202511021138.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-24
- Publication Date
- 2025-11-11
AI Technical Summary
Existing methods for testing stress in chip interconnect structures mainly rely on contact measurements, which can interfere with the original chip structure and make it difficult to comprehensively and accurately measure stress distribution. Existing non-contact methods lack consideration of multi-physics coupling, resulting in insufficient accuracy and reliability of test results.
Non-contact measurement is adopted, and deformation response parameters and temperature field distribution are collected synchronously by applying dynamic load. Combined with frequency domain attention filtering and multiphysics coupling analysis, the three-dimensional stress tensor field is reconstructed, risk locations are screened, parameters are optimized, and finally the quantified lifetime and risk locations are output.
It improves the accuracy and reliability of stress testing of chip interconnect structures, can accurately locate failure risk areas, provides an important basis for reliability assessment and life prediction, and improves the lifespan and reliability of chips.
Smart Images
Figure CN120927170A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of chip testing technology, and in particular to a non-contact chip interconnect structure stress testing method and system. Background Technology
[0002] In the field of chip manufacturing and reliability assessment, stress testing of chip interconnect structures is a critical step in ensuring stable chip performance and long-term reliable operation. Under complex operating environments, chip interconnect structures are subjected to both thermal and mechanical loads. These dynamic loads cause deformation and changes in stress distribution within the interconnect structure, which in turn affect the chip's electrical performance and reliability, and may even lead to chip failure.
[0003] Traditional methods for testing stress in chip interconnect structures primarily rely on contact measurement techniques, such as directly attaching strain gauges to the chip surface or interconnect structure to measure strain. However, contact measurement methods have several limitations. On the one hand, the installation of contact sensors such as strain gauges may interfere with the original structure and performance of the chip, affecting the accuracy of the test results. On the other hand, contact measurements struggle to achieve comprehensive and accurate measurements of the stress distribution within the complex internal structure of the chip, especially for tiny chip interconnect structures, where the size and installation method of contact sensors limit their measurement accuracy and applicability.
[0004] Furthermore, while existing non-contact stress testing methods avoid interference issues associated with contact measurements to some extent, most focus only on measuring a single physical quantity, such as deformation or temperature, lacking a comprehensive consideration of multi-physics coupling effects. The stress distribution of chip interconnect structures under dynamic loads is closely related to multiple physical quantities, including deformation response and temperature field distribution; measuring a single physical quantity cannot comprehensively and accurately reflect the stress state of the structure. Moreover, existing methods lack depth in data processing and analysis, making it difficult to extract key feature information directly related to stress from complex measurement signals. This results in insufficient accuracy and reliability of stress test results, failing to provide accurate basis for chip reliability assessment and lifetime prediction.
[0005] Therefore, it is necessary to provide a non-contact chip interconnect structure stress testing method and system to solve the above-mentioned technical problems. Summary of the Invention
[0006] To address the aforementioned technical problems, this invention provides a non-contact chip interconnect structure stress testing method and system. Through non-contact measurement, multi-physics coupling analysis, precise risk location, parameter optimization, and quantitative lifetime prediction, it significantly improves the accuracy, reliability, and comprehensiveness of chip interconnect structure stress testing.
[0007] This invention provides a non-contact chip interconnect structure stress testing method, the method comprising the following steps:
[0008] S1: Generate an energy source selection instruction based on the material properties of the chip interconnect structure, and apply a dynamic load according to the energy source selection instruction. Simultaneously acquire the original signal set during the application, wherein the original signal set includes deformation response parameters and temperature field distribution.
[0009] S2: For the deformation response parameters, load-related components are extracted by frequency domain attention filtering, a filtered signal set is output, and feature decoding is performed on the filtered signal set to generate a physical feature vector;
[0010] S3: Reconstruct a three-dimensional stress tensor field based on the physical feature vector and temperature field distribution, and mark the positions in the reconstructed three-dimensional stress tensor field to obtain a set of risk position coordinates where the shear stress exceeds a preset threshold;
[0011] S4: Generate parameter optimization instructions based on the temperature rise distribution of the risk location coordinate set, and feed the parameter optimization instructions back to steps S2 and S3 for parameter optimization;
[0012] S5: Based on the parameter-optimized three-dimensional stress tensor field, perform dynamic function transformation and damage accumulation integration, and finally output the quantified lifetime and risk location coordinate set.
[0013] Preferably, step S1 specifically includes the following steps:
[0014] Based on the coefficient of thermal expansion and elastic modulus in the material database of the chip interconnect structure, a material response feature code is generated.
[0015] Based on the material response feature code, a non-contact energy source is selected according to a preset mapping rule, and an energy source selection instruction is generated;
[0016] According to the energy source selection command, the loading device is controlled to apply dynamic thermal load and mechanical load, and the deformation response parameters and temperature field distribution are collected simultaneously during the application.
[0017] Preferably, step S2 specifically includes the following steps:
[0018] For the deformation response parameters, the signal components associated with the load frequency are separated by frequency domain attention filtering to generate a filtered signal set, wherein the filtered signal set includes a filtered laser speckle image sequence and Raman spectrum peak position shift.
[0019] The filtered signal set is subjected to physical feature decoding to generate a physical feature vector, wherein the physical feature vector includes the speckle fringe density change calculated based on the filtered laser speckle image sequence and the Raman peak position shift rate calculated based on the Raman spectrum peak position shift.
[0020] Preferably, step S3 specifically includes the following steps:
[0021] Based on the variation in speckle density, the strain tensor is derived. Combined with the Raman peak shift rate and the temperature field distribution, a three-dimensional stress tensor field is generated by jointly solving the thermal expansion constitutive equation and the stress balance constraint.
[0022] For the three-dimensional stress tensor field, the shear stress at each coordinate point is calculated, and the coordinates of the locations where the shear stress value exceeds a preset threshold are selected to generate a risk location coordinate set.
[0023] Preferably, step S4 specifically includes the following steps:
[0024] The area covered by the risk location coordinate set is scanned for temperature rise using an infrared thermal imager to generate a local temperature rise distribution.
[0025] The spatial correlation coefficient is calculated based on the local temperature rise distribution and the shear stress gradient of the corresponding region in the three-dimensional stress tensor field, and used as the confidence level.
[0026] When the confidence level is lower than a preset confidence threshold, a feature extraction weight update instruction is generated to adjust the frequency domain attention filter weights in step S2.
[0027] Generate a structural equation correction instruction to enhance the stress balance constraint weights in step S3;
[0028] The feature extraction weight update instruction and the constitutive equation correction instruction are encapsulated into a parameter optimization instruction.
[0029] Preferably, step S5 specifically includes the following steps:
[0030] Based on the optimized three-dimensional stress tensor field, the stress tensor field is converted into a time-varying equivalent stress function by the von Mises criterion.
[0031] Based on the time-varying equivalent stress function and the preset material fatigue strength, the ratio of equivalent stress to fatigue strength is integrated to the fourth power in the time domain to generate a crack initiation index.
[0032] The remaining lifetime is calculated based on the crack initiation index, and the remaining lifetime and risk location coordinate set are encapsulated to generate a visualization report.
[0033] The present invention also provides a non-contact chip interconnect structure stress testing system for performing the aforementioned non-contact chip interconnect structure stress testing method, the system comprising:
[0034] The signal acquisition module is used to generate an energy source selection command based on the material properties of the chip interconnect structure, and apply a dynamic load according to the energy source selection command. During the application, the module synchronously acquires the original signal set, which includes deformation response parameters and temperature field distribution.
[0035] The feature decoding module is used to extract the load-related components from the deformation response parameters through frequency domain attention filtering, output a filtered signal set, and perform feature decoding on the filtered signal set to generate a physical feature vector.
[0036] The risk marking module is used to reconstruct a three-dimensional stress tensor field based on the physical feature vector and temperature field distribution, and to mark the location in the reconstructed three-dimensional stress tensor field to obtain a set of risk location coordinates where the shear stress exceeds a preset threshold.
[0037] The instruction feedback module is used to generate parameter optimization instructions based on the temperature rise distribution of the risk location coordinate set, and to feed back the parameter optimization instructions to the feature decoding module and the risk marking module for parameter optimization;
[0038] The risk output module is used to perform dynamic function transformation and damage accumulation integration based on the parameter-optimized three-dimensional stress tensor field, and finally output the quantified lifetime and risk location coordinate set.
[0039] Compared with related technologies, the non-contact chip interconnect structure stress testing method and system provided by the present invention has the following advantages:
[0040] This invention employs a non-contact testing method. By applying dynamic loads and simultaneously acquiring deformation response parameters and temperature field distribution, it eliminates the need to install contact sensors on the chip surface or interconnect structure. This avoids interference with the original chip structure and performance caused by traditional contact measurements, thereby improving the accuracy and reliability of the test results.
[0041] This invention comprehensively considers multi-physics information such as the deformation response and temperature field distribution of the chip interconnect structure. It extracts key signal components associated with the load through frequency domain attention filtering and reconstructs a three-dimensional stress tensor field based on multi-physics data. This can more comprehensively and accurately reflect the stress state of the chip interconnect structure under dynamic load, overcoming the limitation of existing non-contact testing methods that only focus on a single physical quantity.
[0042] This invention, by reconstructing a three-dimensional stress tensor field and screening a set of risk location coordinates where shear stress exceeds a preset threshold, can accurately locate areas in the chip interconnect structure that may have failure risks. This provides an important basis for chip reliability assessment and fault prediction, and helps to take measures in advance for maintenance and repair, thereby improving the chip's service life and reliability.
[0043] This invention generates parameter optimization instructions based on the temperature rise distribution of the risk location coordinate set, and feeds these instructions back to the feature extraction and stress reconstruction steps for parameter optimization, forming a closed-loop testing system. This parameter optimization mechanism can continuously adjust the test parameters according to the actual test conditions, improving the accuracy of data processing and stress reconstruction, and further enhancing the reliability of the test results.
[0044] This invention performs dynamic function transformation and damage accumulation integration based on a parameter-optimized three-dimensional stress tensor field, and finally outputs a set of coordinates for quantified lifetime and risk locations. It can not only accurately predict the remaining lifetime of the chip interconnect structure, but also clearly point out the risk locations, providing strong data support for chip design optimization, manufacturing process improvement and reliability assessment. Attached Figure Description
[0045] Figure 1 A flowchart of a non-contact chip interconnect structure stress testing method provided by the present invention;
[0046] Figure 2 The present invention provides a module structure diagram of a non-contact chip interconnect structure stress testing system. Detailed Implementation
[0047] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, only the parts relevant to the invention are shown in the drawings, not all structures. Moreover, unless otherwise specified, the embodiments and features described herein can be combined with each other.
[0048] It should also be noted that, for ease of description, the accompanying drawings show only the parts relevant to the invention and not all of them. Before discussing exemplary embodiments in more detail, it should be mentioned that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although the flowcharts depict operations (or steps) as being processed sequentially, many of these operations can be performed in parallel, concurrently, or simultaneously. Furthermore, the order of the operations can be rearranged. The process can be terminated when its operation is completed, but it may also have additional steps not included in the drawings. The process may correspond to a method, function, procedure, subroutine, subprogram, etc.
[0049] Example 1
[0050] This invention provides a non-contact chip interconnect structure stress testing method, with reference to... Figure 1 As shown, the method includes the following steps:
[0051] S1: Generate an energy source selection instruction based on the material properties of the chip interconnect structure, and apply a dynamic load according to the energy source selection instruction. Simultaneously acquire the original signal set during the application, wherein the original signal set includes deformation response parameters and temperature field distribution.
[0052] Specifically, step S1 includes the following steps:
[0053] S11: Generate a material response feature code based on the coefficient of thermal expansion and elastic modulus in the material database of the chip interconnect structure.
[0054] In this embodiment, based on the material database of the chip interconnect structure (stored in an Oracle or MongoDB industrial-grade database), the thermal expansion coefficient α (unit: 10) of the material in the target region is retrieved. -6 (°C) and elastic modulus E (unit: GPa). A material response feature code is generated through a preset classification logic: when the material simultaneously satisfies α≥15×10... -6 When / ℃ and E≤150GPa (e.g., copper solder ball α=17×10 -6 / ℃, E=110GPa), output the feature code "Metal"; when α≤4×10 -6 When the temperature is / ℃ and E≥160GPa (e.g., through-silicon via α=2.6×10⁻⁶), -6 / ℃, E=170GPa), output feature code "Si"; other materials (such as epoxy resin α=50×10 -6 Output the feature code "Polymer" (°C, E = 3 GPa).
[0055] S12: Based on the material response feature code, select a non-contact energy source according to a preset mapping rule, and generate an energy source selection instruction.
[0056] In this embodiment, a structured energy source selection instruction is generated by querying a preset XML format mapping table based on the material response feature code: if the feature code is "Metal", the instruction specifies a μ-X-ray diffraction source (wavelength 0.154nm, tube voltage 40kV, focal size 0.5mm, conforming to ASTM E1426 standard); if it is "Si", the instruction specifies a 532nm wavelength laser speckle interferometry system (power 200mW, speckle size 5μm, conforming to ISO13694 safety specifications); if it is "Polymer", the instruction specifies a 5MHz center frequency laser ultrasonic probe (pulse energy 10mJ, repetition frequency 1kHz).
[0057] Commands are transmitted to the energy source controller (including but not limited to RigakuSmartLab X-ray generators and CoherentVerdi lasers) via the EtherCAT industrial bus, following the IEEE 802.3 standard, with a command response time of ≤10ms.
[0058] S13: Control the loading device to apply dynamic thermal load and mechanical load according to the energy source selection command, and simultaneously collect the deformation response parameters and temperature field distribution during application.
[0059] In this embodiment, the loading device is controlled according to the energy source selection command: the heat load uses an infrared array heater (wavelength 980nm, power density 30W / cm²). 2 The system achieves temperature cycling from -65℃ to 300℃ with a heating rate of 10℃ / s. Mechanical loads are applied via a piezoelectric actuator (PIP-623.1CL, 10kN output) with a dynamic pressure of 0-10MPa and a frequency range of 0.1-100Hz. A hardware synchronization trigger signal is generated using a Xilinx Zynq UltraScale+FPGA to synchronously activate three types of sensors.
[0060] Speckle image acquisition: PhantomVEO710 high-speed camera (resolution 2048×2048, frame rate 1000fps, exposure time 1μs), outputting a 12-bit grayscale image sequence;
[0061] Raman spectroscopy acquisition: Renishawin ViaQontor spectrometer (spectral resolution 0.5 cm⁻¹) -1 (sampling rate 10kHz), real-time recording of characteristic peak position offset;
[0062] Temperature field acquisition: FLIRX8580 infrared thermal imager (thermal resolution 15μm, frame rate 500Hz, temperature measurement accuracy ±1℃), generating a 14-bit temperature matrix.
[0063] The raw signal set is encapsulated in HDF5 format and includes timestamp-aligned image sequences, spectral data, and temperature field distribution, with a data stream bandwidth of ≥5Gbps (transmitted via PCIe 4.0 interface).
[0064] S2: For the deformation response parameters, load-related components are extracted by frequency domain attention filtering, a filtered signal set is output, and feature decoding is performed on the filtered signal set to generate a physical feature vector.
[0065] Specifically, step S2 includes the following steps:
[0066] S21: For the deformation response parameters, the signal components associated with the load frequency are separated by frequency domain attention filtering to generate a filtered signal set, wherein the filtered signal set includes a filtered laser speckle image sequence and Raman spectrum peak position shift.
[0067] In this embodiment, the deformation response parameters (laser speckle image sequence and Raman spectrum peak position shift) collected in step S1 are input;
[0068] First, signal preprocessing is performed: the speckle image sequence is aligned based on FPGA hardware timestamps, and the Raman data is unified to a 1kHz time grid through cubic spline interpolation.
[0069] Then, frequency domain attention filtering is performed: Fast Fourier Transform (FFT) is performed on the time series of each pixel in the speckle image to generate an empty-frequency domain tensor; FFT is performed on the Raman offset to generate a frequency domain spectrum.
[0070] Based on the load characteristic frequency (such as 0.1Hz for thermal cycling or 50Hz for mechanical vibration) and the environmental noise fundamental frequency (monitored in real time by an accelerometer, with a typical value of 100Hz for mechanical vibration), the frequency domain attention mask is calculated, and its weighting formula is the signal-to-noise suppression ratio of the load frequency energy to the noise energy (preset suppression coefficient k = 0.25).
[0071] By reconstructing the filtered signal using inverse FFT: the speckle image retains the load-related deformation component, improving the signal-to-noise ratio to 42dB (SEMIE178-0921ClassA); the Raman data suppresses noise interference, improving the signal-to-noise ratio to 35dB.
[0072] The final output is a filtered signal set, which includes a filtered speckle image sequence (2048×2048 resolution, uint16 matrix) and filtered Raman offsets (float array), encapsulated in HDF5 format and appended with spatiotemporal coordinate metadata.
[0073] S22: Perform physical feature decoding on the filtered signal set to generate a physical feature vector, wherein the physical feature vector includes the speckle fringe density change calculated based on the filtered laser speckle image sequence and the Raman peak position shift rate calculated based on the Raman spectrum peak position shift.
[0074] In this embodiment, physical feature decoding is performed based on the filtered signal set: For the filtered speckle image sequence, the Sobel operator (3×3 convolution kernel) is used to calculate the Laplacian gradient of each frame image, and the gradient variance is statistically analyzed in the target region to generate the speckle stripe density change, which is physically the out-of-plane displacement curvature intensity and is proportional to the shear strain.
[0075] For the filtered Raman offset, the time derivative is calculated using the central difference method (time step 10ms) to generate the Raman peak offset rate, which characterizes the lattice strain rate. These two parameters constitute the physical eigenvector, with the data format being a double-precision floating-point array.
[0076] S3: Reconstruct a three-dimensional stress tensor field based on the physical feature vector and temperature field distribution, and mark the positions in the reconstructed three-dimensional stress tensor field to obtain a set of risk position coordinates where the shear stress exceeds a preset threshold.
[0077] Specifically, step S3 includes the following steps:
[0078] S31: Based on the variation in speckle density, the strain tensor is derived. Combined with the Raman peak shift rate and the temperature field distribution, a three-dimensional stress tensor field is generated by jointly solving the thermal expansion constitutive equation and the stress balance constraint.
[0079] In this embodiment, the received output physical feature vector (speckle fringe density change) The Raman peak position shift rate d(Δω / dt) and the collected temperature field distribution T(x,y,t) are also considered.
[0080] Loading material constitutive parameter library: thermal expansion coefficient α, stiffness tensor C ijkl (Unit: GPa), data source: SEMIE178-0921 standard material library.
[0081] Based on the change in speckle fringe density Calculate the strain tensor ε:
[0082] Spatial curvature-strain transformation: (k is the calibration coefficient, k = 0.58 μm for copper and k = 0.42 μm for silicon). The speckle density reflects the surface curvature and is mapped to the three-dimensional strain field through the Cauchy strain relation.
[0083] Next, a thermo-mechanical coupling solution is performed, where the constitutive equation for thermal expansion is:
[0084] σ ij =C ijkl (ε-α kl ·ΔT);
[0085] Where ΔT represents the temperature gradient calculated from the temperature field T(x,y,t) (spatial resolution 15μm), α kl This represents the coefficient of anisotropic thermal expansion.
[0086] Then, stress balance constraints are applied, and the equation is:
[0087]
[0088] Where i is the index of the surface direction of the stress component, and j is the index of the direction of the stress component. The stress gradient tensor describes the rate of change of stress in space and reflects the non-uniformity of internal force distribution.
[0089] A finite element method was used to solve a system of partial differential equations with a mesh size of 5 μm (matching speckle spatial resolution). The boundary conditions were fixed constraints on the chip substrate (displacement was 0), ultimately generating a three-dimensional stress tensor field σ. ij (x,y,t).
[0090] S32: For the three-dimensional stress tensor field, calculate the shear stress at each coordinate point, filter the coordinates of positions where the shear stress value exceeds a preset threshold, and generate a set of risk position coordinates.
[0091] In this embodiment, the input is the reconstructed three-dimensional stress tensor field σ. ij (x,y,t), calculate the shear stress point by point. (Simplified form of the von Mises criterion). Based on the material's yield strength σ. yield (Copper: 210MPa, Silicon: 170MPa) Set the risk threshold t0 = 0.8 × σ yield Mark all coordinate points that satisfy t ≥ t0. Merge adjacent risk points using the DBSCAN spatial clustering algorithm (radius 10 μm) to generate a risk location coordinate set t1 (N×2 floating-point matrix).
[0092] S4: Generate parameter optimization instructions based on the temperature rise distribution of the risk location coordinate set, and feed the parameter optimization instructions back to steps S2 and S3 for parameter optimization.
[0093] Specifically, step S4 includes the following steps:
[0094] S41: Use an infrared thermal imager to perform a temperature rise scan on the area covered by the risk location coordinate set to generate a local temperature rise distribution.
[0095] In this embodiment, the risk location coordinate set output in step S32 is input, and the area it covers (a circular area with a radius of 50 μm centered on the coordinate point) is extracted. A high-precision scan of the target area is performed using a FLIRX8580 infrared thermal imager (15 μm thermal resolution): the scan frame rate is set to 500 Hz (matching the sampling rate in step S1), and the temperature range covers -40℃ to 300℃. Local temperature rise caused by material plastic deformation is captured based on the thermoelastic effect. The average value of 100 consecutive frames of temperature field data is taken to eliminate transient noise, and the relative temperature rise ΔTIR = Trisk - Tambient (Tambient is the average temperature of the non-risk area of the chip) is calculated. A local temperature rise distribution map (512×512 floating-point matrix, unit ℃) is output, stored in HDF5 format, and supplemented with spatial coordinate metadata.
[0096] S42: Calculate the spatial correlation coefficient based on the local temperature rise distribution and the shear stress gradient of the corresponding region in the three-dimensional stress tensor field, and use it as the confidence level.
[0097] In this embodiment, the input is the local temperature rise distribution and the output is the shear stress gradient of the corresponding region in the three-dimensional stress tensor field (calculated using the Sobel operator). A normalized cross-correlation operation is performed to generate a confidence score (physical basis: energy dissipation in the stress concentration area causes the temperature rise gradient and stress gradient to be spatially synchronized). A preset confidence threshold of 0.95 is used: if CF ≥ 0.95, the prediction is considered reliable; if CF < 0.95, parameter optimization is triggered.
[0098] S43: When the confidence level is lower than the preset confidence threshold, a feature extraction weight update instruction is generated to adjust the frequency domain attention filter weight in step S2;
[0099] Generate a structural equation correction instruction to enhance the stress balance constraint weights in step S3.
[0100] In this embodiment, dual-path instructions are generated when CF < 0.95:
[0101] (1) Feature extraction weight update instruction: For the frequency domain attention filtering in step S21, increase the noise suppression coefficient k from 0.25 to 0.35 (adjustment rule: for every CF decrease of 0.1, k (k is the noise suppression coefficient in the frequency domain attention filtering, its initial value is 0.25) increases by 0.05, and improve the signal-to-noise ratio to 48dB (SEMIClassS);
[0102] (2) Constitutive Equation Correction Instruction: For the stress balance constraint in step S31, increase the weighting coefficient λ of the stress balance constraint (used to adjust the importance of the residual term of the stress balance equation in the joint solution) to 2.0 (formula λ). new =λ×(1.5-CF)), reducing the stress field residual to ≤6%.
[0103] S44: Encapsulate the feature extraction weight update instruction and the constitutive equation correction instruction into a parameter optimization instruction.
[0104] In this embodiment, the optimization parameters are encapsulated as a JSON structure. Feedback is sent to the target module via an EtherCAT bus (100Mbps bandwidth) to update the noise suppression coefficient k and to update the optimized λ. new The values are updated to the stress balance constraint weight parameters of the finite element solver.
[0105] S5: Based on the parameter-optimized three-dimensional stress tensor field, perform dynamic function transformation and damage accumulation integration, and finally output the quantified lifetime and risk location coordinate set.
[0106] Specifically, step S5 includes the following steps:
[0107] S51: Based on the parameter-optimized three-dimensional stress tensor field, the stress tensor field is converted into a time-varying equivalent stress function through the von Mises criterion.
[0108] In this embodiment, the input parameter is optimized three-dimensional stress tensor field data, which contains stress components (including three normal stresses and three shear stresses) at different time points of spatial coordinates. Based on the von Mises criterion, a dynamic transformation is performed for each spatial location and time point: first, all stress components at the current point are extracted, and then the equivalent scalar stress value that comprehensively characterizes the yield state of the material is calculated. This calculation process considers the differences between normal stress components and the combined contribution of shear stress components, simplifying the complex stress state into a single time-varying function.
[0109] S52: Based on the time-varying equivalent stress function and the preset material fatigue strength, the ratio of equivalent stress to fatigue strength is integrated to the fourth power in the time domain to generate a crack initiation index.
[0110] In this embodiment, time-varying equivalent stress function data and preset material fatigue strength parameters (e.g., 210 MPa for copper, 170 MPa for silicon) are received. Damage accumulation calculation is performed: first, the ratio of equivalent stress to fatigue strength at each time point is calculated; then, this ratio is raised to the fourth power; finally, the calculation result is integrated over a complete load cycle. An adaptive numerical integration method is used with a step size of 10 milliseconds to strictly control calculation errors. The generated crack initiation index is a dimensionless scalar characterizing the degree of cumulative material damage, and its physical essence reflects the nonlinear fatigue effect in the high-stress zone.
[0111] S53: Calculate the remaining lifetime based on the crack initiation index, and encapsulate the remaining lifetime and risk location coordinate set to generate a visualization report.
[0112] In this embodiment, the crack initiation index and the set of risk location coordinates are input, and the remaining lifetime is calculated using an empirical formula: the constant 10000 is divided by the crack initiation index, and the result is expressed in thermal cycles. Two output formats are provided:
[0113] Visualized reports include:
[0114] Highlight the risk coordinates on the chip design diagram (red indicates high-risk areas);
[0115] The spatial distribution of remaining lifetime is shown using a chromatogram (blue > 2000 cycles, safe; red < 500 cycles, dangerous).
[0116] The minimum remaining lifespan and a list of high-risk coordinates are presented in tabular form.
[0117] The structured data contains a complete set of risk location coordinates and lifetime predictions.
[0118] Example 2
[0119] This invention also provides a non-contact chip interconnect structure stress testing system for performing the aforementioned non-contact chip interconnect structure stress testing method, with reference to... Figure 2 As shown, the system includes:
[0120] The signal acquisition module 100 is used to generate an energy source selection instruction based on the material properties of the chip interconnect structure, and apply a dynamic load according to the energy source selection instruction. During the application, the module synchronously acquires an original signal set, wherein the original signal set includes deformation response parameters and temperature field distribution.
[0121] The feature decoding module 200 is used to extract the load-related components from the deformation response parameters through frequency domain attention filtering, output a filtered signal set, and perform feature decoding on the filtered signal set to generate a physical feature vector.
[0122] The risk marking module 300 is used to reconstruct a three-dimensional stress tensor field based on the physical feature vector and temperature field distribution, and to mark the positions in the reconstructed three-dimensional stress tensor field to obtain a set of risk position coordinates where the shear stress exceeds a preset threshold.
[0123] The instruction feedback module 400 is used to generate parameter optimization instructions based on the temperature rise distribution of the risk location coordinate set, and to feed back the parameter optimization instructions to the feature decoding module and the risk marking module for parameter optimization.
[0124] The risk output module 500 is used to perform dynamic function transformation and damage accumulation integration based on the parameter-optimized three-dimensional stress tensor field, and finally output the quantified lifetime and risk location coordinate set.
[0125] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0126] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, including read-only memory (ROM), random access memory (RAM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), one-time programmable read-only memory (OTPROM), electrically erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc storage, disk storage, magnetic tape storage, or any other computer-readable medium capable of carrying or storing data.
[0127] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.
Claims
1. A non-contact chip interconnect structure stress testing method, characterized in that, The method includes the following steps: S1: Generate an energy source selection instruction based on the material properties of the chip interconnect structure, and apply a dynamic load according to the energy source selection instruction. Simultaneously acquire the original signal set during the application, wherein the original signal set includes deformation response parameters and temperature field distribution. S2: For the deformation response parameters, load-related components are extracted by frequency domain attention filtering, a filtered signal set is output, and feature decoding is performed on the filtered signal set to generate a physical feature vector; S3: Reconstruct a three-dimensional stress tensor field based on the physical feature vector and temperature field distribution, and mark the positions in the reconstructed three-dimensional stress tensor field to obtain a set of risk position coordinates where the shear stress exceeds a preset threshold; S4: Generate parameter optimization instructions based on the temperature rise distribution of the risk location coordinate set, and feed the parameter optimization instructions back to steps S2 and S3 for parameter optimization; S5: Based on the parameter-optimized three-dimensional stress tensor field, perform dynamic function transformation and damage accumulation integration, and finally output the quantified lifetime and risk location coordinate set.
2. The non-contact chip interconnect structure stress testing method according to claim 1, characterized in that, Step S1 specifically includes the following steps: Based on the coefficient of thermal expansion and elastic modulus in the material database of the chip interconnect structure, a material response feature code is generated. Based on the material response feature code, a non-contact energy source is selected according to a preset mapping rule, and an energy source selection instruction is generated; According to the energy source selection command, the loading device is controlled to apply dynamic thermal load and mechanical load, and the deformation response parameters and temperature field distribution are collected simultaneously during the application.
3. The non-contact chip interconnect structure stress testing method according to claim 1, characterized in that, Step S2 specifically includes the following steps: For the deformation response parameters, the signal components associated with the load frequency are separated by frequency domain attention filtering to generate a filtered signal set, wherein the filtered signal set includes a filtered laser speckle image sequence and Raman spectrum peak position shift. The filtered signal set is subjected to physical feature decoding to generate a physical feature vector, wherein the physical feature vector includes the speckle fringe density change calculated based on the filtered laser speckle image sequence and the Raman peak position shift rate calculated based on the Raman spectrum peak position shift.
4. The non-contact chip interconnect structure stress testing method according to claim 3, characterized in that, Step S3 specifically includes the following steps: Based on the variation in speckle density, the strain tensor is derived. Combined with the Raman peak shift rate and the temperature field distribution, a three-dimensional stress tensor field is generated by jointly solving the thermal expansion constitutive equation and the stress balance constraint. For the three-dimensional stress tensor field, the shear stress at each coordinate point is calculated, and the coordinates of the locations where the shear stress value exceeds a preset threshold are selected to generate a risk location coordinate set.
5. The non-contact chip interconnect structure stress testing method according to claim 4, characterized in that, Step S4 specifically includes the following steps: The area covered by the risk location coordinate set is scanned for temperature rise using an infrared thermal imager to generate a local temperature rise distribution. The spatial correlation coefficient is calculated based on the local temperature rise distribution and the shear stress gradient of the corresponding region in the three-dimensional stress tensor field, and used as the confidence level. When the confidence level is lower than a preset confidence threshold, a feature extraction weight update instruction is generated to adjust the frequency domain attention filter weights in step S2. Generate a structural equation correction instruction to enhance the stress balance constraint weights in step S3; The feature extraction weight update instruction and the constitutive equation correction instruction are encapsulated into a parameter optimization instruction.
6. The non-contact chip interconnect structure stress testing method according to claim 5, characterized in that, Step S5 specifically includes the following steps: Based on the optimized three-dimensional stress tensor field, the stress tensor field is converted into a time-varying equivalent stress function by the von Mises criterion. Based on the time-varying equivalent stress function and the preset material fatigue strength, the ratio of equivalent stress to fatigue strength is integrated to the fourth power in the time domain to generate a crack initiation index. The remaining lifetime is calculated based on the crack initiation index, and the remaining lifetime and risk location coordinate set are encapsulated to generate a visualization report.
7. A non-contact chip interconnect structure stress testing system, used to perform a non-contact chip interconnect structure stress testing method as described in any one of claims 1 to 6, characterized in that, The system includes: The signal acquisition module is used to generate an energy source selection command based on the material properties of the chip interconnect structure, and apply a dynamic load according to the energy source selection command. During the application, the module synchronously acquires the original signal set, which includes deformation response parameters and temperature field distribution. The feature decoding module is used to extract the load-related components from the deformation response parameters through frequency domain attention filtering, output a filtered signal set, and perform feature decoding on the filtered signal set to generate a physical feature vector. The risk marking module is used to reconstruct a three-dimensional stress tensor field based on the physical feature vector and temperature field distribution, and to mark the location in the reconstructed three-dimensional stress tensor field to obtain a set of risk location coordinates where the shear stress exceeds a preset threshold. The instruction feedback module is used to generate parameter optimization instructions based on the temperature rise distribution of the risk location coordinate set, and to feed back the parameter optimization instructions to the feature decoding module and the risk marking module for parameter optimization; The risk output module is used to perform dynamic function transformation and damage accumulation integration based on the parameter-optimized three-dimensional stress tensor field, and finally output the quantified lifetime and risk location coordinate set.