Microoperation disassembling module, processor and electronic equipment

Abstract

The invention provides a micro-operation disassembling module, a processor and electronic equipment. A number updating unit provides a current micro-operation number for an element quantity counting unit and an execution module; an element quantity counting unit determines a current microoperation element quantity according to the current microoperation number and reference information corresponding to the target vector instruction; the execution module executes the corresponding micro-operation according to the current micro-operation number, the current micro-operation element quantity and the decoding information. According to the method, the micro-dismounting operation is performed before the instruction is executed, so that the situation that the pipeline delay is excessively increased due to the micro-dismounting operation is avoided, the instruction change is quickly responded, the micro-dismounting operation is accurately completed, the instruction processing efficiency is improved, and the high-performance calculation requirement can be met.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of chips, in particular to a split micro-operation module, a processor and an electronic device. BACKGROUND

[0002] RISC-V instruction set architecture is an open and free instruction set architecture (ISA) developed by the University of California, Berkeley in 2010. It has the advantages of strong scalability and flexibility, and has attracted the attention and participation of many companies and academic circles.

[0003] RISC-V instruction set architecture is designed simply and clearly, including basic integer instruction sets (RV32I, RV64I) and various optional standard extensions, such as floating-point instruction sets (RV32F, RV64F), vector instruction sets (RV32V, RV64V), etc., to meet the needs of different fields and applications.

[0004] In the RISC-V instruction set architecture, the vector extension introduces vector processing capability, aiming to efficiently support high-performance computing, machine learning and other data parallel tasks. Split macro-operations (Split Macro-Operations, abbreviated as Split MOP) is an important optimization strategy in the design of vector extension, and its core purpose is to improve the execution efficiency of vector instructions and the utilization of hardware resources. The vector registers (such as v0~v31) of the vector extension in the RISC-V instruction set architecture can be configured according to the vector control register, so that the amount of data processed by a single instruction is not limited by the register bit width, and multiple registers are treated as a group of registers. For example, when the register group is configured to be 4, a vector instruction may need 4 vector registers, but due to the limitation of read and write ports, block operation is required.

[0005] How to efficiently and accurately complete the split micro-operation of vector instructions has become one of the difficult problems that technicians in the field have been concerned about. SUMMARY

[0006] The purpose of the present application is to provide a split micro-operation module, a processor and an electronic device to improve the above problems.

[0007] In order to achieve the above purpose, the technical scheme adopted by the embodiments of the present application is as follows: In a first aspect, the embodiments of the present application provide a split micro-operation module, which comprises: a number updating unit and an element quantity counting unit. An output end of the number updating unit is connected with a first input end of the element quantity counting unit, a second input end of the element quantity counting unit is used for connecting a decoding module, a first output end of the element quantity counting unit is used for connecting an execution module, a second output end of the element quantity counting unit is connected with a control end of the number updating unit, and an output end of the number updating unit is also used for connecting the execution module; The number updating unit is used for providing the current micro-operation number to the element quantity counting unit and the execution module, wherein the current micro-operation number is the micro-operation number corresponding to the current clock cycle; The element quantity counting unit is used for determining the current micro-operation element quantity according to the current micro-operation number and reference information corresponding to the target vector instruction; The target vector instruction is a vector instruction currently being executed, the reference information includes decoding information and configuration information corresponding to the target vector instruction, and the current micro-operation element quantity is the number of micro-operation elements corresponding to the current clock cycle. The execution module is used for executing the corresponding micro-operation according to the current micro-operation number, the current micro-operation element quantity and the decoding information.

[0008] In the second aspect, an embodiment of the present application provides a processor including the micro-operation splitting module.

[0009] In the third aspect, an embodiment of the present application provides an electronic device including the processor.

[0010] Compared with the prior art, the micro-operation splitting module, the processor and the electronic device provided by the embodiment of the present application have the following advantages: the number updating unit provides the current micro-operation number to the element quantity counting unit and the execution module, wherein the current micro-operation number is the micro-operation number corresponding to the current clock cycle; the element quantity counting unit determines the current micro-operation element quantity according to the current micro-operation number and reference information corresponding to the target vector instruction; the target vector instruction is a vector instruction currently being executed, the reference information includes decoding information and configuration information corresponding to the target vector instruction, and the current micro-operation element quantity is the number of micro-operation elements corresponding to the current clock cycle; and the execution module executes the corresponding micro-operation according to the current micro-operation number, the current micro-operation element quantity and the decoding information. The micro-operation is split before the instruction is executed, so that the situation that the pipeline delay is excessively increased due to the micro-operation splitting is avoided, the instruction change is quickly responded, the micro-operation splitting is accurately completed, the instruction processing efficiency is improved, and the high-performance computing requirement can be met.

[0011] In order to make the above objectives, characteristics and advantages of the present application more apparent, clear and easy to understand, the following preferred embodiments are specifically described below with reference to the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0012] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. It should be understood that the following drawings only show some of the embodiments of the present application, and therefore should not be considered as limiting the scope. For those skilled in the art, other related drawings can also be obtained without creative labor.

[0013] Figure 1 The structural schematic diagram of the micro-operation module provided by the embodiment of the present application is shown.

[0014] Figure 2 The structural schematic diagram of the numbering updating unit provided by the embodiment of the present application is shown.

[0015] Figure 3 The relationship between the total amount of vector operation elements and the vector register provided by the embodiment of the present application is shown. DETAILED DESCRIPTION

[0016] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the following will combine the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are some of the embodiments of the present application, but not all the embodiments. The components of the embodiments of the present application described and shown in the drawings can be arranged and designed in various different configurations.

[0017] Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of the present application.

[0018] It should be noted that: similar labels and letters represent similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. Meanwhile, in the description of the present application, the terms "first", "second", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0019] It is to be noted that the relative terms, such as first and second, etc., are used herein only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between such entities or operations. Moreover, the terms "comprising", "including", or any other variant thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements recited, but can also include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without more limitations, an element defined by the statement "comprising a" does not exclude the existence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0020] In the description of the present application, it should be noted that the terms "upper", "lower", "inner", "outer", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the product of the present application is usually placed, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.

[0021] In the description of the present application, it should be noted that, unless otherwise explicitly specified and limited, the terms "provided", "connected" should be understood broadly, for example, it can be fixedly connected, or detachably connected, or integrally connected; it can be mechanically connected, or electrically connected; it can be directly connected, or indirectly connected through an intermediate medium, or it can be the internal communication of two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0022] Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. The following examples and features in the examples can be combined with each other without conflict.

[0023] The embodiment of the present application provides a disassembled micro-operation module deployed in a processor, please refer to Figure 1 , Figure 1 The structural schematic diagram of the disassembled micro-operation module provided by the embodiment of the present application.

[0024] The disassembled micro-operation module comprises a number updating unit and an element quantity counting unit.

[0025] The output end of the number updating unit is connected with the first input end of the element quantity counting unit, the second input end of the element quantity counting unit is used for connecting the decoding module, the first output end of the element quantity counting unit is used for connecting the execution module, the decoding module is also connected with the execution module, the second output end of the element quantity counting unit is connected with the control end of the number updating unit, and the output end of the number updating unit is also used for connecting the execution module.

[0026] Optionally, the first output end of the element quantity counting unit comprises two sub-ports, one of which is used for outputting the current micro-operation element quantity, and the other is used for outputting the valid mask signal. The second input end of the element quantity counting unit comprises two sub-ports, one of which is used for receiving the decoding information corresponding to the target vector instruction transmitted by the decoding module, and the other is used for receiving the configuration information corresponding to the target vector instruction transmitted by the decoding module.

[0027] The second output end of the element quantity counting unit, the output end of the maximum micro-operation splitting counting unit and the output end of the instruction processing unit can be directly connected with the control end of the number updating unit. Alternatively, as shown in the figure, the second output end of the element quantity counting unit, the output end of the maximum micro-operation splitting counting unit and the output end of the instruction processing unit are respectively connected with different input ends of a change-over switch, the output end of the change-over switch is connected with the control end of the number updating unit, and the output end of the change-over switch and each input end of the change-over switch are kept in a conducting state. Figure 1

[0028] The number updating unit is used for providing the current micro-operation number to the element quantity counting unit and the execution module, wherein the current micro-operation number is the micro-operation number corresponding to the current clock cycle.

[0029] The element quantity counting unit is used for determining the current micro-operation element quantity according to the current micro-operation number and the reference information corresponding to the target vector instruction.

[0030] The target vector instruction is a vector instruction currently being executed, the reference information comprises decoding information and configuration information corresponding to the target vector instruction, and the current micro-operation element quantity is the number of micro-operation elements corresponding to the current clock cycle.

[0031] The execution module is used for executing the corresponding micro-operation according to the current micro-operation number, the current micro-operation element quantity and the decoding information.

[0032] The embodiment of the present application provides a micro-operation splitting module arranged in a processor, which splits micro-operations before instruction execution, avoids the case that the pipeline delay is excessively increased due to micro-operation splitting, quickly responds to instruction changes, accurately completes micro-operation splitting, improves instruction processing efficiency and meets the high-performance computing demand.

[0033] In Figure 1 ​On the basis of the foregoing, the embodiment of the present application further provides an optional implementation of the specific structure of the number updating unit, please refer to the following. Figure 2 , Figure 2 The structure diagram of the number updating unit provided by the embodiment of the present application.

[0034] The number updating unit comprises an adder, a selector and a register.

[0035] The output end of the register is connected to the input end of the adder, the output end of the adder is connected to the first input end of the selector, the second input end of the selector is used for accessing an initial micro-operation number (for example, 0 or 1), the control end of the selector serves as the control end of the number updating unit and can be connected to the second output end of the element quantity counting unit, and the output end of the selector is connected to the input end of the register.

[0036] The output end of the register serves as the output end of the number updating unit.

[0037] The register is used for providing the current micro-operation number to the element quantity counting unit and the execution module, wherein the current micro-operation number is the micro-operation number written into the register in the last clock cycle.

[0038] The adder is used for performing addition operation on the basis of the current micro-operation number to generate a new micro-operation number.

[0039] The selector is used for writing the new micro-operation number newly generated by the adder into the register as the current micro-operation number in the next clock cycle in the case that the trigger control signal (end signal) is not received in the current clock cycle.

[0040] The selector is used for writing the initial micro-operation number into the register as the current micro-operation number in the next clock cycle in the case that the trigger control signal (end signal) is received in the current clock cycle.

[0041] On the basis of the foregoing, the embodiment of the present application further provides an optional implementation of the specific process of the element quantity counting unit for determining the current micro-operation element quantity according to the current micro-operation number and the reference information corresponding to the target vector instruction, please refer to the following.

[0042] The element quantity counting unit is used for obtaining the actual element width of the target vector instruction.

[0043] The element quantity counting unit is used for determining the maximum processable element quantity in a single time according to the vector register width and the actual element width (in the processor in which the element quantity counting unit is deployed).

[0044] The maximum processable element quantity is the quotient of the vector register width and the actual element width.

[0045] If the processor vector register width is 256 bits (vlen=256) and the actual element width is 8, then the maximum processable element quantity in a single time is 256 / 8=32, and if the actual element width is 16, then the maximum processable element quantity in a single time is 256 / 16=16.

[0046] The element quantity counting unit is configured to determine the completed element quantity according to the maximum processable element quantity and the current micro-operation number.

[0047] Optionally, the completed number of times of disassembled micro-operations is determined according to the current micro-operation number, and the product of the maximum processable element quantity and the completed number of times is taken as the completed element quantity.

[0048] When the initial micro-operation number is 0, the completed number of times = the current micro-operation number + 1, and the completed element quantity is the product of the maximum processable element quantity and (the current micro-operation number + 1); when the initial micro-operation number is 1, the completed number of times = the current micro-operation number, and the completed element quantity is the product of the maximum processable element quantity and the current micro-operation number.

[0049] The element quantity counting unit is configured to determine the remaining element quantity according to the total quantity of vector operation elements (vl) in the configuration information of the target vector instruction and the completed element quantity.

[0050] The element quantity counting unit is configured to take the maximum processable element quantity as the current micro-operation element quantity when the remaining element quantity is greater than the maximum processable element quantity.

[0051] The element quantity counting unit is configured to take the remaining element quantity as the current micro-operation element quantity when the remaining element quantity is less than the maximum processable element quantity, output an effective mask signal (i.e., a mask signal pull-up) to an execution module, and output a trigger control signal (an end signal) to a number updating unit.

[0052] Please refer to Figure 3 , Figure 3 The relationship between the total quantity of vector operation elements and the vector register provided by the embodiment of the present application is shown in the figure. Taking the total quantity of vector operation elements as 18 and the maximum processable element quantity as 8 as an example, 8 micro-operation elements are allocated to the vector register corresponding to the first micro-operation number, 8 micro-operation elements are allocated to the vector register corresponding to the second micro-operation number, and only 2 micro-operation elements are left at this time. When the remaining element quantity is less than the maximum processable element quantity, 2 micro-operation elements are allocated to the vector register corresponding to the third micro-operation number, and an effective mask signal is output to the execution module at this time.

[0053] The element quantity counting unit is configured to take the maximum processable element quantity as the current micro-operation element quantity when the remaining element quantity is equal to the maximum processable element quantity, and output a trigger control signal (an end signal) to a number updating unit.

[0054] Optionally, the specific process of the element quantity counting unit obtaining the actual element width of the target vector instruction is as follows.

[0055] When the decoding information of the target vector instruction includes the instruction element width (also referred to as eew field), the instruction element width is directly taken as the actual element width.

[0056] For example, when the target vector instruction is a vector load / store instruction (vle / vse instruction), the decoding information includes the instruction element width, which can be directly taken as the actual element width.

[0057] When the decoding information of the target vector instruction does not include the instruction element width, and the decoding information of the target vector instruction includes the valid widening instruction signal, the configuration element width (also referred to as sew field) in the configuration information of the target vector instruction is widened (for example, multiplied by 2) according to a preset rule to obtain the actual element width.

[0058] Optionally, the specific manner of widening the configuration element width in the configuration information of the target vector instruction according to the preset rule can be, but is not limited to, multiplying the configuration element width by 2 and taking the product as the actual element width.

[0059] When the decoding information of the target vector instruction does not include the instruction element width, and the decoding information of the target vector instruction does not include the valid widening instruction signal, the configuration element width is taken as the actual element width.

[0060] Please continue to refer to Figure 1 In an optional embodiment, the micro-operation splitting module further includes a maximum splitting micro-operation counting unit, an output end of the maximum splitting micro-operation counting unit is connected to a control end of the number updating unit, a first input end of the maximum splitting micro-operation counting unit is connected to an output end of the number updating unit, and a second input end of the maximum splitting micro-operation counting unit is connected to the decoding module for obtaining the decoding information and the configuration information of the target vector instruction transmitted by the decoding module.

[0061] The maximum splitting micro-operation counting unit is configured to obtain the target quantity of splitting micro-operations (maximum splitting mop quantity).

[0062] The maximum splitting micro-operation counting unit is configured to determine whether the splitting micro-operation of the target vector instruction is ended according to the current micro-operation number and the target quantity of splitting micro-operations, and output a trigger control signal (end signal) to the number updating unit if the splitting micro-operation of the target vector instruction is ended.

[0063] Optionally, the specific implementation process of the maximum splitting micro-operation counting unit obtaining the target quantity of splitting micro-operations is as follows.

[0064] When the segment operation information (nf) is included in the decode information of the target vector instruction, the number of registers (vlmul) in the target register group and the segment operation information are used to determine the number of micro-operation targets (nf x vlmul). The target register group is the register group in the configuration information of the target vector instruction.

[0065] For example, when the target vector instruction is a load store instruction, the segment operation information is included in the decode information.

[0066] When the decode information of the target vector instruction does not include the segment operation information, and the decode information of the target vector instruction includes the effective widening instruction signal, the number of registers in the target register group is widened (e.g., multiplied by 2) according to a preset rule to obtain the number of micro-operation targets (2 x vlmul).

[0067] When the decode information of the target vector instruction does not include the segment operation information, and the decode information of the target vector instruction does not include the effective widening instruction signal, the number of registers in the target register group is used as the number of micro-operation targets.

[0068] Since the widening instruction occupies more register space, the number of micro-operations of the widening instruction is doubled. For example, when the number of registers vlmul supports 1, 2, and 4, the normal instruction needs to be disassembled into 1, 2, and 4 micro-operations, and when the instruction is a widening instruction, it needs to be disassembled into 2, 4, and 8 micro-operations. It should be noted that when the number of registers vlmul = 8, the widening instruction is not legal, and the riscv-v architecture still specifies that the result of nf x vlmul cannot exceed 8.

[0069] When the initial micro-operation number is 0, it is determined whether the current micro-operation number is less than the number of micro-operation targets - 1. If yes, it is determined that the disassembly of the target vector instruction has not ended, and if no, it is determined that the disassembly of the target vector instruction has ended.

[0070] When the initial micro-operation number is 1, it is determined whether the current micro-operation number is less than the number of micro-operation targets. If yes, it is determined that the disassembly of the target vector instruction has not ended, and if no, it is determined that the disassembly of the target vector instruction has ended.

[0071] Please continue to refer to the figure, in an optional embodiment, the micro-operation disassembly module further includes an instruction processing unit, the output end of the instruction processing unit is connected to the control end of the number updating unit, and the input end of the instruction processing unit is connected to the decode module for transmitting the obtained decode information and configuration information.

[0072] The instruction processing unit is configured to output a trigger control signal (end signal) to the number updating unit when it is identified that the instruction type in the decoding information of the target vector instruction is a target type.

[0073] Some special instructions do not need to be disassembled micro-operations, for example, vector register move instructions (vmv instructions) do not care about vlmul, and only operate one register fixedly, and do not need to be disassembled micro-operations, and directly output a trigger control signal (end signal) to the number updating unit.

[0074] The following is an example of instructions of the target type. The vmv series of instructions are instructions for moving data between vector registers and scalar registers, and do not depend on VL and vlmul, because they only involve one register, and operate one register fixedly. Some instructions interact with scalar and vector registers, but generally do not depend on VL or vlmul settings, such as vadd.vx, vsub.vx, and the like, and there are individual special instructions, such as: vfmv.f.s fa0, v1 moves v1[0] to a floating-point scalar register (only operates the first element).

[0075] In the disassembled micro-operation module provided in the embodiment of the application, the actual element quantity of each micro-operation is dynamically calculated according to the vector register capacity and the element width, and a mask mechanism is introduced to process non-integer register data, so as to maximize the use of vector registers and reduce the data carrying frequency. The mask is only enabled at the last MOP or when there is insufficient data, so as to avoid full register invalid filling. The storage and calculation redundancy is reduced, the energy efficiency ratio is improved, and the data alignment and operation integrity are guaranteed.

[0076] By completing the MOP disassembly logic in the decoding stage, the hardware resource utilization rate and the instruction-level parallelism are double-optimized. The operation result of each MOP can adapt to the single write port limit of the vector register stack. This method does not need to change the original register file and execution unit interface of the architecture, is fully compatible with the RISC-V vector expansion specification, and significantly reduces the complexity of the execution unit. The disassembly logic is completely borne by the decoder hardware, and the execution unit only needs to process the stateless MOP operation flow in sequence.

[0077] The fields (such as vm, vtype, and vl) of a RISC-V vector instruction are directly parsed in the instruction decoding module, a MOP (Multiple-Operation Pattern) splitting strategy is calculated in real time, and multiple basic operation instructions (such as addition / multiplication combination) are dynamically generated. Through pre-processing in the decoding stage, the pipeline bubbles caused by MOP splitting in the traditional scheme are eliminated, and the processor IPC (instructions per cycle) is significantly improved. The hardware-friendly dynamic splitting logic (such as an element-level splitting algorithm based on vl) needs to be deeply combined with the RISC-V vector instruction encoding rules.

[0078] The embodiment of the present application also provides a processor comprising the micro-operation splitting module.

[0079] The embodiment of the present application also provides an electronic device comprising the processor.

[0080] In summary, the micro-operation splitting module, the processor and the electronic device provided by the embodiment of the present application, the number updating unit provides the current micro-operation number to the element quantity counting unit and the execution module, wherein the current micro-operation number is the micro-operation number corresponding to the current clock cycle; the element quantity counting unit determines the current micro-operation element quantity according to the current micro-operation number and reference information corresponding to the target vector instruction; wherein the target vector instruction is the vector instruction currently being executed, the reference information includes decoding information and configuration information corresponding to the target vector instruction, and the current micro-operation element quantity is the number of micro-operation elements corresponding to the current clock cycle; and the execution module executes the corresponding micro-operation according to the current micro-operation number, the current micro-operation element quantity and the decoding information. The micro-operation is split before the instruction is executed, so that the case that the pipeline delay is excessively increased due to the micro-operation splitting is avoided, the instruction change is quickly responded, the micro-operation splitting is accurately completed, the instruction processing efficiency is improved, and the high-performance computing demand can be met.

[0081] The above merely provides preferred embodiments of the present application but is not intended to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modified, equivalent replaced, improved, etc. within the spirit and principles of the present application shall be included in the protection scope of the present application.

[0082] It is apparent for those skilled in the art that the present application is not limited to the details of the above exemplary embodiments, but can be implemented in other concrete forms without departing from the spirit or essential characteristics of the present application. Therefore, the embodiments should be regarded as exemplary and non-limiting, and the scope of the present application is defined by the appended claims rather than the above description, and all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be included in the present application. Any reference signs in the claims should not be regarded as limiting the involved claims.

Claims

1. A micro-operation module for disassembly, characterized in that, The micro-disassembly module includes: a numbering update unit and an element quantity counting unit; The output terminal of the numbering update unit is connected to the first input terminal of the element quantity counting unit. The second input terminal of the element quantity counting unit is used to connect to the decoding module. The first output terminal of the element quantity counting unit is used to connect to the execution module. The second output terminal of the element quantity counting unit is connected to the control terminal of the numbering update unit. The output terminal of the numbering update unit is also used to connect to the execution module. The number update unit is used to provide the current micro-operation number to the element quantity counting unit and the execution module, wherein the current micro-operation number is the micro-operation number corresponding to the current clock cycle; The element quantity counting unit is used to determine the current micro-operation element quantity based on the current micro-operation number and the reference information corresponding to the target vector instruction; Wherein, the target vector instruction is the vector instruction currently being executed, the reference information includes the decoding information and configuration information corresponding to the target vector instruction, and the current number of micro-operation elements is the number of micro-operation elements corresponding to the current clock cycle; The execution module is used to execute the corresponding micro-operation based on the current micro-operation number, the current micro-operation element quantity, and the decoding information.

2. The micro-disassembly operation module as described in claim 1, characterized in that, The number update unit includes an adder, a selector, and a register; The output of the register is connected to the input of the adder, the output of the adder is connected to the first input of the selector, the second input of the selector is used to input the initial micro-operation number, the control terminal of the selector serves as the control terminal of the number update unit, and the output of the selector is connected to the input of the register. The output of the register serves as the output of the number update unit.

3. The micro-disassembly operation module as described in claim 2, characterized in that, The register is used to provide the current micro-operation number to the element quantity counting unit and the execution module, wherein the current micro-operation number is the micro-operation number written to the register in the previous clock cycle; The adder is used to perform an addition operation based on the current micro-operation number to generate a new micro-operation number; The selector is used to write the newly generated micro-operation number of the adder into the register when no trigger control signal is received in the current clock cycle; The selector is used to write the initial micro-operation number into the register when a trigger control signal is received in the current clock cycle.

4. The micro-disassembly operation module as described in claim 2, characterized in that, The element count unit is used to obtain the actual element width of the target vector instruction; The element count unit is used to determine the maximum number of elements that can be processed in a single operation based on the vector register width and the actual element width. The element quantity counting unit is used to determine the quantity of elements that have been completed based on the maximum processable element quantity and the current micro-operation number; The element quantity counting unit is used to determine the remaining element quantity based on the total number of vector operation elements and the number of elements already completed in the configuration information of the target vector instruction; The element quantity counting unit is used to take the maximum processable element quantity as the current micro-operation element quantity when the remaining element quantity is greater than the maximum processable element quantity. The element quantity counting unit is used to take the remaining element quantity as the current micro-operation element quantity when the remaining element quantity is less than the maximum processable element quantity, output a valid mask signal to the execution module, and output a trigger control signal to the number update unit. The element quantity counting unit is used to take the maximum processable element quantity as the current micro-operation element quantity when the remaining element quantity is equal to the maximum processable element quantity, and output a trigger control signal to the number update unit.

5. The micro-disassembly operation module as described in claim 4, characterized in that, The element count unit obtains the actual element width of the target vector instruction, including: When the decoding information of the target vector instruction includes the instruction element width, the instruction element width is used as the actual element width; When the decoding information of the target vector instruction does not include the instruction element width, and the decoding information of the target vector instruction includes a valid widening instruction signal, the configuration element width in the configuration information of the target vector instruction is widened according to a preset rule to obtain the actual element width. When the decoding information of the target vector instruction does not include the instruction element width, and there is no valid widening instruction signal in the decoding information of the target vector instruction, the configuration element width is taken as the actual element width.

6. The micro-disassembly operation module as described in claim 1, characterized in that, The micro-splitting operation module further includes a maximum micro-splitting operation counting unit. The output terminal of the maximum micro-splitting operation counting unit is connected to the control terminal of the number update unit. The first input terminal of the maximum micro-splitting operation counting unit is connected to the output terminal of the number update unit. The second input terminal of the maximum micro-splitting operation counting unit is used to connect to the decoding module. The maximum micro-operation counting unit is used to obtain the target number of micro-operations. The maximum micro-operation counting unit is used to determine whether the micro-operation of the target vector instruction has ended based on the current micro-operation number and the target number of micro-operations. If so, it outputs a trigger control signal to the number update unit.

7. The micro-disassembly operation module as described in claim 6, characterized in that, The maximum micro-operation counting unit obtains the target number of micro-operations, including: When the decoding information of the target vector instruction includes segment operation information, the number of registers in the target register group and the segment operation information determine the target number of micro-disassembly operations; Wherein, the target register group is the register group in the configuration information of the target vector instruction; When the decoding information of the target vector instruction does not include the segment operation information, and the decoding information of the target vector instruction includes a valid widening instruction signal, the number of registers in the target register group is widened according to a preset rule to obtain the target number of micro-operations; When the decoding information of the target vector instruction does not include the segment operation information, and there is no valid widening instruction signal in the decoding information of the target vector instruction, the number of registers in the target register group shall be used as the target number of micro-split operations.

8. The micro-disassembly operation module as described in claim 1, characterized in that, The micro-operation module further includes an instruction processing unit. The output of the instruction processing unit is connected to the control terminal of the number update unit, and the input of the instruction processing unit is connected to the decoding module. The instruction processing unit is used to output a trigger control signal to the number update unit when it identifies that the instruction type in the decoding information of the target vector instruction is the target type.

9. A processor, characterized in that, Includes the micro-operation module as described in any one of claims 1-8.

10. An electronic device, characterized in that, Includes the processor described in claim 9.

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