Electronic device and method for managing micro-operations

Abstract

An electronic device and a method for managing micro-operations are provided. In an embodiment, the method includes determining, by a processing unit, whether a micro-operation corresponding to a translation instruction is stored in a translation buffer and a micro-operation cache when the processing unit executes the translation instruction; outputting, by the processing unit, a specific micro-operation to enter a system management mode when the micro-operation corresponding to the translation instruction is not stored in the translation buffer and the micro-operation cache; translating, by the processing unit, the translation instruction into the micro-operation corresponding to the translation instruction in the management mode; and storing, by the processing unit, the micro-operation corresponding to the translation instruction into the micro-operation cache.

Description

Technical Field

[0001] This invention relates to the translation of instructions, and more particularly to a method for storing the micro-operations generated after translation. Background Technology

[0002] Micro-operation (also known as μ (op or uop) are detailed low-level instructions. A micro-operation can be the simplest operation that a processing unit can execute. A complex machine instruction can be translated into multiple micro-operations, allowing the processing unit to implement the machine instruction by executing these micro-operations. The translated micro-operations can be stored for reuse. However, how to store as many micro-operations as possible within limited storage space is one of the problems to be solved in this field. Summary of the Invention

[0003] This invention provides an electronic device, including a memory, a micro-operation cache, and a processing unit. The memory includes a translation buffer. The processing unit, when executing a translation instruction, determines whether a micro-operation corresponding to the translation instruction is stored in the translation buffer and the micro-operation cache. The processing unit is further configured to output a specific micro-operation to enter a system management mode when no micro-operation corresponding to the translation instruction is stored in the translation buffer and the micro-operation cache. The processing unit is also configured to translate the translation instruction into a micro-operation corresponding to the translation instruction in the management mode. The processing unit is further configured to store the micro-operation corresponding to the translation instruction in the micro-operation cache.

[0004] This invention provides a method for managing micro-operations. The method includes: when a processing unit executes a translation instruction, the processing unit determines whether a micro-operation corresponding to the translation instruction is stored in the translation buffer and the micro-operation cache; when no micro-operation corresponding to the translation instruction is stored in the translation buffer and the micro-operation cache, the processing unit outputs a specific micro-operation to enter a system management mode; the processing unit translates the translation instruction into a micro-operation corresponding to the translation instruction in the management mode; and the processing unit stores the micro-operation corresponding to the translation instruction in the micro-operation cache. Attached Figure Description

[0005] Figure 1 This is a block diagram of an electronic device according to an embodiment of the present invention.

[0006] Figure 2 This is a flowchart of a method for managing micro-operations according to an embodiment of the present invention.

[0007] Figure 3 This is a flowchart of a method for managing micro-operations according to an embodiment of the present invention.

[0008] [Symbol Explanation]

[0009] 100: Electronic devices

[0010] 110: Processing Unit

[0011] 120: Memory

[0012] 121: Translation Buffer

[0013] 130: Micro-operation cache

[0014] 200, 300: Method

[0015] 201, 202, 203, 204, 205, 206, 207, 208, 301, 302, 303, 304, 305, 306: Operations Detailed Implementation

[0016] To make the objectives, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention are described below in detail with reference to the accompanying drawings.

[0017] refer to Figure 1 , Figure 1 This is a block diagram of an electronic device 100 according to an embodiment of the present invention. The electronic device 100 includes a processing unit 110, a memory 120, and a micro-operation cache (also known as...). μ The micro-operation cache (or uopcache) 130, where the micro-operation cache can also be called micro-operation cache memory. The electronic device 100 can be a computing device, a mobile device, a wearable device, or an Internet of Things (IoT) device. For example, the electronic device 100 can be a desktop computer, a laptop computer, a tablet computer, a smartphone, or other similar devices.

[0018] Processing unit 110 provides the ability to compute and process data. Processing unit 110 can be used to execute programs, software, firmware, modules, and operating systems. Processing unit 110 can be implemented as one or more integrated circuit chips. In some embodiments, processing unit 110 can be implemented using multiple electronic components, including transistors, diodes, capacitors, resistors, or inductors. These electronic components are configured to achieve specific purposes of embodiments of the invention. For example, processing unit 110 may include a general-purpose processor, a special-purpose processor, a central processing unit, an instruction set processor, and / or a microcontroller unit.

[0019] Memory 120 may include non-volatile memory, such as read-only memory and flash memory. Memory 120 may also include volatile memory, such as dynamic random access memory and static random access memory. Memory 120 includes a translation buffer 121. The translation buffer 121 and micro-operation cache 130 are used to store micro-operations output by the instruction decoding unit. The instruction decoding unit is used to translate instructions into micro-operations. Translation is an instruction decoding technique used to convert an instruction into a target instruction, such as a micro-operation. Instructions and micro-operations are program instructions or machine language used to instruct the processing unit 110 to perform operations such as data movement, arithmetic calculation, or logical operations. Micro-operations are detailed low-level instructions. A micro-operation can be the simplest operation performed by the processing unit 110. A complex machine instruction can be translated into multiple micro-operations so that the processing unit 110 implements the machine instruction by executing multiple micro-operations. In some embodiments, the instruction decoding unit is a hardware element similar to the processing unit 110. In other embodiments, the instruction decoding unit is a software module. For example, a software module implemented by the processing unit 110 executing program instructions. In some embodiments, the micro-operation cache 130 can be integrated into the memory 120. Executing a translation requires the processing unit 110 to enter system management mode, where it maintains a translation buffer 121. In system management mode, translated instructions are translated into micro-operations. The translated micro-operations can be stored in the translation buffer 121 for reuse. When the same translated instruction is executed again, the processing unit 110 determines whether the translation buffer 121 stores a micro-operation corresponding to the translated instruction. If the translation buffer 121 stores a micro-operation corresponding to the translated instruction, the processing unit 110 reads and executes the corresponding micro-operation. However, the storage capacity of the translation buffer 121 is limited. The contents stored in the translation buffer 121 are gradually replaced. If there is no micro-operation corresponding to the translated instruction in the translation buffer 121, the translation needs to be performed again. This consumes a significant amount of time.

[0020] refer to Figure 2 , Figure 2This is a flowchart of a method 200 for managing micro-operations according to an embodiment of the present invention. Method 200 can be implemented in electronic device 100. In operation 201, processing unit 110 executes translated instructions. The instruction set of processing unit 110 includes a coding space containing multiple instructions. In some embodiments, this coding space of the instruction set is an unused coding space reserved in an older processing unit to allow the older processing unit to execute future added functions. These instructions are, for example, machine language. When these instructions are used by software or a program, the processing unit is triggered to execute method 200 to search for micro-operations corresponding to these instructions or to translate these instructions into at least one micro-operation. In this disclosure, these instructions may be referred to as translated instructions.

[0021] When processing unit 110 executes a translation instruction, it performs operations 202 and 203. In operation 202, processing unit 110 determines whether the micro-operation cache 130 stores a micro-operation corresponding to the translation instruction. If the micro-operation cache 130 stores a micro-operation corresponding to the translation instruction, processing unit 110 performs operation 208. If the micro-operation cache 130 does not store a micro-operation corresponding to the translation instruction, processing unit 110 performs operation 203. In operation 203, processing unit 110 determines whether the translation buffer 121 stores a micro-operation corresponding to the translation instruction. If the translation buffer 121 stores a micro-operation corresponding to the translation instruction, processing unit 110 performs operation 207. If the translation buffer 121 does not store a micro-operation corresponding to the translation instruction, processing unit 110 performs operation 204. In some embodiments, processing unit 110 first searches the micro-operation cache 130 to see if a micro-operation corresponding to the translation instruction is stored. When the micro-operation cache 130 does not store a micro-operation corresponding to the translation instruction, the processing unit 110 searches the translation buffer 121 to see if a micro-operation corresponding to the translation instruction is stored. When neither the micro-operation cache 130 nor the translation buffer 121 stores a micro-operation corresponding to the translation instruction (e.g., when the translation instruction is executed for the first time and therefore has never been translated), the processing unit 110 performs operation 204 to execute the translation process.

[0022] In operation 204, processing unit 110 outputs a specific micro-operation. This specific micro-operation triggers a system management interrupt (SMI) within processing unit 110, causing it to enter system management mode (SMM). In operation 205, processing unit 110, in system management mode (e.g., via an instruction translation unit), translates a translated instruction into at least one micro-operation corresponding to the translated instruction. In some embodiments, the instruction translation unit is a dedicated hardware unit specifically designed for instruction translation, rather than a conventional instruction decoding unit. Specifically, the instruction translation unit uses a handler in system management mode to issue special x86 instructions, triggering internal components of processing unit 110 to generate a micro-operation corresponding to the translated instruction, and stores the micro-operation in translation buffer 121. In operation 206, processing unit 110 stores the micro-operation corresponding to the translated instruction in translation buffer 121 and exits system management mode. In some embodiments, processing unit 110 stores micro-operations in translation buffer 121 in system management mode, and then exits system management mode. In other embodiments, processing unit 110 exits system management mode first, and then stores micro-operations in translation buffer 121.

[0023] After exiting the system management mode, processing unit 110 executes operation 201. That is, after exiting the system management mode, processing unit 110 executes the translation instruction again. Then, processing unit 110 executes operations 202 and 203. Since the micro-operations corresponding to the translation instructions are stored in the translation buffer 121 but not in the micro-operation cache 130, processing unit 110 executes operation 207. In operation 207, processing unit 110 stores the micro-operations corresponding to the translation instructions from the translation buffer 121 into the micro-operation cache 130. Then, processing unit 110 executes operation 208. In operation 208, processing unit 110 executes the micro-operations corresponding to the translation instructions.

[0024] After processing unit 110 executes operations 204, 205, 206, and 207, the micro-operation cache 130 stores the micro-operations corresponding to the translated instructions. Therefore, when the translated instructions are executed again, processing unit 110 can execute the micro-operations corresponding to the translated instructions in the micro-operation cache 130 without having to execute the translation process again. That is, processing unit 110 executes operations 201, 202, and 208 sequentially.

[0025] In some embodiments, the processing unit 110 does not store specific micro-operations in the translation buffer 121 or the micro-operation cache 130. This is because specific micro-operations trigger a system management interrupt and cause the processing unit 110 to enter system management mode. If specific micro-operations were stored in the translation buffer 121 or the micro-operation cache 130, the processing unit 110 would enter system management mode every time a translation instruction is executed. This would increase the latency of executing translation instructions.

[0026] In some embodiments, the micro-operation cache 130 includes a counter. The count value of the counter indicates the number of micro-operations corresponding to translated instructions stored in the micro-operation cache 130. As described above, translated instructions are instructions belonging to the same code space in the instruction set of the processing unit 110. The micro-operation cache 130 is also used to store micro-operations of instructions in other code spaces. When the count value is greater than a threshold, the processing unit 110 does not store micro-operations corresponding to translated instructions in the micro-operation cache 130. When the count value is less than the threshold, the processing unit 110 stores micro-operations corresponding to translated instructions in the micro-operation cache 130. In some embodiments, the threshold is configured by a model-specific register (MSR), and the threshold can be adjusted by software via the model-specific register. In some embodiments, the threshold is adjusted by hardware components. In some embodiments, the processing unit 110 adjusts the threshold based on the number of micro-operations stored in the micro-operation cache 130 and the count value. The processing unit 110 adjusts the threshold based on the number of all micro-operations stored in the cache 130 and the number of micro-operations corresponding to the translated instructions.

[0027] In some embodiments, processing unit 110 is configured to store micro-operations in translation buffer 121 into micro-operation cache 130. Processing unit 110 is also configured to store micro-operations in micro-operation cache 130 into translation buffer 121. Therefore, micro-operations replaced in translation buffer 121 can be stored in micro-operation cache 130. Micro-operations replaced in micro-operation cache 130 can be stored in translation buffer 121. This increases the total number of micro-operations that can be stored.

[0028] This embodiment of the invention increases the number of micro-operations that can be stored by storing the micro-operations of the translated instructions in the micro-operation cache 130. Furthermore, using the cache 130 to store the micro-operations corresponding to the translated instructions helps reduce the area and power consumption of the translation buffer 121. Even if a micro-operation in the translation buffer 121 is replaced due to capacity limitations, the micro-operation cache 130 still stores the corresponding micro-operation. This allows the processing unit 110 to skip the translation process and execute instructions by reading the micro-operations from the micro-operation cache 130. Moreover, this embodiment of the invention avoids the need for frequent replacement of the contents stored in the translation buffer 121 due to its small capacity. Therefore, this embodiment of the invention improves the efficiency of instruction execution.

[0029] refer to Figure 3 , Figure 3 This is a flowchart of a method 300 for managing micro-operations according to an embodiment of the present invention. Method 300 can be implemented in electronic device 100. In operation 301, processing unit 110 executes a translation instruction. In operation 302, when executing a translation instruction, processing unit 110 determines whether a micro-operation corresponding to the translation instruction is stored in translation buffer 121 and micro-operation cache 130. When a micro-operation corresponding to the translation instruction is stored in translation buffer 121 and micro-operation cache 130, processing unit 110 executes operation 306. In operation 306, processing unit 110 executes the micro-operation corresponding to the translation instruction. When no micro-operation corresponding to the translation instruction is stored in translation buffer 121 and micro-operation cache 130, processing unit 110 executes operation 303. In operation 303, processing unit 110 outputs a specific micro-operation to enter system management mode. In operation 304, processing unit 110 translates the translation instruction into a micro-operation corresponding to the translation instruction in management mode. In operation 305, processing unit 110 stores the micro-operation corresponding to the translated instruction into micro-operation cache 130. In some embodiments, operation 305 is executed after processing unit 110 exits system management mode.

[0030] In some embodiments, method 300 further includes: processing unit 110 storing micro-operations corresponding to translation instructions into translation buffer 121; processing unit 110 re-executing translation instructions after exiting system management mode; and when translation buffer 121 stores micro-operations corresponding to translation instructions, processing unit 110 storing the micro-operations corresponding to translation instructions in translation buffer 121 into micro-operation cache 130. In some embodiments, method 300 further includes, when micro-operations corresponding to translation instructions are stored in micro-operation cache 130, processing unit 110 executing the micro-operations corresponding to translation instructions.

[0031] In the above embodiments, a series of operations or events are used for description or illustration; however, it should be understood that the order in which the operations or events are described should not be used to make limitations. For example, some operations may occur in a different order within a reasonable scope, except for other operations or events described herein, or different operations may occur simultaneously. Furthermore, one or more operations described herein may be performed as one or more separate operations and / or stages.

[0032] Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the scope of the invention. Those skilled in the art can make some modifications and refinements without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention shall be determined by the scope defined in the appended claims.

Claims

1. An electronic device comprising: Memory, including translation buffer; Micro-operation cache; as well as Processing unit, used for: When executing a translation instruction, it is determined whether the translation buffer and the micro-operation cache store the micro-operation corresponding to the translation instruction; When the translation buffer and the micro-operation cache do not store the micro-operation corresponding to the translation instruction, the specific micro-operation is output to trigger the system management interrupt inside the processing unit so that the processing unit enters the system management mode. In the system management mode, the instruction translation unit translates the translated instruction into a micro-operation corresponding to the translated instruction; as well as The micro-operation corresponding to the translated instruction is stored in the micro-operation cache. The micro-operation cache includes a counter, the count value of which indicates the number of micro-operations corresponding to the translated instruction stored in the micro-operation cache. When the count value is greater than the threshold, the processing unit does not store the micro-operation corresponding to the translated instruction in the micro-operation cache. When the count value is less than the threshold, the processing unit stores the micro-operation corresponding to the translated instruction into the micro-operation cache. The processing unit does not store the specific micro-operation in the translation buffer or the micro-operation cache.

2. The electronic device of claim 1, wherein the processing unit is further configured to: The micro-operation corresponding to the translation instruction is stored in the translation buffer; Execute the translation command again after exiting the system management mode; and When the translation buffer stores a micro-operation corresponding to the translation instruction, the micro-operation corresponding to the translation instruction in the translation buffer is stored in the micro-operation cache.

3. The electronic device of claim 1, wherein the processing unit is further configured to: When the micro-operation cache stores the micro-operation corresponding to the translated instruction, the micro-operation corresponding to the translated instruction is executed.

4. The electronic device of claim 1, wherein the processing unit is further configured to adjust the threshold based on the number of micro-operations stored in the micro-operation cache and the count value.

5. The electronic device as claimed in claim 1, wherein, This processing unit is also used for: The micro-operations in the translation buffer are stored in the micro-operation cache; or The micro-operations in the micro-operation cache are stored in the translation buffer.

6. A method for managing micro-operations, comprising: When the processing unit executes a translation instruction, it determines whether the translation buffer and the micro-operation cache contain micro-operations corresponding to the translation instruction. When the translation buffer and the micro-operation cache do not store the micro-operation corresponding to the translation instruction, the processing unit outputs a specific micro-operation to trigger a system management interrupt inside the processing unit, so that the processing unit enters the system management mode. The processing unit translates the translation instruction into a corresponding micro-operation in the system management mode. as well as The instruction translation unit in the processing unit stores the micro-operations corresponding to the translated instructions into the micro-operation cache. The micro-operation cache includes a counter, the count value of which indicates the number of micro-operations corresponding to the translated instruction stored in the micro-operation cache. The method also includes: When the count value is greater than the threshold, the micro-operation corresponding to the translated instruction is not stored in the micro-operation cache by the processing unit. When the count value is less than the threshold, the processing unit stores the micro-operation corresponding to the translated instruction into the micro-operation cache. The processing unit does not store the specific micro-operation in the translation buffer or the micro-operation cache.

7. The method of claim 6, further comprising: The processing unit stores the micro-operations corresponding to the translation instruction into the translation buffer; The translation command is executed again after the processing unit exits the system management mode; as well as When the translation buffer stores a micro-operation corresponding to the translation instruction, the processing unit stores the micro-operation corresponding to the translation instruction in the translation buffer into the micro-operation cache.

8. The method of claim 6, further comprising: When the micro-operation cache stores the micro-operation corresponding to the translated instruction, the processing unit executes the micro-operation corresponding to the translated instruction.

9. The method of claim 6, further comprising: The processing unit adjusts the threshold based on the number of micro-operations stored in the micro-operation cache and the count value.

10. The method of claim 6, further comprising: The processing unit stores the micro-operations in the translation buffer into the micro-operation cache. Or The processing unit stores the micro-operations in the micro-operation cache into the translation buffer.

Images