Task execution method and device, storage medium and product
By building and sending microcode commands that conform to the microcode format of user devices on the host device, the problem of wasted computing resources in heterogeneous computing systems is solved, achieving higher computing power utilization and simplified hardware design, which facilitates device integration.
Patent Information
- Application Number
- CN202511150882.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-15
- Publication Date
- 2025-11-28
AI Technical Summary
In heterogeneous computing systems, computing chips consume some computing resources while parsing command packets, resulting in a decrease in the proportion of effective computing time and restricting the system's real-time performance and computing power utilization.
The host device obtains the task parameters of the computing task, constructs microcode commands that meet the microcode format of the user device, and sends them directly to the user device for execution, avoiding the user device from parsing high-level commands and improving the utilization of computing power.
It improves the computing power utilization of user devices, reduces hardware design complexity, and facilitates rapid integration of different user devices and expansion of applicable scenarios.
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Figure CN121029404A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of computer technology, and specifically relates to a task execution method, device, storage medium, and product. Background Technology
[0002] Heterogeneous computing systems generally include host devices and user devices. Host devices are used to control other devices, while user devices are typically high-performance parallel computing chips (such as various AI chips) that serve as dedicated computing units.
[0003] In related technologies, computing performed by host devices and user devices is called heterogeneous computing. In heterogeneous computing, computing tasks are usually generated by application software on the host device side, and the computing power runtime software on the host device side encapsulates the computing tasks and hands them over to the computing chip for processing. After receiving the computing task, the computing chip first parses the encapsulated computing task and then starts the corresponding computing task.
[0004] However, by adopting the above scheme, the computing chip needs to use some computing resources for parsing command packets, which will lead to a decrease in the effective computing time ratio and restrict the real-time performance and computing power utilization of the heterogeneous computing system. Summary of the Invention
[0005] The present invention aims to provide a task execution method, device, storage medium and product, which at least solves the problem in the prior art that leads to a decrease in the proportion of effective computing time, restricting the real-time performance and computing power utilization of heterogeneous computing systems.
[0006] To solve the above-mentioned technical problems, the present invention is implemented as follows:
[0007] In a first aspect, embodiments of the present invention provide a task execution method, the method being applied to a host device, the method comprising:
[0008] Obtain the computational tasks to be executed;
[0009] Extract the task parameters of the computing task, and construct a microcode command that satisfies a preset microcode format based on the task parameters. The preset microcode format is the format of the microcode set used by the user equipment.
[0010] The microcode command is sent to the user equipment so that, upon receiving the microcode command, the user equipment can initiate the execution of the computing task by executing the microcode command.
[0011] Secondly, embodiments of the present invention provide a task execution method, the method being applied to a user equipment, the method comprising:
[0012] Receive microcode commands sent by the host device;
[0013] Execute the microcode command to initiate the computation task corresponding to the microcode command when the microcode command is executed;
[0014] The microcode command is a microcode command that the host device obtains by acquiring the computing task to be executed, extracting the task parameters of the computing task, and constructing a microcode command that meets a preset microcode format based on the task parameters.
[0015] Thirdly, embodiments of the present invention also provide a task execution apparatus, the apparatus comprising:
[0016] The acquisition module is used to acquire computational tasks to be executed.
[0017] The construction module is used to extract the task parameters of the computing task and construct microcode commands that meet the preset microcode format according to the task parameters. The preset microcode format is the format of the microcode set used by the user equipment.
[0018] The sending module is used to send the microcode command to the user equipment, so that the user equipment can start executing the computing task by executing the microcode command upon receiving it.
[0019] Fourthly, embodiments of the present invention also provide a task execution device, the device comprising:
[0020] The receiving module is used to receive microcode commands sent by the host device;
[0021] An execution module is used to execute the microcode command, so as to start the computing task corresponding to the microcode command when the microcode command is executed;
[0022] The microcode command is a microcode command that the host device obtains by acquiring the computing task to be executed, extracting the task parameters of the computing task, and constructing a microcode command that meets a preset microcode format based on the task parameters.
[0023] Fifthly, embodiments of the present invention also provide an electronic device, including: a processor;
[0024] Memory used to store the processor's executable instructions;
[0025] The processor executes the steps of the task execution method described above.
[0026] In a sixth aspect, embodiments of the present invention also provide a readable storage medium on which a program or instructions are stored, and when the program or instructions are executed by a processor, the steps of the task execution method described above are implemented.
[0027] In a seventh aspect, embodiments of the present invention also provide a computer program product, including instructions or transactions, which, when executed by a processor in an electronic device, cause the electronic device to perform steps to implement the above-described task execution method.
[0028] In this embodiment of the invention, a computing task to be executed is obtained through a host device; task parameters of the computing task are extracted, and a microcode command satisfying a preset microcode format is constructed based on the task parameters. The preset microcode format is the format of the microcode set used by the user device; the microcode command is sent to the user device, so that the user device can start executing the computing task by executing the microcode command upon receiving it. In this way, by directly generating microcode commands (low-level hardware instructions) natively supported by the user device, the user device can directly execute the microcode command to start the corresponding computing task upon receiving it. This avoids the use of some computing resources by the user device to parse higher-level commands, as is done in related technologies. This allows all computing resources of the user device to be used solely for computing tasks, improving the computing power utilization of the user device. Furthermore, by handling the task parsing process on the host device side, the user device only needs to implement the microcode execution engine, reducing hardware design complexity, facilitating rapid integration of different user devices, and expanding the applicable scenarios of the user device. Attached Figure Description
[0029] Figure 1 This is a schematic diagram illustrating an application scenario of a task execution method provided in an embodiment of this application;
[0030] Figure 2 This is a flowchart of a task execution method provided in an embodiment of the present invention;
[0031] Figure 3 This is a flowchart of another task execution method provided in an embodiment of the present invention;
[0032] Figure 4 This is a flowchart of another task execution method provided in an embodiment of the present invention;
[0033] Figure 5 This is a block diagram of a task execution device provided in an embodiment of the present invention;
[0034] Figure 6 This is a block diagram of another task execution device provided in an embodiment of the present invention;
[0035] Figure 7 This is a schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation
[0036] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.
[0037] Before introducing the task execution method, device, storage medium, and product provided in this application, the application scenarios involved in the various embodiments of this application will first be described. This application can be applied to scenarios where computing tasks are executed in heterogeneous computing systems.
[0038] Currently, with the rapid development of big data and AI (Artificial Intelligence) technologies, more and more AI applications are emerging on the market. These applications have increasingly higher requirements for computing power. Traditional CPU (Central Processing Unit)-based computing models can no longer meet the computing power needs of most AI applications. Therefore, high-performance heterogeneous computing systems based on AI computing chips have become the mainstream development trend.
[0039] Heterogeneous computing systems typically consist of two parts: a host device side and a user device side. The core component of the host device side is the CPU, a general-purpose computing unit used to control other devices. The core component of the user device side is a high-performance computing chip (such as various AI chips), a dedicated computing unit used to provide more powerful computing capabilities and accelerate AI applications. The computing tasks completed by the host device side and the user device side in cooperation are called heterogeneous computing. In heterogeneous computing, the computing tasks are generated by the application software on the host device side, and then encapsulated by the computing power runtime software on the host device side before being handed over to the AI chip for processing.
[0040] Specifically, on the host device side, the computing power runtime software can encapsulate the computing task into command packets with a fixed format and fixed length, and then deliver (or transmit) the command packets to the AI chip through shared memory or other methods. The command processor module in the AI chip then parses and processes the contents of these command packets, and finally starts the computing task on the AI chip.
[0041] The format and length of these command packets are defined by each manufacturer, and the content describes the necessary information required by the AI chip when performing a computing task.
[0042] However, by adopting the above solution, the computing chip needs to use some computing resources to parse the command packet, which will lead to a decrease in the effective computing time ratio and restrict the real-time performance and computing power utilization of the heterogeneous computing system.
[0043] To address the aforementioned issues, this application provides a task execution method, apparatus, storage medium, and product. The method involves acquiring a computing task to be executed via a host device; extracting task parameters from the computing task; and constructing a microcode command that conforms to a preset microcode format, which is the format of the microcode set used by the user device, based on these parameters. The microcode command is then sent to the user device, enabling the user device to execute the microcode command upon receipt to initiate the computing task. By directly generating microcode commands (low-level hardware instructions) natively supported by the user device, the user device can directly execute the microcode command to start the corresponding computing task upon receipt. This avoids the need for the user device to use some computing resources to parse higher-level commands, as is common in related technologies. All computing resources of the user device are dedicated to the computing task, improving the utilization rate of the user device's computing power. Furthermore, by handling the task parsing process on the host device side, the user device only needs to implement the microcode execution engine, reducing hardware design complexity, facilitating rapid integration of different user devices, and expanding the applicable scenarios of the user device.
[0044] The methods provided in this application will be described in detail below with reference to the accompanying drawings, through specific embodiments and application scenarios.
[0045] Figure 1 This is a schematic diagram illustrating an application scenario of a task execution method provided in an embodiment of this application. For example... Figure 1 As shown, the application scenario may include a heterogeneous computing scenario, which may be a scenario in which a heterogeneous computing system is applied. The heterogeneous computing system includes: host device 01 and user device 02 connected to host device 01.
[0046] The host device 01 can be a CPU (Central Processing Unit), and the user device 02 can be a hardware artificial intelligence chip (AI chip) dedicated to accelerating computing.
[0047] For example, the CPU can receive AI computing tasks (such as image recognition and speech synthesis) from users or upper-layer applications, then construct microcode commands for the AI computing tasks, and send the microcode commands to the AI chip so that the AI chip can start executing the AI computing tasks by executing the microcode commands.
[0048] Figure 2 This is a flowchart of the steps of a task execution method provided in an embodiment of the present invention, as follows: Figure 2As shown, this method can be applied to host devices in heterogeneous computing systems. These host devices can coordinate and manage the work of other dedicated computing devices (such as user devices). The host devices can achieve system-level control and management through general computing capabilities, and delegate high-performance computing tasks to dedicated user devices.
[0049] The method may include the following steps.
[0050] Step 101: Obtain the computational task to be executed.
[0051] The computational task refers to a set of instructions that need to be executed using computing resources in a heterogeneous computing system. Essentially, it involves processing input data to generate the expected output. This can be a simple operation (such as addition, subtraction, multiplication, and division) or a complex algorithm (such as image recognition, deep learning training, or physics simulation). The computational task can be initiated by a user or an upper-layer system and completed using heterogeneous computing.
[0052] In this step, the host device can obtain computing tasks through a specific interface or channel.
[0053] In one possible implementation, the computational task to be executed can be obtained through a call from an upper-level application.
[0054] For example, when a user performs actions such as taking a photo and identifying objects using a mobile application, an image recognition task can be triggered; or, when the server receives an interface request (such as a face recognition interface), a face recognition task can be triggered. Specifically, the application can use a programming language to call the framework interface to send task instructions to the host device, which then parses the instructions to obtain the corresponding computational task.
[0055] In another possible implementation, the host device can obtain the computing task by system scheduling or by periodically issuing computing tasks.
[0056] For example, a cloud-based training cluster can launch model iteration tasks according to a preset plan, such as automatically training new data every morning. The host device obtains the task through the task scheduler of the operating system (such as Linux) or the scheduling system. Edge devices (such as smart cameras) can periodically perform environmental awareness tasks, such as detecting abnormal behavior every 10 seconds. Task parameters (such as data path and model version) are usually stored in configuration files or databases and are read and loaded by the host device to obtain the computing task.
[0057] Alternatively, the computing task can be triggered by external hardware, allowing the host device to acquire the computing task.
[0058] For example, sensors (such as LiDAR and cameras) in an autonomous vehicle can generate data in real time to trigger target detection tasks. The host device receives external signals through hardware interfaces (such as PCIe, USB, and CAN bus) and interprets them into computational tasks.
[0059] For example, when describing a computational task using a high-level language (such as Python / C++), the computational task can be represented as:
[0060] c = a + b # Advanced language expression.
[0061] Step 102: Extract the task parameters of the computation task, and construct a microcode command that meets the preset microcode format based on the task parameters.
[0062] The preset microcode format is the format of the microcode set used by the user equipment.
[0063] Microcode commands are a low-level instruction mechanism in computer systems used to control the internal operations of hardware components (such as graphics processing units (GPUs) and integrated circuit chips (FPGAs). Each microcode command corresponds to one or more basic operations of the hardware circuit (such as register read / write, arithmetic logic unit (ALU) operations). Microcode commands are the hardware's low-level "hidden controller," breaking down high-level instructions into hardware-executable atomic operations, which helps optimize the execution efficiency of code on a specific architecture.
[0064] First, the task parameters for this computation task can be explained.
[0065] The task parameters can be key information describing the specific attributes, configuration, and input data of the computing task, instructing the user equipment on how to correctly process the task. The main function of the task parameters is to transform the abstract computing task into specific instructions and data that can be recognized by hardware or software.
[0066] Specifically, the task parameters may include the task type corresponding to the computation task, as well as the operation attributes corresponding to the computation task.
[0067] For example, the task type can be used to specify the functional category of the computation task. For instance, the task type can include numerical computation types (such as matrix multiplication, vector addition), deep learning inference / training types, image processing types, signal processing types, etc., or control operation types (such as memory read / write operations, hardware configuration operations, task scheduling operations, etc.). The operation attribute can be used to describe the execution method of the computation task. For instance, the operation attribute can include data precision (such as floating-point / integer, 32-bit / 16-bit / 8-bit, etc.), computation mode (such as parallel computation, serial computation, asynchronous execution, etc.), and data layout (such as row-major / column-major storage of a matrix, etc.).
[0068] The task parameters can also include data parameters from the computation task.
[0069] For example, the data parameters can include the input data address, data size, data type, and data offset, etc. The input data address can be the memory storage location of the data required for the computation task (such as the address of main memory, cache, or video memory). The data size can be used to describe the size or dimension of the data, such as the number of rows, columns, and channels in matrix operations (such as the tensor shape in deep learning); the resolution of an image (width × height), the frame rate of a video, etc. The data type can be the format of the input and output data (such as floating-point, integer, boolean, string, etc.). The data offset can be the specified starting position when the data is a subset of a larger dataset (such as the starting index of an array slice).
[0070] The task parameters may also include hardware configuration parameters for the computation task.
[0071] For example, the hardware configuration parameters may include the target device, resource allocation information, etc. The target device may specify the hardware unit for task execution (such as CPU cores, specific computing units of AI chips, CUDA cores of GPUs, etc.), and the resource allocation information may be the hardware resources allocated to the task, such as the number of computing units (such as how many NPU cores of AI chips are used), memory capacity (such as how much cache or video memory is allocated), bus bandwidth requirements (such as the transmission rate of PCIe channels), etc.
[0072] Then, the storage format of the task parameters will be explained.
[0073] This computational task is typically passed to the CPU by the software layer (such as the operating system or framework) in the form of a "task package," where the task parameters are stored in a structured manner.
[0074] Optionally, a fixed-format parameter section (similar to a file header) can be added before the task data, including the task parameters.
[0075] For example, the task package structure corresponding to this computation task can be represented as: [Metadata Header (16 bytes)][Data Payload]. This metadata can include: the first 4 bytes: task type (e.g., 0x01 for image inference, 0x02 for matrix operation), the next 4 bytes: input data address (e.g., the starting address of the image data in memory, 0x7F00001000), and the last 8 bytes: data size (e.g., an image resolution of 1024×768 encoded as 0x0000040000000300).
[0076] In this step, the task parameters for the computation task can be extracted first.
[0077] Optionally, the host device can use a software parser (such as a driver or framework kernel) to disassemble the task package layer by layer and extract the task parameters.
[0078] Specifically, the host device can first identify the basic category of the task. By reading the fixed offset field of the task packet (such as the first 4 bytes of the metadata header), it matches the predefined task type and calls the corresponding parameter parsing module according to the task type (such as calling the image parameter parser for image processing tasks and the model parameter parser for deep learning tasks).
[0079] For example, if the matched task type is 0x01 (image inference) after reading the fixed offset field of the task package, the host device will determine that parameters such as image size, preprocessing method (e.g., normalized mean / variance), and target hardware type need to be extracted; if the matched task type is 0x02 (matrix operation) after reading the fixed offset field of the task package, parameters such as matrix dimension (M×N×K), data type (FP32 / INT8), and storage layout (row-major / column-major) need to be extracted.
[0080] Then, the host device can extract the data parameters corresponding to the input data. Specifically, it can read direct parameters such as data address, length, and format from the metadata header or configuration file. For self-describing data (such as image files with EXIF headers), the host device can also call the driver to read the metadata of the data itself.
[0081] For example, the task package metadata header records the input data address as 0x7F00001000, with a length of 1MB and a format of RGB888 (3 bytes / pixel). The host device can calculate the image resolution: width = data length / 3 / height. For self-describing data, since the task configuration file specifies the input as a JPEG image path: / data / images / input.jpg, the host device can call the file system interface to read the image's EXIF header, extract the actual resolution (e.g., 1920×1080), and use it as the size parameter for the image processing task.
[0082] In addition, the host device can also extract hardware configuration parameters to determine the hardware devices (such as CPU, GPU, AI chip) and device-specific configurations for performing tasks.
[0083] Specifically, the target device ID (such as AI_CHIP_01) can be read from the task package, the system hardware registry can be queried to obtain the parameter range supported by the device (such as maximum cache capacity and number of computing units), and then the appropriate hardware instruction parameters can be generated according to the task requirements and device capabilities.
[0084] For example, if the task configuration file specifies using AI_CHIP_01 to perform deep learning inference and the model is ResNet-50, the host device can look up the AI_CHIP_01 driver to obtain its supported model input size range (e.g., a maximum of 224×224). If the task input size is 300×300, it will automatically scale the parameters to 224×224 and generate scaling instruction parameters. Simultaneously, it can calculate the batch size based on the chip cache size (e.g., 8MB): if a single image data occupies 1MB, the batch size is set to 8 (to avoid cache overflow).
[0085] For example, taking the computation task c = a + b as an example, the host device's computing power runtime software can convert this computation task into hardware-independent intermediate instructions during runtime:
[0086] loadreg1,reg2 / / Read the value of variable 'a' from memory into register reg1. The address of variable 'a' is stored in register reg2 beforehand.
[0087] loadreg3,reg4 / / Read the value of variable b from memory into register reg3; the address of variable b is pre-stored in register reg4.
[0088] addreg5,reg1,reg3 / / Calculate the value in register reg1 plus the value in register reg3, and put the sum into register reg5.
[0089] storereg5,reg6 / / Store the sum of the above operations into memory variable c. The address of variable c is pre-stored in register reg6.
[0090] exit / / End the execution of the computation task.
[0091] The corresponding task parameters can be extracted from the above computational tasks. For example, memory address parameters, where the memory address of variable a is 0x10, the memory address of variable b is 0x20, and the memory address of variable c is 0x30; and instruction address parameters, where the instruction stream start address is 0x1234.
[0092] Given the task parameters for the computation task, microcode commands that meet the preset microcode format can be constructed based on these parameters.
[0093] Optionally, the extracted task parameters can be mapped to fixed-width fields (such as each segment of binary bits in a 32-bit register representing different parameters) according to the preset microcode format of the microcode set used by the user equipment. For composite parameters (such as matrix size), they can be split into multiple fields (such as height, width, and number of channels occupying different registers).
[0094] For example, if the user equipment is an AI chip, the microcode instructions of the AI chip require the convolutional layer parameters to fill the registers in the following format:
[0095] REG0: The first 8 bits are the task type (0x03 indicates convolution), and the last 24 bits are the kernel size (e.g., 3×3 is encoded as 0x000003);
[0096] REG1: The first 16 bits represent the number of input channels (3), and the last 16 bits represent the number of output channels (64).
[0097] The host device can extract the convolution kernel size of 3×3, input channels of 3, and output channels of 64 from the task parameters, fill them into REG0 and REG1 according to the format, and generate microcode commands to send to the AI chip.
[0098] For example, taking the computation task c = a + b as an example, after obtaining the memory address parameters, where the memory address of variable a is 0x10, the memory address of variable b is 0x20, and the memory address of variable c is 0x30; and the instruction address parameters, where the instruction stream start address is 0x1234, the corresponding microcode command of the user device can be obtained according to the preset microcode format of the microcode set used by the user device:
[0099] cfgreg2,0x10 / / Store the address of variable a into register reg2
[0100] cfgreg4,0x20 / / Store the address of variable b into register reg4
[0101] cfgreg6,0x30 / / Store the address of variable c into register reg6
[0102] start / / Starts a computing task. The instruction execution module of the AI chip will automatically read the address stored in the entry register, read the instruction stream stored at that address from memory, and execute it one by one until it encounters the exit instruction.
[0103] The address of the first instruction in the instruction stream generated by the above computation task is 0x1234. The memory address of variable a involved in the above computation task is 0x10. The memory address of variable b involved in the above computation task is 0x20. The memory address of variable c involved in the above computation task is 0x30.
[0104] In this way, by performing layered analysis from task type to data details to hardware configuration, and by adapting the format of mapping task parameters to underlying microcode commands, efficient device collaboration between the host device CPU and the user device AI chip can be ensured.
[0105] Step 103: Send the microcode command to the user equipment so that the user equipment can start executing the computing task by executing the microcode command upon receiving it.
[0106] Optionally, the generated microcode command can be stored in shared memory, and the second address data storing the microcode command can be obtained; then the second address data can be written into a designated register of the user equipment to send the microcode command to the user equipment.
[0107] The above technical solution involves obtaining the computational task to be executed through the host device; extracting the task parameters; and constructing a microcode command that meets a preset microcode format based on these parameters. This preset microcode format is the format of the microcode set used by the user device. The microcode command is then sent to the user device, enabling it to execute the computational task upon receiving the command. By directly generating microcode commands (low-level hardware instructions) natively supported by the user device, the user device can directly execute these commands to start the corresponding computational task. This avoids the need for the user device to use some computing resources to parse higher-level commands, as is common in related technologies. All computing resources of the user device are dedicated to the computational task, improving the utilization rate of the user device's computing power. Furthermore, by handling the task parsing process on the host device side, the user device only needs to implement the microcode execution engine, reducing hardware design complexity, facilitating rapid integration of different user devices, and expanding the applicable scenarios for the user device.
[0108] Considering that this heterogeneous computing system may include various user devices, and the microcode formats of these user devices will be drastically different, the number, bit width, and functional allocation of control registers may vary between user devices. For example, in one user device, registers may control the size of shared memory, while in another, they may be used to configure the L1 cache. Furthermore, the instruction set architectures of different user devices may also differ. For instance, the microcode of a GPU (Graphics Processing Unit) may contain LDG (Load Global Memory) and STG (Store Global Memory) instructions, while an NPU (Neural Processing Unit) may directly support higher-level instructions such as CONV2D (Two-Dimensional Convolution). If user devices are not differentiated and only uniform microcode commands are generated, situations may arise where microcode in the format of the second user device is sent to the first user device. This would cause the hardware to be unable to parse the instructions, triggering an error interrupt. It is also possible that using incorrect register addresses (such as using the GPU's 0x1000 address for the NPU) could overwrite critical configurations, leading to system crashes.
[0109] Therefore, in some embodiments, the identification information of the user equipment can be obtained first; then, based on the identification information, the registers used in the user equipment and the set of microcodes supported by the user equipment can be determined; and then, based on the registers and the task parameters, a microcode command that satisfies the preset microcode format can be constructed.
[0110] The format of this microcode set is the preset microcode format.
[0111] In this embodiment, the identification information of the user equipment is a set of parameters used to uniquely identify the user equipment. For example, it can be device ID information, device model, or information indicating the microcode instruction set version supported by the current user equipment.
[0112] In one possible implementation, device identification can be performed via the PCIe bus when the user equipment is connected to the host device through a PCIe (High-Speed Serial Computer Expansion Bus) interface. For example, the host device can obtain the user equipment's identification information by accessing the PCI configuration space.
[0113] In another possible implementation, when the user equipment is connected to the host device via a USB (Universal Serial Bus) interface, the host device can send a GET_DESCRIPTOR request to the user equipment to obtain the user equipment's descriptor. Upon receiving the request, the user equipment can return a descriptor containing the vendor ID, product ID, and device version to the host device, which can then obtain the user equipment's identification information based on the descriptor.
[0114] Once the identification information of the user equipment is obtained, the registers used by the user equipment and the set of microcode supported by the user equipment can be determined based on the identification information.
[0115] The registers used in the user equipment can be obtained through the register mapping table of the user equipment, which is a table used to describe the address, function, data type and access permissions of the internal registers of the device.
[0116] Optionally, if the host device is sending a computing task to the user device for the first time, the host device can match the corresponding driver based on the user device's identification information (such as PCIe vendor ID + device ID), and then read the corresponding register mapping file and the set of microcode supported by the user device through the driver.
[0117] When the host device obtains the register mapping file of the user equipment and the set of microcodes supported by the user equipment, it can construct a preset correspondence based on the identification information and the corresponding register mapping file and microcode set. The preset correspondence includes the correspondence between the register, the microcode set and the identification information.
[0118] Then, the preset correspondence can be stored in the database as a device file. This allows the host device to send computing tasks to the user device for the first time. If the user device's identification information is obtained, the device file information in the database can be read to determine the register corresponding to the identification information and the set of microcode corresponding to the identification information based on the identification information and the preset correspondence.
[0119] Given the registers used by the user equipment and the set of microcodes supported by the user equipment, a microcode command that satisfies the preset microcode format can be constructed based on the registers and the task parameters.
[0120] In this step, we first determine the parameter type corresponding to each parameter in the task parameters. Then, for each parameter in the task parameters, we generate the corresponding register configuration information. Based on the register configuration information corresponding to each parameter, we determine the target register configuration information.
[0121] The register configuration information is used to define the first address data storing the parameter to be written into the target register. The target register is one of the multiple registers whose register type corresponds to the first type.
[0122] For example, taking the computation task c = a + b as an example, the task parameters of the computation task can include memory address parameters, such as the address of variable a: 0x10, the address of variable b: 0x20, the address of variable c: 0x30, and instruction address parameters, such as the instruction stream start address: 0x1234.
[0123] Then you can see the parameter type corresponding to each parameter in the task parameters.
[0124]
[0125] The register mapping table of a user device can be represented as follows:
[0126]
[0127] Therefore, configuration information can be generated based on the matching relationship between parameter types and register types:
[0128]
[0129] Then, based on the register configuration information corresponding to each parameter, the target register configuration information can be determined. This target register configuration information can be represented as follows:
[0130] {reg = reg2, value = 0x10}, / / Address of configuration variable a
[0131] {reg = reg4, value = 0x20}, / / Address of configuration variable b
[0132] {reg = reg6, value = 0x30}, / / Address of configuration variable c
[0133] {reg=entry,value=0x1234} / / Configure the starting address of the instruction stream.
[0134] Then, based on the target register configuration information, construct microcode commands that meet the preset microcode format.
[0135] Optionally, the multiple address data included in the target register configuration information are respectively filled into different fields of the microcode template, which is the template corresponding to the preset microcode format; according to the preset microcode format, the different fields are combined into the microcode command.
[0136] For example, if the default microcode format of a user device can be represented as: [opcode (8 bits)][destination register address (32 bits)][write value (32 bits)]; then the corresponding microcode template can be represented as:
[0137] OPCODE = 0x01 / / Represents the opcode for the configuration register
[0138] [0x01][Register Address][Write Value].
[0139] Then, the target configuration information can be populated into the template to obtain microcode commands that meet the preset microcode format:
[0140] Configure reg2 = 0x10 → [0x01][0xFF000000][0x00000010]
[0141] Configure reg4 = 0x20 → [0x01][0xFF000008][0x00000020]
[0142] Configure reg6 = 0x30 → [0x01][0xFF000010][0x00000030]
[0143] Configure entry=0x1234→[0x01][0xFF000020][0x00001234].
[0144] We also need to combine the microcode instructions in the execution order and add a start instruction:
[0145] / / Configuration stage
[0146] [0x01][0xFF000000][0x00000010] / / cfgreg2,0x10
[0147] [0x01][0xFF000008][0x00000020] / / cfgreg4,0x20
[0148] [0x01][0xFF000010][0x00000030] / / cfgreg6,0x30
[0149] [0x01][0xFF000020][0x00001234] / / cfgentry,0x1234
[0150] / / Startup phase
[0151] [0x02][0x00000000][0x00000000] / / start (assuming the opcode for start is 0x02).
[0152] By adopting the above technical solution, and directly generating microcode commands (low-level hardware instructions) natively supported by the user device, the user device can directly execute the microcode commands to start the corresponding computing tasks upon receiving them. This avoids the need for the user device to use some computing resources to parse higher-level commands, as is done in related technologies. This allows all the computing resources of the user device to be used solely for computing tasks, improving the computing power utilization of the user device. Furthermore, by handling the task parsing process on the host device side, the user device only needs to implement the microcode execution engine, reducing hardware design complexity, facilitating rapid integration of different user devices, and expanding the applicable scenarios of the user device.
[0153] Figure 3 This is a flowchart of another task execution method provided in an embodiment of the present invention, as follows: Figure 3 As shown, this method can be applied to user devices in heterogeneous computing systems, where the user devices are devices coordinated and managed by the host device.
[0154] The method may include the following steps.
[0155] Step 201: Receive the microcode command sent by the host device.
[0156] In this step, the stored data in a designated register can be detected at a preset period. The designated register is a register in the user equipment used to store second address data. The second address data is obtained by the host device by storing the generated microcode command in shared memory and obtaining the address data storing the microcode command. The second address data is read from the designated register. By accessing the second address data, the microcode command stored at the second address data is obtained to receive the microcode command sent by the host device.
[0157] Step 202: Execute the microcode command to start the computing task corresponding to the microcode command.
[0158] The microcode command is a microcode command that the host device obtains by acquiring the computing task to be executed, extracting the task parameters of the computing task, and constructing a microcode command that meets the preset microcode format based on the task parameters.
[0159] By adopting the above technical solution, and directly generating microcode commands (low-level hardware instructions) natively supported by the user device, the user device can directly execute the microcode commands to start the corresponding computing tasks upon receiving them. This avoids the need for the user device to use some computing resources to parse higher-level commands, as is done in related technologies. This allows all the computing resources of the user device to be used solely for computing tasks, improving the computing power utilization of the user device. Furthermore, by handling the task parsing process on the host device side, the user device only needs to implement the microcode execution engine, reducing hardware design complexity, facilitating rapid integration of different user devices, and expanding the applicable scenarios of the user device.
[0160] Figure 4 This is a flowchart of another task execution method provided in an embodiment of the present invention, as follows: Figure 4 As shown, this method can be applied to host devices and user devices in heterogeneous computing systems, where the user devices are devices coordinated and managed by the host devices.
[0161] The method may include the following steps.
[0162] In step 301, the host device acquires the computing task to be executed.
[0163] In step 302, the host device obtains the identification information of the user equipment.
[0164] In step 303, the host device determines the registers used by the user equipment and the set of microcode supported by the user equipment based on the identification information.
[0165] The format of this microcode set is the preset microcode format.
[0166] In step 304, the host device determines the parameter type corresponding to each parameter in the task parameters.
[0167] In step 305, the host device generates register configuration information corresponding to each parameter in the task parameters.
[0168] The register configuration information is used to define the first address data storing the parameter to be written into the target register. The target register is one of the multiple registers whose register type corresponds to the first type.
[0169] In step 306, the host device determines the target register configuration information based on the register configuration information corresponding to each parameter.
[0170] In step 307, the host device fills different fields in the microcode template with the multiple address data included in the target register configuration information.
[0171] The microcode template is the template corresponding to the preset microcode format.
[0172] In step 308, the host device combines the different fields into the microcode command according to the preset microcode format.
[0173] In step 309, the host device stores the generated microcode command in shared memory and obtains the second address data storing the microcode command.
[0174] In step 310, the host device writes the second address data into the designated register of the user equipment to send the microcode command to the user equipment.
[0175] In step 311, the user equipment checks the stored data in the designated register at a preset period.
[0176] The designated register is a register in the user equipment used to store the second address data. The second address data is obtained by the host device by storing the generated microcode command in shared memory and obtaining the address data storing the microcode command.
[0177] In step 312, the user equipment reads the second address data from the designated register.
[0178] In step 313, the user equipment accesses the second address data to obtain the microcode command stored at the second address data, so as to receive the microcode command sent by the host device.
[0179] In step 314, the user equipment executes the microcode command to initiate the computing task corresponding to the microcode command.
[0180] By adopting the above technical solution, and directly generating microcode commands (low-level hardware instructions) natively supported by the user device, the user device can directly execute the microcode commands to start the corresponding computing tasks upon receiving them. This avoids the need for the user device to use some computing resources to parse higher-level commands, as is done in related technologies. This allows all the computing resources of the user device to be used solely for computing tasks, improving the computing power utilization of the user device. Furthermore, by handling the task parsing process on the host device side, the user device only needs to implement the microcode execution engine, reducing hardware design complexity, facilitating rapid integration of different user devices, and expanding the applicable scenarios of the user device.
[0181] Figure 5 This is a block diagram of a task execution device provided in an embodiment of the present invention, such as... Figure 5 As shown, the device 400 includes:
[0182] The acquisition module 401 is used to acquire the computational tasks to be executed;
[0183] The construction module 402 is used to extract the task parameters of the computing task and construct a microcode command that meets the preset microcode format based on the task parameters. The preset microcode format is the format of the microcode set used by the user device.
[0184] The sending module 403 is used to send the microcode command to the user equipment, so that the user equipment can start the execution of the computing task by executing the microcode command upon receiving it.
[0185] Optionally, the construction module 402 is used to obtain the identification information of the user equipment; determine the registers used in the user equipment and the set of microcodes supported by the user equipment based on the identification information; the format of the microcode set is the preset microcode format; and construct a microcode command that satisfies the preset microcode format based on the registers and the task parameters.
[0186] Optionally, the construction module 402 is used to determine the parameter type corresponding to each parameter in the task parameters; for each parameter in the task parameters, generate register configuration information corresponding to the parameter, the register configuration information is used to define the first address data storing the parameter to be written into the target register, the target register is one of the multiple registers, the register type of which corresponds to the first type; determine the target register configuration information according to the register configuration information corresponding to each parameter; and construct a microcode command that meets the preset microcode format according to the target register configuration information.
[0187] Optionally, the construction module 402 is used to fill different fields in the microcode template with the multiple address data included in the target register configuration information, wherein the microcode template is a template corresponding to the preset microcode format; and to combine the different fields into the microcode command according to the preset microcode format.
[0188] Optionally, the construction module 402 is used to determine the register corresponding to the identification information and the microcode set corresponding to the identification information based on the identification information and the preset correspondence relationship; wherein, the preset correspondence relationship includes the correspondence relationship between the register, the microcode set and the identification information, respectively.
[0189] Optionally, the sending module 403 is used to store the generated microcode command in shared memory and obtain the second address data storing the microcode command; and write the second address data into a designated register of the user equipment to send the microcode command to the user equipment.
[0190] Figure 6 This is a block diagram of another task execution device provided in an embodiment of the present invention, such as... Figure 6 As shown, the device 500 includes:
[0191] The receiving module 501 is used to receive microcode commands sent by the host device;
[0192] The execution module 502 is used to execute the microcode command, so as to start the computing task corresponding to the execution of the microcode command when the microcode command is executed;
[0193] The microcode command is a microcode command that the host device obtains by acquiring the computing task to be executed, extracting the task parameters of the computing task, and constructing a microcode command that meets the preset microcode format based on the task parameters.
[0194] Optionally, the receiving module 501 is used to detect the stored data in a designated register at a preset period; the designated register is a register in the user equipment used to store second address data, the second address data being obtained by the host device by storing the generated microcode command in shared memory and obtaining the address data storing the microcode command; reading the second address data from the designated register; and obtaining the microcode command stored at the second address data by accessing the second address data, so as to receive the microcode command sent by the host device.
[0195] In summary, in this embodiment of the invention, the host device obtains the computing task to be executed; extracts the task parameters of the computing task, and constructs a microcode command that satisfies a preset microcode format based on the task parameters. This preset microcode format is the format of the microcode set used by the user device. The microcode command is then sent to the user device, enabling the user device to execute the microcode command upon receipt to initiate the computing task. By directly generating microcode commands (low-level hardware instructions) natively supported by the user device, the user device can directly execute the microcode command to start the corresponding computing task upon receipt. This avoids the use of some computing resources by the user device to parse higher-level commands, as is common in related technologies. All computing resources of the user device are dedicated to the computing task, improving the computing power utilization of the user device. Furthermore, by handling the task parsing process on the host device side, the user device only needs to implement the microcode execution engine, reducing hardware design complexity, facilitating rapid integration of different user devices, and expanding the applicable scenarios of the user device.
[0196] The task execution device in this embodiment of the invention can be a device, or a component, integrated circuit, or chip in a terminal. The device can be a mobile electronic device or a non-mobile electronic device. For example, mobile electronic devices can be mobile phones, tablets, laptops, PDAs, in-vehicle electronic devices, wearable devices, ultra-mobile personal computers (UMPCs), netbooks, or personal digital assistants (PDAs), etc., while non-mobile electronic devices can be servers, network-attached storage (NAS), personal computers (PCs), televisions (TVs), ATMs, or self-service machines, etc. This embodiment of the invention does not impose specific limitations.
[0197] The task execution device in this embodiment of the invention can be a device with an operating system. This operating system can be Android, iOS, or other possible operating systems; this embodiment of the invention does not impose specific limitations.
[0198] The task execution device provided in this embodiment of the invention can implement the various processes implemented by the task execution device in the method embodiment. To avoid repetition, these processes will not be described again here.
[0199] Optionally, embodiments of the present invention also provide an electronic device, including a processor, a memory, and a program or instructions stored in the memory and executable on the processor. When the program or instructions are executed by the processor, they implement the various processes of the above-described task execution method embodiments and achieve the same technical effects. To avoid repetition, they will not be described again here.
[0200] It should be noted that the electronic devices in the embodiments of the present invention include the mobile electronic devices and non-mobile electronic devices described above.
[0201] Figure 7 A schematic diagram of the hardware structure of an electronic device to implement an embodiment of the present invention.
[0202] The electronic device 1300 includes, but is not limited to, components such as: radio frequency unit 1301, network module 1302, audio output unit 1303, input unit 1304, sensor 1305, display unit 1306, user input unit 1307, interface unit 1308, memory 1309, and processor 1310.
[0203] Those skilled in the art will understand that the electronic device 1300 may also include a power supply (such as a battery) for supplying power to various components. The power supply may be logically connected to the processor 1310 through a power management system, thereby enabling functions such as managing charging, discharging, and power consumption through the power management system. Figure 4 The electronic device structure shown does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown, or combine certain components, or have different component arrangements, which will not be elaborated here.
[0204] It should be understood that, in this embodiment of the invention, the input unit 1304 may include a graphics processing unit (GPU) 13041 and a microphone 13042. The GPU 13041 processes image data of still images or videos obtained by an image capture device (such as a camera) in video capture mode or image capture mode. The display unit 1306 may include a display panel 13061, which may be configured in the form of a liquid crystal display, an organic light-emitting diode, or the like. The user input unit 1307 includes a touch panel 13071 and at least one of other input devices 13072. The touch panel 13071 is also called a touch screen. The touch panel 13071 may include a touch detection device and a touch controller. Other input devices 13072 may include, but are not limited to, physical keyboards, function keys (such as volume control buttons, power buttons, etc.), trackballs, mice, and joysticks, which will not be described in detail here.
[0205] The memory 1309 can be used to store software programs and various data. The memory 1309 may primarily include a first storage area for storing programs or instructions and a second storage area for storing data. The first storage area may store the operating system, application programs or instructions required for at least one function (such as sound playback, image playback, etc.). Furthermore, the memory 1309 may include volatile memory or non-volatile memory, or both. The non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random access memory (RAM), static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct memory bus RAM (DRRAM). The memory 1309 in this embodiment includes, but is not limited to, these and any other suitable types of memory.
[0206] Processor 1310 may include one or more processing units; optionally, processor 1310 integrates an application processor and a modem processor, wherein the application processor mainly handles operations involving the operating system, user interface, and applications, and the modem processor mainly handles wireless communication signals, such as a baseband processor. It is understood that the aforementioned modem processor may also not be integrated into processor 1310.
[0207] This invention also provides a readable storage medium storing a program or instructions. When the program or instructions are executed by a processor, they implement the various processes of the above-described task execution method embodiments and achieve the same technical effects. To avoid repetition, they will not be described again here.
[0208] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of the present invention.
Claims
1. A task execution method, characterized in that, The method is applied to a host device, and the method includes: Obtain the computational tasks to be executed; Extract the task parameters of the computing task, and construct a microcode command that satisfies a preset microcode format based on the task parameters. The preset microcode format is the format of the microcode set used by the user equipment. The microcode command is sent to the user equipment so that, upon receiving the microcode command, the user equipment can initiate the execution of the computing task by executing the microcode command.
2. The method according to claim 1, characterized in that, The step of constructing a microcode command that satisfies a preset microcode format based on the task parameters includes: Obtain the identification information of the user equipment; Based on the identification information, the registers used in the user equipment and the set of microcodes supported by the user equipment are determined; the format of the microcode set is the preset microcode format; Based on the registers and the task parameters, construct microcode commands that satisfy the preset microcode format.
3. The method according to claim 2, characterized in that, The step of constructing a microcode command that satisfies a preset microcode format based on the register and the task parameters includes: Determine the parameter type corresponding to each parameter in the task parameters; For each parameter in the task parameters, register configuration information corresponding to the parameter is generated. The register configuration information is used to define the first address data storing the parameter to be written into the target register. The target register is one of the multiple registers whose register type corresponds to the first type. The target register configuration information is determined based on the register configuration information corresponding to each parameter; Based on the target register configuration information, construct microcode commands that meet the preset microcode format.
4. The method according to claim 3, characterized in that, The step of constructing a microcode command that satisfies a preset microcode format based on the target register configuration information includes: The multiple address data included in the target register configuration information are respectively filled into different fields of the microcode template, wherein the microcode template is a template corresponding to the preset microcode format; According to the preset microcode format, the different fields are combined into the microcode command.
5. The method according to claim 2, characterized in that, The step of determining the registers used in the user equipment and the set of microcode supported by the user equipment based on the identification information includes: Based on the identification information and the preset correspondence, determine the register corresponding to the identification information and the microcode set corresponding to the identification information; The preset correspondence includes the correspondence between the register, the microcode set, and the identification information.
6. The method according to claim 1, characterized in that, Sending the microcode command to the user equipment includes: The generated microcode command is stored in shared memory, and the second address data storing the microcode command is obtained; The second address data is written into a designated register of the user equipment to send the microcode command to the user equipment.
7. A task execution method, characterized in that, The method is applied to a user equipment, and the method includes: Receive microcode commands sent by the host device; Execute the microcode command to initiate the computation task corresponding to the microcode command when the microcode command is executed; The microcode command is a microcode command that the host device obtains by acquiring the computing task to be executed, extracting the task parameters of the computing task, and constructing a microcode command that meets a preset microcode format based on the task parameters.
8. The method according to claim 7, characterized in that, The microcode commands sent by the receiving host device include: The data stored in a designated register is detected at a preset period; the designated register is a register in the user equipment used to store second address data, which is obtained by the host device by storing the generated microcode command in shared memory and obtaining the address data storing the microcode command; Read the second address data from the specified register; By accessing the second address data, the microcode command stored at the second address data is obtained, so as to receive the microcode command sent by the host device.
9. A task execution device, applied to a host device, characterized in that, include: The acquisition module is used to acquire computational tasks to be executed. The construction module is used to extract the task parameters of the computing task and construct microcode commands that meet the preset microcode format according to the task parameters. The preset microcode format is the format of the microcode set used by the user equipment. The sending module is used to send the microcode command to the user equipment, so that the user equipment can start executing the computing task by executing the microcode command upon receiving it.
10. A task execution device, applied to user equipment, characterized in that, include: The receiving module is used to receive microcode commands sent by the host device; An execution module is used to execute the microcode command, so as to start the computing task corresponding to the microcode command when the microcode command is executed; The microcode command is obtained by the host device through acquiring the computing task to be executed; Extract the task parameters of the computation task, and construct a microcode command that meets the preset microcode format based on the task parameters.
11. An electronic device, characterized in that, include: processor; Memory used to store the processor's executable instructions; The processor executes the method as described in any one of claims 1 to 8.
12. A readable storage medium, characterized in that, The readable storage medium stores a program or instructions that, when executed by a processor, implement the method of any one of claims 1 to 8.
13. A computer program product, characterized in that, Includes instructions or transactions that, when executed by a processor in an electronic device, cause the electronic device to perform the method of any one of claims 1 to 8.
Citation Information
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