Cache data elimination method, system and device based on LFU algorithm, computer readable medium and computer program product

Abstract

The invention provides a cache data elimination method, system and device based on an LFU algorithm, a computer readable medium and a computer program product. The method comprises the steps that the number of cache data needing to be eliminated is calculated according to the size of a cache space to be released; constructing a large top heap according to the access frequency of the cache data, and setting the data capacity of the large top heap; traversing the cached data, and inserting a small access frequency into the top of the large top heap; and obtaining and eliminating cache data corresponding to all access frequencies in the top heap. According to the method and the device, the required quantity of low-access-frequency cache data is screened out by constructing and using the large top heap to be eliminated, and the memory space occupied in the logic of the data needing to be eliminated is calculated to be reduced: the memory space of all elements is reduced to the memory space of only the elements needing to be eliminated, so that the memory consumption is greatly reduced; the time complexity of the method is half of the time complexity of the conventional technology, the screening time is greatly shortened, and the operation efficiency of the elimination function of the cache system is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of grid-connected operation optimization, and in particular to a cache data eviction method and system based on an LFU algorithm, a device, a computer readable medium, and a computer program product. BACKGROUND

[0002] LFU (Least Frequently Used) is a cache eviction strategy used to select the least frequently used data for eviction when the cache is full. Its core idea is to decide which data to evict based on their access frequency, rather than simply evicting by access time or order.

[0003] The basic logic of existing LFU cache implementation is as follows: 1. Initialization: Create a data structure to store data items and their access frequencies.

[0004] A hash table (such as Python's dict) can be used to store data items and their corresponding frequencies.

[0005] Use another data structure (such as a min-heap or balanced binary search tree) to maintain the access frequencies of data so that the least accessed data item can be quickly found.

[0006] 2. Access data: When a data item is accessed, update its access frequency.

[0007] If the data item is already in the cache, increase its access frequency.

[0008] If the data item is not in the cache, check if the cache is full. If not, directly insert and set the initial access frequency; if full, evict the data item with the lowest access frequency.

[0009] 3. Update and delete: When a data item is updated or deleted, the corresponding access frequency also needs to be adjusted.

[0010] 4. Eviction strategy: Select the data item with the lowest access frequency for eviction. If there are multiple data items with the same access frequency, you can choose the one that has been used the least recently (this may require additional timestamp recording in actual implementation).

[0011] The access frequency data of each element in the cache needs to be maintained in an array. In existing technology, to find the least used element, the array needs to be sorted, or all frequency data is placed in a small top heap data structure, and then the least accessed data is taken out for eviction. However, the existing technology has the following problems: 1. The time complexity of the array sorting algorithm is 0(n log n), which has high time complexity.

[0012] 2. The frequency data of all elements needs to be stored in the sorted array or the small top heap, which occupies a large amount of memory space.

[0013] 3. The access frequency count of each object needs to be maintained, which has high memory consumption.

[0014] Therefore, there is an urgent need for a method that can simply and efficiently filter out low-access-frequency cache data. SUMMARY

[0015] Aspects of the present application provide a cache data eviction method, system, device, computer readable medium and computer program product based on the LFU algorithm, which constructs a large top heap and uses the large top heap to filter out the required number of low-access-frequency cache data for eviction, reduces the time complexity of the algorithm, and improves the running efficiency of the cache system eviction function.

[0016] To achieve the above technical effects, one aspect of the present application provides a cache data eviction method based on the LFU algorithm, comprising: calculating the number of cache data to be evicted according to the size of the cache space to be released; constructing a large top heap according to the access frequency of the cache data, and setting the data capacity of the large top heap; traversing the cache data and inserting the smaller access frequency at the top of the large top heap; obtaining and evicting the cache data corresponding to all access frequencies in the large top heap.

[0017] According to the preferred embodiment of the present application, the calculation of the number of cache data to be evicted according to the size of the cache space to be released further comprises: setting a cache occupied space threshold and a release space ratio; obtaining the size of the currently occupied cache space and the number of cache data when the cache occupied space reaches the threshold; calculating the number of cache data to be evicted according to the number of current cache data and the release space ratio.

[0018] According to the preferred embodiment of the present application, the construction of a large top heap according to the access frequency of the cache data and the setting of the data capacity of the large top heap further comprises: taking the index ID and access frequency corresponding to the cache data as elements, and taking the access frequency as a comparison condition to construct a large top heap; taking the number of cache data to be evicted as the data capacity of the large top heap.

[0019] According to the preferred embodiment of the present application, the inserting the smaller access frequency into the top of the large heap further comprises: traversing all elements, comparing the number of elements inserted into the large heap with the capacity of the large heap; when the number of elements in the large heap is less than the capacity of the large heap, inserting the index ID and the access frequency of the current element traversed as an element of the large heap into the large heap; when the number of elements in the large heap is greater than the capacity of the large heap, inserting the element with smaller access frequency into the top of the large heap.

[0020] According to the preferred embodiment of the present application, the inserting the element with smaller access frequency into the top of the large heap when the number of elements in the large heap is greater than the capacity of the large heap further comprises: when the number of elements in the large heap is greater than the capacity of the large heap, traversing and comparing the access frequency of the current element with the access frequency of the element at the top of the large heap; if the access frequency of the current element is greater than or equal to the access frequency of the element at the top of the large heap, skipping the current element and continuing to traverse and compare the next element; if the access frequency of the current element is less than the access frequency of the element at the top of the large heap, popping the element at the top of the large heap and inserting the index ID and the access frequency of the current element as an element of the large heap into the large heap.

[0021] According to the preferred embodiment of the present application, the obtaining and eliminating the cache data corresponding to all the access frequencies in the large heap further comprises: traversing all the cache data and determining the elements in the large heap; traversing the elements in the large heap, and obtaining the corresponding low-frequency cache data according to the index ID and the access frequency of each element; eliminating the low-frequency cache data and releasing the cache space.

[0022] According to the preferred embodiment of the present application, the large heap is constructed by using a hash table.

[0023] In another aspect of the present application, a cache data elimination system based on the LFU algorithm is provided, comprising: a cache data calculation module for calculating the number of cache data to be eliminated according to the size of the cache space to be released; a large heap construction module for constructing a large heap according to the access frequency of the cache data and setting the data capacity of the large heap; a cache data processing module for traversing the cache data and inserting the smaller access frequency into the top of the large heap; a cache data elimination module for obtaining and eliminating the cache data corresponding to all the access frequencies in the large heap.

[0024] In another aspect of the present application, a cache data eviction device based on the LFU algorithm is provided, and the device comprises: at least one processor; and a memory in communication connection with the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method as described above.

[0025] In another aspect of the present application, a computer readable storage medium is provided, and the computer readable storage medium stores computer program instructions executable by a processor to implement the method described above.

[0026] In another aspect of the present application, a computer program product is provided, and the computer program product comprises a computer program executable by a processor to implement the method described above.

[0027] In the scheme provided by the embodiments of the present application, by constructing a large top heap and using the large top heap to screen out the required number of cache data with low access frequency for eviction, the occupied memory space in the calculation of the data to be evicted is reduced: from the memory space of all element numbers, to the memory space of only the number of elements to be evicted, greatly reducing the memory consumption; the time complexity is reduced: the time complexity of the technical scheme of the present application is half of that of the conventional technology, greatly reducing the screening time and improving the running efficiency of the cache system eviction function. BRIEF DESCRIPTION OF DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are some embodiments of the present application, and those skilled in the art can also obtain other drawings according to these drawings without creative labor.

[0029] Other features, objects and advantages of the present application will become more apparent through reading the following detailed description of the non-limiting embodiments with reference to the accompanying drawings: Figure 1 A flowchart of a cache data eviction method based on the LFU algorithm provided by an embodiment of the present application is shown; Figure 2 A specific flowchart of a cache data eviction method based on the LFU algorithm provided by an embodiment of the present application is shown; Figure 3 A schematic diagram of a cache data eviction system based on the LFU algorithm provided by an embodiment of the present application is shown; Figure 4Fig. 1 is a schematic diagram of a device according to an embodiment of the present application.

[0030] The same or similar reference signs in the drawings represent the same or similar components. DETAILED DESCRIPTION

[0031] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of protection of the present application.

[0032] In a typical configuration of the present application, the devices of the terminal and the service network each include one or more processors (CPU), input / output interfaces, network interfaces and memories.

[0033] The memory can include non-permanent memory in a computer readable medium, random access memory (RAM) and / or non-volatile memory such as read only memory (ROM) or flash memory (flash RAM). The memory is an example of the computer readable medium.

[0034] The computer readable medium includes permanent and non-permanent, removable and non-removable media, and can be implemented by any method or technology to store information. The information can be computer program instructions, data structures, program modules or other data. Examples of the computer storage medium include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read only memory (ROM), electrically erasable programmable read only memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassette, magnetic tape disk storage or other magnetic storage device, or any other non-transmission medium that can be used to store information accessible by a computing device.

[0035] In actual scenarios, the execution subject of the method can be a user device, or a device integrated by a user device and a network device through a network, or an application program running on the above device, the user device including but not limited to computers, mobile phones, tablets, smart watches, wristbands, and various terminal devices, and the network device including but not limited to network hosts, single network servers, multiple network server sets, or computer sets based on cloud computing, which can be used to implement part of the processing functions when setting an alarm. Here, the cloud is composed of a large number of hosts or network servers based on cloud computing, wherein cloud computing is a kind of distributed computing, which is composed of a virtual computer set by a group of loosely coupled computers.

[0036] Figure 1 A flowchart of a cache data elimination method based on the LFU algorithm provided by an embodiment of the present application is shown in FIG. 1, which includes the following processing steps: Figure 1 Step S101: calculating the number of cache data to be eliminated according to the size of the cache space to be released.

[0037] Specifically, first, a cache occupied space threshold and a release space ratio are set, for example, the cache occupied space threshold is set to 1 GB, and the release space ratio is set to 20%, that is, when the cache occupied space reaches 1 GB, the system automatically starts the cache data elimination process of the present application. A fixed period can also be set, for example, the cache data elimination process is started once an hour.

[0038] Then, the size of the currently occupied cache space and the number of cache data are obtained, assuming that they are 1 GB and 1 million cache data, and the space to be released is 200 M.

[0039] Finally, the number of cache data to be eliminated is calculated according to the number of current cache data and the release space ratio, that is, 200,000 cache data need to be eliminated, which can meet the requirement of releasing 20% space.

[0040] Step S102: constructing a large top heap according to the access frequency of the cache data and setting the data capacity of the large top heap.

[0041] Specifically, first, the index ID and the access frequency corresponding to the cache data are taken as elements, and the access frequency is taken as a comparison condition to construct a large top heap. In the process of accessing the cache data, the access frequency of the cache data is increased by 1 every time the cache data is accessed, until the size of the cache data reaches the cache occupied space threshold, and then all the index IDs and the access frequencies corresponding to the cache data are taken as elements, and the access frequency is taken as a comparison condition to construct a large top heap, for example, in the example in step S101, the number of elements is 1 million.

[0042] ​The number of the cache data to be eliminated is taken as the data capacity of the large top heap, for example, the data capacity of the large top heap is 200,000 in step S101, that is, 200,000 cache data with the lowest access frequency are screened out from 1,000,000 cache data by using the large top heap.

[0043] Preferably, the embodiment of the present application creates the large top heap by using the hash table and writes the subsequent data processing algorithm, and forms a hash table with the cache data elimination algorithm based on the LFU algorithm after the creation. When other software needs to use the cache data elimination function, the hash table with the cache data elimination algorithm based on the LFU algorithm of the present application can be directly imported into the corresponding code position of the software for use.

[0044] In step S103, the smaller access frequency is inserted into the top of the large top heap by traversing the cache data.

[0045] Specifically, Figure 2 A specific flow chart of the cache data elimination method based on the LFU algorithm provided by an embodiment of the present application is shown in FIG. 1. Figure 2 After the large top heap is constructed according to the access frequency of the cache data and the number of the cache data to be eliminated is taken as the data capacity of the large top heap, all elements are first traversed, and the number of the elements inserted into the large top heap is compared with the capacity of the large top heap. When the number of the elements in the large top heap is less than the capacity of the large top heap, the index ID and the access frequency of the current element traversed are taken as the elements of the large top heap and inserted into the large top heap. For example, 1,000,000 elements are traversed, and the index ID and the access frequency of the current element traversed are taken as the elements of the large top heap and inserted into the large top heap, so that the number of the elements in the large top heap is increased by 1, until 200,000 elements are traversed, and the number of the elements in the large top heap is full.

[0046] When the number of the elements in the large top heap is full, that is, the number of the elements in the large top heap is greater than the capacity of the large top heap, the element with the smaller access frequency in the subsequent traversed elements is inserted into the top of the large top heap to replace the element with the larger access frequency in the large top heap. The specific operation steps are as follows: The access frequency of the current element is compared with the access frequency of the element at the top of the large top heap. At this time, the access frequency of the element at the top of the large top heap is the highest among all the elements in the large top heap. If the access frequency of the current element is greater than or equal to the access frequency of the element at the top of the large top heap, the current element is skipped, and the next element is continuously traversed and compared. For example, the access frequency of the element at the top of the large top heap is 20, and the access frequency of the current element is 28, which indicates that the current element with the higher access frequency will not be eliminated, and the current element is skipped, and the next element is continuously traversed and compared.

[0047] If the access frequency of the current element is less than the access frequency of the top element of the large heap, the top element of the large heap is popped, and the index ID and the access frequency of the current element are inserted into the large heap as the element of the large heap. For example, the access frequency of the top element of the large heap is 20 times, and the access frequency of the current element is 8 times. It is indicated that the current element with lower access frequency is eliminated, and the element with the highest access frequency at the top of the large heap is popped, and the index ID and the access frequency of the element with the access frequency of 8 times are inserted into the large heap as the element of the large heap. During the process of popping and inserting the element, due to the characteristics of the large heap, the element at the top of the large heap is always the element with the highest access frequency in the large heap.

[0048] In step S104, the cache data corresponding to the access frequencies in the large heap is obtained and eliminated.

[0049] Specifically, after all the cache data is traversed in step S103, the element at the top of the large heap is the element with the highest access frequency among the elements to be eliminated, that is, the access frequency threshold to be eliminated. If the total number of cache data is 1 million, 200,000 elements in the large heap are 200,000 with the lowest access frequency among the 1 million, and the elements in the large heap are traversed at this time. The low-frequency cache data corresponding to the index ID and the access frequency of each element is obtained, and the low-frequency cache data is eliminated to release the cache space.

[0050] The time complexity of the conventional scheme is 0(n log n), and the time complexity of the technical scheme of the present application is 0(n log m), where n is the total number of cache elements, and m is the number of elements to be eliminated. The cache elimination generally only eliminates part of the data, so m is less than n. In addition, when the large heap is full and the access frequency of the current traversed cache element is greater than or equal to the access frequency of the top element of the heap, the element insertion operation of the heap is not performed, so the time complexity is further reduced to 0((n-x) log m), where n is the total number of cache elements, m is the number of elements to be eliminated, and x is the number of elements not inserted into the heap.

[0051] Data example: Assuming that 10,000 cache data needs to be processed by LFU elimination, the time complexity of the prior art scheme is 0(n log n) about 40,000; the scheme of the present application, assuming that 20% needs to be eliminated, and after the large heap is full, it is assumed that there is a 50% probability of not needing to insert into the heap, that is, 10000*(1-20%)*50% = 4000, O((10000-4000) log 2000) about 20,000, the time complexity is reduced by half.

[0052] In the scheme provided by the method embodiment, the required number of cache data with low access frequency is screened out by constructing a large top heap, and the occupied memory space in the logic of calculating the data to be eliminated is reduced: from the memory space of all element numbers to the memory space of only the number of elements to be eliminated, greatly reducing the memory consumption; the time complexity is reduced: the time complexity of the technical scheme of the application is half of the time complexity of the conventional technology, greatly reducing the screening time and improving the running efficiency of the cache system elimination function.

[0053] Figure 3 A cache data elimination system based on the LFU algorithm provided by an embodiment of the application is shown in FIG. 1. Figure 3 As shown in the figure, the system comprises: A cache data calculation module 11 is configured to calculate the number of cache data to be eliminated according to the size of the cache space to be released. A large top heap construction module 22 is configured to construct a large top heap according to the access frequency of the cache data, and set the data capacity of the large top heap. A cache data processing module 33 is configured to traverse the cache data and insert the smaller access frequency into the top of the large top heap. A cache data elimination module 44 is configured to obtain and eliminate the cache data corresponding to all the access frequencies in the large top heap.

[0054] The above system can execute the cache data elimination method based on the LFU algorithm in the foregoing embodiments, wherein, The scene generation module 11 performs step S101 of setting the cache occupied space threshold and the release space ratio; obtains the size of the currently occupied cache space and the number of cache data when the cache occupied space reaches the threshold; and calculates the number of cache data to be eliminated according to the number of current cache data and the release space ratio.

[0055] The model construction module 22 performs step S102 of taking the index ID and the access frequency corresponding to the cache data as elements, and constructing a large top heap by taking the access frequency as a comparison condition; takes the number of cache data to be eliminated as the data capacity of the large top heap; and constructs the large top heap by using a hash table.

[0056] The energy ratio module 33 performs step S103, traverses all elements, compares the number of elements inserted into the large top heap with the size of the capacity of the large top heap; when the number of elements in the large top heap is less than the capacity of the large top heap, the index ID and the access frequency of the current element traversed are inserted into the large top heap as elements of the large top heap; when the number of elements in the large top heap is greater than the capacity of the large top heap, the element with the smaller access frequency is inserted into the top of the large top heap; the access frequency of the current element is traversed and compared with the access frequency of the top element of the large top heap; if the access frequency of the current element is greater than or equal to the access frequency of the top element of the large top heap, the current element is skipped, and the next element is continuously traversed and compared; if the access frequency of the current element is less than the access frequency of the top element of the large top heap, the top element of the large top heap is popped, and the index ID and the access frequency of the current element are inserted into the large top heap as elements of the large top heap.

[0057] The cache data eviction module 44 performs step S104, traverses all cache data and determines elements in the large top heap; the elements in the large top heap are traversed, and the corresponding low-frequency cache data is obtained according to the index ID and the access frequency of each element; the low-frequency cache data is evicted, and the cache space is released.

[0058] Based on the same inventive concept, the electronic device provided in the embodiments of the present application also provides an electronic device corresponding to the method based on the LFU algorithm for cache data eviction in the foregoing embodiments, and the problem solving principle thereof is similar to that of the method. The electronic device provided in the embodiments of the present application comprises at least one processor, and a memory in communication connection with the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the method and / or technical solution of the plurality of embodiments of the present application.

[0059] The electronic device can be a user device, or a device integrated by a user device and a network device through a network, or also can be an application program running on the above device, the user device includes but is not limited to computers, mobile phones, tablet computers, smart watches, wristbands and various terminal devices, and the network device includes but is not limited to network hosts, single network servers, multiple network server sets or computer sets based on cloud computing, etc., which can be used to realize part of the processing function when setting an alarm. Here, the cloud is composed of a large number of hosts or network servers based on cloud computing, wherein cloud computing is a kind of distributed computing, which is composed of a virtual computer formed by a group of loosely coupled computer sets.

[0060] Figure 4The structure of a device suitable for implementing the method and / or technical solution in the embodiments of the present application is shown. The device 1200 includes a central processing unit (CPU) 1201, which can perform various appropriate actions and processes according to programs stored in a read-only memory (ROM) 1202 or loaded from a storage portion 1208 into a random access memory (RAM) 1203. In the RAM 1203, various programs and data required for system operation are also stored. The CPU 1201, the ROM 1202, and the RAM 1203 are connected to each other through a bus 1204. An input / output (I / O) interface 1205 is also connected to the bus 1204.

[0061] The following components are connected to the I / O interface 1205: an input portion 1206 including a keyboard, a mouse, a touch screen, a microphone, an infrared sensor, and the like; an output portion 1207 including a cathode ray tube (CRT), a liquid crystal display (LCD), an LED display, an OLED display, and the like, and a speaker, and the like; a storage portion 1208 including one or more computer readable media such as a hard disk, an optical disk, a magnetic disk, a semiconductor memory, and the like; and a communication portion 1209 including a network interface card such as a LAN (Local Area Network) card, a modem, and the like. The communication portion 1209 performs communication processing via a network such as the Internet.

[0062] In particular, the method and / or embodiments in the embodiments of the present application can be implemented as a computer software program. For example, the embodiments disclosed in the present application include a computer program product including a computer program carried on a computer readable medium, the computer program containing program codes for executing the method shown in the flowchart. When the computer program is executed by the central processing unit (CPU) 1201, the above-mentioned functions defined in the method of the present application are performed.

[0063] Another embodiment of the present application also provides a computer readable storage medium having stored thereon computer program instructions, which can be executed by a processor to implement the method and / or technical solution of any one or more embodiments of the present application.

[0064] In particular embodiments, one or more computer programs can be employed, implemented in any of a variety of programming languages, including an object-oriented programming language such as Java, Smalltalk, C++, or the like and conventional procedural programming languages, such as C. Each such program can be stored in a computer readable storage medium (removable, solid, volatile or non-volatile) and / or transmitted between or among computing devices, including a communications network or a wireless link, over a variety of computer readable transmission mediums, either optical, electrical, electromagnetic, or the like. Each such computer program can be embodied entirely within one computer, two computers, or a computer and a network of computers, including a cloud computing system. In particular embodiments, computer programs can be implemented in a network environment, such as the Internet, by one or more computer programs.

[0065] The computer readable medium can include a tangible medium such as that which is based on or otherwise includes a propagation medium that is able to program machines for performing instructions. The computer readable medium can also include a computer readable storage medium or memory medium such as, but not limited to, nonvolatile media (e.g., optical disks like CDs and / or DVDs, floppy disks, hard disk drives, solid state drives, or any other medium that can be used to store and / or transfer such computer readable instructions in a tangible manner). Additionally or alternatively, the computer readable medium can include transmission media such as coaxial cables; copper wire and fiber cables; and / or any medium that can be used to carry computer readable code for a variety of computer readable media.

[0066] The computer readable medium can include a tangible medium such as that which is based on or otherwise includes a propagation medium that is able to program machines for performing instructions. The computer readable medium can also include a computer readable storage medium or memory medium such as, but not limited to, nonvolatile media (e.g., optical disks like CDs and / or DVDs, floppy disks, hard disk drives, solid state drives, or any other medium that can be used to store and / or transfer such computer readable instructions in a tangible manner). Additionally or alternatively, the computer readable medium can include transmission media such as coaxial cables; copper wire and fiber cables; and / or any medium that can be used to carry computer readable code for a variety of computer readable media.

[0067] Another embodiment of the application provides a computer program product, including a computer program tangibly embodied in a machine readable storage medium, the computer program including instructions that, when executed by a processor, implement a method for cache data eviction based on LFU algorithm.

[0068] Computer program code for carrying out operations of the present application can be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code can execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computer (for example, through the Internet using an Internet Service Provider).

[0069] The flow diagrams and block diagrams in the drawings are representative of the architectural, functional, and operational aspects of possible implementations of apparatuses, methods, and computer program products according to various embodiments of the present application. In this regard, each block in the flow diagrams or block diagrams can represent a module, a segment, or a portion of code, which comprises one or more executable instructions for implementing the specified logical functions. It should also be noted that in some alternative implementations, the functions noted in the blocks can occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently or the blocks may

[0070] Those skilled in the art can clearly understand that, for the convenience and brevity, the specific working process of the system, device and unit described above can refer to the corresponding process in the foregoing method embodiments, which will not be described here.

[0071] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented by other ways. For example, the device embodiments described above are merely schematic, for example, the division of the units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or page components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units or components shown or discussed can be indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0072] The units described as separate components may or may not be physically separate, and the components displayed as units may or may not be physical units, i.e. may be located in one place, or may be distributed on multiple network units. Part or all of the units may be selected according to actual needs to achieve the purpose of the embodiment.

[0073] In addition, each functional unit in each embodiment of the present application can be integrated in one processing unit, or each unit can be physically present alone, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of hardware plus software functional unit.

[0074] The integrated unit realized in the form of software functional unit can be stored in a computer readable storage medium. The software functional unit is stored in a storage medium, including a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor to execute part of the steps of the method described in each embodiment of the present application. The foregoing storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic disk or optical disk, and various program code storage media.

[0075] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of each embodiment of the present application.

[0076] In addition, it is obvious that the word "comprising" does not exclude other units or steps, and the singular does not exclude the plural. The plurality of units or devices stated in the device claim can also be realized by one unit or device through software or hardware. The words first, second, etc. are used to indicate names, and do not indicate any specific order.

Claims

1. A cached data eviction method based on the LFU algorithm, characterized in that, include: Calculate the amount of cached data that needs to be evicted based on the size of the cache space to be released; Build a max-heap based on the access frequency of cached data, and set the data capacity of the max-heap; Iterate through the cached data and insert the less frequently accessed data at the top of the max-heap; Retrieve and evict cached data corresponding to all access frequencies in the max-heap.

2. The cached data eviction method based on the LFU algorithm according to claim 1, characterized in that, The step of calculating the amount of cached data to be evicted based on the size of the cache space to be released further includes: Set the cache space usage threshold and the space release ratio; When the cache space usage reaches the threshold, obtain the current cache space size and the amount of cached data. The amount of cached data that needs to be evicted is calculated based on the current amount of cached data and the proportion of space to be released.

3. The cached data eviction method based on the LFU algorithm according to claim 1, characterized in that, The step of constructing a max-heap based on the access frequency of cached data and setting the data capacity of the max-heap further includes: Construct a max-heap by using the index ID and access frequency corresponding to the cached data as elements, and using the access frequency as a comparison condition; The number of cached data that needs to be evicted is used as the data capacity of the max-heap.

4. The cached data eviction method based on the LFU algorithm according to claim 3, characterized in that, The step of traversing the cached data and inserting less frequently accessed data at the top of the max-heap further includes: Iterate through all elements and compare the number of elements inserted into the max-heap with the size of the max-heap. When the number of elements in the max-heap is less than the capacity of the max-heap, the index ID and access frequency of the current element being traversed are used as elements to insert into the max-heap. When the number of elements in the max-heap exceeds the capacity of the max-heap, the element with the lower access frequency is inserted at the top of the max-heap.

5. The cached data eviction method based on the LFU algorithm according to claim 4, characterized in that, The step of inserting the element with the lower access frequency at the top of the max-heap when the number of elements in the max-heap is greater than the capacity of the max-heap further includes: When the number of elements in the max-heap is greater than the capacity of the max-heap, traverse and compare the access frequency of the current element with the access frequency of the top element of the max-heap. If the access frequency of the current element is greater than or equal to the access frequency of the top element of the max-heap, then skip the current element, continue traversing and compare the next element. If the access frequency of the current element is less than the access frequency of the top element of the max-heap, then pop the top element of the max-heap and insert the current element as an element of the max-heap using its index ID and access frequency.

6. The cached data eviction method based on the LFU algorithm according to claim 5, characterized in that, The step of obtaining and evicting cached data corresponding to all access frequencies in the max-heap further includes: Iterate through all cached data and determine the elements in the max-heap; Traverse the elements in the max-heap and retrieve the corresponding low-frequency cache data based on the index ID and access frequency of each element; The low-frequency cached data is evicted to free up cache space.

7. A cached data eviction system based on the LFU algorithm, characterized in that, include: Cache data calculation module: used to calculate the amount of cache data that needs to be evicted based on the size of the cache space to be released; Max-heap construction module: used to build a max-heap based on the access frequency of cached data and set the data capacity of the max-heap; Cache data processing module: used to traverse cache data and insert less frequently accessed data into the top of the max-heap; The cache data eviction module is used to retrieve and evict cache data that corresponds to all access frequencies in the max-heap.

8. A cached data eviction device based on the LFU algorithm, characterized in that, The device includes: At least one processor; and A memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 1 to 6.

9. A computer-readable medium having computer program instructions stored thereon, characterized in that, The computer program instructions can be executed by a processor to implement the method as described in any one of claims 1 to 6.

10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the method of any one of claims 1 to 6.

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