IoT traffic meter data compression sensing transmission optimization method and system

Abstract

The application discloses an Internet of Things flowmeter data compression sensing transmission optimization method and system, and particularly relates to the field of low-power wireless communication networks, and is used for solving the compression sensing signal distortion problem caused by sampling time sequence misalignment in the LPWAN bandwidth limited environment; a local phase reference is constructed by extracting a pipeline vibration fundamental frequency component, and a cloud end synchronization reference timestamp alignment signal is received; a fundamental frequency and a third harmonic component are separated to calculate an arrival time difference, and a phase-locked loop is dynamically adjusted based on a pipeline material threshold to trigger a sampling clock phase; after verifying the stability of the zero-crossing point time variance, a phase synchronization clock is used to perform compression sensing sampling on the flow signal, and optimized compression measurement values are generated and transmitted to the cloud end through the LPWAN; through the closed-loop cooperation of physical characteristics and communication clocks, the complete capture of the signal sparse structure is ensured under the low bandwidth condition, and the cloud end reconstruction accuracy is significantly improved.

Description

Technical Field

[0001] This invention relates to the field of low-power wireless communication networks, and more specifically, to a method and system for optimizing the compressed sensing transmission of IoT flow meter data. Background Technology

[0002] In the field of industrial IoT, high-precision ultrasonic flow meters can be remotely monitored through LPWAN (such as NB-IoT / LoRa) networks. To overcome the bandwidth limitations of LPWAN, compressed sensing technology is applied to flow meter terminals. The original signal is compressed through sparse sampling and then transmitted to the cloud for reconstruction. Existing technologies typically use fixed-frequency sampling and general reconstruction algorithms to optimize data transmission.

[0003] Mechanical vibrations in industrial settings can cause periodic distortions in flow signals. The inherent clock precision of the terminal is insufficient, making it impossible for the sampling timing to dynamically match the vibration phase. This timing misalignment impairs the ability of compressed sensing to capture sparse signal structures, causing distortion of the reconstructed waveform in the cloud and leading to misjudgments in flow measurement. Existing transmission optimization schemes have not resolved the contradiction between the matching of sampling timing and signal physical characteristics under vibration conditions, making it difficult to guarantee monitoring reliability. Summary of the Invention

[0004] In order to overcome the above-mentioned defects of the prior art, the present invention provides a method and system for optimizing data compression sensing transmission of IoT flow meters to solve the problems mentioned in the background art.

[0005] To achieve the above objectives, the present invention provides the following technical solution:

[0006] The method for optimizing the compressed sensing transmission of IoT flow meter data includes the following steps:

[0007] S1. Obtain the vibration signal output by the pipeline vibration acceleration sensor, and extract the fundamental frequency component of the vibration signal as the vibration phase reference value;

[0008] S2. Receive clock calibration instructions from the cloud via the LPWAN network. The clock calibration instructions include a reference timestamp synchronized with the vibration phase reference value.

[0009] S3. Align the vibration signal according to the reference timestamp, separate the fundamental frequency component and the third harmonic component, and calculate the arrival time difference between the fundamental frequency component and the third harmonic component.

[0010] S4. When the arrival time difference exceeds the preset pipe material threshold, a phase-locked loop start command is generated to start the phase-locked loop circuit and adjust the phase offset of the local sampling clock.

[0011] S5. Acquire three consecutive vibration cycle signals after phase adjustment, and calculate the zero-crossing time variance of the three consecutive vibration cycle signals.

[0012] S6. If the zero-crossing time variance exceeds the crystal oscillator jitter limit, return to receive the clock calibration command sent from the cloud again; if it does not exceed the limit, use the phase-adjusted local sampling clock to perform compressed sensing sampling on the original signal of the flow meter, generate compressed measurement values, and transmit them to the cloud through the LPWAN network.

[0013] Furthermore, the vibration signal output by the pipeline vibration acceleration sensor is acquired, and the fundamental frequency component of the vibration signal is extracted as the vibration phase reference value, including:

[0014] The vibration signal output by the pipeline vibration acceleration sensor is bandpass filtered, and the filtering range covers the expected frequency range of the fundamental frequency component.

[0015] The filtered vibration signal is truncated to an integer period, with the truncated length being an integer multiple of the period of the fundamental frequency component of the vibration signal;

[0016] Perform a fast Fourier transform on the intercepted vibration signal segment and extract the frequency component with the largest amplitude in the spectrum as the fundamental frequency component.

[0017] The time-domain waveform of the fundamental frequency component is reconstructed using zero-phase filtering technology, and the zero-crossing point is used as the reference point for the vibration phase.

[0018] Furthermore, the time-domain waveform of the fundamental frequency component reconstructed using zero-phase filtering technology includes:

[0019] The extracted fundamental frequency component spectrum is subjected to inverse fast Fourier transform to generate the initial time-domain signal;

[0020] The initial time-domain signal is input into a bidirectional digital filter for forward and reverse filtering.

[0021] The combined bidirectional filtered output signals yield the fundamental frequency component time-domain waveform with zero phase distortion.

[0022] Furthermore, clock calibration commands are received from the cloud via the LPWAN network, including:

[0023] Establish a secure transport layer protocol encrypted connection with the cloud server;

[0024] Encrypted data packets are received through the LPWAN network, and cyclic redundancy check is performed on the encrypted data packets to verify data integrity.

[0025] When the cyclic redundancy check passes, the data packet payload is decrypted using the preset decryption key;

[0026] Extract the clock calibration instruction field from the decrypted data packet payload;

[0027] Parse the reference timestamp value and the corresponding vibration phase reference value identifier contained in the clock calibration instruction field;

[0028] A time-related mapping is established between the parsed baseline timestamp values ​​and the locally stored vibration phase reference values.

[0029] Furthermore, based on the reference timestamp, the vibration signal is aligned, the fundamental frequency component and the third harmonic component are separated, and the arrival time difference between the fundamental frequency component and the third harmonic component is calculated, including:

[0030] The time alignment start point of the vibration signal is determined based on the reference timestamp;

[0031] The time-aligned vibration signal is subjected to dual-channel finite impulse response filtering. The center frequency of the first channel filter is within the range of the fundamental frequency component, and the center frequency of the second channel filter is within the range of the third harmonic component.

[0032] The zero-crossing times of the output signals of the two filter channels are detected respectively;

[0033] Mark the first zero-crossing moment of the fundamental frequency component channel as the fundamental frequency arrival time;

[0034] Mark the first zero-crossing moment of the third harmonic component channel as the arrival time of the third harmonic;

[0035] The time difference between the arrival time of the third harmonic and the arrival time of the fundamental frequency is calculated as the arrival time difference.

[0036] Furthermore, when the arrival time difference exceeds a preset pipe material threshold, a phase-locked loop (PLL) start command is generated to activate the PLL circuit and adjust the phase offset of the local sampling clock, including:

[0037] The arrival time difference is compared with the preset pipe material threshold input voltage comparator.

[0038] When the arrival time difference is greater than the preset pipe material threshold, the voltage comparator outputs a high-level signal as a phase-locked loop start command.

[0039] Connect the phase-locked loop start command to the enable pin of the phase-locked loop circuit;

[0040] The phase difference between the local sampling clock and the reference clock is compared using a phase detector in a phase-locked loop circuit.

[0041] An error voltage signal is generated based on the phase difference and input to the voltage-controlled oscillator;

[0042] Adjust the output frequency of the voltage-controlled oscillator to change the phase offset of the local sampling clock.

[0043] Furthermore, the preset pipe material threshold is determined through the following steps:

[0044] Measure the propagation speed of ultrasonic waves in the target pipe material;

[0045] Calculate the theoretical propagation time difference between the fundamental frequency and the third harmonic in the pipe;

[0046] Multiply the theoretical propagation time difference by a safety factor to obtain the preset pipeline material threshold.

[0047] Store the threshold values ​​corresponding to different pipe materials in non-volatile memory.

[0048] Furthermore, three consecutive vibration cycle signals after phase adjustment are acquired, and the zero-crossing time variance of the three consecutive vibration cycle signals is calculated, including:

[0049] The signal output by the vibration acceleration sensor is sampled at equal intervals using a phase-adjusted local sampling clock.

[0050] Edge-triggered capture is performed on the sampled signal to record the zero-crossing time of the rising edge in each of the three consecutive complete vibration cycles;

[0051] Calculate the time interval between the zero-crossing point of the first vibration cycle and the zero-crossing point of the second vibration cycle;

[0052] Calculate the time interval between the zero-crossing point of the second vibration cycle and the zero-crossing point of the third vibration cycle;

[0053] Calculate the square of the difference between two time intervals;

[0054] Dividing the squared difference by a fixed coefficient of two yields the zero-crossing time variance.

[0055] Furthermore, if the zero-crossing time variance exceeds the crystal oscillator jitter limit, the system returns to receive the clock calibration command from the cloud again; otherwise, it uses the phase-adjusted local sampling clock to perform compressed sensing sampling on the flow meter's original signal, generates compressed measurement values, and transmits them to the cloud via the LPWAN network, including:

[0056] The zero-crossing time variance and the upper limit of crystal oscillator jitter are input into a digital comparator for comparison.

[0057] When the zero-crossing time variance exceeds the crystal oscillator jitter limit, clear the locally stored reference timestamp and trigger the clock calibration command request flag.

[0058] When the clock calibration command request flag is detected to be valid, the clock calibration command sent from the cloud is received again through the LPWAN network.

[0059] If the zero-crossing time variance is less than or equal to the crystal oscillator jitter limit, then the phase-adjusted local sampling clock is used to sample the original signal of the flow meter at equal intervals.

[0060] Pseudo-random sequence modulation is applied to the sampled signal to generate compressed measurement values;

[0061] The compressed measurement values ​​are encapsulated into data packets via a secure transport layer protocol and transmitted to the cloud server through the LPWAN network.

[0062] On the other hand, the present invention provides an IoT flow meter data compression sensing transmission optimization system, comprising the following modules:

[0063] The fundamental frequency extraction module is used to acquire the vibration signal output by the pipeline vibration acceleration sensor and extract the fundamental frequency component of the vibration signal as the vibration phase reference value.

[0064] The clock command module is used to receive clock calibration commands sent from the cloud via the LPWAN network. The clock calibration commands include a reference timestamp synchronized with the vibration phase reference value.

[0065] The harmonic time difference module is used to align vibration signals according to a reference timestamp, separate the fundamental frequency component and the third harmonic component, and calculate the arrival time difference between the fundamental frequency component and the third harmonic component.

[0066] The phase-locked loop control module is used to generate a phase-locked loop start command when the arrival time difference exceeds the preset pipe material threshold, and start the phase-locked loop circuit to adjust the phase offset of the local sampling clock.

[0067] The variance calculation module is used to acquire three consecutive vibration cycle signals after phase adjustment and calculate the zero-crossing time variance of the three consecutive vibration cycle signals.

[0068] The compressed transmission module is used to return to receive the clock calibration command sent from the cloud again if the zero-crossing time variance exceeds the crystal oscillator jitter limit; if it does not exceed the limit, it uses the phase-adjusted local sampling clock to perform compressed sensing sampling on the original signal of the flow meter, generates compressed measurement values, and transmits them to the cloud through the LPWAN network.

[0069] Compared with the prior art, the present invention has the following beneficial effects:

[0070] By leveraging a dynamic coordination mechanism between vibration characteristics and communication clocks, the signal transmission fidelity in LPWAN narrowband environments is significantly optimized. A local phase reference is constructed using the fundamental frequency component of pipeline vibration, and cross-device timing alignment is achieved through cloud-synchronized reference timestamps, thus physically resolving the sampling inaccuracy problem caused by mechanical vibration. Furthermore, by combining harmonic component propagation time difference detection and dynamic phase adjustment of the phase-locked loop, the local sampling clock adaptively matches the pipeline vibration characteristics, ensuring the integrity of the sparse structure of the signal required for compressed sensing and avoiding reconstruction distortion.

[0071] A closed-loop verification mechanism was constructed at the communication layer. Clock stability was evaluated in real time through zero-crossing time variance, ensuring that compressed sensing sampling is initiated only when the timing is precise. This physically-driven adaptive transmission strategy enables the terminal to accurately capture the periodic characteristics of traffic signals under low bandwidth constraints. The generated compressed measurements maintain a high-fidelity sparse representation in LPWAN transmission, significantly reducing the communication overhead required for cloud reconstruction. Compared to traditional fixed sampling schemes, this improves the reliability of monitoring data under the same bandwidth conditions, making it particularly suitable for remote metering needs in industrial vibration scenarios. Attached Figure Description

[0072] Figure 1 This is a flowchart of the IoT flow meter data compression sensing transmission optimization method of the present invention;

[0073] Figure 2 This is a schematic diagram of the structure of the IoT flow meter data compression sensing transmission optimization system of the present invention. Detailed Implementation

[0074] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0075] Example 1: Figure 1 The present invention provides a method for optimizing the compressed sensing transmission of IoT flow meter data, which includes the following steps:

[0076] S1. Obtain the vibration signal output by the pipeline vibration acceleration sensor, and extract the fundamental frequency component of the vibration signal as the vibration phase reference value;

[0077] S2. Receive clock calibration instructions from the cloud via the LPWAN network. The clock calibration instructions include a reference timestamp synchronized with the vibration phase reference value.

[0078] S3. Align the vibration signal according to the reference timestamp, separate the fundamental frequency component and the third harmonic component, and calculate the arrival time difference between the fundamental frequency component and the third harmonic component.

[0079] S4. When the arrival time difference exceeds the preset pipe material threshold, a phase-locked loop start command is generated to start the phase-locked loop circuit and adjust the phase offset of the local sampling clock.

[0080] S5. Acquire three consecutive vibration cycle signals after phase adjustment, and calculate the zero-crossing time variance of the three consecutive vibration cycle signals.

[0081] S6. If the zero-crossing time variance exceeds the crystal oscillator jitter limit, return to receive the clock calibration command sent from the cloud again; if it does not exceed the limit, use the phase-adjusted local sampling clock to perform compressed sensing sampling on the original signal of the flow meter, generate compressed measurement values, and transmit them to the cloud through the LPWAN network.

[0082] S1. Obtain the vibration signal output by the pipeline vibration acceleration sensor, and extract the fundamental frequency component of the vibration signal as the vibration phase reference value. This is implemented as follows:

[0083] The vibration signal output from the pipeline vibration accelerometer is first input to a bandpass filter circuit for preprocessing. The passband range of the bandpass filter is set according to the mechanical vibration characteristics of the target industrial pipeline, specifically determined as follows: During the initial startup after flowmeter installation, a 30-second raw vibration signal is collected. A Fast Fourier Transform (FFT) spectral analysis is performed on this signal to identify the energy concentration frequency band. 0.8 times the frequency corresponding to the energy peak is taken as the lower passband limit, and 1.2 times the frequency is taken as the upper passband limit. For example, if the typical fundamental frequency of a steel pipeline is 80 Hz, the filter range is set to 64 Hz to 96 Hz. The bandpass filter adopts an 8th-order Chebyshev topology, achieving a stopband attenuation of 60 dB, and is implemented using an operational amplifier and a resistor-capacitor network.

[0084] The filtered vibration signal is input to the microcontroller's timing capture unit for whole-cycle segmentation. The segment length is determined by an automatic cycle detection mechanism: a voltage comparator detects the zero-crossing point of the rising edge of the filtered signal, records the time interval of five consecutive zero-crossing points, calculates the average value, and multiplies this average value by an integer 3 to obtain the segment length. The segmentation operation is implemented by the microcontroller directly controlling the start and stop timing of the analog-to-digital converter, ensuring that the segmented signal contains three complete vibration cycles and that both the start and end points are zero-crossing points. For example, when the fundamental frequency component is detected to be 50 Hz, a three-cycle signal segment with a duration of 0.06 seconds is segmented.

[0085] The extracted vibration signal segments are processed using a Fast Fourier Transform (FFT). The FFT uses a fixed 1024 points; segments with insufficient points are padded with zeros. The spectrum calculation employs the Cooley-Tukey algorithm, utilizing a pre-built floating-point arithmetic library within the microcontroller to perform complex number operations. The fundamental frequency component is extracted by scanning the spectrum amplitude: starting from 5 Hz and ending at 500 Hz, the search for the maximum amplitude point is performed in 0.5 Hz increments; the frequency corresponding to this point is determined as the fundamental frequency component. To eliminate spectral leakage, a Hanning window function is applied to the signal segment before the transform; the window function coefficients are stored in read-only memory.

[0086] The extracted fundamental frequency component spectrum is reconstructed into an initial time-domain waveform using an inverse fast Fourier transform (IFFT). The inverse transform uses the same number of points and algorithm as the forward transform, outputting a discrete signal with a length of 2048 sampling points. This initial time-domain waveform is input to a bidirectional digital filter for phase correction. The bidirectional filter consists of two cascaded finite impulse response (FIR) filters with identical transfer functions. The filter order is set to 64, and the coefficients are dynamically generated based on the fundamental frequency component frequency: using the passband center frequency as a reference, each tap coefficient is calculated by subtracting the intermediate index from the sampling index, taking the reciprocal, and then multiplying it by the sine function value of the angle corresponding to the center frequency. The forward filter processes the input signal in forward timing, and the output intermediate signal is temporarily stored in random access memory (RAM); the reverse filter reverses the intermediate signal and passes it through the same filter again, with the output result also reversed. The output signals from the two filters are added one by one according to the sampling points and divided by a fixed coefficient of 2 to finally obtain the fundamental frequency component time-domain waveform with zero phase distortion.

[0087] The fundamental frequency component time-domain waveform with zero phase distortion is input to the zero-crossing detection circuit. The detection circuit consists of a differential amplifier and a high-speed comparator. The differential amplifier gain is set to 20, and the comparator reference voltage is set to 0 volts. When the waveform voltage crosses from a negative value to a positive value, the comparator outputs a rising edge transition signal. This transition signal triggers the microcontroller's timer capture function, recording an absolute timestamp accurate to 0.1 microseconds. This timestamp is stored in non-volatile memory as a reference point for the vibration phase value. To eliminate noise interference, the comparator is set with a 5 mV hysteresis voltage. This threshold is set based on 1.6 times the peak-to-peak value of the sensor noise, ensuring that a valid zero-crossing is only determined after the voltage has continuously exceeded the threshold for 10 microseconds.

[0088] S2. Receive clock calibration instructions from the cloud via the LPWAN network. The clock calibration instructions include a reference timestamp synchronized with the vibration phase reference value, and are implemented as follows:

[0089] When establishing a secure transport layer protocol (TLS) encrypted connection with the cloud server, the communication processor embedded in the flow meter performs the following operations: Initializes the Transmission Control Protocol (TCP) socket binding to local port number 5683, and requests the Internet Protocol (IP) address from the cloud server's domain name resolution. After completing the three-way handshake to establish the TCP connection, it initiates the TLS 1.3 handshake process: sends a client greeting message containing a list of supported cipher suites, a random number, and the protocol version; receives the server greeting message returned from the cloud to determine the final cipher suite; verifies the validity of the server certificate chain (three root certificates are pre-stored in read-only memory); generates a pre-master key based on the Elliptic Curve Diffie-Hellman key exchange protocol; and derives a 128-bit data encryption key and a 256-bit message authentication key after calculating the master key. A 5-second timeout threshold is set for the entire handshake process, determined through 50 sets of network latency tests (the maximum measured latency was 4.3 seconds). A reconnection mechanism is triggered after the timeout.

[0090] When receiving encrypted data packets via an LPWAN network, the flow meter's antenna receives the RF signal, which is then boosted by 20 dB by a low-noise amplifier before being demodulated into a baseband data stream by a LoRa modem. The data packet format conforms to the LoRaWAN protocol version 1.0.3 specification, containing a 4-byte frame header, dynamic length payload, and a 4-byte message integrity checksum. Cyclic redundancy check (CRC) is performed on the received complete encrypted data packets: the 4-byte checksum at the end of the frame is extracted; a standard 32-bit polynomial (with the highest term being 32, including 16 non-zero terms from 26 to 0) is used for shift calculation, with the shift register initially set to all 1s; data integrity is deemed passed when the calculated 32-bit remainder perfectly matches the checksum. This check mechanism can detect all burst errors shorter than 32 bits.

[0091] After the cyclic redundancy check passes, the data packet payload is decrypted using a preset decryption key. The decryption key is stored in the security chip's key vault, and access requires authentication via a device-unique identifier generated by the physical non-cloning function (response time within 500 microseconds). The decryption process uses the AES-128 algorithm in counter mode: the 16-byte payload is divided into four 4-byte blocks; each block is XORed with the encrypted result of the counter value; the initial counter value is the data packet sequence number multiplied by 4294967296, then added to the block index. For example, for a data packet with sequence number 128, the first block's counter value is 128 × 4294967296 + 0. If decryption fails (e.g., the padding value does not conform to the PKCS#7 specification), the data packet is discarded and an error log is recorded. A maximum of three authentication attempts are allowed per session.

[0092] Extract the clock calibration instruction field from the decrypted data packet payload. The payload structure is defined as follows: the first byte is the protocol version number (fixed value 0x02), the 2nd and 3rd bytes are the instruction type code (clock calibration instruction is encoded as 0x0150), the 4th byte is the field length value N, and the following N bytes are the instruction content. After verifying compatibility based on the protocol version number, locate the field that matches the instruction type code, and extract the following N bytes into a buffer (maximum length 128 bytes) according to the field length value. If the field length exceeds the limit, it is truncated and a length exception flag is set.

[0093] The clock calibration instruction field contains the reference timestamp value and the corresponding vibration phase reference value identifier. The instruction field uses TLV format: the reference timestamp is an 8-byte unsigned integer (tag 0x01), representing a Coordinated Universal Time (UTC) millisecond-level timestamp; the vibration phase reference value identifier is a 4-byte hash value (tag 0x02), generated by truncating the first 4 bytes of the locally stored vibration phase reference value reference point timestamp using the SHA-256 algorithm. During parsing, the instructions are retrieved in tag order; instructions lacking necessary tags are considered invalid. Converting the timestamp value to the local time zone requires adding a preset time zone offset (range ±14 hours, e.g., Beijing time + 28,800,000 milliseconds).

[0094] A time-correlation mapping is established between the parsed baseline timestamp values ​​and the locally stored vibration phase reference values. A time-correlation table (maximum 256 records, occupying 4KB of storage space) is created in non-volatile memory. The table structure contains a 4-byte vibration phase reference value identifier, an 8-byte baseline timestamp, and a 4-byte local received timestamp. Atomic operations are performed during writes: the storage block is locked first, and the least recently used algorithm is used to manage records. If the identifier does not exist in the table, a new record is appended and the B+ tree index is updated. For example, the baseline timestamp 1639920005000 corresponding to the identifier 0x8A3D is stored at table index position 37.

[0095] S3. Align the vibration signal according to the reference timestamp, separate the fundamental frequency component and the third harmonic component, and calculate the arrival time difference between the fundamental frequency component and the third harmonic component. This is implemented as follows:

[0096] When determining the time alignment start point of the vibration signal based on the reference timestamp, the reference timestamp value stored in the time association table is read from non-volatile memory. This value is compared with the local real-time clock counter value: the difference between the reference timestamp and the local received timestamp is calculated to obtain the network transmission delay compensation; the compensation is added to the current real-time clock value to obtain the calibrated absolute time reference point. Using this reference point as a reference, the time alignment start point is located in the vibration signal buffer. The buffer adopts a circular buffer structure with a capacity of 10 seconds of sampled data (sampling rate 2 kHz). The start point position is calculated using the formula "buffer start address + (reference point timestamp − earliest sample timestamp) × sampling rate", and the calculation result is rounded to the nearest sample point index. For example, if the reference point timestamp is 1639920005000 milliseconds and the earliest sample timestamp is 1639920002000 milliseconds, then the start point index is (5000-2000)×2=6000.

[0097] The time-aligned vibration signal is subjected to dual-channel finite impulse response (FIR) filtering. The center frequency of the first channel filter is set to the fundamental frequency extracted in step S1, and the passband width is 10% of the fundamental frequency. The center frequency of the second channel filter is the product of the fundamental frequency and three, and the passband width is 12% of the third harmonic frequency. The filter order is uniformly set to 128, and the coefficients are designed using the window function method: based on the center frequency, each tap coefficient is equal to the angular frequency corresponding to the center frequency multiplied by the sine function value of the sampling time interval, and then multiplied by the Hamming window coefficient. The Hamming window coefficient is calculated according to the formula "0.54−0.46×cos(2πn / (N-1))", where n is the tap number and N is the total order. The two filters run in parallel on the digital signal processor, and the input signal is simultaneously distributed to both channels through a cross-switching matrix.

[0098] The zero-crossing moments of the output signals from the two filtered channels are detected separately. The detection circuit consists of two stages: the first stage is a gain-programmable instrumentation amplifier (gain set to 50x), and the second stage is a hysteresis comparator (reference voltage 0 volts, hysteresis voltage 20 mV). When the filtered output signal voltage crosses from a negative value to a positive value, the comparator outputs a rising edge pulse. This pulse triggers the capture function of a high-precision timer, whose clock source is an 80 MHz temperature-compensated crystal oscillator with a capture time resolution of 12.5 nanoseconds. To eliminate interference pulses, a continuous judgment mechanism is set: only when the signal voltage remains positive for more than 5 sampling periods (0.5 ms) after crossing the zero point is the valid zero-crossing moment recorded and stored in a first-in-first-out queue.

[0099] The first zero-crossing moment of the fundamental frequency component channel is marked as the fundamental frequency arrival time. The zero-crossing timestamp sequence of the fundamental frequency channel is extracted from the first-in-first-out queue, filtered based on the first valid zero-crossing point after the time alignment start point. A time window check is performed during the filtering process: the zero-crossing moment must be within the interval of 1 to 100 milliseconds after the time alignment start point; moments outside this interval are considered invalid. The qualified zero-crossing moments are written to the marker register, with register address 0x5000 storing a 64-bit nanosecond-level timestamp, and the status flag bit BIT0 is set. For example, a timestamp of 1639920005123456789 nanoseconds is marked as the fundamental frequency arrival time.

[0100] The first zero-crossing moment of the third harmonic component channel is marked as the arrival time of the third harmonic. The same filtering mechanism is used to process the first-in-first-out queue of the third harmonic channel, but the time window is adjusted to the interval of 0.3 ms to 30 ms after the time alignment start point (because harmonics propagate faster). The valid zero-crossing moment is written to the flag register at address 0x5008, and the status flag bit BIT1 is set. When both BIT0 and BIT1 are detected to be set simultaneously, a time difference calculation interrupt is triggered.

[0101] The arrival time difference is calculated as the time difference between the third harmonic arrival time and the fundamental frequency arrival time. The arrival time of the third harmonic is read from register 0x5008 and subtracted from the fundamental frequency arrival time read from register 0x5000 to obtain the original time difference in nanoseconds. Temperature drift compensation is then performed: the temperature sensor value (resolution 0.1 degrees Celsius) is read, and the time difference is adjusted according to a preset compensation coefficient (-0.5 nanoseconds / degree Celsius). The final result is converted to microseconds and stored in the result register, simultaneously initiating the comparison operation in step S4. For example, if the fundamental frequency arrival time is 1639920005123456789 nanoseconds and the harmonic arrival time is 1639920005123489000 nanoseconds, the compensated time difference is 31.2 microseconds.

[0102] S4. When the arrival time difference exceeds the preset pipe material threshold, a phase-locked loop (PLL) start command is generated to start the PLL circuit and adjust the phase offset of the local sampling clock. The implementation is as follows:

[0103] When comparing the arrival time difference with the preset pipe material threshold input voltage comparator, the microsecond-level time difference signal output from S3 is first converted into an analog voltage. The conversion uses a 12-bit digital-to-analog converter, with a full-scale range of 500 microseconds corresponding to 5 volts. The conversion formula is: Output voltage = Arrival time difference × 0.01 volts / microsecond. The preset pipe material threshold is read from the material parameter table in non-volatile memory, which is loaded into random access memory during device initialization. A hysteresis comparator (model LM339) is used, with the time difference conversion voltage connected to the positive input and the threshold conversion voltage (threshold × 0.01 volts / microsecond) connected to the negative input. The hysteresis voltage is set to 50 millivolts to avoid high-frequency jitter. The comparator is powered by 5 volts and has a response time of 1 microsecond.

[0104] When the arrival time difference exceeds the preset pipe material threshold, the voltage comparator outputs a high-level signal as a phase-locked loop (PLL) start command. The high-level judgment criterion is that the output voltage continuously exceeds 3.5 volts for 10 microseconds. This judgment is implemented by a window comparator circuit: the upper limit of the window is 4 volts, and the lower limit is 3.5 volts. When the signal is within the window and the duration meets the condition, the D flip-flop is triggered to latch the high level. The latched signal is output to the control bus after optocoupler isolation. The signal rise time is less than 100 nanoseconds, and the driving capability reaches 20 mA. For example, when the steel pipe threshold is set to 40 microseconds and the measured time difference is 45 microseconds, the conversion voltage of 0.45 volts exceeds the threshold voltage of 0.40 volts, resulting in a continuous high-level output.

[0105] The PLL start command is connected to the enable pin of the PLL circuit. The enable pin (pin 5 of the CD4046 chip) is connected to the control bus via a 1kΩ current-limiting resistor. The enable logic is active high; the PLL's internal oscillator is activated when the voltage exceeds 2.4 volts. The start-up process includes a 50-microsecond stabilization wait period during which the enable signal remains monitored. If a voltage drop occurs within 200 microseconds, the start-up is aborted. The enable pin has a built-in 5.1kΩ pull-up resistor to ensure it is disabled when not connected.

[0106] A phase detector in a phase-locked loop (PLL) circuit compares the phase difference between the local sampling clock and the reference clock. The reference clock source is a temperature-compensated crystal oscillator (10 MHz, ±2 ppm accuracy), and the local sampling clock is generated by frequency division of a voltage-controlled oscillator (VCO). The phase detector is an XOR gate (internal module of the CD4046), with inputs to a 64-division multiple of the reference clock and the local sampling clock. The output duty cycle signal has a pulse width proportional to the phase difference between the two clocks, with a linear range of 0 to 180 degrees. When the phase difference exceeds 180 degrees, the detector outputs a constant high level.

[0107] An error voltage signal is generated based on the phase difference and input to the voltage-controlled oscillator (VCO). The pulse output of the phase detector is converted into a DC voltage by a low-pass filter: the filter consists of a first-order RC network with a 10 kΩ resistor and a 0.1 μF capacitor, with a cutoff frequency of 160 Hz. The error voltage is calculated as Verr = pulse width × reference clock period × 5 volts / π, where π is taken as 3.1416. This voltage is input to the control terminal of the VCO (pin 9 of CD4046), with an input impedance greater than 1 megohm, and a voltage range of 0.5 volts to 4.5 volts corresponds to an output frequency offset of ±200 ppm.

[0108] The output frequency of the voltage-controlled oscillator (VCO) is adjusted to change the phase offset of the local sampling clock. The VCO output (pin 4 of the CD4046) is connected to a frequency divider (CD4520 chip), with a division factor set to 15625, generating a final 640 Hz sampling clock. The frequency adjustment response is 10 ppm per second; when the error voltage changes by 1 volt, the output frequency changes by 100 ppm within 100 milliseconds. The phase offset is calculated using the formula Δφ = 2π × Δf × t, where Δf is the frequency offset and t is the adjustment duration. For example, when the error voltage increases by 1 volt for 50 milliseconds, a phase offset of 3.14 radians is generated.

[0109] The preset pipe material threshold is determined through the following steps: The sound velocity of the target pipe material is measured using an industrial ultrasonic thickness gauge (model Olympus38DL). At a standard temperature of 20 degrees Celsius, two sensors are placed 1 meter apart along the pipe axis to measure the ultrasonic wave propagation time. The sound velocity is calculated by dividing the distance by the propagation time. Ten measurements are taken for steel pipes, and the average value is taken; the typical value is 5100 m / s ± 50 m / s; the typical value for plastic pipes is 2300 m / s ± 100 m / s.

[0110] Calculate the theoretical propagation time difference between the fundamental frequency and the third harmonic in the pipe. The fundamental frequency wave velocity is taken as the measured sound speed, and the third harmonic wave velocity is calculated using an empirical formula: 1.05 times the sound speed for steel pipes and 1.12 times the sound speed for plastic pipes. The time difference Δt = pipe length × (1 / third harmonic wave velocity − 1 / fundamental frequency wave velocity). For example, for a 10-meter steel pipe, with a fundamental frequency wave velocity of 5100 m / s and a third harmonic wave velocity of 5355 m / s, then Δt = 10 × (1 / 5355 - 1 / 5100) = 9.3 microseconds.

[0111] The theoretical propagation time difference is multiplied by a safety factor to determine the preset threshold for the pipeline material. The safety factor is set based on the pipeline's service life: 1.2 times for new pipelines and 1.5 times for pipelines that have been in operation for more than 5 years. This factor is determined according to the pressure vessel safety standard GB / T 150.4. The calculation result is rounded to the nearest microsecond, e.g., 9.3 microseconds × 1.2 = 11.16 microseconds, which is rounded to 11 microseconds.

[0112] The threshold values ​​corresponding to different pipe materials are stored in non-volatile memory. The memory uses an FRAM chip (model FM24V10), with a 16-byte storage structure: the first 4 bytes are the material type code (e.g., 0x01 represents 304 stainless steel), the middle 8 bytes are the sound velocity measurement value, and the last 4 bytes are the calculated threshold. XOR verification is performed before writing, and backup sectors are enabled in case of errors. It supports storing up to 32 material parameters, accessible via a serial peripheral interface bus.

[0113] S5. Acquire three consecutive vibration cycle signals after phase adjustment, and calculate the zero-crossing time variance of the three consecutive vibration cycle signals. The implementation is as follows:

[0114] When sampling the signal output from the vibration accelerometer using a phase-adjusted local sampling clock, the 640 Hz sampling clock signal output from the phase-locked loop is connected to the external clock pin of the analog-to-digital converter (ADC). The ADC (model ADS8688) operates in continuous sampling mode with a sampling interval accurate to 1.5625 milliseconds (1 / 640 seconds). The vibration signal is conditioned by an instrumentation amplifier (100x gain) and then input to ADC channel 1. The input voltage range of ±5 volts corresponds to a full-scale vibration acceleration of ±10g. After each sampling starts, the conversion completion signal triggers the direct memory access controller, which transmits the 16-bit sampled value to the circular buffer (capacity 1024 points). During sampling, the signal amplitude is monitored in real time. When 10 consecutive sampling points exceed 90% of the range, the system automatically switches to the ±10 volt range.

[0115] Edge-triggered capture is performed on the sampled signal, recording the zero-crossing time of the rising edge in each of the three consecutive complete oscillation cycles. The signal processing unit extracts the latest 300 sampling points (covering three 50 Hz cycles) from the buffer and first performs a five-point moving average filter (coefficients [0.1, 0.2, 0.4, 0.2, 0.1]) to reduce high-frequency noise. Zero-crossing detection uses a dual-threshold comparison method: when the signal voltage crosses the -0.1 volt threshold from a negative value, a preparatory flag is set; subsequently, when it crosses the +0.1 volt threshold and the preparatory flag is valid, it is determined to be a valid rising edge. After detecting the rising edge, the zero-crossing time is accurately calculated through linear interpolation: taking two sampling points before and after crossing the zero point. and Midnight The zero-crossing times of the three cycles are stored in registers T1, T2, and T3 respectively, with a timestamp accuracy of 0.1 microseconds.

[0116] Calculate the time interval between the zero-crossing points of the first and second vibration cycles. Read the value of the second zero-crossing point from register T2 and subtract the value of the first zero-crossing point stored in register T1 to obtain the time interval. The calculation process considers 32-bit unsigned integer operations, with units in microseconds. To eliminate the influence of crystal oscillator drift, temperature compensation is applied to the original interval: the temperature sensor value is read, and adjusted by a compensation coefficient of +0.02 microseconds / ℃ (0.02 microseconds compensation for every 1 degree Celsius increase in temperature). The compensated result is stored in the intermediate variable storage area at address 0x2000. For example, if T1 = 10000.0 microseconds and T2 = 10020.5 microseconds, then... Microseconds.

[0117] Calculate the time interval between the zero-crossing points of the second and third oscillation cycles. Similarly, read the third zero-crossing point from register T3 and subtract the value from register T2 to obtain the time interval. Using the same temperature compensation process, the compensation coefficient is the same as... Consistent. The result is stored at address 0x2004. If the detected interval exceeds ±15% of the theoretical value of the fundamental frequency period (e.g., the 50 Hz period should be 20,000 microseconds, with an allowable range of 17,000-23,000 microseconds), the current data set is discarded and re-acquired.

[0118] Calculate the squared difference between two time intervals. Read from memory. and First calculate the difference Then, the square value Δδ² is calculated. The calculation process uses 32-bit fixed-point arithmetic: the difference is converted to Q15 format (1 sign bit + 15 decimal bits), and the squaring operation is implemented through a hardware multiplier (execution cycle of 2 clock cycles). To prevent overflow, the absolute value of the difference is forced to zero and the error flag is set when it exceeds 1000 microseconds. The calculation result is stored in address 0x2008. For example... microseconds If the value is in microseconds, then Δδ = 400 microseconds, and Δδ² = 160000 microseconds².

[0119] The zero-crossing time variance is obtained by dividing the squared difference by a fixed coefficient of two. The division is achieved by arithmetic right shift by one bit (equivalent to dividing by 2), and the result is stored as the final variance value in the output register (address 0x2010). The variance is measured in microseconds squared, ranging from 0 to 500,000 microseconds². A validity check is performed before outputting the result: if the three zero-crossing times do not increase sequentially, the variance value is forcibly set to its maximum value, triggering an error interrupt. For example, when Δδ² = 160,000 microseconds², the variance value = 160,000 >> 1 = 80,000 microseconds².

[0120] S6. If the zero-crossing time variance exceeds the crystal oscillator jitter limit, return to receive the clock calibration command sent from the cloud again; if it does not exceed the limit, use the phase-adjusted local sampling clock to perform compressed sensing sampling on the original flow meter signal, generate compressed measurement values, and transmit them to the cloud via the LPWAN network. The implementation is as follows:

[0121] When comparing the zero-crossing time variance with the crystal oscillator jitter upper limit input to the digital comparator, the variance value in microseconds squared is first read from the S5 output register. The crystal oscillator jitter upper limit is stored in the system parameter area of ​​non-volatile memory and is determined as follows: 1000 clock cycles are continuously sampled from the local temperature-compensated crystal oscillator, the actual duration of each cycle is measured, the standard deviation of the cycle duration is calculated, and this standard deviation is multiplied by a confidence coefficient of 3.0 to obtain the jitter upper limit value. The digital comparator uses a 32-bit parallel comparator (model SN74LS682). Port A is connected to the variance data bus, and port B is connected to the crystal oscillator jitter upper limit value. The comparison result is output to bit BIT2 of the status register: BIT2 is set to 1 when A > B, otherwise it is set to 0. The comparator response time is 80 nanoseconds, and the operating frequency is 50 MHz.

[0122] When the zero-crossing time variance exceeds the crystal oscillator jitter limit, the locally stored reference timestamp is cleared and the clock calibration instruction request flag is triggered. After setting status register BIT2 to 1, an interrupt service routine is triggered: it accesses the time association table created in step S2 in non-volatile memory, locates the corresponding record based on the currently active oscillation phase reference value identifier (generated by S1), and clears the reference timestamp field. The clock calibration instruction request flag is defined as control register BIT7 and is set to 1 via a write operation. The clearing operation performs an atomic transaction: first, the original record is backed up to a temporary buffer, then modified, the CRC32 checksum is calculated, and finally, the entire page is written to memory. For example, the reference timestamp corresponding to identifier 0x8A3D is cleared.

[0123] When the clock calibration command request flag is detected to be valid, the system re-receives the clock calibration command sent from the cloud via the LPWAN network. The system's main loop polls the control register BIT7 status every 100 milliseconds. When BIT7=1, the system calls the command request function of the LPWAN communication protocol stack: constructs a 0x0151 type request frame (frame format compatible with S2 receive frames), containing the current vibration phase reference value identifier; sends it to the gateway via the LoRa wireless module; and starts a 5-second response timeout timer. If no response is received within the timeout period, the request is retransmitted every 30 seconds, with a maximum of 3 retries.

[0124] If the zero-crossing time variance is less than or equal to the crystal oscillator jitter limit, the phase-adjusted local sampling clock is used to sample the original flowmeter signal at equal intervals. This process is initiated when the status register BIT2=0: the 640Hz sampling clock output from the phase-locked loop is connected to the clock input of the flowmeter pulse counting module. The original signal is a square wave pulse (one pulse per liter of fluid), shaped by a Schmitt trigger and then input to a counter (model CD4040). Within each sampling interval of 1.5625 milliseconds, the counter accumulates the number of pulses and stores it in the result register. Sampling lasts for 256 intervals (400 milliseconds), forming the original signal vector stored in the buffer address 0x3000-0x30FF. Noise suppression is enabled during the sampling process: interference signals with a pulse width less than 10 microseconds are filtered out.

[0125] The sampled signal is modulated with a pseudo-random sequence to generate compressed measurement values. The pseudo-random sequence is generated by an 8th-order linear feedback shift register (the polynomial is the highest-order term raised to the 8th power, including 4th, 3rd, 2nd powers, and a constant term), with the initial seed being the device serial number. The modulation process performs matrix multiplication: the 256-dimensional original signal vector is multiplied by a 32×256 measurement matrix. Matrix elements are determined by their sequence bit values: bit 1 corresponds to +0.5, and bit 0 corresponds to -0.5. The multiplication and accumulation are performed by a hardware multiplier-accumulator, outputting a 32-dimensional compressed vector after 32 iterations.

[0126] The compressed measurement values ​​are encapsulated into data packets via a secure transport layer protocol (SSL) encrypted connection and transmitted to the cloud server over the LPWAN network. The TLS connection established via S2 is reused: the session key is obtained from the security chip, and the compression vector is divided into four 8-byte blocks. Encryption uses AES-128-GCM mode, with an additional 8-byte authentication tag. The data packet structure is: 2-byte frame header (0xAA55) + 4-byte sequence number + 32-byte ciphertext + 8-byte authentication tag + 4-byte CRC. After encapsulation, the data packet is LoRa modulated, with a spreading factor of 10, a bandwidth of 125 kHz, and a center frequency of 868.15 MHz. The transmission power is 17 dBmW, and the air transmission time is approximately 800 milliseconds.

[0127] Example 2: Figure 2 A schematic diagram of the IoT flow meter data compression sensing transmission optimization system of the present invention is provided. The IoT flow meter data compression sensing transmission optimization system includes the following modules:

[0128] The fundamental frequency extraction module is used to acquire the vibration signal output by the pipeline vibration acceleration sensor and extract the fundamental frequency component of the vibration signal as the vibration phase reference value.

[0129] The clock command module is used to receive clock calibration commands sent from the cloud via the LPWAN network. The clock calibration commands include a reference timestamp synchronized with the vibration phase reference value.

[0130] The harmonic time difference module is used to align vibration signals according to a reference timestamp, separate the fundamental frequency component and the third harmonic component, and calculate the arrival time difference between the fundamental frequency component and the third harmonic component.

[0131] The phase-locked loop control module is used to generate a phase-locked loop start command when the arrival time difference exceeds the preset pipe material threshold, and start the phase-locked loop circuit to adjust the phase offset of the local sampling clock.

[0132] The variance calculation module is used to acquire three consecutive vibration cycle signals after phase adjustment and calculate the zero-crossing time variance of the three consecutive vibration cycle signals.

[0133] The compressed transmission module is used to return to receive the clock calibration command sent from the cloud again if the zero-crossing time variance exceeds the crystal oscillator jitter limit; if it does not exceed the limit, it uses the phase-adjusted local sampling clock to perform compressed sensing sampling on the original signal of the flow meter, generates compressed measurement values, and transmits them to the cloud through the LPWAN network.

[0134] All calculations involved in the embodiments are dimensionless numerical calculations, and the preset parameters and thresholds in the calculations are set by those skilled in the art according to the actual situation.

[0135] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, in the form of a computer program product.

[0136] Those skilled in the art will recognize that the modules and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and inventive constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0137] In addition, the functional modules in the various embodiments of this application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module.

[0138] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or modules may be electrical, mechanical, or other forms.

[0139] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0140] In conclusion, the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for optimizing data compression, sensing, and transmission of IoT flow meters, characterized in that: Includes the following steps: S1. Obtain the vibration signal output by the pipeline vibration acceleration sensor, and extract the fundamental frequency component of the vibration signal as the vibration phase reference value; S2. Receive clock calibration instructions from the cloud via the LPWAN network. The clock calibration instructions include a reference timestamp synchronized with the vibration phase reference value. S3. Align the vibration signal according to the reference timestamp, separate the fundamental frequency component and the third harmonic component, and calculate the arrival time difference between the fundamental frequency component and the third harmonic component. S4. When the arrival time difference exceeds the preset pipe material threshold, a phase-locked loop start command is generated to start the phase-locked loop circuit and adjust the phase offset of the local sampling clock. S5. Acquire three consecutive vibration cycle signals after phase adjustment, and calculate the zero-crossing time variance of the three consecutive vibration cycle signals. S6. If the zero-crossing time variance exceeds the crystal oscillator jitter limit, return to receive the clock calibration command sent from the cloud again; if it does not exceed the limit, use the phase-adjusted local sampling clock to perform compressed sensing sampling on the original signal of the flow meter, generate compressed measurement values, and transmit them to the cloud through the LPWAN network.

2. The IoT flow meter data compression sensing transmission optimization method according to claim 1, characterized in that, The vibration signal output from the pipeline vibration acceleration sensor is acquired, and the fundamental frequency component of the vibration signal is extracted as the vibration phase reference value, including: The vibration signal output by the pipeline vibration acceleration sensor is bandpass filtered, and the filtering range covers the expected frequency range of the fundamental frequency component. The filtered vibration signal is truncated to an integer period, with the truncated length being an integer multiple of the period of the fundamental frequency component of the vibration signal; Perform a fast Fourier transform on the intercepted vibration signal segment and extract the frequency component with the largest amplitude in the spectrum as the fundamental frequency component. The time-domain waveform of the fundamental frequency component is reconstructed using zero-phase filtering technology, and the zero-crossing point is used as the reference point for the vibration phase.

3. The IoT flow meter data compression sensing transmission optimization method according to claim 2, characterized in that, The time-domain waveform of the fundamental frequency component reconstructed using zero-phase filtering techniques includes: The extracted fundamental frequency component spectrum is subjected to inverse fast Fourier transform to generate the initial time-domain signal; The initial time-domain signal is input into a bidirectional digital filter for forward and reverse filtering. The combined bidirectional filtered output signals yield the fundamental frequency component time-domain waveform with zero phase distortion.

4. The IoT flow meter data compression sensing transmission optimization method according to claim 1, characterized in that, Receive clock calibration commands from the cloud via the LPWAN network, including: Establish a secure transport layer protocol encrypted connection with the cloud server; Encrypted data packets are received through the LPWAN network, and cyclic redundancy check is performed on the encrypted data packets to verify data integrity. When the cyclic redundancy check passes, the data packet payload is decrypted using the preset decryption key; Extract the clock calibration instruction field from the decrypted data packet payload; Parse the reference timestamp value and the corresponding vibration phase reference value identifier contained in the clock calibration instruction field; A time-related mapping is established between the parsed baseline timestamp values ​​and the locally stored vibration phase reference values.

5. The IoT flow meter data compression sensing transmission optimization method according to claim 1, characterized in that, Align the vibration signal based on the reference timestamp, separate the fundamental frequency component and the third harmonic component, and calculate the arrival time difference between the fundamental frequency component and the third harmonic component, including: The time alignment start point of the vibration signal is determined based on the reference timestamp; The time-aligned vibration signal is subjected to dual-channel finite impulse response filtering. The center frequency of the first channel filter is within the range of the fundamental frequency component, and the center frequency of the second channel filter is within the range of the third harmonic component. The zero-crossing times of the output signals of the two filter channels are detected respectively; Mark the first zero-crossing moment of the fundamental frequency component channel as the fundamental frequency arrival time; Mark the first zero-crossing moment of the third harmonic component channel as the arrival time of the third harmonic; The time difference between the arrival time of the third harmonic and the arrival time of the fundamental frequency is calculated as the arrival time difference.

6. The IoT flow meter data compression sensing transmission optimization method according to claim 1, characterized in that, When the arrival time difference exceeds a preset pipe material threshold, a phase-locked loop (PLL) start command is generated, activating the PLL circuit to adjust the phase offset of the local sampling clock, including: The arrival time difference is compared with the preset pipe material threshold input voltage comparator. When the arrival time difference is greater than the preset pipe material threshold, the voltage comparator outputs a high-level signal as a phase-locked loop start command. Connect the phase-locked loop start command to the enable pin of the phase-locked loop circuit; The phase difference between the local sampling clock and the reference clock is compared using a phase detector in a phase-locked loop circuit. An error voltage signal is generated based on the phase difference and input to the voltage-controlled oscillator; Adjust the output frequency of the voltage-controlled oscillator to change the phase offset of the local sampling clock.

7. The IoT flow meter data compression sensing transmission optimization method according to claim 6, characterized in that, The preset pipe material threshold is determined through the following steps: Measure the propagation speed of ultrasonic waves in the target pipe material; Calculate the theoretical propagation time difference between the fundamental frequency and the third harmonic in the pipe; Multiply the theoretical propagation time difference by a safety factor to obtain the preset pipeline material threshold. Store the threshold values ​​corresponding to different pipe materials in non-volatile memory.

8. The IoT flow meter data compression sensing transmission optimization method according to claim 1, characterized in that, Acquire three consecutive vibration cycle signals after phase adjustment, and calculate the zero-crossing time variance of the three consecutive vibration cycle signals, including: The signal output by the vibration acceleration sensor is sampled at equal intervals using a phase-adjusted local sampling clock. Edge-triggered capture is performed on the sampled signal to record the zero-crossing time of the rising edge in each of the three consecutive complete vibration cycles; Calculate the time interval between the zero-crossing point of the first vibration cycle and the zero-crossing point of the second vibration cycle; Calculate the time interval between the zero-crossing point of the second vibration cycle and the zero-crossing point of the third vibration cycle; Calculate the square of the difference between two time intervals; Dividing the squared difference by a fixed coefficient of two yields the zero-crossing time variance.

9. The IoT flow meter data compression sensing transmission optimization method according to claim 1, characterized in that, If the zero-point time variance exceeds the crystal oscillator jitter limit, then return to receive the clock calibration command sent from the cloud again; If the threshold is not exceeded, the phase-adjusted local sampling clock is used to perform compressed sensing sampling on the original flow meter signal, generating compressed measurement values ​​and transmitting them to the cloud via the LPWAN network, including: The zero-crossing time variance and the upper limit of crystal oscillator jitter are input into a digital comparator for comparison. When the zero-crossing time variance exceeds the crystal oscillator jitter limit, clear the locally stored reference timestamp and trigger the clock calibration command request flag. When the clock calibration command request flag is detected to be valid, the clock calibration command sent from the cloud is received again through the LPWAN network. If the zero-crossing time variance is less than or equal to the crystal oscillator jitter limit, then the phase-adjusted local sampling clock is used to sample the original signal of the flow meter at equal intervals. Pseudo-random sequence modulation is applied to the sampled signal to generate compressed measurement values; The compressed measurement values ​​are encapsulated into data packets via a secure transport layer protocol and transmitted to the cloud server through the LPWAN network.

10. An IoT flow meter data compression sensing transmission optimization system, used to implement the IoT flow meter data compression sensing transmission optimization method according to any one of claims 1-9, characterized in that, Includes the following modules: The fundamental frequency extraction module is used to acquire the vibration signal output by the pipeline vibration acceleration sensor and extract the fundamental frequency component of the vibration signal as the vibration phase reference value. The clock command module is used to receive clock calibration commands sent from the cloud via the LPWAN network. The clock calibration commands include a reference timestamp synchronized with the vibration phase reference value. The harmonic time difference module is used to align vibration signals according to a reference timestamp, separate the fundamental frequency component and the third harmonic component, and calculate the arrival time difference between the fundamental frequency component and the third harmonic component. The phase-locked loop control module is used to generate a phase-locked loop start command when the arrival time difference exceeds the preset pipe material threshold, and start the phase-locked loop circuit to adjust the phase offset of the local sampling clock. The variance calculation module is used to acquire three consecutive vibration cycle signals after phase adjustment and calculate the zero-crossing time variance of the three consecutive vibration cycle signals. The compressed transmission module is used to return to receive the clock calibration command sent from the cloud again if the zero-crossing time variance exceeds the crystal oscillator jitter limit; if it does not exceed the limit, it uses the phase-adjusted local sampling clock to perform compressed sensing sampling on the original signal of the flow meter, generates compressed measurement values, and transmits them to the cloud through the LPWAN network.

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