Semiconductor device, manufacturing method, and electrical system

Abstract

The invention relates to a semiconductor device, a preparation method and an electrical system. Disclosed is a semiconductor device comprising: a semiconductor substrate comprising at least one power semiconductor device; the insulating diaphragm is arranged on the semiconductor substrate and is provided with at least one first opening penetrating through the insulating diaphragm, and the at least one first opening enables the corresponding first part of the semiconductor substrate to be exposed; at least one electrically conductive attachment member filled in a corresponding one of the at least one first opening; and a metal diaphragm disposed on the insulating diaphragm and the at least one attachment member, where the at least one attachment member joins and electrically connects a respective portion of the metal diaphragm with a respective first portion of the semiconductor substrate.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a semiconductor device, a method of manufacturing the same, and an electrical system including the semiconductor device. BACKGROUND

[0002] Die Top System (DTS) is gaining increasing attention. DTS provides a thick metal drape (e.g., copper drape) on top of a die to improve the strength of the top surface of the die to enable a thick interconnect solution.

[0003] The inventors of the present application have found that related products and processes have some drawbacks, such as high production cost, complex process, high requirement on storage condition, inherent defects of materials, and low device yield (e.g., low UPH).

[0004] Prior art DTS technology is a die level solution. In a typical prior art DTS solution, a sintering paste is first applied on a mounting substrate (e.g., copper clad substrate) and pre-dried. A die is then picked up and placed on the mounting substrate in a proper position such that the sintering paste is between the two. A sintering process is then performed to bond the die and the mounting substrate with the sintering paste. In addition, a pre-sintering paste is pre-applied on the surface of a pre-made half-cut copper drape opposite to the die (the die is the chip). This pre-application process requires a solid tacking agent to help the sintering paste maintain shape during processing, or to provide temporary adhesion before the final formation of the attachment material formed from the sintering paste. Pre-drying of the sintering paste and thermal activation of the tacking agent (to activate the tacking agent in the sintering paste) are then performed. A copper drape unit is then picked up from the half-cut copper drape and placed on the side of the die opposite to the mounting substrate. A press sintering is then performed to bond the copper drape to the die. Wires or ribbons can then be bonded to the copper drape and molded.

[0005] In the prior art DTS solution, two sintering steps and two pick and place steps are required, and a tacking agent and activation of the tacking agent are required. This makes the process complex and the yield low.

[0006] On the other hand, the pre-applied sintering paste is unstable, and particles of the pre-dried paste can fall off during the pick and place process. In addition, during the sintering process, the tacking agent vaporizes and disappears, leaving large voids. If a liquid tacking agent is used, it can further reduce the UPH. Furthermore, the device thus prepared is sensitive to temperature, humidity, and vacuum, and thus has a high requirement on storage condition. In addition, the thickness of the metal drape used in the prior art DTS solution is fixed, limiting the flexibility of design.

[0007] Accordingly, there is a need in the art for improved semiconductor devices and methods of making the same. SUMMARY

[0008] The present invention disclosed herein is directed to addressing at least one of the problems noted above.

[0009] According to one aspect of the present disclosure, a semiconductor device is provided, comprising: a semiconductor substrate including at least one power semiconductor device; an insulating film sheet on the semiconductor substrate having at least one first opening through the insulating film sheet, the at least one first opening exposing a corresponding first portion of the semiconductor substrate; at least one attachment component that is electrically conductive, filled in a corresponding one of the at least one first opening; and a metal film sheet disposed on the insulating film sheet and the at least one attachment component, wherein the at least one attachment component joins and electrically connects a corresponding portion of the metal film sheet with the corresponding first portion of the semiconductor substrate.

[0010] In some embodiments, the insulating film sheet further includes at least one second opening exposing a corresponding second portion of the semiconductor substrate, the metal film sheet not overlapping the at least one second opening.

[0011] In some embodiments, the at least one first opening exposes at least a portion of a corresponding current terminal of a corresponding semiconductor device, the at least one second opening exposes at least a portion of a control terminal of the corresponding semiconductor device.

[0012] In some embodiments, the semiconductor substrate includes a wafer, the at least one power semiconductor device includes a plurality of power semiconductor devices arranged in an array, the insulating film sheet includes a plurality of first openings respectively exposing a metallization layer of a corresponding one of the plurality of power semiconductor devices.

[0013] In some embodiments, the semiconductor substrate includes a die separated from a wafer, wherein the insulating film sheet and the metal film sheet are substantially absent from a lateral side of the semiconductor substrate, and wherein at least one side of the insulating film sheet, a corresponding side of the metal film sheet, and a corresponding side of the semiconductor substrate are substantially flush.

[0014] In some embodiments, the insulating film sheet is formed of an organic material, and wherein the metal film sheet includes one or more layers of a metallic material.

[0015] In some embodiments, the attachment component is obtained from a joining process of an applied attachment material, the joining process including at least one of: sintering, firing, annealing, transient liquid phase soldering, and curing.

[0016] In some embodiments, the attachment material comprises one of: a sintering paste, a pre-sintering sheet, a solder, a transient liquid phase soldering material, and a conductive adhesive.

[0017] In some embodiments, the semiconductor devices are power MOS transistors, the at least one first opening exposes at least a portion of a respective source or drain terminal of a respective semiconductor device, and the at least one second opening exposes at least a portion of a gate terminal of the respective semiconductor device.

[0018] In some embodiments, the semiconductor device further comprises: at least one first wire coupled to a respective current terminal of the respective semiconductor device; and at least one second wire coupled to a respective control terminal of the respective semiconductor device.

[0019] In some embodiments, the semiconductor device further comprises: a mounting substrate comprising a die attachment portion and a lead, wherein the semiconductor substrate is attached to the die attachment portion, the at least one first wire is coupled to the lead, and the at least one first wire comprises a copper wire.

[0020] According to an aspect of the present disclosure, there is also provided an electrical system comprising the semiconductor device according to any embodiment.

[0021] According to another aspect of the present disclosure, there is also provided a method of manufacturing a semiconductor device, comprising: providing an attachment structure comprising: an insulating film sheet having at least one first opening passing through the insulating film sheet, a metal film sheet attached to the insulating film sheet, the metal film sheet comprising a portion overlapping the at least one first opening of the insulating film sheet, and an attachment material filled in a respective first opening of the at least one first opening and in contact with the metal film sheet, the attachment material comprising an electrically conductive material; attaching the attachment structure to a semiconductor wafer comprising at least one semiconductor device, such that the insulating film sheet is in contact with the semiconductor wafer, the at least one first opening is aligned with a respective first portion of the semiconductor substrate, and the attachment material is in contact with the respective first portion of the semiconductor substrate; and performing a bonding process to cause the attachment material to form an attachment member to bond and electrically connect a respective portion of the metal film sheet with the respective first portion of the semiconductor substrate through the attachment member.

[0022] In some embodiments, providing the attachment structure includes attaching the metal film to a first surface of the insulating film, and filling the at least one first opening of the insulating film from a second surface of the insulating film opposite the first surface with an attachment material, the attachment material filling the at least one first opening being in contact with the metal film.

[0023] In some embodiments, the method further includes, after the joining process, singulating the semiconductor device.

[0024] In some embodiments, the insulating film further includes at least one second opening exposing a respective second portion of the semiconductor substrate, the metal film not overlapping the at least one second opening.

[0025] In some embodiments, the insulating film and the metal film are substantially absent from lateral sides of the semiconductor substrate of the semiconductor device, and wherein at least one side of a portion of the insulating film, a respective side of a portion of the metal film, and a respective side of the semiconductor substrate included in the singulated semiconductor device are substantially flush.

[0026] In some embodiments, the at least one semiconductor device includes a power semiconductor device, the at least one first opening exposes at least a portion of a respective current terminal of the respective semiconductor device, and the at least one second opening exposes at least a portion of a control terminal of the respective semiconductor device.

[0027] In some embodiments, the insulating film is formed of an organic material, and wherein the metal film includes one or more layers of a metallic material.

[0028] In some embodiments, the joining process includes at least one of: sintering, firing, annealing, transient liquid phase soldering, and or curing.

[0029] In some embodiments, the attachment material includes one of: a sintering paste, a pre-sintering sheet, a solder, a transient liquid phase soldering material, and a conductive adhesive.

[0030] In some embodiments, the method further includes picking up the singulated semiconductor device and placing it to a mounting substrate, attaching the singulated semiconductor device to the mounting substrate, bonding at least one first wire to a respective current terminal of the respective semiconductor device, and bonding at least one second wire to a respective control terminal of the respective semiconductor device.

[0031] According to aspects and embodiments of the present disclosure, the processability and UPH of the device are improved. Harsh storage conditions are also no longer required, greatly reducing the cost of delivery. Furthermore, according to aspects and embodiments of the present disclosure, the use of solid tacky agents is not required, greatly reducing or avoiding the defects that arise therefrom, improving the reliability and service life of the device.

[0032] Other features of the present disclosure, which are evident from the above description, and its advantages will become apparent from the following detailed description of exemplary embodiments of the present disclosure, with reference made to the drawings. BRIEF DESCRIPTION OF DRAWINGS

[0033] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0034] The present disclosure can be more clearly understood with reference to the following detailed description when considered in conjunction with the following drawings, in which:

[0035] Figure 1 A schematic top view of a device according to some embodiments of the present disclosure is shown;

[0036] Figure 2 A schematic cross-sectional view of the device shown is shown; Figure 1

[0037] Figure 3A A schematic top view of an insulation sheet of a device according to some embodiments of the present disclosure is shown;

[0038] Figure 3B A schematic top view of a portion of a device according to some embodiments of the present disclosure is shown;

[0039] Figure 3C A schematic top view of a portion of a device according to some embodiments of the present disclosure is shown;

[0040] Figure 3D A schematic top view of a portion of a device according to some embodiments of the present disclosure is shown;

[0041] Figure 4 A schematic perspective view of a device during manufacture according to some embodiments of the present disclosure is shown;

[0042] Figure 5A A schematic top view of an insulation sheet according to some embodiments of the present disclosure is shown, Figure 5B An enlarged view of a portion of the insulation sheet is shown;

[0043] Figure 6 A schematic top view of an insulation sheet according to some embodiments of the present disclosure is shown;

[0044] Figure 7A and 7B ​Schematic cross-sectional views of insulating films according to other embodiments of the present disclosure are shown respectively;

[0045] Figure 8 A schematic top view of a metal diaphragm according to some embodiments of the present disclosure is shown;

[0046] Figure 9 A schematic top view is shown after a metal diaphragm according to some embodiments of the present disclosure has been attached to an insulating diaphragm;

[0047] Figure 10 A schematic top view is shown of the side of the insulating film away from the metal film after a metal diaphragm has been attached to an insulating film according to some embodiments of the present disclosure.

[0048] Figure 11A A schematic top view is shown of the side of the insulating film away from the metal film after a metal diaphragm has been attached to an insulating film according to some embodiments of the present disclosure.

[0049] Figure 11B A schematic top view is shown of the insulating film from the side of the insulating film away from the metal film after a metal diaphragm has been attached to an insulating film according to some other embodiments of the present disclosure.

[0050] Figure 12 A schematic top view is shown of an attachment structure, including a metal diaphragm and an insulating diaphragm attached thereto, according to some embodiments of the present disclosure, being attached to a wafer.

[0051] Figure 13 A schematic flowchart illustrating a method for preparing an apparatus according to some embodiments of the present disclosure is shown;

[0052] Figure 14 Schematic perspective views of apparatuses according to some embodiments of the present disclosure and comparative examples of apparatuses are shown; and

[0053] Figure 15 A schematic cross-sectional view of an apparatus according to some embodiments of the present disclosure is shown.

[0054] Note that in the embodiments described below, the same reference numerals are sometimes used across different figures to denote the same parts or parts having the same function, and repeated descriptions are omitted. In this specification, similar reference numerals and letters are used to denote similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0055] For ease of understanding, the positions, dimensions, and extents of the structures shown in the accompanying drawings and other references may not represent actual positions, dimensions, and extents. Therefore, the disclosed invention is not limited to the positions, dimensions, and extents disclosed in the accompanying drawings and other references. Detailed Implementation

[0056] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the present disclosure. Furthermore, techniques, methods, and apparatus known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and apparatus should be considered part of the specification.

[0057] It should be understood that the following description of at least one exemplary embodiment is merely illustrative and not intended to limit the scope of this disclosure or its application or use. It should also be understood that any implementation described herein does not necessarily represent a preferred or advantageous implementation over others. This disclosure is not limited to any expressed or implied theory given in the foregoing description of the technical field, background, summary of the invention, or detailed description.

[0058] Additionally, certain terms may be used in the following description for reference only, and are therefore not intended to be limiting. For example, unless the context clearly indicates otherwise, the words “first,” “second,” and other such numerical terms relating to structures or elements do not imply order or sequence.

[0059] It should also be understood that when the term “including / contains” is used herein, it indicates the presence of the indicated feature, whole, step, operation, unit and / or component, but does not preclude the presence or addition of one or more other features, wholes, steps, operations, units and / or components and / or combinations thereof.

[0060] Figure 1 A schematic top view of an apparatus according to some embodiments of the present disclosure is shown; Figure 2 It shows along Figure 1 A schematic cross-sectional view of line A-A' of the device shown. Figure 1 and 2 As shown, the semiconductor device 20 includes a semiconductor substrate 101 and an attachment structure 200 on the semiconductor substrate 101. As shown, the attachment structure 200 may include an insulating film 211, an attachment member 221, and a metal film 231.

[0061] Semiconductor substrate 101 may include at least one power semiconductor device (not shown). Conductive structures for external electrical connection may be formed on or on the semiconductor substrate, such as a metallization layer, which may be the uppermost metallization layer of the semiconductor substrate, and may include one or more portions 103 and 105, each of which may serve as a terminal (including a pad or electrode) for the power semiconductor device. Although the surfaces of substrate 101 are shown to be substantially in the same plane in the figures, with metallization portions 103 and 105 embedded in an insulating film (e.g., a passivation film) 111, it should be understood that this disclosure is not limited thereto.

[0062] An insulating film 211 is disposed on the semiconductor substrate 101. Preferably, the insulating film 211 is formed of an organic material (e.g., but not limited to, polyetherimide (PEI) or polyimide (PI)). Figure 3A A schematic top view of an insulating diaphragm according to some embodiments of the present disclosure is shown. The insulating diaphragm 211 has at least one first opening penetrating the insulating diaphragm (two openings 217, 219 are shown in the figure). Figure 1 Openings 217 and 219 are schematically shown in dashed boxes. In some embodiments, the thickness of the insulating film can range from 20 micrometers to 150 micrometers, for example, 20, 50, 100, 150.

[0063] The at least one first opening 217, 219 exposes a corresponding first portion of the semiconductor substrate (e.g., see...). Figure 3C In some embodiments, the power semiconductor device may be a power metal-oxide-semiconductor (MOS) field-effect transistor (FET), and openings 217, 219 may, for example, allow the current terminal (e.g., source terminal) 105 of the power MOS FET to be positioned such that... Figure 2 The power MOSFET is used as an example here, but it should be understood that this disclosure is not limited to this and can be applied to a wide variety of power devices. Furthermore, although the term terminal is used herein, it should be understood that it may include, or can be, or can be replaced by: terminals, pads, metallization layers, etc.

[0064] like Figure 2As shown, the electrically conductive attachment component 221 is filled in a respective one of the at least one first opening (here, 217). A metal film 231 (may also be referred to as a metal foil) is disposed on the insulating film 211 and the at least one attachment component 221. In some embodiments, preferably, the metal film completely covers the at least one attachment component 221 to provide a reliable electrical and physical connection. The attachment component 221 engages (and thereby electrically connects) a respective portion of the metal film 231 with a respective first portion of the semiconductor substrate 101. The metal film can include one or more layers of a metal or metal alloy material. In some embodiments, the metal film can include, for example but not limited to, copper (Cu), silver (Ag), gold (Au), aluminum (Al), an alloy including one or more of the above materials, or any other suitable metal material, etc. In some embodiments, the metal film can also include an additional cladding layer, which can include, for example but not limited to, one or more of the following materials: silver, gold, nickel (Ni), an alloy including one or more of the above materials (e.g., Ni-Ag, Ni-Pd-Au, or Ni-Au), or any other suitable metal material, etc. In some embodiments, the thickness of the metal film can range, for example, from 35 microns to 250 microns, such as 35 microns, 50 microns, 100 microns, 150 microns, 200 microns, or 250 microns.

[0065] In some embodiments, the attachment component is obtained by processing an attachment material. As an example, the attachment material can include solder, sintering paste (e.g., silver sintering paste), pre-formed sintering sheet, or conductive adhesive (e.g., silver adhesive), etc.

[0066] For example, for sintering paste, after it is filled into the opening in the insulating film, it can also need to be subjected to a pre-heating (pre-drying) process; and then after the attachment structure containing the pre-heated (pre-dried) sintering paste is attached to the substrate, a sintering, soldering or curing process, etc. is performed to engage the metal film 231 with the substrate (more precisely, with the metal layer (terminal) on the substrate).

[0067] For example, for pre-formed sintering sheet, after the attachment structure containing the sintering sheet is attached to the substrate, a sintering process can be directly performed to achieve the engagement of the metal film 231 with the substrate.

[0068] A transient liquid phase solder material (e.g., gold (Au)-tin (Sn) alloy or an alloy including one or more of nickel (Ni), tin (Sn) and copper (Cu), which can be in sheet or paste form) can also be used as the attachment material to achieve the engagement of the metal film 231 with the substrate through a transient liquid phase soldering process.

[0069] For example, for solder, the attachment structure is attached to the substrate after the solder is dispensed into the opening in the insulating film; reflow soldering can then be performed to achieve the bonding of the metal film 231 to the substrate. For example, for conductive adhesive, the attachment structure is attached to the substrate after the conductive adhesive is dispensed into the opening in the insulating film; a heating or curing process can then be performed to achieve the bonding of the metal film 231 to the substrate.

[0070] Preferably, the insulating film 211 is configured to provide some degree of adhesion by itself to secure the bonding of the substrate and the metal film, in the case where the attachment component is not formed or when the material used to form the attachment component needs further processing to provide a secure bonding. For example, for the insulating film, a material with some degree of adhesion by itself or after processing can be selected. In some embodiments, the insulating film 211 can be formed of an organic material such as polyetherimide (PEI) or polyimide (PI); however, the present disclosure is not limited thereto. The insulating film can be heat treated to be in a semi-cured state, for example, so that it has some degree of adhesion while maintaining its basic shape. The metal film can be attached (or laminated) to the insulating film while the insulating film is in a semi-solid state. Similarly, the attachment structure can be laminated to the substrate (with the insulating film in contact with the substrate) while the insulating film is in a semi-solid state. It should be understood that the above examples are merely illustrative and not limiting. For example, in other embodiments, an adhesive or adhesion aid can be applied to one or both sides of the insulating film to enhance its adhesion. In some embodiments, temporary adhesion or positioning support can be provided by adsorption of a smooth surface, or by hydrogen or dangling bonds between surfaces, or by external holding means. Thus, the material forming the insulating film is not particularly limited as long as it can withstand the temperature during the process and provide some degree of adhesion.

[0071] In some embodiments, the insulating film 211 further includes at least one second through-opening 215, as shown in Figure 1 and 2 For example, the second opening 215 can expose a corresponding second portion of the semiconductor substrate. For example, the second opening 215 can expose a control terminal (e.g., a gate terminal) 103 of the power MOSFET. As shown in the figure, the metal film 231 is configured not to overlap the second opening 215. In Figure 1 , the opening 215 also exposes other terminals 241 and an insulating layer 111 (e.g., a passivation layer) on the upper portion of the substrate.

[0072] In Figure 1 and 2In the illustrated example, the semiconductor substrate is a die separated (e.g., by dicing) from a wafer. In this case, the material of the insulating film and the material of the metal film are substantially absent from the lateral sides of the semiconductor substrate. At least one side of the insulating film, the corresponding side of the metal film, and the corresponding side of the semiconductor substrate are substantially flush.

[0073] Figure 3B A schematic top view of a substrate portion of a device according to some embodiments of the present disclosure is shown. As Figure 3B illustrated, the substrate 101 includes an insulating layer 111 (e.g., a passivation layer formed of silicon dioxide or other insulating material) at its upper portion. The insulating layer 111 has openings respectively exposing the terminals. Here, a MOSFET is taken as an example, the gate terminal 103, the source terminal (or drain terminal) 105 and 107 are shown. Also shown is one or more auxiliary terminal(s) 241, which may, for example, provide a connection to a back gate or a drift region, etc. In some embodiments, the gate terminal 103 can include a trench gate structure 109, as Figure 3B schematically shown. It is to be understood here that the trench gate structure 109 can also be covered by the passivation layer 111, depending on different implementations.

[0074] Figure 3C A schematic top view of a portion of a device according to some embodiments of the present disclosure is shown. Here, Figure 3A the insulating film 211 is disposed on Figure 3B the substrate as shown; or in other words, Figure 1 the metal film 231 and the attachment component 221 in 2 are removed. The openings 215, 217 and 219 in the insulating film 211 expose the corresponding portions on the substrate, including the corresponding terminals.

[0075] Figure 3D A schematic top view of a portion of a device according to some embodiments of the present disclosure is shown. Here, on the basis of Figure 3C the attachment component or attachment material 221 is formed in the first openings 217 and 219 in the insulating film 211; or in other words, Figure 1 the metal film 231 in the device in 2 is removed.

[0076] Figure 4 A schematic perspective view in a wafer-level preparation process of a device according to some embodiments of the present disclosure is shown. As Figure 4 illustrated, a wafer 403 is loaded on a wafer stage (e.g., a carrier ring) 401. The wafer 403 includes an insulating film 501 and a metal film (e.g., a copper foil) attached to the insulating film 501, and an attachment material 403 filled in the openings (attachment areas) 503 in the insulating film 501. Figure 4An attachment structure (not shown) of the wafer 403 is attached (bonded) to the wafer 403. The wafer 403 can include a plurality of power semiconductor devices arranged in an array.

[0077] Figure 5A A schematic top view of an insulating film sheet is shown, according to some embodiments of the present disclosure, Figure 5B An enlarged view of a portion of the insulating film sheet is shown. As Figure 5A shown, the insulating film sheet 501 includes a plurality of cells 505. The cells 505 can be, for example, as Figure 1-3A shown, insulating film sheets 211, respectively, corresponding to one of the plurality of power semiconductor devices. The aforementioned insulating film sheets 211 for the dies can be formed by cutting (to be explained later) the insulating film sheet 501. Figure 5B An enlarged view of a portion of the insulating film sheet 501 is shown. The terminals (e.g., metal layers) of the semiconductor devices in the corresponding semiconductor substrates can be exposed through the openings 215, 217, and 219 in the cells 505 of the insulating film sheet.

[0078] Figure 6 A schematic top view of an insulating film sheet is shown, according to some embodiments of the present disclosure. Figure 7A and 7B Schematic cross-sectional views of insulating film sheets are shown, respectively, according to other embodiments of the present disclosure. In this example, additional cover films 507 and 509 are provided on the upper and lower surfaces of the insulating film sheet 501. In some embodiments, the cover films 507 and 509 can be formed of a different material than the insulating film sheet 501 and configured to be easily removed or peeled off from the insulating film sheet 501, as Figure 7B shown.

[0079] Figure 8 A schematic top view of a metal film sheet is shown, according to some embodiments of the present disclosure. In some embodiments, the metal film sheet 601 can be formed of copper, for example, integrally formed of copper. The metal film sheet 601 can include a frame 801 of a peripheral portion and a spanning structure 803 corresponding to the array of power devices (and the corresponding cells of the insulating film sheet 501).

[0080] Figure 9 A schematic top view is shown after the metal film sheet is attached to the insulating film sheet, according to some embodiments of the present disclosure. In some embodiments, the cover film 507 on one side of the insulating film sheet 501 can be removed (as Figure 7B shown), and the metal film sheet 601 is attached to that side of the insulating film sheet 501, as Figure 9 shown. In some embodiments, the metal film sheet can be bonded to the insulating film 501, for example, by a pick-and-place device.

[0081] Here, the metal membrane 601 covers or overlaps a corresponding row of cells 505 of the insulating membrane 501 across the structure 803, and does not overlap the openings 215 of the row of cells, i.e. such that the openings 215 of the row of cells are exposed. Figure 10 A schematic top view is shown from the side of the insulating membrane 501 distal to the metal membrane 601 after the metal membrane is attached to the insulating membrane, i.e. the side of the insulating membrane 501 opposite to the metal membrane 601, according to some embodiments of the present disclosure. As shown in Figure 9 the view of the other side of the structure after being flipped. As shown in Figure 10 the openings 217 and 219 of the cells of the insulating membrane 501, such that the corresponding portions of the metal membrane 601 are exposed. Also, in Figure 10 the view, the obstructed portions of the metal membrane 601 under the insulating membrane 501 are shown in a semi-transparent manner. Here, in the example shown, the cover film 507 on this side of the insulating membrane 601 is not removed. Figure 10

[0082] Figure 11A A schematic top view is shown from the side of the insulating membrane 501 distal to the metal membrane 601 after the metal membrane is attached to the insulating membrane, i.e. the side of the insulating membrane 501 opposite to the metal membrane 601, according to some embodiments of the present disclosure. As shown in Figure 11A the view, the openings 217 and 219 of the cells of the insulating membrane 501 are filled with the attachment material 521 to form attachment components (e.g. attachment components 221) for the corresponding cells. Figure 10 the view, the openings 217 and 219 of the cells of the insulating membrane 501 are filled with the attachment material 521 to form attachment components (e.g. attachment components 221) for the corresponding cells. Figure 11A Here, in the example shown, the cover film 507 on this side of the insulating membrane 601 is not removed. After that, in some embodiments, the cover film 507 can be removed, as shown in Figure 11B Here, in the example shown, the cover film 507 on this side of the insulating membrane 601 is not removed. After that, in some embodiments, the cover film 507 can be removed, as shown in

[0083] Depending on the material used for the attachment components, some optional treatment can be performed on the attachment material. For example, the attachment material can be pre-treated, such as pre-heating, pre-drying, pre-sintering, B-staging, etc.

[0084] ​For example, in some cases, some plating layers can also be applied on the substrate and / or the metal film; in such cases, these plating layers can be considered as part of the substrate and / or the metal film. For another example, a process involving a thermal process will naturally also involve a cooling process. In the present disclosure, in order not to obscure the gist of the present application, some conventional processes or components are not described in detail, but rather, the relevant aspects, components or process steps that are of interest to the present application are highlighted. Therefore, those skilled in the art will readily understand that the aspects or embodiments of the present disclosure do not exclude the presence of other processes or components that are not of interest to the present application.

[0085] Subsequently, an attachment structure including the insulating film, the metal film and the applied attachment material is attached to the wafer. Figure 12 A schematic top view showing an attachment structure according to some embodiments of the present disclosure being attached (bonded) to a wafer is shown. As Figure 4 and 12 As shown, the attachment material 521 and the side of the insulating film opposite the metal film 601 are attached to the wafer, such that the attachment component 521 and the insulating film are in contact with the wafer. As previously mentioned, the insulating film 501 can itself have some adhesion properties, and hold the metal film 601 in place against the wafer.

[0086] Subsequently, depending on the attachment material employed and the material of the insulating film used, a corresponding process, which will be referred to herein as a bonding process, can be performed. For example, a sintering or transient diffusion bonding process, a reflow soldering process, a firing annealing process, or a curing process, etc. can be performed to firmly bond the attachment material to the metal film and the terminals (metal layers) on the wafer, and thus also firmly bond the wafer.

[0087] Figure 13 A schematic flowchart showing a method 1300 of preparing a device according to some embodiments of the present disclosure is shown. As Figure 13 As shown in step S1301, an attachment structure is provided. The attachment structure can be an attachment structure as previously described. For example, the attachment structure can include an insulating film having at least one first opening passing through the insulating film, the at least one first opening corresponding to a respective first portion of the semiconductor substrate. The attachment structure further includes a metal film attached to the insulating film, the metal film including a portion overlapping the at least one first opening of the insulating film. The attachment structure further includes an attachment material filling a respective one of the at least one first opening and in contact with the metal film. The attachment material comprises an electrically conductive material.

[0088] In some embodiments, providing the attachment structure can include, at step S1303, attaching the metal film to a first surface of the insulating film; and at step S1305, filling at least one first opening of the insulating film with the attachment material from a second surface of the insulating film opposite the first surface, the attachment material filled in the at least one first opening being in contact with the metal film.

[0089] The method further includes, at step S1307, attaching the attachment structure to a semiconductor wafer. The semiconductor wafer includes at least one power semiconductor device. This step causes the insulating film to be in contact with the semiconductor wafer, the at least one first opening to correspond to a respective first portion of the semiconductor substrate, and the attachment material to be in contact with the respective first portion of the semiconductor substrate.

[0090] In some embodiments, optionally, the method further includes, at step S1309, performing a joining process. This process causes the attachment material to form an attachment member to attach and electrically connect the respective portion of the metal film to the respective first portion of the semiconductor substrate via the attachment member. The joining process can include, for example, at least one of sintering, baking, annealing, or curing. Thereby, the attachment material filled in the insulating film can be cured, sintered, or fused, thereby causing the metal film to be attached to the semiconductor substrate (more precisely, to a metallization layer (including electrodes, terminals, or pads, etc.) on the semiconductor substrate) via the attachment member. Although not described in detail here, one skilled in the art will readily understand that the attachment material, after the joining process, will cool down to room temperature.

[0091] Thereafter, at step S13011, dicing is performed, thereby forming a die, such as a device or die 20 as shown in Figure 1 and 2 For example, the dicing step can be performed by sawing or laser cutting, etc. Note that the device or die 20 of the present disclosure includes the substrate and the attachment structure 200 thereon, i.e., the insulating film, the metal film, and the attachment member formed thereon.

[0092] Thereafter, at step S1313, the diced die is joined to a mounting substrate. For example, the diced die can be picked up and placed on the mounting substrate (which can have the attachment material, such as sintering paste, formed thereon). Thereafter, a joining process (e.g., a sintering process) is performed to join the die to the mounting substrate. At step S1315, respective wires are joined to the metal film and the exposed terminals (e.g., gate terminals 103 or other terminals 241), as shown in Figure 14 .

[0093] Thereafter, at step S1317, a molding process can be performed to encapsulate the die, at least a portion of the mounting substrate, and the wires, etc. with a molding compound.

[0094] Figure 14 A schematic perspective view of a device according to some embodiments of the disclosure and a device of a comparative example is shown. Figure 14 A prior art die 921 and a device (die) 923 made according to embodiments of the present disclosure are shown.

[0095] Both dies 921 and 923 are mounted on a mounting substrate 900. The substrate 900 can have an insulating layer 903 and metal layers 901 and 905 on both sides of the insulating layer. The bottom terminals (metallization layers) of both dies 921 and 923 are bonded and electrically coupled to die attachment portions 913 in the metal layer 901 on the substrate 900. Figure 15 A schematic cross-sectional view of the device 923 mounted to a mounting substrate and wire 933 bonded thereto according to some embodiments of the disclosure is shown.

[0096] For the prior art die 921, aluminum wires 931 are attached to its current terminals (e.g., source). For the die 923 according to the present disclosure, copper wires 933 of larger diameter can be used to bond the metal film (e.g., metal film 231) of the die 923 and the leads 915.

[0097] Since in the prior art die 921, the metallization layer (e.g., electrode, terminal or pad) made on the semiconductor substrate tends to be thin, e.g., a few microns (e.g., 2 microns (pm)), it can not be able to withstand the copper wire bonding process, resulting in defects. According to embodiments of the present disclosure, the metal film is attached to the die through the insulating film and the attachment member, and the wire is attached to the metal film on the die, so that a wire of larger diameter or hardness (e.g., copper wire) is used, thereby improving the device performance and reliability. And, due to the presence of the insulating layer 211, 501, the impact of the copper wire bonding process on the die is reduced, further improving the reliability. It is also noted that, although in the example shown, independent wires are shown as an example, the present disclosure is not limited thereto. For example, in the context herein, the term wire also encompasses various forms, including individual wires as well as wire strips containing multiple wires side by side.

[0098] According to one aspect of the present disclosure, there is also provided an electrical system comprising any semiconductor device as disclosed herein or as can be readily derived from the present disclosure.

[0099] According to embodiments of the present disclosure, a novel wafer-level system-on-chip (DTS) package and a method of making the same are provided. According to the inventor's estimation, compared to prior art DTS solutions, embodiments of the present disclosure can shorten the time length of the manufacturing process to about one third to one quarter, thereby greatly improving the production efficiency.

[0100] Further, according to embodiments of the present disclosure, by providing the insulating film piece, the distance and electrical isolation between the metal film piece and the semiconductor substrate is increased, the dielectric strength is increased, and thus, undesirable electrical discharge or creeping between the substrate and the metal film piece connected to the source can be prevented.

[0101] By providing the insulating film piece, adhesion can also be provided to hold the die and the metal film piece (e.g., Cu foil) in place before a secure attachment between the die and the metal film piece can be provided with the attachment component (or attachment material), thereby reducing or eliminating relative displacement between the two, simplifying the process.

[0102] According to aspects and embodiments of the present disclosure, the processability and UPH of the device is improved. Harsh storage conditions are also no longer required, greatly reducing the cost of delivery.

[0103] Further, by providing the insulating film piece, mechanical strength can also be provided, and deformation of the attachment material before sintering / reflow is prevented.

[0104] Additionally, by providing the insulating film piece, various stresses or strains can also be absorbed during the processing (e.g., during a heat treatment or a pressure bonding treatment or a process of soldering the wire), such as warping, deformation, or other strains due to differences in coefficient of thermal expansion (CTE) or externally applied pressure.

[0105] According to embodiments of the present disclosure, the use of tacking agent is avoided, thereby avoiding the problem of voids present in the prior art, thereby increasing the reliability and lifetime of the device.

[0106] According to embodiments of the present disclosure, by using the insulating film piece and filling the attachment component (or attachment material) in the opening in the insulating film piece, the thickness of the attachment material is increased, and the reliability of the attachment is improved.

[0107] Although embodiments are described herein with power MOS FET as an example, those skilled in the art will readily appreciate that the present disclosure is not limited thereto, but can be used for a wide variety of power devices, such as but not limited to, thyristors, power diodes, as long as they have electrodes or terminals that need to withstand large current and / or large voltage, the principles and teachings of the present disclosure can be used.

[0108] Those skilled in the art will realize that the boundaries between the operations (or steps) of the above described embodiments are merely illustrative. The multiple operations can be combined into a single operation, a single operation can be distributed in additional operations and operations can be executed at least partially overlapping in time. Moreover, alternative embodiments can include multiple instances of a particular operation and the order of operations can be altered in other various embodiments. Other modifications, variations, and alternatives are also possible. Accordingly, the specification and drawings should be regarded as illustrative only and not as restrictive.

[0109] While certain specific embodiments of this disclosure have been described in detail, those skilled in the art will appreciate that the examples provided are for illustrative purposes only and are not meant to limit the scope of the disclosure. Various embodiments disclosed herein can be combined in any combination, without departing from the spirit and scope of the disclosure. Those skilled in the art will also appreciate that modifications can be made to the embodiments without departing from the scope and spirit of the disclosure. The scope of the disclosure is defined by the appended claims.

Claims

1. A semiconductor device comprising: a semiconductor substrate including at least one power semiconductor device; an insulating film sheet on the semiconductor substrate, having at least one first opening through the insulating film sheet, the at least one first opening exposing a corresponding first portion of the semiconductor substrate; at least one conductive attachment component filled in a corresponding first opening of the at least one first opening; and a metal film sheet disposed on the insulating film sheet and the at least one attachment component, wherein the at least one attachment component joins and electrically connects a corresponding portion of the metal film sheet with the corresponding first portion of the semiconductor substrate. the insulating film sheet further includes at least one second opening, the at least one second opening exposing a corresponding second portion of the semiconductor substrate, 2. The semiconductor device according to claim 1, wherein the metal film sheet does not overlap the at least one second opening. the at least one first opening exposes at least a portion of a corresponding current terminal of a corresponding semiconductor device, the at least one second opening exposes at least a portion of a control terminal of the corresponding semiconductor device.

3. The semiconductor device according to claim 2, wherein the semiconductor substrate includes a wafer, 4. The semiconductor device according to claim 1, wherein the at least one power semiconductor device includes a plurality of power semiconductor devices arranged in an array, the insulating film sheet includes a plurality of first openings, the plurality of first openings respectively expose a metallization layer of a corresponding power semiconductor device of the plurality of power semiconductor devices. the semiconductor substrate includes a die separated from a wafer, 5. The semiconductor device according to claim 1, wherein wherein the insulating film sheet and the metal film sheet are substantially absent from lateral sides of the semiconductor substrate, and wherein at least one side of the insulating film sheet, a corresponding side of the metal film sheet, and a corresponding side of the semiconductor substrate are substantially flush. the insulating film sheet is formed of an organic material, and 6. The semiconductor device according to claim 1, wherein wherein the metal film sheet includes one or more layers of a metal material. the attachment component is obtained by a joining process of an applied attachment material, 7. The semiconductor device according to claim 1, wherein the joining process includes at least one of: sintering, firing, annealing, transient liquid phase soldering, and solidification. the attachment material includes one of:

8. The semiconductor device according to claim 7, wherein a sintering paste, a pre-sintering sheet, a solder, a transient liquid phase soldering material, and a conductive adhesive. the semiconductor device is a power MOS transistor, the at least one first opening respectively exposes at least a portion of a corresponding source or drain terminal of a corresponding semiconductor device, the at least one second opening exposes at least a portion of a gate terminal of the corresponding semiconductor device.

9. The semiconductor device according to claim 3, wherein 10. The semiconductor device of claim 3, further comprising: at least one first wire coupled to a corresponding current terminal of the corresponding semiconductor device; and at least one second wire coupled to a corresponding control terminal of the corresponding semiconductor device.

11. The semiconductor device of claim 10, further comprising: a mounting substrate including a die attachment portion and a lead, wherein the semiconductor substrate is attached to the die attachment portion, the at least one first wire is coupled to the lead, and the at least one first wire includes a copper wire. ​ ​ 12. An electrical system comprising the semiconductor device according to any one of claims 1-11.

13. A method of manufacturing a semiconductor device, comprising: providing an attachment structure, the attachment structure comprising: an insulating sheet having at least one first opening therethrough, the at least one first opening; a metal sheet attached to the insulating sheet, the metal sheet comprising a portion overlapping the at least one first opening of the insulating sheet; and an attachment material filled in a respective one of the at least one first opening and in contact with the metal sheet, the attachment material comprising an electrically conductive material; attaching the attachment structure to a semiconductor wafer comprising at least one semiconductor device such that the insulating sheet is in contact with the semiconductor wafer, the at least one first opening is aligned with a respective first portion of the semiconductor substrate, and the attachment material is in contact with the respective first portion of the semiconductor substrate; and performing a bonding process to cause the attachment material to form an attachment member to bond and electrically connect a respective portion of the metal sheet to the respective first portion of the semiconductor substrate through the attachment member.

14. The method of claim 13, wherein providing an attachment structure comprises: attaching the metal sheet to a first surface of the insulating sheet; filling the at least one first opening of the insulating sheet with the attachment material from a side of a second surface of the insulating sheet opposite the first surface, the attachment material filled in the at least one first opening being in contact with the metal sheet.

15. The method of claim 13, further comprising: after the bonding process, performing a dicing to thereby form a separated semiconductor device.

16. The method of claim 13, wherein, the insulating sheet further comprises at least one second opening exposing a respective second portion of the semiconductor substrate, the metal sheet does not overlap the at least one second opening.

17. The method of claim 15, wherein, the insulating sheet and the metal sheet are substantially absent from a lateral side of the semiconductor substrate of the semiconductor device, and wherein at least one side of a portion of the insulating sheet, a respective side of a portion of the metal sheet, and a respective side of the semiconductor substrate comprised by the separated semiconductor device are substantially flush.

18. The method of claim 16, wherein, the at least one semiconductor device comprises a power semiconductor device, the at least one first opening exposes at least a portion of a respective current terminal of the respective semiconductor device, and the at least one second opening exposes at least a portion of a control terminal of the respective semiconductor device.

19. The method of claim 13, wherein: the insulating sheet is formed of an organic material, and wherein the metal sheet comprises one or more layers of a metallic material.

20. The method of claim 13, wherein, the bonding process comprises at least one of: sintering, firing, annealing, transient liquid phase soldering, and or solidification.

21. The method of claim 13, wherein, the attachment material comprises one of: a sintering paste, a pre-sintering sheet, a solder, a transient liquid phase soldering material, and a conductive adhesive.

22. The method of claim 15, further comprising: picking up the separated semiconductor devices and placing them to a mounting substrate; attaching the separated semiconductor devices to a mounting substrate; bonding at least one first wire to a respective current terminal of the respective semiconductor device; and bonding at least one second wire to a respective control terminal of the respective semiconductor device.

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