Non-volatile memory capacity configurable method and device and storage medium
By dividing the memory chip into memory blocks and performing logical address decoding and erase/write operations, the problem of balancing reliability and capacity in non-volatile memory for both program and data memory is solved, enabling flexible configuration of memory capacity and improved utilization efficiency.
Patent Information
- Application Number
- CN202511295354.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-11
- Publication Date
- 2025-12-23
AI Technical Summary
Existing non-volatile memories struggle to balance the demands for high reliability and large storage capacity in program memory and data memory applications.
The memory chip is divided into multiple memory blocks by configuring registers, and logical address decoding is performed by row high voltage decoding module and column high voltage decoding module. According to the capacity configuration type and memory block location, the capacity configuration process of memory cell is performed, including erase and write operations to adjust the capacity of memory cell.
It enables flexible configuration of non-volatile memory capacity, improves memory utilization efficiency, and allows users to choose to increase capacity or maintain reliability according to actual needs, meeting the requirements of different application scenarios.
Smart Images
Figure CN121187504A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor memory technology, and in particular to a method, apparatus and storage medium for configurable capacity of non-volatile memory. Background Technology
[0002] In most practical applications, non-volatile memory is usually used as both program memory and data memory. However, program memory needs to ensure high reliability, while data memory needs a large storage capacity and has relatively lower reliability requirements. Summary of the Invention
[0003] In order to at least solve one of the technical problems existing in the prior art, the present invention provides a method for configurable non-volatile memory capacity, thereby realizing the capacity of non-volatile memory.
[0004] One aspect of the present invention provides a method for configurable capacity of non-volatile memory, comprising:
[0005] Obtain the capacity configuration request and identify the capacity configuration type;
[0006] Determine the location of the storage block to be configured based on the capacity configuration type;
[0007] Based on the capacity configuration type and the location of the storage block to be configured, perform capacity configuration processing for the storage cells in the storage block to be configured.
[0008] According to the non-volatile memory capacity configurable method, the method further includes:
[0009] The memory chip is divided into multiple memory blocks by configuring registers, and each memory block manages multiple memory cells.
[0010] According to the non-volatile memory capacity configurable method, the capacity configuration types include data capacity adjustment and data retention.
[0011] According to the non-volatile memory capacity configurable method, determining the location of the memory block to be configured based on the capacity configuration type includes:
[0012] The identifier of the storage block to be configured is obtained through the configuration register, and the configuration parameters are obtained from the parameter register based on the identifier of the storage block to be configured.
[0013] Based on the configuration parameters, logical address decoding is performed by the row high-voltage decoding module and the column high-voltage decoding module to obtain the row and column of the storage block to be configured in the storage chip, and thus obtain the location of the storage block to be configured.
[0014] According to the non-volatile memory capacity configurable method, the configuration parameters are customized through the configuration register.
[0015] According to the non-volatile memory capacity configurable method, the capacity configuration process of the storage cells in the storage block to be configured is performed according to the capacity configuration type and the location of the storage block to be configured, including:
[0016] Based on the capacity configuration type and the location of the storage block to be configured, the logic to high voltage conversion process is performed through the row high voltage decoding module and the column high voltage decoding module to activate the storage cells in the storage block to be configured.
[0017] The storage cells in the storage block to be configured are erased and written according to the configuration parameters so that the capacity of the storage cells in the storage block is configured.
[0018] According to the non-volatile memory capacity configurable method, the erase / write operation of memory cells in the memory block to be configured according to configuration parameters includes:
[0019] The historical capacity configuration in the storage unit is erased according to the configuration parameters, and a new capacity configuration is written.
[0020] Another aspect of the present invention provides a non-volatile memory capacity configurable device, comprising:
[0021] The first module is used to obtain capacity configuration requests and identify capacity configuration types.
[0022] The second module is used to determine the location of the storage block to be configured based on the capacity configuration type.
[0023] The third module is used to perform capacity configuration processing of the storage cells in the storage block to be configured, based on the capacity configuration type and the location of the storage block to be configured.
[0024] This invention also discloses a computer-readable storage medium, characterized in that the storage medium stores a program, which is executed by a processor to implement the non-volatile memory capacity configurable method as described above.
[0025] The beneficial effects of this invention are as follows: The chip is divided into different storage blocks by configuring registers. Each storage block can be independently configured via its corresponding configuration register to store either one bit of data or two bits of data in its storage unit, thus allowing for different storage capacities for each block. Therefore, users can choose to increase capacity or improve data retention for different blocks based on the actual application requirements, thereby improving memory utilization efficiency. Attached Figure Description
[0026] Figure 1 This is a schematic flowchart of a method for configuring the capacity of non-volatile memory according to an embodiment of the present invention.
[0027] Figure 2 This is a block diagram of the chip structure according to an embodiment of the present invention.
[0028] Figure 3 This is a flowchart of the erasing and writing process according to an embodiment of the present invention.
[0029] Figure 4 This is a schematic diagram of a non-volatile memory capacity configurable device according to an embodiment of the present invention. Detailed Implementation
[0030] The embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings. Throughout the description, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions. In the following description, suffixes such as "module," "part," or "unit" used to denote elements are used only for the purpose of illustrative purposes and have no specific meaning in themselves. Therefore, "module," "part," or "unit" can be used interchangeably. Terms such as "first," "second," etc., are used only to distinguish technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the sequential relationship of the indicated technical features. In the following description, the consecutive reference numerals for method steps are for ease of review and understanding. Adjusting the implementation order of steps, in conjunction with the overall technical solution of the present invention and the logical relationship between the various steps, will not affect the technical effect achieved by the technical solution of the present invention. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.
[0031] refer to Figure 1 , Figure 1 This is a schematic flowchart of a method for configuring the capacity of non-volatile memory according to an embodiment of the present invention. It includes, but is not limited to, steps S100 to S300:
[0032] S100: Obtain capacity configuration request and identify capacity configuration type;
[0033] S200 determines the location of the storage block to be configured based on the capacity configuration type;
[0034] S300 performs capacity configuration processing for the storage cells in the storage block to be configured, based on the capacity configuration type and the location of the storage block to be configured.
[0035] refer to Figure 2 The chip structure block diagram shown includes a configuration register, a parameter register, an analog module, a system algorithm module, a row high voltage decoding module storage block, a column high voltage decoding module and storage block, wherein the memory card includes a storage unit (not shown).
[0036] In some embodiments, the memory chip is divided into multiple memory blocks by configuration registers, and each memory block manages multiple memory units. Specifically, the configuration registers are user-facing and can be customized to set the configuration types of memory blocks and memory units.
[0037] In some embodiments, the configuration type includes capacity adjustment and data retention, wherein capacity adjustment is to adjust the storage amount of the storage block, for example, changing the capacity of each storage cell from 1 bit to 2 bits, and data retention refers to maintaining the capacity of the storage cell unchanged to maintain high reliability (applicable to program memory).
[0038] In one embodiment, the capacity of the storage unit is reduced to enable it to retain data; or the capacity of the storage unit is increased, but its reliability is reduced, and it is used as a data storage device.
[0039] In some embodiments, the identifier of the memory block to be configured is obtained through the configuration register, and configuration parameters are obtained from the parameter register based on the identifier of the memory block to be configured. Based on the configuration parameters, logical address decoding is performed through the row high voltage decoding module and the column high voltage decoding module to obtain the row and column of the memory block to be configured in the memory chip, thereby obtaining the location of the memory block to be configured.
[0040] The identifier of a storage block refers to its serial number or unique identifier within the storage chip.
[0041] In some embodiments, the configuration parameters are used to adjust the simulation module (including read operation voltage, erase / write operation high voltage, and erase / write verification operation voltage, etc.) and the control system (including erase / write operation time, erase / write operation and verification algorithm, etc.), and the corresponding values are selected according to the values of the configuration registers.
[0042] In some embodiments, reference Figure 3 The erase / write flowchart shown, in conjunction with the above embodiments, describes how, upon receiving an erase / write instruction (i.e., a capacity configuration request), the configuration parameters of the parameter register are adjusted through the configuration register to achieve the erase / write operation (capacity configuration) of the corresponding memory card.
[0043] In some embodiments, based on the capacity configuration type and the location of the storage block to be configured, a logic-to-high voltage conversion process is performed by a row high voltage decoding module and a column high voltage decoding module to activate the storage cells in the storage block to be configured; and an erase / write operation is performed on the storage cells in the storage block to be configured according to the configuration parameters so that the capacity of the storage cells in the storage block is configured.
[0044] In some embodiments, the row high-voltage decoding module and the column high-voltage decoding module perform logic-to-high-voltage processing, erase the historical capacity configuration in the storage unit, and write the new capacity configuration.
[0045] For example, the new capacity is configured with 1 bit, while the historical capacity is configured with 2 bits, which means that the storage block is configured to retain data.
[0046] Figure 4 This is a schematic diagram of a non-volatile memory capacity configurable device according to an embodiment of the present invention. The device includes a first module 410, a second module 420, and a third module 430.
[0047] The first module is used to obtain capacity configuration requests and identify capacity configuration types; the second module is used to determine the location of the storage block to be configured based on the capacity configuration type; and the third module is used to perform capacity configuration processing of the storage units in the storage block to be configured based on the capacity configuration type and the location of the storage block to be configured.
[0048] For example, with the cooperation of the first, second, and third modules in the device, the embodiment device can implement any of the aforementioned non-volatile memory capacity configurable methods, namely, obtaining a capacity configuration request and identifying the capacity configuration type; determining the location of the storage block to be configured according to the capacity configuration type; and performing capacity configuration processing of the storage cells in the storage block to be configured according to the capacity configuration type and the location of the storage block to be configured. The beneficial effects of this invention are: the chip is divided into different storage blocks through configuration registers. Furthermore, each storage block can be independently configured through its corresponding configuration register to store either one bit of data or two bits of data in the storage cells of its region, thereby making the storage capacity of each block different. Therefore, users can choose to increase the capacity or data retention capability of different blocks according to the actual application situation, improving memory utilization efficiency.
[0049] This invention also provides a computer-readable storage medium storing a program that is executed by a processor to implement the non-volatile memory capacity configurable method described above.
[0050] In some alternative embodiments, the functions / operations mentioned in the block diagrams may not occur in the order shown in the operation diagrams. For example, depending on the functions / operations involved, two consecutively shown blocks may actually be executed substantially simultaneously, or the blocks may sometimes be executed in reverse order. Furthermore, the embodiments presented and described in the flowcharts of this invention are provided by way of example to provide a more comprehensive understanding of the technology. The disclosed methods are not limited to the operations and logic flows presented herein. Alternative embodiments are contemplated in which the order of various operations is altered and sub-operations described as part of a larger operation are executed independently.
[0051] This invention also discloses a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device can read the computer instructions from the computer-readable storage medium and execute the computer instructions, causing the computer device to perform the aforementioned non-volatile memory capacity configurable method.
[0052] Furthermore, although the invention has been described in the context of functional modules, it should be understood that, unless otherwise stated, one or more of the described functions and / or features may be integrated into a single physical device and / or software module, or one or more functions and / or features may be implemented in a separate physical device or software module. It is also understood that a detailed discussion of the actual implementation of each module is unnecessary for understanding the invention. Rather, given the properties, functions, and internal relationships of the various functional modules in the apparatus disclosed herein, the actual implementation of the module will be understood within the scope of conventional skill of an engineer. Therefore, those skilled in the art can implement the invention as set forth in the claims using ordinary techniques without excessive experimentation. It is also understood that the specific concepts disclosed are merely illustrative and not intended to limit the scope of the invention, which is determined by the full scope of the appended claims and their equivalents.
[0053] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0054] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device.
[0055] More specific examples of computer-readable media (a non-exhaustive list) include: electrical connections (electronic devices) having one or more wires, portable computer disk drives (magnetic devices), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Furthermore, computer-readable media can even be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in computer memory.
[0056] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.
[0057] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0058] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.
[0059] The above is a detailed description of the preferred embodiments of the present invention, but the present invention is not limited to the embodiments described. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention, and these equivalent modifications or substitutions are all included within the scope defined by the claims of this application.
Claims
1. A method for configurable capacity of non-volatile memory, characterized in that, include: Obtain the capacity configuration request and identify the capacity configuration type; Determine the location of the storage block to be configured based on the capacity configuration type; Based on the capacity configuration type and the location of the storage block to be configured, perform capacity configuration processing for the storage cells in the storage block to be configured.
2. The method for configurable capacity of non-volatile memory according to claim 1, characterized in that, The method further includes: The memory chip is divided into multiple memory blocks by configuring registers, and each memory block manages multiple memory cells.
3. The method for configurable capacity of non-volatile memory according to claim 2, characterized in that, The capacity configuration types include data capacity adjustment and data retention.
4. The method for configurable capacity of non-volatile memory according to claim 3, characterized in that, The step of determining the location of the storage block to be configured based on the capacity configuration type includes: The identifier of the storage block to be configured is obtained through the configuration register, and the configuration parameters are obtained from the parameter register based on the identifier of the storage block to be configured. Based on the configuration parameters, logical address decoding is performed by the row high-voltage decoding module and the column high-voltage decoding module to obtain the row and column of the storage block to be configured in the storage chip, and thus obtain the location of the storage block to be configured.
5. The method for configurable capacity of non-volatile memory according to claim 4, characterized in that, The configuration parameters are customized through the configuration register.
6. The method for configurable capacity of non-volatile memory according to claim 4, characterized in that, The process of configuring the capacity of storage cells in the storage block to be configured according to the capacity configuration type and the location of the storage block to be configured includes: Based on the capacity configuration type and the location of the storage block to be configured, the logic to high voltage conversion process is performed through the row high voltage decoding module and the column high voltage decoding module to activate the storage cells in the storage block to be configured. The storage cells in the storage block to be configured are erased and written according to the configuration parameters so that the capacity of the storage cells in the storage block is configured.
7. The method for configurable capacity of non-volatile memory according to claim 6, characterized in that, The step of performing erase and write operations on the storage cells in the storage block to be configured according to the configuration parameters includes: The historical capacity configuration in the storage unit is erased according to the configuration parameters, and a new capacity configuration is written.
8. A non-volatile memory capacity configurable device, characterized in that, include: The first module is used to obtain capacity configuration requests and identify capacity configuration types. The second module is used to determine the location of the storage block to be configured based on the capacity configuration type. The third module is used to perform capacity configuration processing of the storage cells in the storage block to be configured, based on the capacity configuration type and the location of the storage block to be configured.
9. A computer-readable storage medium, characterized in that, The storage medium stores a program that is executed by a processor to implement the non-volatile memory capacity configurable method as described in any one of claims 1-7.