Infrared imaging detector and preparation method

Abstract

The invention relates to the technical field of infrared imaging detectors, and discloses an infrared imaging detector and a preparation method thereof, and the infrared imaging detector comprises a light-transmitting N-type substrate; a main absorption layer, an energy level transition layer and a visible light supplement absorption layer are sequentially arranged on the top surface of the light-transmitting N-type substrate from bottom to top; a guided-mode resonance grating is arranged on the top surface of the visible light supplementing and absorbing layer; a micro-lens array is arranged on the surface of the guided-mode resonance grating; m composite layers are sequentially arranged on the bottom surface of the light-transmitting N-type substrate from top to bottom, and each composite layer comprises a SiO2 layer and a TiO2 layer; the bottommost TiO2 layer is connected with the silicon-based ROIC; during use, the multi-level wide-spectrum absorption structure formed by the visible light supplement absorption layer, the energy level transition layer and the main absorption layer is combined with the N-type transparent substrate, so that visible light can be responded, the infrared short-wave performance can be maintained, and wide-range wave band detection is realized; and the substrate does not need to be thinned, so that the electrical property of the detector is not deteriorated.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of cloth dyeing and finishing, and particularly relates to an infrared imaging detector and a preparation method. BACKGROUND

[0002] At present, infrared imaging technology has an irreplaceable role in multiple key fields. InGaAs material has become one of the core materials in the field due to its excellent detection performance in the near-infrared and short-wave infrared range.

[0003] The existing infrared detector is mainly a back-illuminated InGaAs / InP short-wave infrared (SWIR) detector, the core structure of which is an InGaAs absorption layer + an InP substrate + a silicon-based readout circuit (ROIC), and it is a hybrid integrated device of group III-V compound semiconductors and silicon-based circuits. In addition, its working principle is based on the photoelectric effect. When working, infrared light (mainly 900-1800 nm short-wave infrared) is absorbed by the InGaAs absorption layer after penetrating the InP substrate, and an electron-hole pair is excited. Then, the photo-generated carriers are collected under the action of an electric field and converted into an electrical signal. Finally, the signal is transmitted to the ROIC through the InP / silicon bonding interface, and an infrared image is generated after amplification and A / D conversion.

[0004] For the existing infrared detector, the following problems exist when it is actually used: The core InP substrate can absorb visible light with a wavelength of 400-900 nm, resulting in the natural lack of visible light response of the infrared detector. If the InP substrate is thinned to allow visible light to penetrate, the problem of increased interface defects between the substrate and the InGaAs absorption layer will be caused. This forms a dilemma of "either lacking visible light response or not meeting the electrical performance standards". SUMMARY

[0005] In view of the deficiencies in the background art, the present application provides an infrared imaging detector and a preparation method, and the technical problem to be solved is that the existing infrared imaging detector cannot have good visible light response and electrical performance at the same time.

[0006] To solve the above technical problems, in a first aspect, the present application provides the following technical solution: an infrared imaging detector, comprising a light-transmitting N-type substrate; The surface of the light-transmitting N-type substrate is sequentially provided from bottom to top with a main absorption layer for absorbing short-wave infrared signals, an energy level transition layer for energy band width transition, and a visible light supplementary absorption layer for absorbing visible light. The top surface of the visible light supplementary absorption layer is provided with a guided-mode resonance grating, and the surface of the guided-mode resonance grating is provided with a microlens array. The bottom surface of the light-transmitting N-type substrate is sequentially provided with M composite layers from top to bottom, the composite layers comprising SiO2 layers and TiO2 layers arranged alternately; the lowermost TiO2 layer is connected with a silicon-based ROIC.

[0007] In some embodiments of the first aspect, the light-transmitting N-type substrate is an ITO substrate or a sapphire substrate; when the light-transmitting N-type substrate is a sapphire substrate, an Al2O3 passivation layer and an AllnAs buffer layer are sequentially arranged between the top surface of the sapphire substrate and the main absorption layer from bottom to top, and the thickness of the Al2O3 passivation layer is between 2 nm and 3 nm.

[0008] In some embodiments of the first aspect, the visible light supplementary absorption layer is a Pbs quantum dot layer or a GaAsP nanofilm, the quantum dot particle size of the Pbs quantum dot layer is between 5 nm and 10 nm, and the Ga component ratio of the GaAsP nanofilm is between 0.3 and 0.5; the energy level transition layer is an InGaAsP graded energy band transition layer; the main absorption layer is an In 0.53 Ga 0.47 As layer.

[0009] In some embodiments of the first aspect, the period of the guided-mode resonance grating is between 200 nm and 600 nm, the sidewall perpendicularity of the guided-mode resonance grating is greater than or equal to 85°; M is between 5 and 8, the thickness of the SiO2 layer is between 100 nm and 120 nm, the thickness of the TiO2 layer is between 70 nm and 90 nm, and the refractive index difference between the SiO2 layer and the TiO2 layer is greater than or equal to 0.5.

[0010] In some embodiments of the first aspect, a Peltier refrigeration layer is arranged between the lowermost TiO2 layer and the silicon-based ROIC, and a positive quenching chip is further connected to the peripheral pad of the silicon-based ROIC; the silicon-based ROIC is connected to an external display through a signal processing board.

[0011] In a second aspect, the present application further provides a preparation method of an infrared detector, comprising the following steps: S1: sequentially arranging, from top to bottom, a visible light supplementary absorption layer for absorbing visible light, an energy level transition layer for energy band width transition, and a main absorption layer for absorbing short-wave infrared signals on the surface of a temporary substrate; S2: removing the temporary substrate by epitaxial lift-off technology, and then bonding the main absorption layer on a light-transmitting N-type substrate by plasma-activated bonding process; S3: a surface of the visible light supplementary absorption layer is processed by an electron beam lithography process and an inductively coupled plasma dry etching process to form a guided-mode resonance grating; M composite layers are sequentially arranged on a bottom surface of the light-transmitting N-type substrate from top to bottom by a magnetron sputtering process, and the M composite layers comprise SiO2 layers and TiO2 layers arranged alternately; S4: a Cu bump is prepared on the silicon-based ROIC, and then vertical interconnection between the silicon-based ROIC and the lowermost TiO2 layer is realized by a low-temperature Cu-Cu hybrid bonding technology; then a microlens array is formed on the guided-mode resonance grating by a photolithography and hot-pressing process.

[0012] In some embodiments of the second aspect, in step S1: The temporary substrate is a clean silicon wafer or a sapphire substrate. In the process of preparing the visible light supplementary absorption layer, a PbS quantum dot layer or a GaAsP nanofilm is prepared on a surface of the temporary substrate to form the visible light supplementary absorption layer, and then a short-chain inorganic ligand is used to modify the surface to reduce defects; the quantum dot size of the PbS quantum dot layer is between 5 nm and 10 nm, and the Ga component of the GaAsP nanofilm is between 0.3 and 0.5. In the process of preparing the energy level transition layer, an InGaAsP graded energy band is prepared on a surface of the visible light supplementary absorption layer by a molecular beam epitaxy process to form the transition layer, and the InGaAsP graded energy band is used to transition the energy band width from a value adapted to the visible light supplementary absorption layer to a value adapted to the underlying main absorption layer. In the process of preparing the main absorption layer, an In 0.53 Ga 0.47 As layer is grown on a surface of the energy level transition layer by an organic chemical vapor deposition process to form the main absorption layer.

[0013] In some embodiments of the second aspect, in step S2: The light-transmitting N-type substrate is an ITO substrate or a sapphire substrate; when the substrate is a sapphire substrate, a bottom surface of the main absorption layer is first connected with an AllnAs buffer layer, then the device is soaked in a (NH4)2S solution with a concentration of between 10% and 20% for a soaking time of between 5 and 10 minutes, then an Al2O3 passivation layer is grown on the AllnAs buffer layer by an atomic layer deposition process, wherein the deposition temperature is between 120°C and 150°C, and finally the Al2O3 passivation layer is connected with the sapphire substrate; the thickness of the Al2O3 passivation layer is between 2 nm and 3 nm.

[0014] In some embodiments of the second aspect, in step S3, the period of the guided-mode resonance grating is between 200nm and 600nm, the sidewall perpendicularity of the guided-mode resonance grating is greater than or equal to 85°; the M is between 5 and 8, the thickness of the SiO2 layer is between 100nm and 120nm, the thickness of the TiO2 layer is between 70nm and 90nm, and the refractive index difference between the SiO2 layer and the TiO2 layer is greater than or equal to 0.5; In step S4, the diameter of the prepared Cu bump is between 5um and 10um, and the spacing between the Cu bumps is between 10um and 20um; when Cu-Cu hybrid bonding is performed, the bonding temperature is less than 200℃, and the bonding pressure is between 20Mpa and 25Mpa; when the microlens array is made, the temperature is between 180℃ and 200℃, and the pressure is between 5Mpa and 8Mpa.

[0015] In some embodiments of the second aspect, in step S4, the silicon-based ROIC is interconnected with the lowermost TiO2 layer through a Peltier refrigeration layer; the peripheral pads of the silicon-based ROIC are also connected with an active quenching chip, and the active quenching chip is provided with an integral gating mode program, which is used to set the gating voltage and the integral time.

[0016] Compared with the prior art, the present application has the following beneficial effects: In actual use, the multi-level wide-spectrum absorption structure composed of the visible light complementary absorption layer, the energy level transition layer and the main absorption layer, and the N-type transparent substrate are combined, which can not only respond to visible light, but also maintain the infrared short wave performance, realizing wide-range waveband detection; and since the substrate does not need to be thinned, the electrical performance of the detector will not be deteriorated. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 FIG. 1 is a structural schematic diagram of an infrared imaging detector in Example 1; Figure 2 FIG. 2 is a structural schematic diagram of another infrared imaging detector in Example 1; Figure 3 FIG. 3 is a structural schematic diagram of a structure after step S1 in Example 2; Figure 4 FIG. 4 is a structural schematic diagram of a structure after step S2 in Example 2; Figure 5 FIG. 5 is a structural schematic diagram of a structure after step S3 in Example 2. DETAILED DESCRIPTION

[0018] The present application will now be further described in detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, and only illustrate the basic structure of the present application in a schematic manner, and thus only show the components related to the present application.

[0019] Embodiment one For the existing infrared imaging detector, InP substrate can absorb 400-900nm visible light, resulting in the natural lack of visible light response of the infrared imaging detector, and if the InP substrate is thinned to let the visible light penetrate, the interface defects of the InP substrate and the InGaAs absorption layer will increase; if the simple addition of quantum dots is used to supplement the visible light absorption, the noise will increase due to the mismatch of energy levels and the increase of interface defects, and if the transparent substrate is replaced, a large number of dislocations will be generated due to lattice mismatch. These operations to make up for the visible light response will cause the problems of the increase of dark current, the aggravation of carrier recombination, the increase of noise equivalent power and other electrical performance deterioration, forming a dilemma of "either lack of visible light response or substandard electrical performance".

[0020] In order to make the infrared imaging detector have good visible light response and electrical performance, as shown in the figure, Figure 1 The infrared imaging detector provided by the embodiment comprises a light-transmitting N-type substrate 11; The top surface of the light-transmitting N-type substrate 11 is sequentially provided from bottom to top with a main absorption layer 72 for absorbing short-wave infrared signals, an energy level transition layer 71 for energy band width transition and a visible light supplementary absorption layer 70 for absorbing visible light; the top surface of the visible light supplementary absorption layer 70 is provided with a guided-mode resonance grating 8, and the surface of the guided-mode resonance grating 8 is provided with a microlens array 9; The bottom surface of the light-transmitting N-type substrate 11 is sequentially provided from top to bottom with M composite layers 3, and the composite layer comprises a SiO2 layer 30 and a TiO2 layer 31 arranged in a top-down manner; the lowermost TiO2 layer 31 is connected with a silicon-based ROIC 1.

[0021] In actual use, the multilevel wide-spectrum absorption structure composed of the visible light supplementary absorption layer 70, the energy level transition layer 71 and the main absorption layer 72 and the N-type transparent substrate 11 are combined, which can not only respond to visible light but also maintain the infrared short-wave performance, realizing wide-range waveband detection; and since the substrate does not need to be thinned, the electrical performance of the detector will not be deteriorated.

[0022] In the embodiment, the light-transmitting N-type substrate 11 can be an ITO substrate or a sapphire substrate 4; when the light-transmitting N-type substrate 11 is the sapphire substrate 4, as shown in the figure, Figure 2 The top surface of the sapphire substrate 4 and the main absorption layer 72 are sequentially provided from bottom to top with an Al2O3 passivation layer 5 and an AllnAs buffer layer 6, and the thickness of the Al2O3 passivation layer 5 is between 2nm and 3nm.

[0023] In actual use, the sapphire substrate 4 provides stable support and high light transmission as a bottom substrate, the AllnAs buffer layer 6 is used to match the crystal lattices between the multilevel wide-spectrum absorption structure and the sapphire substrate 4, thereby ensuring the stability and optical and electrical properties of the device structure, and the Al2O3 passivation layer 5 is arranged to control the interface recombination rate to be ≤1×10 5 cm / s, thereby inhibiting the dark current.

[0024] Specifically, in the embodiment, the visible light supplementary absorption layer 70 is a Pbs quantum dot layer or a GaAsP nanometer film, the quantum dot particle size of the Pbs quantum dot layer is between 5 nm and 10 nm, and the Ga component ratio of the GaAsP nanometer film is between 0.3 and 0.5; the energy level transition layer 71 is an InGaAsP gradual energy band transition layer; and the main absorption layer 72 is an In 0.53 Ga 0.47 As layer.

[0025] In actual use, the energy band width can be transitioned from a value suitable for the visible light supplementary absorption layer 70 to a value suitable for the main absorption layer 72 below through the energy level transition layer 71, thereby reducing the recombination probability of the carriers at the interface; the InGaAsP gradual energy band transition layer gradually and continuously adjusts the energy band width from the energy level of the visible light supplementary absorption layer 70 to the energy level of the main absorption layer 72 by adjusting the component ratios of In, Ga, As and P, thereby avoiding the problem that the carriers are difficult to transfer at the interface due to the energy level mutation and then recombine, and providing a smooth channel for the efficient transmission of the photo-generated carriers from the visible light supplementary absorption layer to the main absorption layer. In addition, the main absorption layer 72 is used to absorb the short-wave infrared signal and ensure the quantum efficiency of the waveband.

[0026] Specifically, in the embodiment, the period of the guided-mode resonance grating 8 is between 200 nm and 600 nm, and the perpendicularity of the sidewall of the guided-mode resonance grating 8 is greater than or equal to 85°.

[0027] Specifically, in the embodiment, the size of a single micro-lens in the micro-lens array 9 needs to be matched with the infrared detector pixel, and is between 10 um and 20 um, so that the light between 400 nm and 1800 nm can be gathered to the visible light supplementary absorption layer 70.

[0028] Specifically, in the embodiment, the number M of the composite layers 3 is between 5 and 8, the thickness of the SiO2 layer 30 is between 100 nm and 120 nm, the thickness of the TiO2 layer 31 is between 70 nm and 90 nm, and the refractive index difference between the SiO2 layer 30 and the TiO2 layer 31 is greater than or equal to 0.5; in this way, the unabsorbed wide-spectrum light can be reflected through the M composite layers 3, the light field enhancement effect is avoided to be uneven, and the secondary reflection efficiency is ensured to be ≥80%.

[0029] Specifically, in the embodiment, a Peltier refrigeration layer 2 is arranged between the lowermost TiO2 layer 31 and the silicon-based ROIC 1, and the Peltier refrigeration layer 2 can control the working temperature of the infrared imaging detector at -20-25℃, so as to reduce the thermal excitation dark count and the after-pulse probability, and avoid the influence of temperature fluctuation on the detection performance.

[0030] Specifically, in the embodiment, the peripheral pads of the silicon-based ROIC 1 are further connected with an active quenching chip 10; the active quenching chip 10 is written with an integral gate control mode (IGSPD) program, so as to set the gate voltage and the integral time of 10-50 ns, inhibit the electric peak noise by monitoring the avalanche charge, and ensure that the NEP≤1×10 -15 W.

[0031] Specifically, in the embodiment, the silicon-based ROIC 11 can be connected with an external display through a signal processing board, so as to form a complete imaging system.

[0032] Embodiment two The embodiment provides a preparation method of an infrared detector, and the method comprises the following steps: S1: sequentially manufacturing, from top to bottom, a visible light supplementary absorption layer 70 for absorbing visible light, an energy level transition layer 71 for energy band width transition, and a main absorption layer 72 for absorbing short-wave infrared signals on the surface of a temporary substrate 12; and the device structure after manufacturing is as shown in Figure 3 ; In step S1, the temporary substrate 12 is a clean silicon wafer or a sapphire substrate, so as to ensure the compatibility of 400-900 nm visible light absorption and subsequent processes; In step S1, when the visible light supplementary absorption layer 70 is manufactured, a PbS quantum dot layer or a GaAsP nanometer film is prepared on the surface of the temporary substrate through a spin coating or a dip coating process to form the visible light supplementary absorption layer, and then a short-chain inorganic ligand is used to modify the surface to reduce defects, so as to ensure that the visible light supplementary absorption layer 70 can efficiently absorb visible light and generate photo-generated carriers; wherein the quantum dot particle size of the PbS quantum dot layer is between 5 nm and 10 nm, and the Ga component ratio of the GaAsP nanometer film is between 0.3 and 0.5; When the energy level transition layer 71 is manufactured, an InGaAsP gradient energy band is manufactured on the surface of the visible light supplementary absorption layer 70 through a molecular beam epitaxy process to form the transition layer, and the InGaAsP gradient energy band is used to transition the energy band width from a value adapted to the visible light supplementary absorption layer to a value adapted to the lower main absorption layer; in addition, by adjusting the component ratios of In, Ga, As and P of the InGaAsP gradient energy band, the energy band width is gradually and continuously adjusted from the energy level close to the visible light supplementary absorption layer 70 to the energy level close to the main absorption layer 72; In 0.53 Ga 0.47 As layer to form the main absorption layer.

[0033] S2: remove the temporary substrate 12 by epitaxial lift-off technology, and then bond the main absorption layer 72 on the light-transmitting N-type substrate 11 by a plasma-activated bonding process; In step S2, the light-transmitting N-type substrate 11 is an ITO substrate or a sapphire substrate 4; when it is a sapphire substrate 4, the bottom surface of the main absorption layer 72 is first connected with the AllnAs buffer layer 6, then the device is soaked in a (NH4)2S solution with a concentration of 10% to 20% to perform sulfidation treatment, the soaking time is between 5-10 minutes, then an Al2O3 passivation layer 5 is grown on the AllnAs buffer layer 6 by an atomic layer deposition process, wherein the deposition temperature is between 120°C to 150°C, and finally the Al2O3 passivation layer 5 is connected with the sapphire substrate 4, at this time the corresponding device structure is as shown in Figure 4 The thickness of the Al2O3 passivation layer 5 is between 2nm to 3nm; In addition, in step S2, the concentration of the (NH4)2S solution is preferably 15%, so that the interface sulfidation treatment effect is optimal, ensuring the stability of the connection between the sapphire substrate 4 and the active layer, which is a multi-level wide-spectrum absorption structure composed of the main absorption layer 72, the energy level transition layer 71, and the visible light supplemental absorption layer 70, to suppress interface recombination; thereby controlling the interface recombination rate to be ≤1×10 5 cm / s, thereby suppressing the dark current.

[0034] S3: fabricate a guided-mode resonance grating 8 on the surface of the visible light supplemental absorption layer 70 by an electron beam lithography process and an inductively coupled plasma dry etching process; M composite layers 3 are sequentially arranged on the bottom surface of the light-transmitting N-type substrate 11 from top to bottom by a magnetron sputtering process, and the composite layer includes SiO2 layer 30 and TiO2 layer 31 arranged above and below; In step S3, taking the sapphire substrate as the light-transmitting N-type substrate 11, the fabricated device structure is as shown in Figure 5 In step S3, the period of the guided-mode resonance grating 8 is between 200nm to 600nm, and the sidewall perpendicularity of the guided-mode resonance grating 8 is greater than or equal to 85°; in addition, parameter optimization can be performed by FDTD process to make the 400-900nm light form a local standing wave in the visible light supplemental absorption layer 70, so as to achieve an increase of 2-3 times in the optical path, and avoid uneven light field enhancement effect; ​In step S3, the thickness of the SiO2 layer 30 is between 100 nm and 120 nm, the thickness of the TiO2 layer 31 is between 70 nm and 90 nm, the refractive index difference between the SiO2 layer and the TiO2 layer is greater than or equal to 0.5, so that the wide-spectrum light not absorbed can be reflected by the M composite layers 3, the light field enhancement effect is uniform, and the secondary reflection efficiency is greater than or equal to 80%.

[0035] S4: A Cu bump is prepared on the silicon-based ROIC 1, and then vertical interconnection between the silicon-based ROIC 1 and the lowermost TiO2 layer 31 is realized by a low-temperature Cu-Cu hybrid bonding technology; then a microlens array 9 is prepared on the guided-mode resonance grating 8 by a photolithography and hot-pressing process; In step S4, the diameter of the prepared Cu bump is between 5 um and 10 um, and the spacing between the Cu contacts is between 10 um and 20 um; when the Cu-Cu hybrid bonding is performed, the bonding temperature is less than 200℃, and the bonding pressure is between 20 Mpa and 25 Mpa; in addition, the contact resistance after the u-Cu bonding is less than or equal to 5×10 -6 Ω·cm2, ensuring efficient transmission of electrical signals; In actual use, vertical interconnection is realized by the Cu-Cu bonding technology, which can ensure efficient transmission of electrical signals and avoid metal shielding of the light path; In the preparation of the microlens array, the temperature is between 180℃ and 200℃, and the pressure is between 5 Mpa and 8 Mpa; in addition, the size of a single microlens in the microlens array 9 needs to match the infrared detector pixel, which is between 10 um and 20 um, so that the light between 400 nm and 1800 nm can be concentrated on the visible light supplementary absorption layer 70, and the light coupling efficiency can be improved by more than 30%.

[0036] In step S4, the silicon-based ROIC 1 can also be interconnected with the lowermost TiO2 layer 30 through a Peltier refrigeration layer 2; the peripheral pads of the silicon-based ROIC 1 are also connected to an active quenching chip 10, and the active quenching chip 10 is provided with an integral gating mode program for setting a gating voltage and an integral time; the integral time can be between 10 ns and 50 ns, and the active quenching chip 10 can suppress electrical spikes by monitoring avalanche charges, ensuring that the NEP is less than or equal to 1×10 -15 W.

[0037] In actual use, the Peltier refrigeration layer 2 can control the working temperature of the infrared imaging detector to be between -20–25℃, so as to reduce the thermal excitation dark count and the afterpulse probability, and avoid the influence of temperature fluctuation on the detection performance; in addition, the temperature control accuracy of the Peltier refrigeration layer 2 is ±0.5℃.

[0038] In the method of the embodiment, a step S5 is further included, in which the signal output end of the silicon-based ROIC1 is connected with an external signal processing board through a gold wire bonding process, the signal processing board is connected with an external display (such as an LCD display) through an HDMI interface, and a complete imaging system is formed.

[0039] Compared with a conventional infrared imaging detector, the infrared imaging detector in the embodiment realizes wide spectrum coverage of 400-1800 nm, in which the quantum efficiency in the visible light band is greater than or equal to 55%, the quantum efficiency in the short-wave infrared band is greater than or equal to 75%, the dark current density is less than or equal to 1×10 -9 A / cm², and the noise equivalent power is less than or equal to 1×10 -15 W, and the infrared image resolution can reach 1280×1024 pixels. Compared with a conventional infrared detector prepared by a MEMS process, the method does not need complex micro-mechanical structure processing, the process steps are reduced by 30%-40%, and the preparation period is shortened by more than 50%; compared with a conventional thin-film structure InGaAs detector, the response speed is improved by 2-3 times, and the quantum efficiency is improved by 15%-20%, thereby providing high-performance hardware support for frontiers such as all-weather weak light detection and optical neural network light field conversion.

[0040] In combination with the above content, the method in the embodiment has the following beneficial effects: One: the application breaks through the bottleneck of the lack of visible light response of a conventional infrared imaging detector by constructing a multi-level wide spectrum absorption structure and a light-transmitting N-type substrate replacement strategy, while the short-wave infrared performance advantage is maintained; the 400-900 nm visible light is supplemented by the top PbS quantum dot layer or GaAsP nanomembrane, that is, the visible light supplementary absorption layer 70, the energy level transition layer 71 in the middle, that is, the intermediate InGaAsP gradient layer, optimizes the energy level matching, and the In0.53Ga0.47As layer below, that is, the main absorption layer, maintains the high quantum efficiency of greater than or equal to 75% in the 900-1800 nm band, thereby realizing seamless detection in the full wave band; Two: the temporary substrate is removed by epitaxial lift-off, and a high-transmittance N-type substrate (the visible light transmittance is greater than 80%) is bonded, thereby avoiding interface damage caused by thinning of the temporary substrate, improving process compatibility, and being more suitable for high-precision wide spectrum scenarios such as chip thermal imaging and space exploration; Three: the interface recombination rate can be controlled to be less than or equal to 1×10 5 cm / s by sulfuration through an (NH4)2S solution and deposition of an Al2O3 passivation layer 5 through an atomic layer deposition technology, and the dark current density is reduced to less than or equal to 1×10-9 A / cm²@0.1 V, which is 1-2 orders of magnitude lower than that of a conventional thinned InP substrate scheme; Four: the top layer of the guided-mode resonance grating 8 (period 200-600 nm) makes the optical path of visible light in the visible light complementary absorption layer 70 increase by 2-3 times, and the distributed Bragg reflector (DBR) formed by the lower SiO2 layer and the TiO2 layer can reflect the unabsorbed light twice, so that the visible light quantum efficiency is increased to ≥55%, there is no signal crosstalk, and the full-band light energy utilization rate is greatly improved; Five: the vertical interconnection with the silicon-based ROIC 1 is realized by using a low-temperature Cu-Cu hybrid bonding technology below 200 DEG C, the damage of high temperature to the device performance is avoided, and complex nanometer processing is not needed, and the process cost is lower than that of a traditional scheme.

[0041] The above is disclosed in the present application, and the related personnel can make various changes and modifications without deviating from the technical idea of the present application. The technical scope of the present application is not limited to the content of the specification, and must be determined according to the scope of the claims.

Claims

1. An infrared imaging detector, characterized in that, Including transparent N-type substrates; The surface of the light-transmitting N-type substrate is provided with, from bottom to top, a main absorption layer for absorbing short-wave infrared signals, an energy level transition layer for bandgap transition, and a visible light supplementary absorption layer for absorbing visible light; the top surface of the visible light supplementary absorption layer is provided with a mode-guided resonant grating, and the surface of the mode-guided resonant grating is provided with a microlens array. The bottom surface of the light-transmitting N-type substrate has M composite layers arranged from top to bottom. The composite layers include SiO2 layers and TiO2 layers arranged vertically. The bottom TiO2 layer is connected to the silicon-based ROIC.

2. The infrared imaging detector according to claim 1, characterized in that, The light-transmitting N-type substrate is an ITO substrate or a sapphire substrate; when the light-transmitting N-type substrate is a sapphire substrate, an Al2O3 passivation layer and an AllnAs buffer layer are sequentially provided from bottom to top between the top surface of the sapphire substrate and the main absorption layer, and the thickness of the Al2O3 passivation layer is between 2nm and 3nm.

3. An infrared imaging detector according to claim 1, characterized in that, The visible light supplementary absorption layer is a Pbs quantum dot layer or a GaAsP nanofilm. The particle size of the quantum dots in the Pbs quantum dot layer is between 5 nm and 10 nm, and the Ga composition of the GaAsP nanofilm is between 0.3 and 0.

5. The energy level transition layer is an InGaAsP graded band transition layer. The main absorption layer is In. 0.53 Ga 0.47 As layer.

4. An infrared imaging detector according to claim 1, characterized in that, The period of the guided-mode resonant grating is between 200nm and 600nm, and the sidewall perpendicularity of the guided-mode resonant grating is greater than or equal to 85°; M is between 5 and 8, the thickness of the SiO2 layer is between 100nm and 120nm, the thickness of the TiO2 layer is between 70nm and 90nm, and the refractive index difference between the SiO2 layer and the TiO2 layer is greater than or equal to 0.

5.

5. An infrared imaging detector according to claim 1, characterized in that, A Peltier cooling layer is provided between the bottom TiO2 layer and the silicon-based ROIC. The peripheral pads of the silicon-based ROIC are also connected to active quenching chips. The silicon-based ROIC is connected to an external display through a signal processing board.

6. A method for fabricating an infrared detector, characterized in that, Includes the following steps: S1: On the surface of the temporary substrate, from top to bottom, a visible light supplementary absorption layer for absorbing visible light, an energy level transition layer for band width transition, and a main absorption layer for absorbing short-wave infrared signals are sequentially fabricated. S2: The temporary substrate is removed by epitaxial stripping technology, and then the main absorption layer is bonded to the transparent N-type substrate by plasma activation bonding process; S3: A guided mode resonant grating is fabricated on the surface of the visible light supplementary absorption layer using electron beam lithography and inductively coupled plasma dry etching; M composite layers are sequentially formed from top to bottom on the bottom surface of a transparent N-type substrate using magnetron sputtering, wherein the composite layers include SiO2 layers and TiO2 layers arranged vertically. S4: Cu bumps are prepared on silicon-based ROIC, and then the vertical interconnection between the silicon-based ROIC and the bottom TiO2 layer is achieved by low-temperature Cu-Cu hybrid bonding technology; then, a microlens array is fabricated on the guided mode resonant grating using photolithography and hot pressing processes.

7. The method for fabricating an infrared imaging detector according to claim 6, characterized in that, In step S1: The temporary substrate is a clean silicon wafer or a sapphire substrate; In fabricating the visible light supplementary absorption layer, the visible light supplementary absorption layer is first formed by preparing a PbS quantum dot layer or a GaAsP nanofilm on the surface of a temporary substrate, and then the surface is modified by short-chain inorganic ligands to reduce defects. The quantum dot size of the Pbs quantum dot layer is between 5 nm and 10 nm, and the Ga component ratio of the GaAsP nanofilm is between 0.3 and 0.

5. When fabricating the energy level transition layer, an InGaAsP graded band is formed on the surface of the visible light supplementary absorption layer by molecular beam epitaxy to form the transition layer. The InGaAsP graded band is used to transition the band width from a value that matches the visible light supplementary absorption layer to a value that matches the underlying main absorption layer. During the fabrication of the main absorber layer, In was grown on the surface of the energy level transition layer using an organic chemical vapor deposition process. 0.53 Ga 0.47 The As layer is used to form the main absorption layer.

8. The method for fabricating an infrared imaging detector according to claim 6, characterized in that, In step S2: The transparent N-type substrate is either an ITO substrate or a sapphire substrate. When it is a sapphire substrate, the bottom surface of the main absorption layer is first connected to the AllnAs buffer layer. Then, the device is immersed in a (NH4)2S solution with a concentration between 10% and 20% for 5-10 minutes. Next, an Al2O3 passivation layer is grown on the AllnAs buffer layer using atomic layer deposition at a temperature between 120°C and 150°C. Finally, the Al2O3 passivation layer is connected to the sapphire substrate. The thickness of the Al2O3 passivation layer is between 2nm and 3nm.

9. The method for fabricating an infrared imaging detector according to claim 6, characterized in that, In step S3, the period of the guided-mode resonant grating is between 200nm and 600nm, the sidewall perpendicularity of the guided-mode resonant grating is greater than or equal to 85°, M is between 5 and 8, the thickness of the SiO2 layer is between 100nm and 120nm, the thickness of the TiO2 layer is between 70nm and 90nm, and the refractive index difference between the SiO2 layer and the TiO2 layer is greater than or equal to 0.

5. In step S4, the diameter of the prepared Cu bumps is between 5 μm and 10 μm, and the spacing between Cu contacts is between 10 μm and 20 μm; when performing Cu-Cu mixed bonding, the bonding temperature is less than 200°C, and the bonding pressure is between 20 MPa and 25 MPa; when fabricating the microlens array, the temperature is between 180°C and 200°C, and the pressure is between 5 MPa and 8 MPa.

10. A method for fabricating an infrared imaging detector according to claim 6, characterized in that, In step S4, the silicon-based ROIC is interconnected with the bottom TiO2 layer through the Peltier cooling layer; the peripheral pads of the silicon-based ROIC are also connected to an active quenching chip, which has an integral gating mode program for setting the gating voltage and integration time.

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