Magnetic tunnel junction structure, preparation method thereof, memory and electronic equipment

By introducing the interlayer coupling effect of the hard magnetic free layer and the in-plane ferromagnetic layer into the magnetic tunnel junction, the problems of poor anti-interference ability and current shunting effect of traditional magnetic tunnel junctions are solved, and higher anti-interference ability and process compatibility are achieved.

CN121285253APending Publication Date: 2026-01-06BEIJING SUPERSTRING ACAD OF MEMORY TECH
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Patent Information

Application Number
CN202410883417.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-07-02
Publication Date
2026-01-06

AI Technical Summary

Technical Problem

Traditional magnetic tunnel junctions have poor anti-interference capabilities, and the addition of magnetic electrodes leads to stray field problems and a significant shunting effect.

Method used

The structure is designed with a hard magnetic free layer, a barrier layer, a reference layer, a coupling medium layer and an in-plane ferromagnetic layer. The hard magnetic free layer material has vertical magnetic anisotropy, and the in-plane ferromagnetic layer material has in-plane magnetic anisotropy. The effective in-plane magnetic field is provided through the interlayer coupling effect, avoiding stray fields caused by external magnetic electrodes, and simplifying the structure to reduce shunting effects.

Benefits of technology

It significantly improves the anti-interference capability of magnetic tunnel junctions, simplifies the structure, enhances process compatibility with CMOS, and improves thermal stability.

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Abstract

The invention provides a magnetic tunnel junction structure, a preparation method thereof, a memory and electronic equipment. The magnetic tunnel junction structure comprises a hard magnetic free layer, a barrier layer, a reference layer, a coupling dielectric layer and an in-plane ferromagnetic layer, the barrier layer and the coupling dielectric layer are stacked on the surfaces of the two opposite sides of the hard magnetic free layer respectively, the reference layer is arranged on the side, away from the hard magnetic free layer, of the barrier layer, and the in-plane ferromagnetic layer is arranged on the side, away from the hard magnetic free layer, of the coupling dielectric layer. The material of the hard magnetic free layer comprises a hard magnetic material with perpendicular magnetic anisotropy, and the material of the in-plane ferromagnetic layer comprises a ferromagnetic material with in-plane magnetic anisotropy. The magnetic tunnel junction structure can avoid the problem of stray fields caused by external magnetic electrodes in the prior art, the structure is effectively simplified, the shunt effect is reduced, and the anti-interference capability of the magnetic tunnel junction can be remarkably improved.
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Description

Technical Field

[0001] This invention relates to the field of storage technology, and in particular to a magnetic tunnel junction structure, its preparation method, a memory, and an electronic device. Background Technology

[0002] Memory is a common component in electronic devices. Based on the duration for which data can be stored during actual use, memory can generally be divided into volatile memory and non-volatile memory. Magnetic Random Access Memory (MRAM) is a type of non-volatile memory that combines the high-speed read / write capabilities of Static Random Access Memory (SRAM) with the high integration density of Dynamic Random Access Memory (DRAM). Furthermore, it exhibits good compatibility with Complementary Metal Oxide Semiconductor (CMOS), thus attracting widespread attention in the industry. Summary of the Invention

[0003] This disclosure provides a magnetic tunnel junction structure that can improve anti-interference capability.

[0004] According to some embodiments of this disclosure, a magnetic tunnel junction structure is provided, which includes a hard magnetic free layer, a barrier layer, a reference layer, a coupling dielectric layer, and an in-plane ferromagnetic layer; the barrier layer and the coupling dielectric layer are respectively stacked on opposite side surfaces of the hard magnetic free layer, the reference layer is disposed on the side of the barrier layer away from the hard magnetic free layer, and the in-plane ferromagnetic layer is disposed on the side of the coupling dielectric layer away from the hard magnetic free layer;

[0005] The material of the hard magnetic free layer includes a hard magnetic material with perpendicular magnetic anisotropy, and the material of the in-plane ferromagnetic layer includes a ferromagnetic material with in-plane magnetic anisotropy.

[0006] In some embodiments of this disclosure, the hard magnetic material in the hard magnetic free layer is selected from one or more of cobalt-platinum alloy, iron-platinum alloy, gadolinium-iron-cobalt alloy, and cobalt-terbium alloy.

[0007] In some embodiments of this disclosure, the thickness of the coupling medium layer is 1 nm to 5 nm.

[0008] In some embodiments of this disclosure, the material of the coupling dielectric layer is selected from one or more of ruthenium, iridium, copper, and gold.

[0009] In some embodiments of this disclosure, the ferromagnetic material in the in-plane ferromagnetic layer is selected from one or more of iron, cobalt, nickel, iron-platinum alloy, cobalt-nickel alloy, and cobalt-iron alloy.

[0010] In some embodiments of this disclosure, the magnetic tunnel junction structure further includes a first bottom electrode and a second bottom electrode spaced apart, the first bottom electrode and the second bottom electrode being electrically connected to the hard magnetic free layer.

[0011] In some embodiments of this disclosure, the in-plane ferromagnetic layer is disposed between the first bottom electrode and the second bottom electrode, and the in-plane ferromagnetic layer is spaced apart from the first bottom electrode and the second bottom electrode; or,

[0012] The first bottom electrode and the second bottom electrode are disposed on the side of the in-plane ferromagnetic layer away from the hard magnetic free layer, and the first bottom electrode and the second bottom electrode are electrically connected to the hard magnetic free layer through the in-plane ferromagnetic layer and the coupling dielectric layer.

[0013] In some embodiments of this disclosure, the hard magnetic free layer is composed of a hard magnetic material; or,

[0014] The hard magnetic free layer includes a hard magnetic sublayer and a free sublayer stacked together. The hard magnetic material in the hard magnetic free layer is disposed in the hard magnetic sublayer. The coupling medium layer is disposed on the side of the hard magnetic sublayer away from the free sublayer. The barrier layer is disposed on the side of the free sublayer away from the hard magnetic sublayer.

[0015] In some embodiments of this disclosure, the magnetic tunnel junction structure further includes a sidewall protection layer, which is stacked on the barrier layer and surrounds the sidewall of the reference layer.

[0016] In some embodiments of this disclosure, the sidewall protective layer is made of one or more of silicon nitride, silicon oxide, aluminum oxide, silicon carbide, and silicon carbonitride.

[0017] In some embodiments of this disclosure, the sidewall protective layer has an opening located on the side of the reference layer away from the hard magnetic free layer; the magnetic tunnel junction structure further includes a top electrode, which is stacked on the side of the reference layer away from the hard magnetic free layer, and at least a portion of the top electrode fills the opening in the sidewall protective layer; and / or,

[0018] The magnetic tunnel junction structure further includes a pinning layer, which is stacked on the side of the reference layer away from the hard magnetic free layer, and the sidewall protective layer is also disposed around the pinning layer.

[0019] Furthermore, this disclosure also provides a method for preparing a magnetic tunnel junction structure as described in any of the above embodiments, comprising the following steps:

[0020] The in-plane ferromagnetic layer and the coupling dielectric layer are sequentially formed on the substrate; and...

[0021] The hard magnetic free layer, the barrier layer, and the reference layer are sequentially formed on the coupling medium layer.

[0022] In some embodiments of this disclosure, the step of forming a first bottom electrode and a second bottom electrode in a substrate is also included;

[0023] The steps of forming the in-plane ferromagnetic layer, the coupling dielectric layer, the first bottom electrode, and the second bottom electrode include:

[0024] A first conductive material portion and a second conductive material portion are formed in the substrate at intervals;

[0025] The coupling dielectric layer and the in-plane ferromagnetic layer are formed on the substrate between the first conductive material portion and the second conductive material portion;

[0026] A filling dielectric layer is formed on the substrate to expose the coupling dielectric layer, and the filling dielectric layer also has an opening to expose the first conductive material portion and the second conductive material portion;

[0027] The opening of the filling dielectric layer is filled with conductive material, the first conductive material portion and the conductive material together form a first bottom electrode, and the second conductive material portion and the conductive material together form a second bottom electrode;

[0028] Alternatively, the steps of forming the in-plane ferromagnetic layer, the coupling dielectric layer, the first bottom electrode, and the second bottom electrode include:

[0029] A first bottom electrode and a second bottom electrode are formed in the substrate at a distance from each other, and the first bottom electrode and the second bottom electrode are exposed from the surface of the substrate;

[0030] An in-plane ferromagnetic layer is deposited on the substrate to contact and cover the first bottom electrode and the second bottom electrode;

[0031] The coupling medium layer is formed on the in-plane ferromagnetic layer.

[0032] In some embodiments of this disclosure, after forming the reference layer, the step of forming a pinning layer and / or a top electrode on the reference layer is further included.

[0033] In some embodiments of this disclosure, the reference layer is disposed on a portion of the barrier layer, and after the reference layer is formed, the method further includes:

[0034] Forming a protective material layer covering the reference layer and the barrier layer; and,

[0035] The protective material layer located on top of the reference layer is etched away, leaving the remaining protective material layer as a sidewall protection layer.

[0036] In some embodiments of this disclosure, the step of forming a pinning layer on the reference layer is included before forming the sidewall protective layer; and / or,

[0037] After forming the sidewall protective layer, the method further includes forming a top electrode that at least partially fills the opening in the sidewall protective layer.

[0038] Furthermore, this disclosure also provides a memory comprising a plurality of first transistors, a plurality of second transistors, a plurality of word lines, a plurality of read bit lines, a plurality of first write bit lines, a plurality of second write bit lines, and a plurality of magnetic tunnel junction structures as described in any of the above embodiments; wherein,

[0039] One source / drain of the first transistor and one source / drain of the second transistor are electrically connected to the two ends of the hard magnetic free layer, the other source / drain of the first transistor is electrically connected to the first write bit line, the other source / drain of the second transistor is electrically connected to the second write bit line, the read bit line is electrically connected to the reference layer, and the word line is electrically connected to the gate of the first transistor and the gate of the second transistor.

[0040] The source / drain of a plurality of first transistors distributed along the extension direction of the first write bit line are electrically connected to the same first write bit line.

[0041] The source / drain of a plurality of second transistors distributed along the extension direction of the second write bit line are electrically connected to the same second write bit line;

[0042] The gates of a plurality of first transistors and a plurality of second transistors distributed along the extension direction of the word line are electrically connected to the same word line;

[0043] The plurality of reference layers arranged along the extension direction of the read bit line are electrically connected to the same read bit line.

[0044] Furthermore, this disclosure also provides an electronic device that includes a memory as described in any of the above embodiments.

[0045] The magnetic tunnel junction structure in this embodiment includes a hard magnetic free layer, a barrier layer, a reference layer, a coupling dielectric layer, and an in-plane ferromagnetic layer. The hard magnetic free layer is made of a hard magnetic material with perpendicular magnetic anisotropy, and the in-plane ferromagnetic layer is made of a ferromagnetic material with in-plane magnetic anisotropy. There is an interlayer coupling effect between the hard magnetic free layer and the in-plane ferromagnetic layer located on either side of the coupling dielectric layer, thereby providing a considerable effective in-plane magnetic field to the hard magnetic free layer. This allows the magnetization direction of the hard magnetic free layer to spontaneously reverse when energized, thus avoiding the stray field problem caused by external magnetic electrodes in conventional technologies. Furthermore, compared to conventional magnetic tunnel junctions, the magnetic tunnel junction structure in this embodiment is effectively simplified, reducing shunt effects and significantly improving the anti-interference capability of the magnetic tunnel junction.

[0046] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, the preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings. Attached Figure Description

[0047] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other embodiments can be obtained based on these drawings without creative effort.

[0048] Figure 1 This is a cross-sectional schematic diagram of a magnetic tunnel junction structure in one embodiment;

[0049] Figure 2 This is a cross-sectional schematic diagram of the magnetic tunnel junction structure in another embodiment;

[0050] Figure 3 This is a cross-sectional schematic diagram of the magnetic tunnel junction structure in another embodiment;

[0051] Figure 4 A schematic diagram illustrating the steps of a method for preparing a magnetic tunnel junction structure;

[0052] Figure 5 A schematic diagram of a structure for forming a first conductive material portion and a second conductive material portion spaced apart in a substrate;

[0053] Figure 6 In order to be in Figure 5 A schematic diagram of a structure with a coupling dielectric layer and an in-plane ferromagnetic layer formed on the basis of the structure shown;

[0054] Figure 7 In order to be in Figure 6 A schematic diagram of a structure in which a filling dielectric layer is formed based on the structure shown;

[0055] Figure 8 In order to be in Figure 7 A schematic diagram of a structure filled with conductive material based on the structure shown.

[0056] Figure 9 In order to be in Figure 8 A schematic diagram of a hard magnetic free layer formed on the basis of the structure shown;

[0057] Figure 10 In order to be in Figure 9 A schematic diagram of a barrier layer formed on the basis of the structure shown;

[0058] Figure 11 In order to be in Figure 10 A schematic diagram of a reference material layer formed on the basis of the structure shown;

[0059] Figure 12 In order to be in Figure 11 A schematic diagram of a reference layer formed based on the structure shown;

[0060] Figure 13 In order to be in Figure 12 A schematic diagram of a structure in which a protective material layer is formed based on the structure shown.

[0061] Figure 14 In order to be in Figure 13 A schematic diagram of a structure in which a sidewall protective layer is formed based on the structure shown;

[0062] Figure 15 A schematic diagram of the structure in which the first bottom electrode and the second bottom electrode are formed in the substrate;

[0063] Figure 16 For Figure 15 A schematic diagram of a structure in which an in-plane ferromagnetic layer and a coupling dielectric layer are formed based on the structure shown.

[0064] Figure 17 This is a schematic diagram of a partial structure of a memory.

[0065] The reference numerals and their meanings in the attached figures are as follows:

[0066] 100, Substrate; 101, Filling dielectric layer; 102, Isolation dielectric layer; 110, Hard magnetic free layer; 111, Hard magnetic sublayer; 112, Free sublayer; 120, Coupling dielectric layer; 130, In-plane ferromagnetic layer; 140, Barrier layer; 150, Reference layer; 151, Reference material layer; 160, Pinning layer; 161, Pinning material layer; 170, Cap layer; 171, Cap material layer; 180, Hard mask layer; 181, Hard mask material layer; 190, Sidewall protection layer; 210, First bottom electrode; 211, First conductive material portion; 220, Second bottom electrode; 221, Second conductive material portion; 230, Top electrode; 310, First transistor; 320, Second transistor; 410, Word line; 420, Read bit line; 430, First write bit line; 440, Second write bit line. Detailed Implementation

[0067] To facilitate understanding of this document, a more comprehensive description will be provided below. Preferred embodiments are given herein. However, this document can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to make the content of this document more thorough and comprehensive.

[0068] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this applies. The terminology used herein in the specification is for the purpose of describing particular embodiments only and is not intended to be limiting of the document.

[0069] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or parts, these elements, components, areas, layers, and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or part from another element, component, area, layer, or part.

[0070] Spatial relation terms such as “below,” “under,” “below,” “below,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship of one element or feature to other elements or features. It should be understood that spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figures is flipped, then the element or feature described as “below,” “below,” or “below” other elements or features will be oriented “above” other elements or features. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Devices may be oriented in other ways (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used will be interpreted accordingly.

[0071] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprise” and / or “comprising,” when used in this specification, identify the presence of features, integers, steps, operations, elements, and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0072] Magnetic random access memories (RAMs) store information by changing the direction of magnetic polarization. Their basic storage unit is a magnetic tunnel junction (MTJ), which typically consists of a reference layer, a free layer, and a tunneling dielectric layer between them. The magnetization direction of the reference layer is fixed, while the magnetization direction of the free layer changes with the applied current. The resistance of the MTJ is lowest when the magnetization directions of the reference and free layers are aligned, and highest when they are opposite. Therefore, by changing the magnetization direction of the free layer, the resistance of the MTJ can be changed, thus recording data. For spin-orbit random access memories (SORMs), an auxiliary magnetic field is usually required to drive the reversal of the free layer's magnetization direction, which results in poor noise immunity for the MTJ.

[0073] Embodiments of this disclosure provide a magnetic tunnel junction structure, comprising a hard magnetic free layer, a barrier layer, a reference layer, a coupling dielectric layer, and an in-plane ferromagnetic layer. The barrier layer and the coupling dielectric layer are respectively stacked on opposite sides of the hard magnetic free layer. The reference layer is disposed on the side of the barrier layer away from the hard magnetic free layer, and the in-plane ferromagnetic layer is disposed on the side of the coupling dielectric layer away from the hard magnetic free layer. The hard magnetic free layer is made of a hard magnetic material, and the in-plane ferromagnetic layer is made of a ferromagnetic material with in-plane magnetic anisotropy.

[0074] The magnetic tunnel junction structure in this embodiment includes a hard magnetic free layer, a barrier layer, a reference layer, a coupling dielectric layer, and an in-plane ferromagnetic layer. The hard magnetic free layer is made of a hard magnetic material with perpendicular magnetic anisotropy, and the in-plane ferromagnetic layer is made of a ferromagnetic material with in-plane magnetic anisotropy. There is an interlayer coupling effect between the hard magnetic free layer and the in-plane ferromagnetic layer located on either side of the coupling dielectric layer, thereby providing a considerable effective in-plane magnetic field to the hard magnetic free layer. This allows the magnetization direction of the hard magnetic free layer to spontaneously reverse when energized, thus avoiding the stray field problem caused by external magnetic electrodes in conventional technologies. Furthermore, compared to conventional magnetic tunnel junctions, the magnetic tunnel junction structure in this embodiment is effectively simplified, reducing shunt effects and significantly improving the anti-interference capability of the magnetic tunnel junction.

[0075] Figure 1 This is a schematic cross-sectional view of a magnetic tunnel structure according to an embodiment of this disclosure. (Refer to...) Figure 1 As shown, in this embodiment, the magnetic tunnel junction structure includes a hard magnetic free layer 110, a barrier layer 140, a reference layer 150, a coupling dielectric layer 120, and an in-plane ferromagnetic layer 130. The barrier layer 140 and the coupling dielectric layer 120 are respectively stacked on opposite sides of the hard magnetic free layer 110. The reference layer 150 is disposed on the side of the barrier layer 140 away from the hard magnetic free layer 110, and the in-plane ferromagnetic layer 130 is disposed on the side of the coupling dielectric layer 120 away from the hard magnetic free layer 110. The hard magnetic free layer 110 is made of a hard magnetic material with perpendicular magnetic anisotropy, and the in-plane ferromagnetic layer 130 is made of a ferromagnetic material with in-plane magnetic anisotropy.

[0076] In this embodiment, hard magnetic material refers to a material that can maintain its magnetism for a long time after magnetization, and the hard magnetic free layer 110 should have a variable magnetization direction. Ferromagnetic material refers to a material with ferromagnetic properties. A coupling dielectric layer 120 is disposed between the hard magnetic free layer 110 and the in-plane ferromagnetic layer 130 to separate the hard magnetic free layer 110 and the in-plane ferromagnetic layer 130, so that the hard magnetic free layer 110 and the in-plane ferromagnetic layer 130 form an interlayer coupling structure. The in-plane ferromagnetic layer 130 can provide a considerable in-plane effective magnetic field to the hard magnetic free layer 110, thereby avoiding stray fields caused by external magnetic electrodes. The reference layer 150 should have an invariant magnetic moment direction, and the barrier layer 140 is used to separate the reference layer 150 and the hard magnetic free layer 110.

[0077] In some examples of this embodiment, the hard magnetic material in the hard magnetic free layer 110 is selected from one or more of cobalt-platinum alloy (CoPt), iron-platinum alloy (FePt), gadolinium-iron-cobalt alloy (GdFeCo), and cobalt-terbium alloy (CoTb). Traditionally, cobalt-iron-boron alloy (CoFeB) is commonly used as the material for free layers; however, CoFeB has low thermal stability, thus limiting the processing temperature range for fabricating device structures. Compared to CoFeB, the aforementioned hard magnetic materials exhibit superior perpendicular magnetic anisotropy and higher thermal stability, improving the process compatibility between this magnetic tunnel junction structure and CMOS.

[0078] In some examples of this embodiment, the thickness of the hard magnetic free layer 110 can be 3nm to 10nm. Specifically, the thickness of the hard magnetic free layer 110 can be 3nm, 4nm, 5nm, 6nm, 7nm, 8nm, 9nm, or 10nm, or the thickness of the hard magnetic free layer 110 can be within any two of the above-mentioned thicknesses.

[0079] In some examples of this embodiment, the ferromagnetic material in the in-plane ferromagnetic layer 130 is selected from one or more of iron, cobalt, nickel, iron-platinum alloy, cobalt-nickel alloy, and cobalt-iron alloy.

[0080] In some examples of this embodiment, the thickness of the in-plane ferromagnetic layer 130 can be 5 nm to 100 nm. Further, the thickness of the in-plane ferromagnetic layer 130 can be 10 nm to 50 nm, so that the in-plane ferromagnetic layer 130 provides a more considerable effective in-plane magnetic field and also minimizes the shunting effect of the in-plane ferromagnetic layer 130. The thickness of the in-plane ferromagnetic layer 130 can be 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, or 50 nm, or the thickness can be within any two of the above-mentioned thicknesses.

[0081] In some examples of this embodiment, the thickness of the coupling dielectric layer 120 is 1 nm to 5 nm. This ensures the interlayer coupling effect between the in-plane ferromagnetic layer 130 and the hard magnetic free layer 110 while effectively spacing them. The thickness of the coupling dielectric layer 120 between the in-plane ferromagnetic layer 130 and the hard magnetic free layer 110 can be 1 nm, 1.5 nm, 2 nm, 2.5 nm, 3 nm, 3.5 nm, 4 nm, 4.5 nm, or 5 nm, or the thickness of the coupling dielectric layer 120 can be within any two of the above-mentioned thicknesses.

[0082] In some examples of this embodiment, the material of the coupling dielectric layer 120 is a non-magnetic material.

[0083] In some examples of this embodiment, the hard magnetic free layer 110, the coupling medium layer 120, and the in-plane ferromagnetic layer 130 may be sequentially contacted.

[0084] Reference Figure 1 As shown, in some examples of this embodiment, the magnetic tunnel junction structure further includes a first bottom electrode 210 and a second bottom electrode 220 spaced apart, which are electrically connected to the hard magnetic free layer 110. The first bottom electrode 210 and the second bottom electrode 220 are used to electrically connect the hard magnetic free layer 110 to a switching device, such as a transistor, to control the application of current to the hard magnetic free layer 110. The transistor can be a selection transistor or a switching transistor. By applying current, the hard magnetic material in the hard magnetic free layer 110 can achieve its own magnetic moment reversal without the aid of a separate heavy metal layer.

[0085] Reference Figure 1 As shown, in some examples of this embodiment, the in-plane ferromagnetic layer 130 is disposed between the first bottom electrode 210 and the second bottom electrode 220, and the in-plane ferromagnetic layer 130 is spaced apart from the first bottom electrode 210 and the second bottom electrode 220. Further, the first bottom electrode 210 and the second bottom electrode 220 can directly contact the hard magnetic free layer 110 to be electrically connected to it.

[0086] In some examples of this embodiment, the material of the coupling dielectric layer 120 may be a metal or a metal oxide.

[0087] Furthermore, in some examples of this embodiment, the metal in the coupling dielectric layer 120 can be selected from one or more of ruthenium, iridium, copper, and gold, and the metal oxide can be nickel oxide. Using a metal oxide as the material of the coupling dielectric layer 120 can minimize the current passing through the in-plane ferromagnetic layer 130, thereby reducing the shunting effect.

[0088] In some examples of this embodiment, the coupling medium layer 120 may have a single-layer membrane structure or a multi-layer membrane structure.

[0089] In some examples of this embodiment, the hard magnetic free layer 110 may be composed of hard magnetic material. By reversing the magnetic moment of the hard magnetic material itself, the magnetic moments of the hard magnetic free layer 110 and the reference layer 150 are in the same or opposite direction, thereby enabling the magnetic tunnel junction to switch between a high-resistivity state and a low-resistivity state.

[0090] Reference Figure 1As shown, in some examples of this embodiment, the magnetic tunnel junction structure further includes a sidewall protection layer 190, which is stacked on the barrier layer 140 and surrounds the sidewall of the reference layer 150. The sidewall protection layer 190 serves to protect the reference layer 150 from the side and maintain the structural stability of the reference layer 150.

[0091] In some examples of this embodiment, the material of the sidewall protective layer 190 includes one or more of silicon nitride, silicon oxide, aluminum oxide, silicon carbide, and silicon carbonitride.

[0092] In some examples of this embodiment, the material of the reference layer 150 may be selected from ferromagnetic materials. For example, the material of the reference layer 150 may be selected from a cobalt-iron-boron alloy.

[0093] In some examples of this embodiment, the thickness of the reference layer 150 may be 0.8 nm to 2 nm.

[0094] In some examples of this embodiment, the material of the barrier layer 140 may be a non-magnetic metal oxide. For example, the material of the barrier layer 140 may be selected from one or more of magnesium oxide, zinc magnesium oxide, boron magnesium oxide, and aluminum magnesium oxide.

[0095] In some examples of this embodiment, the thickness of the barrier layer 140 can be 0.5 nm to 2.5 nm.

[0096] Reference Figure 1 As shown, in some examples of this embodiment, the magnetic tunnel junction structure further includes a pinning layer 160, which is stacked on the side of the reference layer 150 away from the hard magnetic free layer 110, and the sidewall protective layer 190 is also disposed around the pinning layer 160. The pinning layer 160 serves to maintain a fixed magnetization direction for the reference layer 150.

[0097] In some examples of this embodiment, the material of the pinning layer 160 may include one or more of cobalt (Co), platinum (Pt), ruthenium (Ru), iridium-manganese alloy (IrMn), and platinum-manganese alloy (PtMn). For example, the pinning layer 160 may be selected from {Co / Pt} n / Ru / {Co / Pt} n , IrMn or PtMn, where {Co / Pt} n This indicates a multilayer stacked structure composed of cobalt and platinum metals.

[0098] Reference Figure 1 As shown, in some examples of this embodiment, the magnetic tunnel junction structure further includes a cap layer 170, which is stacked on the side of the reference layer 150 away from the hard magnetic free layer 110. Further, the cap layer 170 may be disposed on the pinning layer 160.

[0099] In some examples of this embodiment, the material of the cap 170 may be selected from one or more of magnesium oxide, hafnium oxide (HfO2), and ruthenium oxide (RuO2).

[0100] Reference Figure 1 As shown, in some examples of this embodiment, the magnetic tunnel junction structure further includes a hard mask layer 180. The hard mask layer 180 is stacked on the side of the reference layer 150 away from the hard magnetic free layer 110. Further, the hard mask layer 180 may be disposed on the cap layer 170.

[0101] In some examples of this embodiment, the material of the hard mask layer 180 may be selected from one or more of titanium, titanium nitride, tantalum and tantalum nitride.

[0102] Reference Figure 1 As shown, in some examples of this embodiment, the sidewall protective layer 190 is also disposed around the cap layer 170 and the hard mask layer 180.

[0103] Reference Figure 1 As shown, in some examples of this embodiment, the sidewall protective layer 190 is provided with an opening on the side of the reference layer 150 away from the hard magnetic free layer 110. The magnetic tunnel junction structure also includes a top electrode 230, which is stacked on the side of the reference layer 150 away from the hard magnetic free layer 110, and at least part of the top electrode 230 is filled in the opening of the sidewall protective layer 190.

[0104] In some examples of this embodiment, the material of the top electrode 230 includes one or more of the following elements: tantalum, tungsten, ruthenium, iron, cobalt, nickel, titanium, copper, zinc, silicon, platinum, carbon, nitrogen, and oxygen.

[0105] Furthermore, in some examples of this embodiment, the magnetic tunnel junction structure may also include a top conductor electrically connected to the top electrode 230. The top conductor may be a double damask structure or a single damask structure. For example, it may be a double damask structure of TV+TM formed by filling a top via (TV) with top metal (TM) or a single damask structure formed by directly opening a channel and filling the channel with metal.

[0106] Figure 2 This is a schematic cross-sectional view of a magnetic tunnel structure according to another embodiment of this disclosure. (Refer to...) Figure 2As shown, in this embodiment, the magnetic tunnel junction structure also includes a hard magnetic free layer 110, a barrier layer 140, a reference layer 150, a coupling dielectric layer 120, and an in-plane ferromagnetic layer 130. The barrier layer 140 and the coupling dielectric layer 120 are respectively stacked on opposite sides of the hard magnetic free layer 110, the reference layer 150 is disposed on the side of the barrier layer 140 away from the hard magnetic free layer 110, and the in-plane ferromagnetic layer 130 is disposed on the side of the coupling dielectric layer 120 away from the hard magnetic free layer 110.

[0107] Reference Figure 2 As shown, in this embodiment, the first bottom electrode 210 and the second bottom electrode 220 are disposed on the side of the in-plane ferromagnetic layer 130 away from the hard magnetic free layer 110, and the first bottom electrode 210 and the second bottom electrode 220 are electrically connected to the hard magnetic free layer 110 through the in-plane ferromagnetic layer 130 and the coupling dielectric layer 120. For example, the first bottom electrode 210 and the second bottom electrode 220 can directly contact the in-plane ferromagnetic layer 130.

[0108] In some examples of this embodiment, the material of the coupling dielectric layer 120 may be metal, so that the first bottom electrode 210 and the second bottom electrode 220 can be electrically connected to the hard magnetic free layer 110.

[0109] Furthermore, in some examples of this embodiment, the metal in the coupling dielectric layer 120 may be selected from one or more of ruthenium, iridium, copper, and gold.

[0110] In some examples of this embodiment, the coupling medium layer 120 may have a single-layer membrane structure or a multi-layer membrane structure.

[0111] Understandable, such as Figure 2 The magnetic tunnel junction structure shown is similar to Figure 1 The main difference in the magnetic tunnel junction structure shown lies in the positional relationship between the first bottom electrode 210, the second bottom electrode 220, and the hard magnetic free layer 110. Figure 2 The thickness of each layer and the selection of materials in the magnetic tunnel structure can be referred to the contents shown in the previous embodiment.

[0112] Figure 3 This is a schematic cross-sectional view of a magnetic tunnel structure according to another embodiment of this disclosure. (Refer to...) Figure 3 As shown, in this embodiment, the magnetic tunnel junction structure also includes a hard magnetic free layer 110, a barrier layer 140, a reference layer 150, a coupling dielectric layer 120, and an in-plane ferromagnetic layer 130. The barrier layer 140 and the coupling dielectric layer 120 are respectively stacked on opposite sides of the hard magnetic free layer 110, the reference layer 150 is disposed on the side of the barrier layer 140 away from the hard magnetic free layer 110, and the in-plane ferromagnetic layer 130 is disposed on the side of the coupling dielectric layer 120 away from the hard magnetic free layer 110.

[0113] Reference Figure 3 As shown, in this embodiment, the hard magnetic free layer 110 includes a stacked hard magnetic sublayer 111 and a free sublayer 112. The hard magnetic material in the hard magnetic free layer 110 is disposed in the hard magnetic sublayer 111. The coupling dielectric layer 120 is disposed on the side of the hard magnetic sublayer 111 away from the free sublayer 112, and the barrier layer 140 is disposed on the side of the free sublayer 112 away from the hard magnetic sublayer 111. In this embodiment, the hard magnetic sublayer 111 serves as a structure for providing spin-orbit moment current. The spin-orbit moment current provided by the hard magnetic sublayer 111 can deflect the magnetization direction in the free sublayer 112, thereby controlling the resistance of the magnetic tunnel junction.

[0114] In some examples of this embodiment, the material of the free sublayer 112 has a variable magnetization direction. For example, the material of the free sublayer 112 may include cobalt iron boron, and the material of the free sublayer 112 may also include one or more of cobalt iron alloy, iron, tungsten, and molybdenum.

[0115] Understandable, such as Figure 3 The magnetic tunnel junction structure shown is similar to Figure 1 The main difference in the magnetic tunnel junction structure shown lies in the structure of the hard magnetic free layer 110. Figure 3 The thickness of each layer and the selection of materials in the magnetic tunnel structure can be referred to the contents shown in the previous embodiment.

[0116] One embodiment of this disclosure also provides a method for preparing a magnetic tunnel junction structure. Figure 4 This is a schematic diagram illustrating the steps of the preparation method. (Refer to...) Figure 4 As shown, the preparation method of the magnetic tunnel junction structure includes steps S1 to S3.

[0117] Step S1: An in-plane ferromagnetic layer 130 and a coupling dielectric layer 120 are sequentially formed on the substrate 100.

[0118] In some examples of this embodiment, when an in-plane ferromagnetic layer 130 and a coupling dielectric layer 120 are sequentially formed on a substrate 100, the step of forming a first bottom electrode 210 and a second bottom electrode 220 in the substrate 100 is also included.

[0119] As one embodiment, the steps of forming the in-plane ferromagnetic layer 130, the coupling dielectric layer 120, the first bottom electrode 210, and the second bottom electrode 220 include:

[0120] A first conductive material portion 211 and a second conductive material portion 221 are formed in the substrate 100 at intervals.

[0121] A coupling dielectric layer 120 and an in-plane ferromagnetic layer 130 are formed on the substrate 100 between the first conductive material portion 211 and the second conductive material portion 221.

[0122] A filling dielectric layer 101 is formed on the substrate 100 to expose the in-plane ferromagnetic layer 130, and the filling dielectric layer 101 also has an opening to expose the first bottom electrode 210 and the second bottom electrode 220.

[0123] Conductive material is filled into the opening of the dielectric layer 101. The first conductive material part 211 and the conductive material form the first bottom electrode 210, and the second conductive material part 221 and the conductive material form the second bottom electrode 220.

[0124] Figure 5 A schematic diagram showing the structure of a first conductive material portion 211 and a second conductive material portion 221 spaced apart in a substrate 100. (Refer to...) Figure 5 As shown, the first conductive material portion 211 and the second conductive material portion 221 are disposed at intervals in the substrate 100, and the first conductive material portion 211 and the second conductive material portion 221 can be exposed from the surface of the substrate 100.

[0125] In some examples of this embodiment, the material of the substrate 100 may be selected from silicon, silicon carbide, gallium nitride, or silicon germanium.

[0126] In some examples of this embodiment, the material of the first conductive material portion 211 may be selected from metallic materials. For example, the material of the first conductive material portion 211 may include tungsten.

[0127] In some examples of this embodiment, the material of the second conductive material portion 221 may be selected from metallic materials. For example, the material of the second conductive material portion 221 may include tungsten.

[0128] Figure 6 In order to be in Figure 5 A schematic diagram showing a structure with a coupling dielectric layer 120 and an in-plane ferromagnetic layer 130 formed on the basis of the structure shown. (Refer to...) Figure 6 As shown, the coupling dielectric layer 120 and the in-plane ferromagnetic layer 130 are stacked on the substrate 100 and located between the first conductive material portion 211 and the second conductive material portion 221.

[0129] The steps of forming the in-plane ferromagnetic layer 130 and the coupling dielectric layer 120 may include: sequentially depositing an in-plane ferromagnetic material layer and a coupling dielectric material layer on a substrate 100; etching the coupling dielectric material layer and the in-plane ferromagnetic material layer, retaining portions of the coupling dielectric material layer and the in-plane ferromagnetic material layer located between the first conductive material portion 211 and the second conductive material portion 221, which serve as the coupling dielectric layer 120 and the in-plane ferromagnetic layer 130, respectively.

[0130] In some examples of this embodiment, the in-plane ferromagnetic material layer can be deposited via physical vapor deposition, such as magnetron sputtering.

[0131] In some examples of this embodiment, the deposition of the coupling medium material layer can be performed by physical vapor deposition, such as magnetron sputtering.

[0132] In some examples of this embodiment, the etching method for the in-plane ferromagnetic material layer and the coupling dielectric material layer can be dry etching, such as ion beam etching. Ion beam etching can sequentially etch away the coupling dielectric material layer and the in-plane ferromagnetic material layer without changing the mask or etchant.

[0133] Figure 7 In order to be in Figure 6 A schematic diagram of a structure in which a filling dielectric layer 101 is formed based on the structure shown. (Refer to...) Figure 7 As shown, in some examples of this embodiment, the filling dielectric layer 101 is stacked on the substrate 100, and the surface of the filling dielectric layer 101 can be flush with the surface of the coupling dielectric layer 120, so that the coupling dielectric layer 120 is exposed from the filling dielectric layer 101, and the filling dielectric layer 101 has through holes exposing the first conductive material portion 211 and the second conductive material portion 221.

[0134] In some examples of this embodiment, the material of the filling dielectric layer 101 may include silicon oxide, silicon nitride, or silicon oxynitride. The steps of forming the filling dielectric layer 101 may include: depositing a filling dielectric material on the substrate 100, etching back to expose the coupling dielectric layer 120 using chemical mechanical planarization, and then etching the filling dielectric layer 101 to form vias exposing the first conductive material portion 211 and the second conductive material portion 221.

[0135] Figure 8 In order to be in Figure 7 A schematic diagram of a structure filled with conductive material based on the shown structure. (Refer to...) Figure 8 As shown, conductive material is deposited in the through-holes of the filling dielectric layer 101 and contacts the first conductive material portion 211 and the second conductive material portion 221, respectively. The conductive material and the first conductive material portion 211 form a first electrode, and the conductive material and the second conductive material portion 221 form a second electrode. The conductive material can be the same material as the first conductive material portion 211 and the second conductive material portion 221.

[0136] Furthermore, in some examples of this embodiment, the conductive material can be deposited via chemical vapor deposition. After depositing the conductive material, it can be planarized using methods such as chemical mechanical polishing.

[0137] It is understandable that, through methods such as Figures 5-8 The method shown can be used to fabricate a first bottom electrode 210, a second bottom electrode 220, an in-plane ferromagnetic layer 130, and a coupling dielectric layer 120.

[0138] Step S2: A hard magnetic free layer 110 is formed on the coupling medium layer 120.

[0139] Figure 9 In order to be in Figure 8 A schematic diagram of a hard magnetic free layer 110 formed based on the structure shown. (Refer to...) Figure 10 As shown, the hard magnetic free layer 110 is formed on the coupling dielectric layer 120, and the hard magnetic free layer 110 is in direct contact with the first bottom electrode 210 and the second bottom electrode 220.

[0140] In some examples of this embodiment, the step of forming the hard magnetic free layer 110 may include: depositing a hard magnetic material and patterning the hard magnetic material to form the hard magnetic free layer 110.

[0141] One method for depositing hard magnetic materials is chemical vapor deposition.

[0142] The patterning process for hard magnetic materials can be carried out by dry etching or wet etching.

[0143] Step S3: A barrier layer 140 and a reference layer 150 are sequentially formed on the hard magnetic free layer 110.

[0144] Figure 10 In order to be in Figure 9 A schematic diagram of a structure in which a barrier layer 140 is formed based on the structure shown. (Refer to...) Figure 10 As shown, the barrier layer 140 is formed on the hard magnetic free layer 110, and the barrier layer 140 is directly in contact with the hard magnetic free layer 110.

[0145] In some examples of this embodiment, the method for forming the barrier layer 140 on the hard magnetic free layer 110 may be chemical vapor deposition. The barrier layer 140 may cover the hard magnetic free layer 110.

[0146] In some examples of this embodiment, the step of forming a reference layer 150 on the hard magnetic free layer 110 includes: depositing a reference material layer 151 on the hard magnetic free layer 110 and patterning the reference material layer 151 to form the reference layer 150. Figure 11 In order to be in Figure 10 A schematic diagram of a structure in which a reference material layer 151 is formed based on the structure shown. Figure 12 In order to be in Figure 11 A schematic diagram of a reference layer 150 formed on the basis of the structure shown.

[0147] The reference material layer 151 can be deposited using chemical vapor deposition.

[0148] Reference Figure 11As shown, after depositing a reference material layer 151 on the hard magnetic free layer 110, the method further includes the step of depositing a pinning material layer 161 on the reference material layer 151. Further, the method further includes the step of sequentially depositing a cap material layer 171 and a hard mask material layer 181 on the pinning material layer 161.

[0149] The deposition of the pinning material layer 161, the cap material layer 171, and the hard mask material layer 181 can all be carried out by chemical vapor deposition.

[0150] Reference Figure 12 As shown, in the step of patterning the reference material layer 151, the hard mask material layer 181, the cap material layer 171, the stapling material layer 161 and the reference material layer 151 are patterned in sequence, and the hard mask layer 180, the cap layer 170, the stapling layer 160 and the reference layer 150 are formed accordingly.

[0151] In the patterning process, the same mask pattern can be used to simplify the actual fabrication process. The patterning process can be wet etching, and the barrier layer 140 can serve as an etching stop layer in the patterning process to avoid damage to the hard magnetic free layer 110 during the etching process.

[0152] In some examples of this embodiment, after forming the reference layer 150, the method further includes: depositing a protective material layer covering the reference layer 150 and the barrier layer 140; and etching away the protective material layer on top of the reference layer 150, leaving the remaining protective material layer as the sidewall protective layer 190. Figure 13 In order to be in Figure 12 A schematic diagram of a structure in which a protective material layer is formed based on the structure shown. Figure 14 In order to be in Figure 13 A schematic diagram of a structure in which a sidewall protective layer 190 is formed based on the structure shown.

[0153] Reference Figure 13 and Figure 14 As shown, a protective material layer can be deposited on the reference layer 150 and the barrier layer 140, and extends to cover the sidewalls of the reference layer 150, the pinned layer 160, the cap layer 170, and the hard mask layer 180. The protective layer has an opening above the reference layer 150 to facilitate electrical connection between the subsequently fabricated top electrode 230 and the reference layer 150.

[0154] In some examples of this embodiment, the protective material layer may be formed by chemical vapor deposition.

[0155] Reference Figure 13 As shown, after forming the protective material layer, the step of forming an isolation medium layer 102 covering the protective material layer is also included.

[0156] In some examples of this embodiment, the isolation dielectric layer 102 may be formed by chemical vapor deposition. After depositing the material of the isolation dielectric layer 102, the deposited material may be planarized to give the isolation dielectric layer 102 a flat top surface. Further, referring to... Figure 14 As shown, before etching away the protective material layer, the process further includes etching the isolation dielectric layer 102 to pattern the isolation dielectric layer 102, wherein the opening of the isolation dielectric layer 102 corresponds to the opening of the sidewall protective layer 190.

[0157] In some examples of this embodiment, a top electrode 230 is formed that at least partially fills an opening in the sidewall protective layer 190. The top electrode 230 is electrically connected to the reference layer 150. The top electrode 230 may be formed by chemical vapor deposition.

[0158] It is understandable that, through the above steps S1 to S3, as shown above, the following can be prepared: Figure 1 Magnetic tunnel structure.

[0159] In another embodiment, step S1, forming the in-plane ferromagnetic layer 130, the coupling dielectric layer 120, the first bottom electrode 210, and the second bottom electrode 220, includes:

[0160] A first bottom electrode 210 and a second bottom electrode 220 are formed in a substrate 100 at intervals, and the first bottom electrode 210 and the second bottom electrode 220 are exposed from the surface of the substrate 100.

[0161] An in-plane ferromagnetic layer 130 is deposited on the substrate 100 to contact and cover the first bottom electrode 210 and the second bottom electrode 220, and a coupling dielectric layer 120 is formed on the in-plane ferromagnetic layer 130.

[0162] Figure 15 This is a schematic diagram showing the structure in which the first bottom electrode 210 and the second bottom electrode 220 are formed in the substrate 100. (Refer to...) Figure 15 As shown, the first bottom electrode 210 and the second bottom electrode 220 are arranged at intervals, and the first bottom electrode 210 and the second bottom electrode 220 can be exposed from the surface of the substrate 100.

[0163] Figure 16 For Figure 15 A schematic diagram showing an in-plane ferromagnetic layer 130 and a coupling dielectric layer 120 formed on the structure shown. (Refer to...) Figure 16 As shown, an in-plane ferromagnetic layer 130 is stacked on the substrate 100, and the in-plane ferromagnetic layer 130 contacts the first bottom electrode 210 and the second bottom electrode 220. A coupling dielectric layer 120 is stacked on the in-plane ferromagnetic layer 130.

[0164] In some examples of this embodiment, the in-plane ferromagnetic layer 130 and the coupling dielectric layer 120 may be formed by chemical vapor deposition, and the in-plane ferromagnetic layer 130 and the coupling dielectric layer 120 may cover the substrate 100.

[0165] It is understandable that, in the formation of such Figure 16 Following the structure shown, the hard magnetic free layer 110, the barrier layer 140, and the reference layer 150 can be sequentially formed on the coupling dielectric layer 120 by referring to steps S2 and S3 above, thus obtaining the structure shown. Figure 2 The magnetic tunnel junction structure shown is not described in detail here.

[0166] Furthermore, one embodiment of this disclosure also provides a memory including a magnetic tunnel junction structure as described in the above embodiments.

[0167] Figure 17 This is a partial structural diagram of the memory in this embodiment. (Refer to...) Figure 17 As shown, in this embodiment, the memory may include a first transistor 310, a second transistor 320, a word line 410, a read bit line 420, a first write bit line 430, a second write bit line 440, and the magnetic tunnel junction structure described in the previous embodiment. One source / drain of the first transistor 310 and one source / drain of the second transistor 320 are electrically connected to the two ends of the hard magnetic free layer 110, the other source / drain of the first transistor 310 is electrically connected to the first write bit line 430, the other source / drain of the second transistor 320 is electrically connected to the second write bit line 440, the read bit line is electrically connected to the reference layer 150, and the word line 410 is electrically connected to the gate of the first transistor and the gate of the second transistor.

[0168] Figure 17 A partial structural schematic diagram of the memory is shown. It can be understood that the memory may include multiple arrayed magnetic tunnel junction structures. Accordingly, there are multiple first transistors 310 and multiple second transistors 320, as well as multiple word lines 410, read bit lines 420, first write bit lines 430, and multiple second write bit lines 440. The sources / drains of the multiple first transistors 310 distributed along the extension direction of the first write bit line 430 are electrically connected to the same first write bit line 430. The sources / drains of the multiple second transistors 320 distributed along the extension direction of the second write bit line 440 are electrically connected to the same second write bit line 440. The gates of the multiple first transistors 310 and the gates of the multiple second transistors 320 distributed along the extension direction of the word line 410 are electrically connected to the same word line 410. Multiple reference layers 150 arranged along the extension direction of the read bit line 420 are electrically connected to the same read bit line 420.

[0169] Reference Figure 17As shown, it can be understood that at least one of a pinning layer 160, a cap layer 170, and a hard mask layer 180 may be provided between the reference layer 150 and the read bit line 420.

[0170] Combination Figure 17 and Figure 1 As shown, in this embodiment, the source / drain of the first transistor 310 can be electrically connected to the hard magnetic free layer 110 through the first bottom electrode 210, and the source / drain of the second transistor 320 can be electrically connected to the hard magnetic free layer 110 through the second bottom electrode 220.

[0171] Furthermore, one embodiment of this disclosure also provides an electronic device that includes a memory as described in the above embodiments.

[0172] As an example, the electronic device can be, but is not limited to, a storage device, a smartphone, a computer, a tablet, an artificial intelligence device, a wearable device, or a power bank. The storage device can include, for example, memory in a computer.

[0173] Please note that the above embodiments are for illustrative purposes only and are not intended to limit the scope of this document.

[0174] It should be understood that, unless otherwise expressly stated herein, there is no strict order in which the steps are performed, and these steps may be performed in other orders. Moreover, at least some steps in the preparation process may include multiple sub-steps or multiple stages, which are not necessarily completed at the same time, but may be performed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but may be performed alternately or in turn with other steps or at least some of the sub-steps or stages of other steps.

[0175] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0176] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

Claims

1. A magnetic tunnel junction structure, comprising: The magnetic tunnel junction structure comprises a hard magnetic free layer, a barrier layer, a reference layer, a coupling medium layer and an in-plane ferromagnetic layer; the barrier layer and the coupling medium layer are respectively stacked on opposite sides of the hard magnetic free layer, the reference layer is arranged on the side of the barrier layer away from the hard magnetic free layer, and the in-plane ferromagnetic layer is arranged on the side of the coupling medium layer away from the hard magnetic free layer. The material of the hard magnetic free layer comprises a hard magnetic material with perpendicular magnetic anisotropy, and the material of the in-plane ferromagnetic layer comprises a ferromagnetic material with in-plane magnetic anisotropy.

2. The magnetic tunnel junction structure of claim 1, wherein, The hard magnetic material in the hard magnetic free layer is selected from one or more of cobalt-platinum alloy, iron-platinum alloy, gadolinium-iron-cobalt alloy and cobalt-terbium alloy.

3. The magnetic tunnel junction structure of claim 1, wherein, The thickness of the coupling medium layer is 1 nm to 5 nm.

4. The magnetic tunnel junction structure of claim 1, wherein, The material of the coupling medium layer is selected from one or more of ruthenium, iridium, copper and gold.

5. The magnetic tunnel junction structure of claim 1, wherein, The ferromagnetic material in the in-plane ferromagnetic layer is selected from one or more of iron, cobalt, nickel, iron-platinum alloy, cobalt-nickel alloy and cobalt-iron alloy.

6. The magnetic tunnel junction structure of any one of claims 1-5, wherein, The magnetic tunnel junction structure further comprises a first bottom electrode and a second bottom electrode arranged in a spaced manner, and the first bottom electrode and the second bottom electrode are electrically connected to the hard magnetic free layer.

7. The magnetic tunnel junction structure of claim 6, wherein, The in-plane ferromagnetic layer is arranged between the first bottom electrode and the second bottom electrode, and the in-plane ferromagnetic layer is arranged in a spaced manner with the first bottom electrode and the second bottom electrode; or, The first bottom electrode and the second bottom electrode are arranged on the side of the in-plane ferromagnetic layer away from the hard magnetic free layer, and the first bottom electrode and the second bottom electrode are electrically connected to the hard magnetic free layer through the in-plane ferromagnetic layer and the coupling medium layer.

8. The magnetic tunnel junction structure of any one of claims 1-5 and 7, wherein: The hard magnetic free layer is composed of a hard magnetic material; or, The hard magnetic free layer comprises a hard magnetic sub-layer and a free sub-layer arranged in a stacked manner, the hard magnetic material in the hard magnetic free layer is arranged in the hard magnetic sub-layer, the coupling medium layer is arranged on the side of the hard magnetic sub-layer away from the free sub-layer, and the barrier layer is arranged on the side of the free sub-layer away from the hard magnetic sub-layer.

9. The magnetic tunnel junction structure of any one of claims 1-5 and 7, wherein: The magnetic tunnel junction structure further comprises a sidewall protection layer arranged in a stacked manner on the barrier layer and surrounding the sidewall of the reference layer.

10. The magnetic tunnel junction structure of claim 9, wherein, The material of the sidewall protection layer comprises one or more of silicon nitride, silicon oxide, aluminum oxide, silicon carbide and silicon carbonitride.

11. The magnetic tunnel junction structure of claim 9, wherein, An opening is arranged in the sidewall protection layer on the side of the reference layer away from the hard magnetic free layer, the magnetic tunnel junction structure further comprises a top electrode arranged in a stacked manner on the side of the reference layer away from the hard magnetic free layer, and at least part of the top electrode is arranged in the opening of the sidewall protection layer; And / or, The magnetic tunnel junction structure further comprises a pinning layer arranged in a stacked manner on the side of the reference layer away from the hard magnetic free layer, and the sidewall protection layer also surrounds the pinning layer.

12. A method of manufacturing a magnetic tunnel junction structure as claimed in any one of claims 1 to 11, characterized in that, The method comprises the following steps: forming the in-plane ferromagnetic layer and the coupling medium layer on the substrate in sequence; and forming the hard magnetic free layer, the barrier layer and the reference layer on the coupling medium layer in sequence.

13. The method of claim 12, wherein: The method further comprises the step of forming a first bottom electrode and a second bottom electrode in the substrate; The step of forming the in-plane ferromagnetic layer, the coupling medium layer, the first bottom electrode and the second bottom electrode comprises: forming a first conductive material portion and a second conductive material portion in the substrate; forming the coupling medium layer and the in-plane ferromagnetic layer on the substrate between the first conductive material portion and the second conductive material portion; forming a filling medium layer on the substrate to expose the coupling medium layer, and the filling medium layer has an opening to expose the first conductive material portion and the second conductive material portion; filling the opening of the filling medium layer with a conductive material, and the first conductive material portion and the conductive material form a first bottom electrode, and the second conductive material portion and the conductive material form a second bottom electrode; Alternatively, the step of forming the in-plane ferromagnetic layer, the coupling medium layer, the first bottom electrode and the second bottom electrode comprises: forming a first bottom electrode and a second bottom electrode in the substrate, and the first bottom electrode and the second bottom electrode are exposed from the surface of the substrate; depositing an in-plane ferromagnetic layer on the substrate to contact and cover the first bottom electrode and the second bottom electrode; forming the coupling medium layer on the in-plane ferromagnetic layer.

14. The method of manufacturing a magnetic tunnel junction structure according to claim 12 or 13, wherein, After forming the reference layer, further comprising the steps of forming a pinning layer and / or a top electrode on the reference layer.

15. The method of manufacturing a magnetic tunnel junction structure according to claim 12 or 13, wherein, The reference layer is arranged on a part of the barrier layer, and after forming the reference layer, further comprising: forming a protective material layer covering the reference layer and the barrier layer; and, etching the protective material layer on the top of the reference layer to remain the protective material layer as a sidewall protection layer.

16. The method of claim 15, wherein: Before forming the sidewall protection layer, further comprising the step of forming a pinning layer on the reference layer; and / or, After forming the sidewall protection layer, further comprising: forming a top electrode at least partially filling in the opening of the sidewall protection layer.

17. A memory, comprising: The magnetic tunnel junction structure comprises a plurality of first transistors, a plurality of second transistors, a plurality of word lines, a plurality of read bit lines, a plurality of first write bit lines, a plurality of second write bit lines, and a plurality of magnetic tunnel junction structures as claimed in any one of claims 1-11; wherein, one source / drain of the first transistor and one source / drain of the second transistor are respectively electrically connected to two ends of the hard magnetic free layer, another source / drain of the first transistor is electrically connected to the first write bit line, another source / drain of the second transistor is electrically connected to the second write bit line, the read bit line is electrically connected to the reference layer, and the word line is electrically connected to the gate of the first transistor and the gate of the second transistor; a plurality of sources / drains of the first transistors distributed along the extension direction of the first write bit line are electrically connected to the same first write bit line; a plurality of sources / drains of the second transistors distributed along the extension direction of the second write bit line are electrically connected to the same second write bit line; a plurality of gates of the first transistors and a plurality of gates of the second transistors distributed along the extension direction of the word line are electrically connected to the same word line; A plurality of the reference layers arranged along an extension direction of the read bit line are electrically connected to the same read bit line.

18. An electronic device, comprising: A memory comprising the memory of claim 17.