GFSK modulation optimization method and circuit for VCO nonlinear compensation

Abstract

The invention discloses a GFSK (Gaussian Frequency Shift Keying) modulation method and circuit for VCO (Voltage Controlled Oscillator) nonlinear compensation, and aims to solve the problem of modulation frequency offset instability caused by control voltage fluctuation and frequency band switching of a voltage-controlled oscillator in a two-point modulation architecture. According to the invention, the compensation capacitor group matched with the main tuning capacitor characteristic is additionally arranged on the FSKMOD module, so that the capacitance value of the FSKMOD module synchronously changes along with the control voltage to offset the total capacitance drift of the resonant cavity; and meanwhile, the output voltage of the DAC module is dynamically adjusted based on the frequency band control signal, and the influence of load capacitance jump during frequency band crossing is inhibited in real time. According to the corresponding circuit, a series compensation capacitor and a fixed capacitor are integrated in the FSKMOD module to form a compensation branch, and a compensation current injection end linkage operational amplifier is configured in the DAC module. By using the invention, the modulation frequency offset can be stably maintained in a tolerance range required by a Bluetooth protocol in a full working frequency band, and the adjacent channel interference resistance and the data transmission reliability of a wireless communication system are greatly improved.

Description

Technical Field

[0001] This invention relates to a GFSK modulation optimization method for nonlinear compensation of voltage-controlled oscillators (VCOs), and also to a corresponding GFSK modulation optimization circuit, belonging to the field of electronic oscillator technology. Background Technology

[0002] In low-power wireless communication systems such as Bluetooth and ZigBee, Gaussian Frequency Shift Keying (GFSK) has become a core modulation technology due to its anti-interference capabilities and spectral efficiency. According to core specifications of the Bluetooth protocol (such as Bluetooth 5.0, but not limited to this), the transmitter must ensure that the frequency deviation (FD) is strictly stable within ±250kHz at a rate of 1Mbps. The stability of the frequency deviation directly determines the bit error rate and the ability to resist adjacent channel interference in the communication link, becoming a critical performance indicator, especially in high-density deployment scenarios.

[0003] To address these issues, the industry commonly employs a two-point modulation architecture: low-frequency data is modulated via fractional-order division using a phase-locked loop (PLL), and a fractional-order band control word is generated using a Σ-Δ modulator to achieve in-band noise suppression; high-speed data is directly modulated via a VCO, bypassing the PLL loop bandwidth limitation to respond to transient frequency hopping requirements. While this two-point modulation architecture combines dynamic response and noise performance, the modulation nonlinearity of the VCO path remains unresolved. Specifically, fluctuations in the control voltage cause changes in the capacitance of the variable capacitor, leading to a drift in the modulation sensitivity (KVCO_MOD) of the voltage-controlled oscillator; when the band control word SW_VC switches bands (e.g., 2400MHz→2460MHz), the load capacitance jump further amplifies the frequency deviation difference.

[0004] Existing compensation schemes attempt to suppress frequency offset fluctuations by fixing compensation capacitors or gain calibration, but they have fundamental drawbacks: fixed compensation cannot adapt to the dynamic changes of VC and SW_VC, and is only effective at specific operating points; open-loop calibration relies on pre-stored lookup tables and does not establish a feedback correlation between KVCO_MOD and real-time operating status, leading to deterioration of frequency offset stability in cross-frequency / cross-voltage scenarios. Therefore, a compensation mechanism that dynamically suppresses VCO nonlinear effects is urgently needed to achieve accurate and stable control of GFSK frequency offset across the entire frequency band. Summary of the Invention

[0005] The primary technical problem to be solved by this invention is to provide a GFSK modulation optimization method for VCO nonlinear compensation.

[0006] Another technical problem to be solved by the present invention is to provide a GFSK modulation optimization circuit for VCO nonlinear compensation.

[0007] To achieve the above objectives, the present invention adopts the following technical solution: According to a first aspect of the present invention, a GFSK modulation optimization method for VCO nonlinear compensation is provided, comprising the following steps: (a) Add at least one set of variable capacitors (C15, C16) to the FSK_MOD module of the VCO. The voltage-capacitance characteristics of the variable capacitors (C15, C16) are the same as those of the main tuning capacitors (C11, C12). When the control voltage changes, the capacitance of the main tuning capacitors (C11, C12) changes in the same direction as the capacitance of the variable capacitors (C15, C16) to stabilize the modulation sensitivity. (b) Adjust the output voltage of the DAC module in real time based on the frequency band control word. When the frequency band switching causes the modulation sensitivity to change, make the modulation voltage difference output by the DAC module change in the opposite direction to the modulation sensitivity, so as to offset the effect of the load capacitance jump when crossing frequency bands.

[0008] Preferably, when the positive terminal of the variable capacitor is connected to a fixed voltage, the capacitance value of the variable capacitor changes in the same direction as the control voltage; when the negative terminal of the variable capacitor is connected to a fixed voltage, the capacitance value of the variable capacitor changes in the opposite direction to the control voltage.

[0009] Preferably, a compensation current is dynamically injected into the current mirror array of the DAC module according to the current band control word, so that the modulation voltage difference changes inversely to the modulation sensitivity.

[0010] Preferably, the modulation voltage difference is the difference between the output voltage of the DAC module and the reference voltage of the FSK_MOD module.

[0011] According to a second aspect of the present invention, a GFSK modulation optimization circuit for VCO nonlinear compensation is provided, comprising an FSK_MOD module and a DAC module; wherein, The FSK_MOD module includes: First variable capacitor and second variable capacitor; The third and fourth variable capacitors; First fixed capacitor and second fixed capacitor; The compensation branch consists of a first variable capacitor and a second variable capacitor connected in series. The DAC module includes: Current mirror array; Operational amplifier; The compensation current injection terminal is connected to the operational amplifier and is used to dynamically adjust the input current of the operational amplifier according to the frequency band control word.

[0012] Preferably, in the compensation branch, the negative terminals of the first variable capacitor and the second variable capacitor are connected to a fixed voltage.

[0013] Preferably, in the FSK_MOD module, the compensation branch formed by the first variable capacitor and the second variable capacitor connected in series is connected between the first fixed capacitor and the second fixed capacitor.

[0014] Preferably, in the current mirror array, the input stage PMOS transistor and multiple bias PMOS transistors constitute the main current mirror; multiple switching PMOS transistors controlled by GFSK data constitute the output current regulation unit.

[0015] Preferably, by changing the GFSK data to control different PMOS transistors, the magnitude of the output current is adjusted, thereby changing the output voltage of the DAC module.

[0016] Compared with existing technologies, this invention effectively solves the nonlinear distortion problem caused by control voltage fluctuations and frequency band switching in GFSK modulation of the VCO through a unique dual dynamic compensation design. Specifically, this invention, on the one hand, adds a compensation capacitor bank to the FSK_MOD module, which changes synchronously with the main tuning capacitor according to the control voltage, thus offsetting the resonant cavity capacitance changes caused by voltage fluctuations and significantly suppressing frequency offset drift within a single frequency band; on the other hand, it dynamically adjusts the output voltage of the DAC module based on the frequency band control signal, compensating for the load capacitance jump effect during frequency band switching in real time, and eliminating frequency offset differences between different frequency bands. The above-mentioned collaborative mechanism ensures that the modulation frequency offset is stably maintained within the tolerance range required by the Bluetooth protocol across the entire operating frequency band, greatly improving the anti-adjacent channel interference capability and data transmission reliability of the wireless communication system. Attached Figure Description

[0017] Figure 1A This is a schematic diagram of a VCO modulation circuit in the prior art; Figure 1B This is the circuit schematic of the VC_BAND module in the VCO modulation circuit. Figure 1C This is the circuit schematic of the FSK_MOD module in the VCO modulation circuit. Figure 2 This is a schematic diagram of the voltage-capacitance characteristic curve of a variable capacitor. Figure 3 The measured characteristics of VCO modulation sensitivity under uncompensated conditions are shown in the graph. Figure 4 This is a circuit schematic diagram of the improved FSK_MOD module according to an embodiment of the present invention; Figure 5A This is a schematic diagram showing the simulation comparison results of frequency deviation under different control voltages without compensation. Figure 5B The diagram shows the simulation comparison results of frequency deviation under different control voltages after compensation. Figure 6 The test results of the frequency offset change trend across frequency bands after compensation by the FSK_MOD module are shown in the figure. Figure 7 This is a circuit schematic diagram of the improved DAC module according to an embodiment of the present invention; Figure 8 The graph shows the test results for frequency offset stability across the entire frequency band after double compensation. Detailed Implementation

[0018] The technical content of the present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0019] The technical concept of this invention is as follows: Addressing the frequency offset fluctuation problem caused by the dynamic drift of the modulation sensitivity (KVCO_MOD) of the voltage-controlled oscillator (VCO) under the GFSK two-point modulation architecture in wireless communication systems (such as Bluetooth), which is influenced by control voltage and frequency band switching, a dual dynamic compensation mechanism is proposed. Firstly, a variable compensation capacitor with the same voltage-capacitance characteristics as the main tuning capacitor is added to the VCO modulation end. When the control voltage increases, causing the main capacitance value to decrease, the compensation capacitor value decreases synchronously. By dynamically reducing the modulation sensitivity of the FSK_MOD module, the increasing frequency offset trend caused by changes in the total capacitance of the resonant cavity is offset, thereby stabilizing KVCO_MOD and suppressing frequency offset fluctuations within a single frequency band. Secondly, based on a pre-calibrated frequency band control word, the output voltage of the DAC (digital-to-analog converter) module is adjusted in real time. When frequency band switching causes an increase in KVCO_MOD, the modulation voltage difference is actively reduced to offset the effect of load capacitance jumps and eliminate cross-band frequency offset differences. Through the above technical means, the GFSK modulation frequency offset can be accurately stabilized within the protocol tolerance of ±250kHz throughout the entire operating frequency band, significantly improving the anti-interference capability and reliability of the wireless communication system.

[0020] exist Figure 1AIn the existing VCO modulation circuit shown, a switching circuit consisting of two PMOS transistors PM0 and PM1 and two NMOS transistors NM0 and NM1 is used as the basis, connected by cross-coupling to form the oscillation core. The control voltage VC, after being filtered by variable capacitors C11 and C12, forms an LC resonant circuit with inductor L0, determining the oscillation frequency. Variable capacitors C11 and C12 constitute the main tuning capacitor. The control voltage VC also acts as an input signal to PMOS transistors PM0 and PM1 to adjust the oscillation frequency. The VC_BAND module is used to implement voltage control for different frequency bands. The FSK_MOD module introduces frequency shift keying modulation, giving the output signal modulation characteristics. The DAC module is connected to the FSK_MOD module, converting the digital baseband signal into an analog voltage, and achieving frequency modulation by controlling the voltage difference of the VCO resonant cavity capacitors. YP and YN are output terminals, leading out the processed oscillation signal. NMOS transistors NM0 and NM1 are connected in parallel and grounded, working in conjunction with PMOS transistors PM0 and PM1 to control the signal path in different operating states.

[0021] Figure 1B This is the circuit schematic of the VC_BAND module in an existing VCO modulation circuit. The VC_BAND module contains four identical sub-circuits. Each sub-circuit includes a switch pair consisting of two inverters, connected to the four control signal input terminals SW_VC. <3> SW_VC <2> SW_VC <1> SW_VC <0> When the control signal is activated, the inverter conducts, forming a signal transmission path. In each sub-circuit, the YP terminal is connected to capacitors (C3, C5, C7, C9), and the other end of the capacitor is connected to one end of the VCM2 transistor; the other end of the VCM2 transistor is connected to the corresponding capacitor (C4, C6, C8, C10), finally leading to the YN terminal. A parallel branch is provided between the two ends of the VCM2 transistor, containing two inductors connected in series. When the control signal turns on the inverter, the signal starts from the YP terminal, is filtered by the capacitor, enters the VCM2 transistor for amplification or switching, and is then output to the YN terminal through the capacitor. The VCM2 transistor plays a crucial role here; its on / off state determines whether the signal can pass through this sub-circuit. By switching different SW_VC control signals, the corresponding capacitor can be selectively connected to the signal path from YP to YN, thereby achieving the function of adjusting the oscillation frequency. The four sub-circuits work together to determine the operating frequency range and adjustment accuracy of the entire VCO circuit.

[0022] Figure 1CThis is the circuit schematic of the FSK_MOD module in an existing VCO modulation circuit. The FSK_MOD module consists of two variable capacitors (C1 and C2), two fixed capacitors, and a first parallel branch containing two inductors connected in series. The YP terminal is connected to one end of variable capacitor C1, and the other end of C1 is connected to the DAC_OUT signal output from the DAC module. Similarly, one end of variable capacitor C2 is also connected to the DAC_OUT signal, and the other end is connected to the YN terminal. Between C1 and C2, a branch consisting of two inductors connected in series is connected in parallel. When the DAC_OUT signal changes, the capacitance values ​​of variable capacitors C1 and C2 change, thereby adjusting the oscillation frequency. Simultaneously, the two series inductors and the variable capacitors together form an LC resonant circuit, further influencing the oscillation frequency and the frequency modulation characteristics of the signal, realizing the FSK modulation function, so that the frequency of the output signal changes with the DAC_OUT signal.

[0023] The voltage-capacitance curve of the variable capacitor is as follows: Figure 2 As shown, the voltage at one end of the variable capacitor is V1. When the voltage is greater than V1, the value of the variable capacitor increases; when the voltage is less than V1, the value of the variable capacitor decreases. If the voltage at one end of the variable capacitor is fixed, the capacitance value changes with the increase or decrease of the voltage at the other end, depending on which end of the variable capacitor is connected to the fixed voltage. In various embodiments of the present invention, if the positive terminal of the variable capacitor is connected to the fixed voltage, the capacitance value of the variable capacitor changes in the same direction as the control voltage; if the negative terminal of the variable capacitor is connected to the fixed voltage, the capacitance value of the variable capacitor changes in the opposite direction to the control voltage.

[0024] Based on this, the aforementioned VCO modulation circuit mainly achieves frequency adjustment and modulation in the following way: A control voltage VC is applied to variable capacitors C11 and C12. The negative terminals of variable capacitors C11 and C12 are connected to a fixed voltage. According to the inherent characteristics of variable capacitors, when the control voltage VC (applied to the positive terminal) increases, the capacitance values ​​of C11 and C12 decrease. Therefore, variable capacitors C11 and C12 change their capacitance values ​​in real time according to the change in the control voltage VC, thereby adjusting the oscillation frequency. The capacitance variation affects the LC product (L is the inductance) of the VCO resonant cavity. The VC_BAND module adjusts the load capacitance according to the frequency band control word SW_VC<3:0> to achieve fine adjustment of the output frequency. Simultaneously, GFSK data (i.e., gfsk_data) is used. <n-1:0>The random data output at different rates controls the DAC input. Its output voltage DAC_OUT and the reference voltage VCM of the FSK_MOD module act on another set of variable capacitors C1 and C2 to form a voltage difference, which further adjusts the output frequency to complete the modulation.

[0025] There are two main problems in the VCO modulation process: (1) When the control voltage VC changes, the capacitance values ​​of variable capacitors C11 and C12 will change accordingly, which will cause the LC product of the VCO resonant cavity to change, thus affecting the oscillation frequency. However, the output amplitude of the GFSK data control DAC module does not change accordingly, which will also change the frequency range of VCO modulation, thus affecting the modulation accuracy.

[0026] (2) When the output of the VC_BAND module changes, the load capacitance of the VCO will also change. This change in load capacitance will cause the frequency of the VCO modulation to shift, thereby affecting the stability of the modulation effect.

[0027] The causes of the above problems are analyzed as follows: As is known to those skilled in the art, the formula for calculating the oscillation frequency of a VCO is: (1) in, Let L be the oscillation frequency of the VCO, and L be the inductance of the VCO.

[0028] In one embodiment of the present invention, the equivalent capacitance in the above formula is calculated using the following formula: Ctot=Cvc+Cvc_band+Cfsk_mod (2) Ctot represents the equivalent capacitance, comprising the sum of variable capacitors C11 and C12 (denoted as Cvc) adjusted by the control voltage VC, the equivalent capacitance Cvc_band adjusted by the VC_BAND module, and the equivalent capacitance Cfsk_mod adjusted by the FSK_MOD module. VC is the control voltage on the filter in the PLL, varying from 0.3V to 0.8V. When the frequency band control word SW_VC is fixed, it is used to adjust the frequency between 2400MHz and 2430MHz. The VC_BAND module adjusts the frequency band control word SW_VC to adjust the frequency range between three bands: 2400MHz–2430MHz, 2430MHz–2460MHz, and 2460MHz–2480MHz. The capacitor array in the FSK_MOD module is used to adjust the frequency offset range.

[0029] Within the frequency range of 2400MHz to 2430MHz, the voltage values ​​of DAC_OUT and VCM remain constant, therefore the capacitance values ​​of variable capacitors C1 and C2 also remain constant. However, when VC varies between 0.3V and 0.8V, the equivalent capacitance Ctot changes, which in turn causes a change in the KVCO of the FSK_MOD module. Within the frequency range of 2400MHz to 2430MHz, Cvc changes with the filter voltage. When the output frequency of the VCO increases, the capacitance value of the variable capacitor Cvc decreases, making the overall equivalent capacitance Ctot smaller, increasing the KVCO of the FSK_MOD module, and thus causing the output frequency to increase.

[0030] Because KVCO_MOD is highly dependent on the operating frequency and control voltage VC: when the output frequency changes (e.g., 2400MHz→2480MHz), the equivalent capacitance of the VCO resonant cavity changes dynamically with the control voltage VC (0.3V~0.8V) and the frequency band control word SW_VC, resulting in KVCO_MOD exhibiting strong nonlinearity. Figure 3 The measured results show that in the 2400MHz band (SW_VC=6), the frequency offset fluctuation is as high as 48kHz (540kHz→588kHz), which far exceeds the tolerance of the Bluetooth protocol and causes serious degradation of communication quality.

[0031] To address the aforementioned problems, the embodiments of the present invention firstly... Figure 1C Based on the FSK_MOD module shown, a second parallel branch has been added. For example... Figure 4 As shown, this branch consists of two variable capacitors C15 and C16 connected in series. Their connection method is as follows: one end of variable capacitor C15 is connected between the fixed capacitor C17 and the original variable capacitor C1, and one end of variable capacitor C16 is connected between the original variable capacitor C2 and the fixed capacitor C18. The other ends (i.e., the negative terminals) of variable capacitors C15 and C16 are connected internally within the branch and connected to a fixed voltage. The most critical design difference is that variable capacitors C15 and C16 use the exact same connection method as the main tuning capacitors C11 and C12 (both negative terminals are connected to a fixed voltage), thus exhibiting consistent voltage-capacitance characteristics—when the control voltage VC increases, the capacitance of all capacitors decreases synchronously. However, their functional roles in the circuit are configured differently: C11 and C12 are the main tuning capacitors, and their reduced capacitance directly reduces the total capacitance Ctot of the resonant cavity, resulting in an increase in frequency deviation; while C15 and C16 are the dynamic compensation capacitors, and their reduced capacitance will reduce the modulation sensitivity of the FSK_MOD module, thereby suppressing the trend of increasing frequency deviation caused by changes in C11 and C12.

[0032] Since the negative terminals of variable capacitors C15 and C16 are also connected to a fixed voltage (the same as C11 / C12), when the control voltage VC increases: the capacitance values ​​of variable capacitors C11 and C12 decrease -> causing Ctot to decrease -> tending to increase the frequency f and increase KVCO_MOD. Simultaneously, the capacitance values ​​of variable capacitors C15 and C16 also decrease (because they have the same voltage-capacitance characteristic connection). Variable capacitors C15 and C16 are connected in series in the compensation branch of the FSK_MOD module; their decreased capacitance values ​​mean that the contribution of this compensation branch to the total Ctot also decreases when the control voltage VC increases (or equivalently, the capacitive reactance of this branch increases).

[0033] Variable capacitors C15 and C16 are introduced into the equivalent capacitance portion of the FSK_MOD module. When the control voltage VC increases, causing the capacitance value Cvc of the main tuning capacitor to decrease, the C15 and C16 portions in the FSK_MOD module also decrease, thereby reducing the modulation sensitivity KVCO of the FSK_MOD module itself (because KVCO is related to the rate of change of capacitance introduced by the FSK_MOD module).

[0034] The reduction in KVCO directly offsets the increasing trend of KVCO_MOD caused by the decrease in Ctot (caused by the decrease in Cvc). The effect is that the KVCO_MOD of the entire VCO remains relatively stable when the control voltage VC changes. Therefore, the voltage difference between DAC_OUT and VCM (V...) DAC_OUT -V CM Under fixed conditions (within the 2400MHz~2430MHz frequency band), the frequency offset Δf generated by GFSK modulation also remains approximately constant.

[0035] exist Figure 4 The core purpose of setting variable capacitors C15 and C16 is to dynamically adjust the KVCO characteristics of the FSK_MOD module by controlling the voltage VC, so that its changing trend is opposite to the KVCO_MOD changing trend caused by the main tuning path (C11 and C12). This dynamic compensation makes the KVCO_MOD of the VCO approximately constant at different voltage values ​​of the control voltage VC (0.3V~0.8V). The final result is as follows. Figure 5B As shown: After compensation, the frequency deviation is 446kHz when the control voltage VC = 0.3V and 466kHz when the control voltage VC = 0.8V, with the deviation reduced to 20kHz, which is significantly better than the uncompensated state (48kHz deviation). This makes the frequency deviation more stable in the 2400MHz to 2430MHz frequency band, keeping it close to the ±250kHz tolerance required by the Bluetooth protocol.

[0036] It should be noted that the voltage values ​​of DAC_OUT and VCM are fixed within the range of 2400MHz to 2430MHz. When the voltage of DAC_OUT varies within the range of 0.4V to 0.7V, there will be a difference in the GFSK output frequency. When VC = 0.3V and VC = 0.8V, due to the change in the capacitance values ​​of variable capacitors C1 and C2, the GFSK output frequency difference is smaller when VC = 0.3V, and larger when VC = 0.8V. The magnitude of this frequency difference is determined by the KVCO of the FSK_MOD module.

[0037] The corresponding simulation results are as follows Figure 5A and Figure 5B As shown: Figure 5A The results show that without compensation, the GFSK output frequency deviation is 540kHz at VC=0.3V and 588kHz at VC=0.8V, a deviation of 48kHz. Figure 5B The results show that after compensation, the frequency deviation is 446kHz when VC=0.3V and 466kHz when VC=0.8V, reducing the deviation to 20kHz, demonstrating a significant optimization effect.

[0038] Figure 6 This shows the actual effect of the FSK_MOD module after optimization. The horizontal axis represents the frequency channels, ranging from 2400MHz to 2480MHz; the vertical axis represents the frequency offset, in MHz. Figure 6 As can be seen, the frequency offset exhibits a step-like variation across different frequency bands: Within the frequency range of 2400MHz to 2430MHz, with SW_VC = 6, the frequency offset remains at approximately 0.25MHz. This is because, within this range, the optimized FSK_MOD module adds variable capacitors C15 and C16 for compensation, keeping KVCO approximately constant and thus maintaining frequency offset stability.

[0039] Within the frequency range of 2430MHz to 2460MHz, with SW_VC = 7, the frequency offset increases to approximately 0.45MHz. This indicates that when the value of the band control word SW_VC changes, the load capacitance also changes, leading to a change in the equivalent capacitance Ctot, which in turn affects KVCO and the frequency offset. Despite compensation, a certain degree of frequency offset variation still exists due to the adjustment of SW_VC.

[0040] Within the frequency range of 2460MHz to 2480MHz, the corresponding SW_VC=8, the frequency offset remains at approximately 0.45MHz.

[0041] Overall, Figure 6 The diagram illustrates the frequency offset variations under different frequency bands and SW_VC values. By optimizing the FSK_MOD module and adding a compensating variable capacitor, the frequency offset variation can be reduced to some extent, improving the stability of the modulation frequency. However, when the frequency band control word SW_VC changes significantly, further compensation measures are still needed to reduce the magnitude of the frequency offset variation.

[0042] Below, in conjunction with Figure 7 and Figure 8 This invention further describes the technical measures implemented in embodiments of the present invention when the frequency band control word SW_VC undergoes significant changes. Figure 7 In the DAC module shown, PMOS transistor PM0 serves as the input stage, forming a main current mirror with multiple PMOS transistors (PM1, PM2, ..., PMn-1) to generate bias current. These bias currents are controlled by GFSK data and are used to regulate the output current through different PMOS transistors (PMCO, PMC1, ..., PMCn-1). NMOS transistor NM0, along with NM1, I0, I1, I2, etc., forms a current source to provide bias current to the circuit. These current sources are connected to the output of the main current mirror and work together at the input of operational amplifier OP. Operational amplifier OP, as the output stage, converts the input current into voltage, forming the DAC_OUT output signal. By changing the GFSK data to control different PMOS transistors, the magnitude of the output current can be adjusted, thereby changing the voltage value of the output signal DAC_OUT. This design allows the DAC module to output corresponding analog voltage signals according to different combinations of GFSK data, meeting the requirements of GFSK modulation.

[0043] After PLL calibration, the values ​​of the band control word SW_VC for each channel are determined. Different SW_VC values ​​correspond to different load capacitances of the VCO, and changes in load capacitance will cause differences in the modulation frequency. To reduce the impact of this difference on the modulation frequency, the output amplitude of the DAC module needs to be compensated. Figure 7 As shown, the compensation currents are △I0, △I1, and △I2, respectively. The compensation current injection terminals (△I0, △I1, and △I2) dynamically adjust the input current of the operational amplifier according to the frequency band control word SW_VC, so that the amplitude of the output voltage VDAC_OUT is opposite to the trend of KVCO_MOD, in order to maintain a constant frequency deviation.

[0044] After optimization of the FSK_MOD module, the frequency offset is relatively small when the band control word SW_VC = 6 (corresponding to the frequency range of 2400MHz to 2430MHz). However, when SW_VC in the VC_BAND module changes, the equivalent capacitance Ctot will change according to formula (2). For example, when the band control word SW_VC changes from 6 to 7, the equivalent capacitance Ctot decreases, causing the KVCO in the FSK_MOD module to increase, thereby increasing the frequency offset.

[0045] To maintain constant frequency offset, the compensation scheme provided in this embodiment of the invention is as follows: (1) Due to the change in SW_VC, the KVCO of the FSK_MOD module increases. In order to maintain the frequency offset, the output amplitude of DAC_OUT needs to be reduced accordingly.

[0046] (2) To reduce or increase the voltage value of DAC_OUT, compensation can be achieved by adjusting the currents I0, I1, and I2. Specifically, by increasing or decreasing these current values, the output amplitude of DAC_OUT can be changed, thereby fine-tuning the modulation frequency.

[0047] (3) The change in frequency offset is When KVCO_MOD increases, V is decreased. DAC_OUT -V CM The value of can guarantee that Δf remains approximately constant. For example, if KVCO_MOD increases by 20%, then (V DAC_OUT -V CM The value is reduced by approximately 20% to maintain the stability of Δf.

[0048] Figure 8 This shows the actual effect after further compensation using the band control word SW_VC. The horizontal axis represents the frequency channel, ranging from 2400MHz to 2480MHz; the vertical axis represents the frequency offset, in MHz.

[0049] from Figure 8 As can be seen, the frequency offset exhibits a step-like variation across different frequency bands: Within the frequency range of 2400MHz to 2430MHz, with the corresponding band control word SW_VC = 6, the frequency offset remains at approximately 0.25MHz. A compensation scheme is used to adjust the output amplitude of the DAC module, ensuring stable frequency offset within this range.

[0050] Within the frequency range of 2430MHz to 2460MHz, with the corresponding band control word SW_VC = 7, the frequency offset remains at approximately 0.25MHz. This indicates that, through the compensation scheme, the frequency offset can remain stable even if the SW_VC value changes.

[0051] Within the frequency range of 2460MHz to 2480MHz, the corresponding band control word SW_VC=8, and the frequency offset remains at approximately 0.25MHz.

[0052] Overall, Figure 8 The paper demonstrates that, under different frequency bands and SW_VC values, the compensation scheme can maintain stable frequency offset, effectively reducing the impact of different SW_VC values ​​on the modulation frequency and improving the stability and consistency of the modulation frequency. This shows that the above compensation scheme can effectively reduce the impact of different SW_VC values ​​on the modulation frequency, improving the stability and consistency of the modulation frequency. This is particularly important in multi-channel wireless communication, as it ensures that the modulation performance of each channel remains within the expected range, thereby improving the reliability and communication quality of the entire wireless system.

[0053] In summary, the GFSK modulation optimization method and circuit for VCO nonlinear compensation provided by this invention effectively solves the nonlinear distortion problem caused by control voltage fluctuations and frequency band switching in GFSK modulation of the VCO through a unique dual dynamic compensation design. Specifically, this invention, on the one hand, adds a compensation capacitor bank to the FSK_MOD module, which changes synchronously with the main tuning capacitor according to the control voltage, thus offsetting the resonant cavity capacitance changes caused by voltage fluctuations and significantly suppressing frequency offset drift within a single frequency band; on the other hand, it dynamically adjusts the output voltage of the DAC module based on the frequency band control signal, compensating in real time for the impact of load capacitance jumps during frequency band switching, and eliminating frequency offset differences between different frequency bands. The above-mentioned synergistic mechanism enables the modulation frequency offset to be stably maintained within the tolerance range required by the Bluetooth protocol across the entire operating frequency band, greatly improving the anti-adjacent channel interference capability and data transmission reliability of the wireless communication system.

[0054] It should be noted that the above embodiments are merely illustrative examples. The technical solutions of each embodiment can be combined, and all are within the protection scope of this invention.

[0055] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0056] The GFSK modulation optimization method and circuit for VCO nonlinear compensation provided by this invention have been described in detail above. Any obvious modifications made by those skilled in the art without departing from the essence of this invention will constitute an infringement of the patent rights of this invention and will incur corresponding legal liability.

Claims

1. A GFSK modulation optimization method for VCO nonlinear compensation, characterized in that... Includes the following steps: (a) Add at least one set of variable capacitors (C15, C16) to the FSK_MOD module of the VCO. The voltage-capacitance characteristics of the variable capacitors (C15, C16) are the same as those of the main tuning capacitors (C11, C12). When the control voltage changes, the capacitance of the main tuning capacitors (C11, C12) changes in the same direction as the capacitance of the variable capacitors (C15, C16) to stabilize the modulation sensitivity. (b) Adjust the output voltage of the DAC module in real time based on the frequency band control word. When the frequency band switching causes the modulation sensitivity to change, make the modulation voltage difference output by the DAC module change in the opposite direction to the modulation sensitivity, so as to offset the effect of the load capacitance jump when crossing frequency bands.

2. The GFSK modulation optimization method as described in claim 1, characterized in that: When the positive terminal of the variable capacitor is connected to a fixed voltage, the capacitance value of the variable capacitor changes in the same direction as the control voltage; when the negative terminal of the variable capacitor is connected to a fixed voltage, the capacitance value of the variable capacitor changes in the opposite direction as the control voltage.

3. The GFSK modulation optimization method as described in claim 1, characterized in that: According to the current frequency band control word, a compensation current is dynamically injected into the current mirror array of the DAC module, so that the modulation voltage difference changes inversely to the modulation sensitivity.

4. The GFSK modulation optimization method as described in claim 3, characterized in that: The modulation voltage difference is the output voltage (V) of the DAC module. DAC_OUT ) and the reference voltage (V) of the FSK_MOD module CM The difference between ).

5. A GFSK modulation optimization circuit, used to implement the GFSK modulation optimization method for VCO nonlinear compensation as described in any one of claims 1 to 4, characterized in that... This includes the FSK_MOD module and the DAC module; among which, The FSK_MOD module includes: First variable capacitor (C15) and second variable capacitor (C16); The third variable capacitor (C1) and the fourth variable capacitor (C2); First fixed capacitor (C17) and second fixed capacitor (C18); The compensation branch consists of a first variable capacitor (C15) and a second variable capacitor (C16) connected in series. The DAC module includes: Current mirror array; Operational amplifier; The compensation current injection terminal is connected to the operational amplifier and is used to dynamically adjust the input current of the operational amplifier according to the frequency band control word.

6. The GFSK modulation optimization circuit as described in claim 5, characterized in that: In the compensation branch, the negative terminals of the first variable capacitor (C15) and the second variable capacitor (C16) are connected to a fixed voltage.

7. The GFSK modulation optimization circuit as described in claim 6, characterized in that... In the FSK_MOD module, the compensation branch formed by the first variable capacitor (C15) and the second variable capacitor (C16) connected in series is connected between the first fixed capacitor (C17) and the second fixed capacitor (C18).

8. The GFSK modulation optimization circuit as described in claim 7, characterized in that... In the FSK_MOD module, one end of the third variable capacitor (C1) and the fourth variable capacitor (C2) are respectively connected to the first fixed capacitor (C17) and the second variable capacitor (C16), and the other end is connected to the output voltage of the DAC module.

9. The GFSK modulation optimization circuit as described in claim 5, characterized in that... In the current mirror array, the input stage PMOS transistor (PM0) and multiple bias PMOS transistors (PM1, PM2, ..., PMn-1) constitute the main current mirror; multiple switching PMOS transistors (PMC0, PMC1, ..., PMCn-1) controlled by GFSK data constitute the output current regulation unit.

10. The GFSK modulation optimization circuit as described in claim 9, characterized in that: By changing the GFSK data to control different PMOS transistors, the magnitude of the output current is adjusted, thereby changing the output voltage of the DAC module.

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