Photoelectric interconnection packaging structure and preparation method thereof
By staggering laser-formed vias on a glass substrate and fabricating TGV metal pillars and optical waveguide layers, the limitation of fiber coupling applications is solved, achieving high-density, high-performance optoelectronic interconnect packaging while reducing package size and power consumption.
Patent Information
- Application Number
- CN202410883045.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-01
- Publication Date
- 2026-01-09
AI Technical Summary
In existing technologies, the application of fiber optic coupling is limited, and glass vias formed by laser methods cannot achieve high-density, high-performance products, and there is also the phenomenon of via overlap.
Through-holes are formed on a glass substrate using an alternating laser method, and TGV metal pillars and optical waveguide layers are prepared by combining laser ablation or laser-induced denaturation etching methods to achieve the connection between the electrical chip and the optical chip.
It achieves high-density, high-performance optoelectronic interconnect packaging, reduces package size, lowers power consumption, and improves reliability, making it suitable for high-density integrated packaging.
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Figure CN121311031A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application belongs to the technical field of semiconductor, and relates to an optoelectronic interconnection packaging structure and a preparation method thereof. BACKGROUND
[0002] Optics has excellent performances such as small signal attenuation, low energy consumption, high bandwidth and compatibility with CMOS, and the industry generally believes that introducing optical technology into semiconductor processes can not only reduce chip size, cost and power consumption, but also improve reliability, so that functional chips can be connected through optical fibers in an edge coupling manner, but as the chip pitch is reduced, the application mode of optical fiber coupling is limited.
[0003] In semiconductor 2.5D / 3D packaging, organic adapter plates, through-silicon via (TSV) adapter plates and through-glass via (TGV) adapter plates are the mainstream adapter plate materials, wherein the main purpose of setting the adapter plate is to solve some challenges in semiconductor packaging, such as improving integration, reducing cost and improving electrical performance.
[0004] Among them, since glass is an insulating material, its dielectric constant is low (about 1 / 3 of that of silicon), and its loss factor is small (about 2-3 orders of magnitude smaller than that of silicon), and its high-frequency performance is excellent, which enables glass to significantly reduce insertion loss and crosstalk at high frequencies. However, the key problem faced by TGV technology is the lack of a deep etching process similar to silicon, making it difficult to quickly manufacture glass deep holes or trenches with high aspect ratio. Traditional TGV adapter plate preparation methods include sandblasting, mechanical drilling, dry etching, wet etching, focused discharge and laser methods, but all of the above methods have obvious shortcomings. The most widely used method at present is the laser method, but because the energy curve excited by the laser itself is a Gaussian energy curve, the glass via formed by the laser method is tapered and cannot form a 90° vertical hole. Therefore, when high-density openings are made, the overlayer phenomenon may occur on the upper part of the hole, causing the metal in the adjacent opening to be filled, and in order to avoid the overlayer phenomenon, the pitch of the adjacent TGV hole needs to be increased, so that the existing laser method cannot be applied to the preparation of high-density and high-performance products.
[0005] Therefore, it is necessary to provide an optoelectronic interconnection packaging structure and a preparation method thereof. SUMMARY
[0006] In view of the above-mentioned shortcomings of the prior art, the purpose of the present application is to provide an optoelectronic interconnection packaging structure and a preparation method thereof, which solves the problem of limited application of optical fiber coupling in the prior art.
[0007] To achieve the above object and other related objects, the present application provides a preparation method of an optoelectronic interconnection packaging structure, comprising the following steps:
[0008] A glass substrate is provided, which comprises a first surface and a second surface arranged oppositely;
[0009] A first via hole is formed from the top to the bottom of the glass substrate by using a first laser method, and a second via hole is formed from the bottom to the top of the glass substrate by using a second laser method, wherein the second via hole is arranged alternately with the first via hole;
[0010] A first TGV metal column is formed in the first via hole to fill the first via hole, and a second TGV metal column is formed in the second via hole to fill the second via hole;
[0011] A first groove is formed in the glass substrate by using a third laser method from the first surface of the glass substrate, and a second groove is formed in the glass substrate by using a fourth laser method from the second surface of the glass substrate;
[0012] A first optical waveguide layer is formed in the first groove, and a second optical waveguide layer is formed in the second groove;
[0013] A first rewiring layer is formed on the first surface of the glass substrate, and a second rewiring layer is formed on the second surface of the glass substrate, wherein the first rewiring layer and the second rewiring layer are electrically connected with the first TGV metal column and the second TGV metal column, respectively;
[0014] A third groove is formed by patterning the first rewiring layer, and a fourth groove is formed by patterning the first rewiring layer and the glass substrate, wherein the third groove exposes the first optical waveguide layer, and the fourth groove exposes the second optical waveguide layer;
[0015] A third optical waveguide layer is formed in the third groove, and the third optical waveguide layer is connected with the first optical waveguide layer, and a fourth optical waveguide layer is formed in the fourth groove, and the fourth optical waveguide layer is connected with the second optical waveguide layer;
[0016] An electrical chip and an optical chip with a photosensitive region are provided, and the electrical chip and the optical chip are bonded on the first rewiring layer, wherein the electrical chip and the optical chip are electrically connected with the first rewiring layer, and the photosensitive region of the optical chip is arranged correspondingly with the third optical waveguide layer and the fourth optical waveguide layer.
[0017] Optionally, the first laser method comprises a laser ablation method or a laser-induced modification etching method; the second laser method comprises a laser ablation method or a laser-induced modification etching method; the third laser method comprises a laser ablation method or a laser-induced modification etching method; and the fourth laser method comprises a laser ablation method or a laser-induced modification etching method.
[0018] Optionally, the first TGV metal column and the second TGV metal column are synchronously formed, and the method for forming the first TGV metal column and the second TGV metal column comprises electroless plating or electroplating.
[0019] Optionally, the method for forming the first re-wiring layer on the first surface of the glass substrate comprises a semiconductor process method or a substrate bonding method; and the method for forming the second re-wiring layer on the second surface of the glass substrate comprises a semiconductor process method or a substrate bonding method.
[0020] Optionally, the distance between the adjacent first via and the second via ranges from 80 to 100 μm.
[0021] Optionally, the thickness of the glass substrate ranges from 100 to 300 μm.
[0022] Optionally, the method further comprises the steps of forming a metal mirror on the sidewall of the first groove and / or the second groove; forming a convex lens on the third optical waveguide layer and / or the fourth optical waveguide layer; and forming a metal bump on the second re-wiring layer.
[0023] The present application also provides an optoelectronic interconnection packaging structure, which comprises:
[0024] a glass substrate, wherein the glass substrate comprises a first surface and a second surface arranged oppositely;
[0025] a first via, wherein the first via is prepared by a first laser method, and the first via penetrates the glass substrate from the first surface to the second surface of the glass substrate;
[0026] a second via, wherein the second via is prepared by a second laser method, and the second via penetrates the glass substrate from the second surface to the first surface of the glass substrate, and the second via is arranged alternately with the first via;
[0027] a first TGV metal column, wherein the first TGV metal column fills the first via;
[0028] a second TGV metal column, wherein the second TGV metal column fills the second via;
[0029] a first trench, the first trench being prepared by a third laser method, and the first trench extending into the glass substrate from the first surface of the glass substrate;
[0030] a second trench, the second trench being prepared by a fourth laser method, and the second trench extending into the glass substrate from the second surface of the glass substrate;
[0031] a first optical waveguide layer, the first optical waveguide layer being located in the first trench;
[0032] a second optical waveguide layer, the second optical waveguide layer being located in the second trench;
[0033] a first rewiring layer, the first rewiring layer being located on the first surface of the glass substrate, and the first rewiring layer being electrically connected with the first TGV metal column and the second TGV metal column;
[0034] a second rewiring layer, the second rewiring layer being located on the second surface of the glass substrate, and the second rewiring layer being electrically connected with the first TGV metal column and the second TGV metal column;
[0035] a third trench, the third trench being located in the first rewiring layer, and the third trench exposing the first optical waveguide layer;
[0036] a third optical waveguide layer, the third optical waveguide layer being located in the third trench, and the third optical waveguide layer being connected with the first optical waveguide layer;
[0037] a fourth trench, the fourth trench being located in the first rewiring layer and the glass substrate, and the fourth trench exposing the second optical waveguide layer;
[0038] a fourth optical waveguide layer, the fourth optical waveguide layer being located in the fourth trench, and the fourth optical waveguide layer being connected with the second optical waveguide layer;
[0039] an electrical chip and an optical chip with a photosensitive region, the electrical chip and the optical chip being bonded on the first rewiring layer, the electrical chip and the optical chip being electrically connected with the first rewiring layer, and the photosensitive region of the optical chip being correspondingly arranged with the third optical waveguide layer and the fourth optical waveguide layer.
[0040] Optionally, the distance between the adjacent first TGV metal column and the second TGV metal column ranges from 80 to 100 μm; the first TGV metal column and the second TGV metal column have the same topography.
[0041] Optionally, a metal mirror is further included on the sidewall of the first groove and / or the second groove; a convex lens is further included on the third optical waveguide layer and / or the fourth optical waveguide layer; and a metal bump is further included on the second rewiring layer.
[0042] As described above, the photoelectric interconnection packaging structure and the preparation method thereof adopt the first laser method to form the first through hole penetrating through the glass substrate from top to bottom, and the second laser method to form the second through hole penetrating through the glass substrate from bottom to bottom, and the second through hole is staggered with the first through hole, so that the application can prepare the high-performance TGV adapter with small pitch, suitable for high-density arrangement, and effectively avoid the overlapping of metal columns based on the laser method on the glass substrate; further, the optical waveguide layer is arranged on both sides of the glass substrate, and the electrical chip and the optical chip are connected in combination with the TGV adapter, so that the metal wiring is more flexible, the photoelectric interconnection integration is realized, the packaging size is reduced, the power consumption is reduced, the reliability is improved, and the application is suitable for high-density integrated packaging, and good photoelectric signal transmission can be realized. BRIEF DESCRIPTION OF DRAWINGS
[0043] Figure 1 A flowchart for preparing the photoelectric interconnection packaging structure in the embodiment of the application is shown.
[0044] Figure 2 A structure diagram after forming the first through hole and the second through hole in the embodiment of the application is shown.
[0045] Figure 3 A structure diagram after forming the first through hole and the second through hole in the embodiment of the application is shown. Figure 2 A local enlarged view of region A in the structure diagram.
[0046] Figure 4 A structure diagram after forming the first TGV metal column and the second TGV metal column in the embodiment of the application is shown.
[0047] Figure 5 A structure diagram after forming the first groove and the second groove in the embodiment of the application is shown.
[0048] Figure 6 A structure diagram after forming the metal mirror in the embodiment of the application is shown.
[0049] Figure 7 A structure diagram after forming the first optical waveguide layer and the second optical waveguide layer in the embodiment of the application is shown.
[0050] Figure 8 A structure diagram after forming the first rewiring layer and the second rewiring layer in the embodiment of the application is shown.
[0051] Figure 9A structure schematic diagram after forming the third and fourth grooves in an embodiment of the present application is shown.
[0052] Figure 10 A structure schematic diagram after forming the third and fourth optical waveguide layers in an embodiment of the present application is shown.
[0053] Figure 11 A structure schematic diagram after forming the convex lens in an embodiment of the present application is shown.
[0054] Figure 12 A structure schematic diagram after bonding the electronic chip, the optical chip and forming the metal bump in an embodiment of the present application is shown.
[0055] BRIEF DESCRIPTION OF DRAWINGS
[0056] 100 glass substrate
[0057] 101 first via hole
[0058] 102 second via hole
[0059] 103 first groove
[0060] 104 second groove
[0061] 105 third groove
[0062] 106 fourth groove
[0063] 201 first TGV metal column
[0064] 202 second TGV metal column
[0065] 301 first metal mirror
[0066] 302 second metal mirror
[0067] 401 first optical waveguide layer
[0068] 402 second optical waveguide layer
[0069] 403 third optical waveguide layer
[0070] 404 fourth optical waveguide layer
[0071] 501 first re-wiring layer
[0072] 502 second re-wiring layer
[0073] 601 first convex lens
[0074] 602 second convex lens
[0075] 701 electronic chip
[0076] 702 optical chip
[0077] 712 light sensing region
[0078] 800 metal bump DETAILED DESCRIPTION
[0079] The present application is herein described, by way of example only, with the
[0080] When describing the embodiments of the application, specific terminology is employed for the sake of clarity. The description is not intended to be limiting, but rather, is intended to be illustrative only. As such, terms such as "top," "bottom," "front," "back," "side," "end," "interior," "exterior," "upper," "lower," "horizontal," "vertical," and the like are used only on a relative basis, with respect to one another, and are not intended to refer to an absolute frame of reference.
[0081] For the purposes of this description, spatially relative terms such as "beneath," "below," "lower," "under," "above," "upper," and the like can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientations depicted in the figures. For example, if the device described herein is turned over from the orientation depicted in the figures, then the elements or features described herein as being "below" or "beneath" other elements or features would then be oriented "above" or "over" the other elements or features. The device can be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly. Likewise, descriptions of movement along and / or relative to different directions (e.g., left, right, forward, back, top, bottom, upward, downward, etc.) should be understood to be used for ease of description to
[0082] It is to be understood that the above description is intended to be illustrative and not restrictive. Many other embodiments will be apparent to those of skill in the art upon reading the above description. The scope of the application should, therefore, be determined not with reference to the above description, but should instead be determined with reference to the appended claims, along with their full scope of equivalents. The summary of the application and its objects are intended to provide an overview of the application and are not intended to limit the scope of the application in any way.
[0083] Reference Figure 1The embodiment provides a preparation method of an optoelectronic interconnection packaging structure, which can prepare a high-performance TGV adapter plate with a small pitch, suitable for high-density arrangement, and capable of effectively avoiding metal column overlapping based on a laser method; further, light waveguide layers are arranged on two surfaces of a glass substrate, and the TGV adapter plate is combined to connect an electrical chip and an optical chip, so that metal wiring is more flexible, optoelectronic interconnection integration is realized, packaging size is reduced, power consumption is lowered, reliability is improved, and the method is suitable for high-density integrated packaging and can realize good optoelectronic signal transmission.
[0084] The following will be described in detail with reference to the accompanying drawings. Figures 2-12 Further, the preparation of the optoelectronic interconnection packaging structure will be further introduced, and specifically includes the following steps.
[0085] Firstly, referring to Figure 1 and Figure 2 , a step S1 is performed, and a glass substrate 100 is provided, the glass substrate 100 including oppositely arranged first and second surfaces.
[0086] Specifically, the glass substrate 100 can include a wafer-level glass substrate, such as a 4-inch, 6-inch, 8-inch, 12-inch, etc., and the thickness of the glass substrate 100 can be 100-300 μm, such as 100 μm, 200 μm, 300 μm, etc., but the size of the glass substrate 100 is not limited thereto, and can be specifically arranged as required, which is not excessively limited herein.
[0087] Next, referring to Figure 1 and Figure 2 , a step S2 is performed, a first laser method is used to form a first through hole 101 penetrating through the glass substrate 100 from top to bottom from the first surface of the glass substrate 100, and a second laser method is used to form a second through hole 102 penetrating through the glass substrate 100 from bottom to top from the second surface of the glass substrate 100, wherein the second through hole 102 is staggered with the first through hole 101.
[0088] Specifically, most of the existing methods for preparing a TGV adapter plate use a laser method to prepare a TGV hole in a glass substrate, but the TGV hole formed by the laser method is conical, referring to the morphology of the first through hole 101 and the second through hole 102 described in Figure 2 Therefore, in order to avoid the overlapping (over layer) phenomenon between the TGV holes, the distance between the TGV holes is usually increased in the process, such as setting the pitch of the adjacent TGV holes to 120-150 μm. The TGV adapter plate avoiding over layer by increasing the pitch is difficult to be applied to high-density products. Therefore, referring to Figure 2In this embodiment, laser methods are cleverly applied to the first and second surfaces of the glass substrate 100 respectively, thereby forming staggered first through holes 101 and second through holes 102 in the glass substrate 100. This effectively avoids over-layering and also reduces the pitch between adjacent first through holes 101 and second through holes 102, making the final TGV adapter board suitable for high-density, high-performance products.
[0089] The first laser method may include laser ablation or laser-induced denaturation etching; similarly, the second laser method may include laser ablation or laser-induced denaturation etching. Preferably, the first and second laser methods employ the same preparation method to reduce process complexity and facilitate process management and operation. However, this is not a limitation; different preparation methods may be used for the first and second laser methods as needed. Specific operations of laser ablation and laser-induced denaturation etching are not detailed here; please refer to existing preparation methods.
[0090] See Figure 3 It indicated Figure 2 The enlarged view of region A shows that the first through-hole 101, formed by laser technology, has an opening width greater than its bottom width. Similarly, the second through-hole 102, also formed by laser technology, has an opening width greater than its bottom width. The first and second through-holes 101 overlap, allowing them to fully utilize the effective space of the glass substrate 100 and reduce the distance D between adjacent TGV holes. This allows the distance D between adjacent first and second through-holes 101 to be in the range of 80–100 μm, such as 80 μm, 90 μm, or 100 μm. Furthermore, the overlapping arrangement of the first and second through-holes 101 creates an effective gap between them, effectively preventing over-layering, increasing the density of the TGV hole distribution, and enabling the fabrication of high-quality products.
[0091] Next, refer to Figure 1 and Figure 4 Step S3 is executed, in which a first TGV metal pillar 201 is formed in the first through hole 101 to fill the first through hole 101, and a second TGV metal pillar 202 is formed in the second through hole 102 to fill the second through hole 102.
[0092] Specifically, the first TGV metal pillar 201 and the second TGV metal pillar 202 are preferably formed synchronously to reduce the manufacturing process steps, and of course, the first TGV metal pillar 201 and the second TGV metal pillar 202 can also be prepared step by step according to the needs, which is not limited here.
[0093] The method for forming the first TGV metal pillar 201 can include, for example, electroless plating or electroplating; the method for forming the second TGV metal pillar 202 can include, for example, electroless plating or electroplating, and the specific preparation method of the first TGV metal pillar 201 and the second TGV metal pillar 202 is not limited here. The specific operation of electroless plating or electroplating is not repeated here, and can be referred to the existing preparation method.
[0094] In this embodiment, the material of the first TGV metal pillar 201 and the second TGV metal pillar 202 is copper metal, but the material of the TGV metal pillar is not limited to this, and other conductive metal materials can also be used.
[0095] Further, after the first via hole 101 and the second via hole 102 are prepared by using the laser method, in order to facilitate the formation of the first TGV metal pillar 201 and the second TGV metal pillar 202 which fill the via holes, the first via hole 101 and the second via hole 102 can be surface treated, such as wet etching, so that the first via hole 101 and the second via hole 102 have smooth inner surfaces, and the method of surface treatment is not limited here.
[0096] Further, after the first TGV metal pillar 201 and the second TGV metal pillar 202 are formed, in order to facilitate the preparation of the subsequent rewiring layer, the glass substrate 100 can be surface treated, such as grinding, wet etching, etc., to avoid electrical connection between the TGV metal pillars and obtain a flat surface.
[0097] Next, referring to Figure 1 and Figure 5 , step S4 is performed, a third laser method is used to form a first groove 103 with a bottom in the glass substrate 100 from the first surface of the glass substrate 100, and a fourth laser method is used to form a second groove 104 with a bottom in the glass substrate 100 from the second surface of the glass substrate 100.
[0098] The third laser method can include, for example, a laser ablation method or a laser-induced phase-change etching method, the fourth laser method can include, for example, a laser ablation method or a laser-induced phase-change etching method, and preferably the first laser method, the second laser method, the third laser method and the fourth laser method adopt the same preparation method to reduce the process complexity and facilitate the management and operation of the process, but are not limited thereto, and according to the needs, the first laser method, the second laser method, the third laser method and the fourth laser method can also adopt different preparation methods.
[0099] Since the first groove 103 and the second groove 104 are both prepared by a laser method, the opening width of the first groove 103 and the second groove 104 is greater than the respective bottom width, that is, the sidewall of the first groove 103 and the second groove 104 has an inclined surface, which is beneficial to the subsequent transmission of optical signals, and the inclination angle of the inclined surface can be set according to specific needs, which is not limited here.
[0100] The first groove 103 and the second groove 104 can have the same size, and the connection of the optical waveguide layer can be realized by the way of staggered arrangement of the communication grooves, for example, referring to Figure 9 The third groove 105 communicating with the first groove 103 and the fourth groove 106 communicating with the second groove 104 can be staggered to realize the connection of the respective optical waveguide layers, of course, the first groove 103 and the second groove 104 can also have different sizes. Preferably, the center lines of the first groove 103 and the second groove 104 coincide to further reduce the package size.
[0101] Next, referring to Figure 1 , Figure 6 and Figure 7 , step S5 is performed to form a first optical waveguide layer 401 in the first groove 103 and a second optical waveguide layer 402 in the second groove 104.
[0102] Referring to Figure 6 , to reduce optical loss and improve optical transmission efficiency, in the present embodiment, a first metal mirror 301 is preferably formed on the sidewall of the first groove 103, such as a titanium metal mirror prepared by sputtering and etching, and the first metal mirror 301 formed can also cover the bottom of the first groove 103, which is not limited here. Similarly, in the present embodiment, a second metal mirror 302 is preferably formed on the sidewall of the second groove 104, and the second metal mirror 302 formed can also cover the bottom of the second groove 104, which is not limited here.
[0103] The first optical waveguide layer 401 can be prepared by a semiconductor process, i.e. by coating, exposure, development, etching, etc. The first optical waveguide layer 401 can include an organic polymer optical waveguide wiring layer, a silicon-based optical waveguide wiring layer, a lithium niobate optical waveguide wiring layer, or a lithium borate optical waveguide wiring layer, etc. Similarly, the second optical waveguide layer 402 can also be prepared by a semiconductor process.
[0104] Next, referring to Figure 1 and Figure 8 , step S6 is performed to form a first re-wiring layer 501 on the first surface of the glass substrate 100 and a second re-wiring layer 502 on the second surface of the glass substrate 100, wherein the first re-wiring layer 501 and the second re-wiring layer 502 are respectively electrically connected to the first TGV metal column 201 and the second TGV metal column 202.
[0105] Specifically, the method for forming the first re-wiring layer 501 on the first surface of the glass substrate 100 can include a semiconductor process or a substrate bonding method, and similarly, the method for forming the second re-wiring layer 502 on the second surface of the glass substrate 100 can include a semiconductor process or a substrate bonding method.
[0106] The semiconductor process is a method for preparing the first re-wiring layer 501 and the second re-wiring layer 502 on the glass substrate 100 by coating, exposure, development, deposition, etching, etc., and the substrate bonding method is a method for directly bonding the first re-wiring layer 501 and the second re-wiring layer 502 to the glass substrate 100 after preparing the first re-wiring layer 501 and the second re-wiring layer 502 in advance.
[0107] The specific preparation of the first re-wiring layer 501 and the second re-wiring layer 502 is not limited here, and they can use the same preparation method, or different preparation methods. The specific material and structure of the first re-wiring layer 501 and the second re-wiring layer 502 are not limited here, and can be selected as needed.
[0108] Next, referring to Figure 1 and Figure 9 , step S7 is performed to pattern the first re-wiring layer 501 to form a third groove 105, and to pattern the first re-wiring layer 501 and the glass substrate 100 to form a fourth groove 106, wherein the third groove 105 exposes the first optical waveguide layer 401, and the fourth groove 106 exposes the second optical waveguide layer 402.
[0109] Specifically, the patterning method of the first rewiring layer 501 and the glass substrate 100 can be selected as required, and the morphology of the third groove 105 and the fourth groove 106 is not limited here.
[0110] Then, referring to Figure 1 and Figure 10 , step S8 is performed to form a third optical waveguide layer 403 in the third groove 105, and the third optical waveguide layer 403 is connected with the first optical waveguide layer 401, and a fourth optical waveguide layer 404 is formed in the fourth groove 106, and the fourth optical waveguide layer 404 is connected with the second optical waveguide layer 402.
[0111] Specifically, when the third optical waveguide layer 403 is prepared, a semiconductor process method can be used, that is, it is prepared through coating, exposure, development, etching and other steps, and the third optical waveguide layer 403 formed can include an organic polymer optical waveguide wiring layer, a silicon-based optical waveguide wiring layer, a lithium niobate optical waveguide wiring layer or a lithium borate optical waveguide wiring layer, etc. Similarly, when the fourth optical waveguide layer 404 is prepared, a semiconductor process method can be used, and preferably the preparation and material of the third optical waveguide layer 403 and the fourth optical waveguide layer 404 are the same as the first optical waveguide layer 401 to reduce the process complexity.
[0112] Referring to Figure 11 , further, a first convex lens 601 is preferably formed on the third optical waveguide layer 403, and / or a second convex lens 602 is formed on the fourth optical waveguide layer 404, to play a role of light condensation through the first convex lens 601 and the second convex lens 602, to further reduce light loss. The preparation method of the first convex lens 601 and the second convex lens 602 is not limited here, and a bonding method can be used, but is not limited to this.
[0113] Then, referring to Figure 1 and Figure 12 , step S9 is performed to provide an electrical chip 701 and a light chip 702 with a photosensitive region 712, and the electrical chip 701 and the light chip 702 are bonded on the first rewiring layer 501, the electrical chip 701 and the light chip 702 are both electrically connected with the first rewiring layer 501, and the photosensitive region 712 of the light chip 702 is correspondingly arranged with the third optical waveguide layer 403 and the fourth optical waveguide layer 404.
[0114] Specifically, referring to Figure 12The electrical chip 701 and the optical chip 702 are electrically connected to the first re-wiring layer 501 through metal bumps, and the light sensing area 712 of the optical chip 702 is arranged corresponding to the third optical waveguide layer 403 and the fourth optical waveguide layer 404 to form an optical transmission path together with the first optical waveguide layer 401 and the second optical waveguide layer 402, as shown by the dashed line with arrows in Figure 12 .
[0115] Further, referring to Figure 12 , metal bumps 800 or the like can be formed on the surface of the second re-wiring layer 502 to facilitate subsequent electrical connection.
[0116] It can be understood that, in order to improve productivity, Figure 12 , the optoelectronic interconnection packaging structure can be regarded as a single structure formed after a cutting process. Of course, according to requirements, Figure 12 , the optoelectronic interconnection packaging structure in the present embodiment can also be a single structure directly prepared without a cutting process, which is not limited here.
[0117] Referring to Figures 2-12 , the present embodiment also provides an optoelectronic interconnection packaging structure, wherein the optoelectronic interconnection packaging structure can be directly prepared by using the above preparation process, so that the material, structure and the like of the optoelectronic interconnection packaging structure can be referred to the above content. Of course, according to requirements, the optoelectronic interconnection packaging structure can also be prepared by using other preparation processes.
[0118] In the present embodiment, the optoelectronic interconnection packaging structure comprises:
[0119] a glass substrate 100, the glass substrate 100 comprising a first surface and a second surface arranged opposite to each other;
[0120] a first through hole 101, the first through hole 101 being prepared by using a first laser method, and the first through hole 101 penetrating through the glass substrate 100 from top to bottom from the first surface of the glass substrate 100;
[0121] a second through hole 102, the second through hole 102 being prepared by using a second laser method, and the second through hole 102 penetrating through the glass substrate 100 from bottom to top from the second surface of the glass substrate 100, wherein the second through hole 102 is arranged staggered with the first through hole 101;
[0122] a first TGV metal column 201, the first TGV metal column 201 filling the first through hole 101;
[0123] a second TGV metal column 202, the second TGV metal column 202 filling the second through hole 102;
[0124] a first trench 103, the first trench 103 being prepared by a third laser method, and the first trench 103 extending into the glass substrate 100 from a first surface of the glass substrate 100;
[0125] a second trench 104, the second trench 104 being prepared by a fourth laser method, and the second trench 104 extending into the glass substrate 100 from a second surface of the glass substrate 100;
[0126] a first optical waveguide layer 401, the first optical waveguide layer 401 being located in the first trench 103;
[0127] a second optical waveguide layer 402, the second optical waveguide layer 402 being located in the second trench 104;
[0128] a first rewiring layer 501, the first rewiring layer 501 being located on the first surface of the glass substrate 100, and the first rewiring layer 501 being electrically connected with the first TGV metal column 201 and the second TGV metal column 202;
[0129] a second rewiring layer 502, the second rewiring layer 502 being located on the second surface of the glass substrate 100, and the second rewiring layer 502 being electrically connected with the first TGV metal column 201 and the second TGV metal column 202;
[0130] a third trench 105, the third trench 105 being located in the first rewiring layer 501, and the third trench 105 exposing the first optical waveguide layer 401;
[0131] a third optical waveguide layer 403, the third optical waveguide layer 403 being located in the third trench 105, and the third optical waveguide layer 403 being connected with the first optical waveguide layer 401;
[0132] a fourth trench 106, the fourth trench 106 being located in the first rewiring layer 501 and the glass substrate 100, and the fourth trench 106 exposing the second optical waveguide layer 402;
[0133] a fourth optical waveguide layer 404, the fourth optical waveguide layer 404 being located in the fourth trench 106, and the fourth optical waveguide layer 404 being connected with the second optical waveguide layer 402;
[0134] The electric chip 701 and the light chip 702 with the light sensing area 712 are bonded on the first re-wiring layer 501, the electric chip 701 and the light chip 702 are both electrically connected with the first re-wiring layer 501, and the light sensing area 712 of the light chip 702 is correspondingly arranged with the third light waveguide layer 403 and the fourth light waveguide layer 404.
[0135] The distance D between the first TGV metal column 201 and the second TGV metal column 202 can be 80-100 μm, such as 80 μm, 90 μm, 100 μm, etc., and since the first via hole 101 and the second via hole 102 are arranged in an overlapping manner, the first TGV metal column 201 and the second TGV metal column 202 are arranged in an overlapping manner, and an effective spacing area can be formed therebetween to effectively avoid the over layer phenomenon, improve the density of TGV metal column distribution, and prepare high-quality products.
[0136] The glass substrate 100 can include a wafer-level glass substrate, such as 4 inches, 6 inches, 8 inches, 12 inches, etc., and the thickness of the glass substrate 100 can be 100-300 μm, such as 100 μm, 200 μm, 300 μm, etc., but the size of the glass substrate 100 is not limited thereto and can be set as needed.
[0137] The first TGV metal column 201 and the second TGV metal column 202 can have the same topography, as shown in Figure 12 The first TGV metal column 201 and the second TGV metal column 202 are shown as being tapered and having the same topography, but are not limited thereto, such as the first TGV metal column 201 and the second TGV metal column 202 can also be tapered with different sizes, which can be achieved by adjusting the laser process, for example, to meet the specific product requirements, which are not limited herein.
[0138] As shown in Figure 6 and Figure 12 To reduce light loss and improve light transmission efficiency, in the present embodiment, a first metal mirror 301 is preferably arranged on the sidewall of the first recess 103, and of course, the first metal mirror 301 can also cover the bottom of the first recess 103 as needed, which is not limited herein. Similarly, in the present embodiment, a second metal mirror 302 is preferably arranged on the sidewall of the second recess 104, and of course, the second metal mirror 302 can also cover the bottom of the second recess 104 as needed, which is not limited herein.
[0139] Further, as shown in Figure 12Preferably, a first convex lens 601 is arranged on the third optical waveguide layer 403, and / or a second convex lens 602 is arranged on the fourth optical waveguide layer 404, so as to play a role of light condensation through the first convex lens 601 and the second convex lens 602, so as to further reduce light loss.
[0140] Further, referring to Figure 12 A metal bump 800 or the like can also be arranged on the surface of the second rewiring layer 502, so as to facilitate subsequent electrical connection.
[0141] In summary, the optoelectronic interconnection packaging structure and the preparation method thereof adopt a first laser method to form a first through hole penetrating through the glass substrate from top to bottom, and a second laser method to form a second through hole penetrating through the glass substrate from bottom to bottom, and the second through hole and the first through hole are arranged alternately, so that the application can prepare a high-performance TGV adapter with a small pitch, suitable for high-density arrangement, and effectively avoid the overlapping of metal columns; further, the optical waveguide layers are arranged on both surfaces of the glass substrate, and the electrical chip and the optical chip are connected in combination with the TGV adapter, so that the metal wiring is more flexible, the optoelectronic interconnection integration is realized, the packaging size is reduced, the power consumption is reduced, the reliability is improved, and the application is suitable for high-density integrated packaging, and good optoelectronic signal transmission can be realized.
[0142] The above embodiments only exemplarily illustrate the principles and effects of the application, and are not used to limit the application. Any person skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the application. Therefore, all equivalent modifications or changes completed by those skilled in the art without departing from the spirit and technical thought disclosed by the application should be covered by the claims of the application.
Claims
1. A method of fabricating an optoelectronic interconnect package structure, comprising: The method comprises the following steps: providing a glass substrate comprising a first surface and a second surface arranged oppositely; forming a first via hole through the glass substrate from top to bottom on the first surface of the glass substrate by a first laser method, and forming a second via hole through the glass substrate from bottom to top on the second surface of the glass substrate by a second laser method, wherein the second via hole is staggered with the first via hole; forming a first TGV metal column in the first via hole to fill the first via hole, and forming a second TGV metal column in the second via hole to fill the second via hole; forming a first groove in the glass substrate from the first surface of the glass substrate by a third laser method, and forming a second groove in the glass substrate from the second surface of the glass substrate by a fourth laser method; forming a first optical waveguide layer in the first groove, and forming a second optical waveguide layer in the second groove; forming a first rewiring layer on the first surface of the glass substrate, and forming a second rewiring layer on the second surface of the glass substrate, wherein the first rewiring layer and the second rewiring layer are electrically connected with the first TGV metal column and the second TGV metal column respectively; patterning the first rewiring layer to form a third groove, and patterning the first rewiring layer and the glass substrate to form a fourth groove, wherein the third groove exposes the first optical waveguide layer, and the fourth groove exposes the second optical waveguide layer; forming a third optical waveguide layer in the third groove, and the third optical waveguide layer is connected with the first optical waveguide layer, and forming a fourth optical waveguide layer in the fourth groove, and the fourth optical waveguide layer is connected with the second optical waveguide layer; providing an electrical chip and an optical chip with a photosensitive region, and bonding the electrical chip and the optical chip on the first rewiring layer, wherein the electrical chip and the optical chip are electrically connected with the first rewiring layer, and the photosensitive region of the optical chip is arranged correspondingly with the third optical waveguide layer and the fourth optical waveguide layer.
2. The method of claim 1, wherein: The first laser method comprises a laser ablation method or a laser-induced denaturation etching method; the second laser method comprises a laser ablation method or a laser-induced denaturation etching method; the third laser method comprises a laser ablation method or a laser-induced denaturation etching method; and the fourth laser method comprises a laser ablation method or a laser-induced denaturation etching method.
3. The method of claim 1, wherein: The first TGV metal column and the second TGV metal column are formed synchronously, and the method for forming the first TGV metal column and the second TGV metal column comprises chemical plating or electroplating.
4. The method of claim 1, wherein: The method for forming the first rewiring layer on the first surface of the glass substrate comprises a semiconductor process method or a substrate bonding method; and the method for forming the second rewiring layer on the second surface of the glass substrate comprises a semiconductor process method or a substrate bonding method.
5. The method of claim 1, wherein: The distance between the adjacent first via hole and the second via hole ranges from 80 to 100 μm.
6. The method of claim 1, wherein: The thickness of the glass substrate ranges from 100 to 300 μm.
7. The method of claim 1, wherein: Further comprising the step of forming a metal mirror on the sidewall of the first groove and / or the second groove; further comprising the step of forming a convex lens on the third optical waveguide layer and / or the fourth optical waveguide layer; further comprising the step of forming a metal bump on the second re-wiring layer.
8. An optoelectronic interconnect package structure, comprising: The optoelectronic interconnection package structure comprises: a glass substrate comprising a first face and a second face arranged oppositely; a first via hole prepared by a first laser method, the first via hole penetrating through the glass substrate from the first face of the glass substrate; a second via hole prepared by a second laser method, the second via hole penetrating through the glass substrate from the second face of the glass substrate, wherein the second via hole is staggered with the first via hole; a first TGV metal column filling the first via hole; a second TGV metal column filling the second via hole; a first groove prepared by a third laser method, the first groove extending into the glass substrate from the first face of the glass substrate; a second groove prepared by a fourth laser method, the second groove extending into the glass substrate from the second face of the glass substrate; a first optical waveguide layer located in the first groove; a second optical waveguide layer located in the second groove; a first re-wiring layer located on the first face of the glass substrate, the first re-wiring layer being electrically connected with the first TGV metal column and the second TGV metal column; a second re-wiring layer located on the second face of the glass substrate, the second re-wiring layer being electrically connected with the first TGV metal column and the second TGV metal column; a third groove located in the first re-wiring layer, the third groove exposing the first optical waveguide layer; a third optical waveguide layer located in the third groove, the third optical waveguide layer being connected with the first optical waveguide layer; a fourth groove located in the first re-wiring layer and the glass substrate, the fourth groove exposing the second optical waveguide layer; a fourth optical waveguide layer located in the fourth groove, the fourth optical waveguide layer being connected with the second optical waveguide layer; an electrical chip and an optical chip with a photosensitive region, the electrical chip and the optical chip being bonded on the first re-wiring layer, the electrical chip and the optical chip being electrically connected with the first re-wiring layer, and the photosensitive region of the optical chip being arranged correspondingly with the third optical waveguide layer and the fourth optical waveguide layer.
9. The optoelectronic interconnect package structure of claim 8, wherein: The distance between the first TGV metal column and the second TGV metal column ranges from 80 to 100 μm; the first TGV metal column and the second TGV metal column have the same morphology. Further comprising the step of forming a metal mirror on the sidewall of the first groove and / or the second groove; further comprising the step of forming a convex lens on the third optical waveguide layer and / or the fourth optical waveguide layer; further comprising the step of forming a metal bump on the second re-wiring layer.
10. The optoelectronic interconnect package structure of claim 8, wherein: Also comprising a metal mirror located on the sidewall of the first groove and / or the second groove; also comprising a convex lens located on the third optical waveguide layer and / or the fourth optical waveguide layer; also comprising a metal bump located on the second re-wiring layer. Also comprising a metal mirror located on the sidewall of the first groove and / or the second groove; also comprising a convex lens located on the third optical waveguide layer and / or the fourth optical waveguide layer; also comprising a metal bump located on the second re-wiring layer.