GCSC-SSRDC-based double-fed wind power plant subsynchronous oscillation suppression device and method
By using the GCSC-SSRDC device in a doubly-fed wind farm to replace the fixed series compensation capacitor and combining it with a subsynchronous resonance damping controller, efficient subsynchronous oscillation suppression under complex operating conditions is achieved, solving the problems of insufficient robustness and high retrofitting cost of existing solutions.
Patent Information
- Application Number
- CN202511481836.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-16
- Publication Date
- 2026-01-16
AI Technical Summary
Existing solutions for suppressing subsynchronous oscillations in doubly-fed wind farms are not robust enough under complex operating scenarios such as grid intensity fluctuations and wind speed changes. They are difficult to effectively suppress multimodal oscillation coupling and wide-frequency instability, and the retrofit cost is high.
A device based on GCSC-SSRDC is adopted, which replaces the fixed series compensation capacitor with a gated series capacitor and combines it with a subsynchronous resonance damping controller to provide variable capacitive reactance compensation and real-time positive damping, thereby suppressing subsynchronous oscillation.
It can quickly and significantly suppress subsynchronous oscillations under multiple operating conditions. The device has a simple structure, low modification cost, and advantages of high robustness and convenient engineering implementation.
Smart Images
Figure CN121355931A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of new energy grid connection technology, and relates to, but is not limited to, a doubly fed wind farm subsynchronous oscillation suppression device and method based on GCSC-SSRDC. Background Technology
[0002] With the rapid development of the new energy industry, especially under the strategic background of "carbon peaking and carbon neutrality", the total installed capacity of new energy power generation in my country has continued to climb. At present, the installed capacity of new energy has exceeded that of coal power, becoming the main force of my country's power supply.
[0003] To achieve long-distance power transmission, especially when large wind farms transmit power through fixed series compensation systems, there is a risk of sub-synchronous oscillation (SSO). The grid-connected stability of Type-3 doubly-fed induction generators (DFIGs) has become increasingly prominent and has attracted widespread attention. In recent years, a new type of sub- and super-synchronous oscillation (SSSO) caused by converter power sources such as wind power has become particularly significant. Wind power sub- and super-synchronous oscillations are a new type of stability problem caused by the interaction between wind power control and the grid in wind power grid-connected systems. This has become a major technical challenge restricting the stable operation and efficient absorption of large-scale wind power. During oscillations, the unbalanced current of the wind turbine exceeds the limit, causing protection to activate and resulting in a large number of turbines disconnecting from the grid, posing a significant threat to the safe and stable operation of the power grid. Therefore, an effective solution is urgently needed to address the SSO problem caused by the grid connection of these doubly-fed induction generators.
[0004] The aforementioned SSO phenomenon mainly stems from the interaction between the converter control and the series-compensated power grid, and is therefore widely referred to as sub-synchronous control interaction (SSCI). From the perspective of impedance analysis, a doubly-fed wind farm can be equivalent to a series connection of a negative resistor and an inductor, while a series-compensated transmission system is a series connection of a resistor, an inductor, and a capacitor. The overall system constitutes an RLC oscillating circuit. Under certain specific operating conditions, the negative resistance of the doubly-fed wind farm and the positive resistance of the AC power grid cancel each other out, resulting in the SSCI phenomenon. As the grid series compensation degree increases, the line resistance decreases, and the wind speed decreases, the sub-synchronous control interaction of the doubly-fed wind turbine grid-connected system becomes more pronounced.
[0005] Currently, numerous solutions have been proposed to suppress SSO (Synchronous Response Time) generated by doubly-fed wind farms via series compensation systems. These solutions mainly focus on the wind turbine converter side and the grid side. Grid-side SSO suppression strategies focus on active intervention in the wind turbine control system, including controller parameter optimization and additional damping control. At the parameter optimization level, existing research aims to reduce the negative damping risk in the subsynchronous frequency band by adjusting the converter inner loop proportional gain and the dynamic response characteristics of the phase-locked loop.
[0006] However, such methods are essentially in the category of local stability regulation, which can only suppress the amplitude of a single oscillation mode and are difficult to deal with multimodal oscillation coupling and wide-frequency domain instability. In particular, when the operating conditions such as grid strength and wind speed deviate from the preset optimization range, a mismatch will occur between the time invariance of the control parameters and the dynamic time-varying characteristics of the system, resulting in a significant decrease in suppression effectiveness or even inducing mode migration of SSSO. Therefore, governance schemes that rely solely on parameter optimization face the bottleneck of insufficient robustness in complex and ever-changing real-world engineering scenarios.
[0007] Existing suppression schemes have shown some effectiveness under specific operating conditions, but their strategies based on additional damping control have certain limitations. They are difficult to adapt to complex operating scenarios such as grid intensity fluctuations and random wind speed changes. Furthermore, the retrofitting of existing wind farms requires large-scale hardware replacement and software upgrades, which face high retrofitting costs and time pressures.
[0008] Therefore, there is an urgent need for a low-cost and robust method to suppress subsynchronous oscillations in wind farms without modifying wind turbine units. Summary of the Invention
[0009] In view of this, in order to solve the bottleneck problem that existing suppression schemes are difficult to maintain effectiveness under multiple operating conditions such as grid intensity fluctuations and random wind speed changes, and have insufficient robustness and poor adaptability in complex practical engineering, this application provides a doubly fed wind farm subsynchronous oscillation suppression device based on GCSC-SSRDC.
[0010] The specific technical solutions of this invention are as follows: This invention provides a device and method for suppressing subsynchronous oscillations in a doubly-fed wind farm based on GCSC-SSRDC, comprising: Gated series capacitors: These are installed in series between the high-voltage side outlet of the step-up transformer in the wind farm and the transmission line to replace the fixed series capacitors in the transmission line and provide fixed capacitive reactance compensation for the line inductive reactance. Power dispatch controller: Its analog input terminal is connected to the secondary side of the voltage transformer and current transformer on the transmission line via a shielded cable. It is used to obtain the power signal of the transmission line and output the fundamental frequency compensation reactance command after processing by a first-order low-pass filter. Its output terminal is connected to the control signal generation module. Subsynchronous resonant damping controller: Its input terminal obtains the transmission line current signal through a Hall current sensor or a secondary current transformer, and outputs an additional reactance command through a filtering and scaling module and a proportional controller in sequence. Its output terminal is connected to the control signal generation module. Control signal generation module: used to receive the base frequency compensation reactance command and the additional reactance command, and after superimposing the two, convert them into the turn-off pulse signal of the gated series capacitor switching device through the amplitude limiting, table lookup and pulse generation unit, so as to suppress the subsynchronous oscillation.
[0011] In one possible implementation, the gated series capacitor is a three-phase independent structure, each phase comprising: A fixed capacitor connected in parallel with a pair of reverse gate turn-off thyristors is installed on an outdoor insulating platform and connected in series with the transmission line via a post insulator. The cooling system uses air-cooled or water-cooled heat sinks, which are installed on the back of the gate turn-off thyristor and are interlocked with the trigger unit through a temperature control relay for protection. Equalizing resistors and surge arresters are connected in parallel across the gate turn-off thyristors of each phase to limit operational overvoltages.
[0012] In one possible implementation, the filtering and scaling module further includes: Bandpass filter unit: used to extract the current component of the subsynchronous frequency band; Amplitude scaling unit: used to normalize the extracted current amplitude to the input range of the proportional controller.
[0013] In one possible implementation, the control signal generation module includes: The superposition unit is used to add the fundamental frequency compensation reactance output by the power dispatch controller to the additional reactance output by the subsynchronous resonant damping controller; The limiting unit is used to limit the superimposed total reactance command within the adjustable reactance range of the gated series capacitor; The lookup table unit is used to convert the limited total reactance command into the corresponding turn-off angle; The pulse generation unit is used to output the turn-off pulse that drives the gate to turn off the thyristor according to the turn-off angle.
[0014] In one possible implementation, the gated series capacitor is equivalent to a variable series capacitor under fundamental frequency conditions, and its reactance is continuously adjustable between its maximum value and zero.
[0015] In one possible implementation, the first-order low-pass filter of the power dispatch controller has a cutoff frequency of 3Hz to suppress high-frequency interference in the power signal.
[0016] In one possible implementation, the proportional coefficient of the proportional controller is determined through system eigenvalue sensitivity analysis, such that the damping of the system at the subsynchronous frequency is positive.
[0017] Secondly, this application provides a method for suppressing subsynchronous oscillations in doubly-fed wind farms based on GCSC-SSRDC, including: Real-time monitoring of power and current signals of transmission lines; The power signal is input to the power scheduling controller, and after being processed by a first-order low-pass filter, a fundamental frequency compensation reactance command is generated. The current signal is input to the subsynchronous resonant damping controller. The subsynchronous frequency band component is extracted by the filtering and scaling module and normalized before being input into the proportional controller to generate an additional reactance command. The fundamental frequency compensation reactance command and the additional reactance command are superimposed to obtain the total reactance command; The total reactance command is converted into a turn-off pulse signal for the gated series capacitor through amplitude limiting, table lookup, and pulse generation. The equivalent reactance of the gated series capacitor is adjusted to suppress subsynchronous oscillation.
[0018] The beneficial effects of the technical solutions provided in the embodiments of the present invention include at least the following: This application provides a subsynchronous oscillation suppression device and method for doubly-fed wind farms based on GCSC-SSRDC. By replacing the fixed series compensation capacitor with a gated series capacitor (GCSC) and superimposing a subsynchronous resonance damping controller (SSRDC), the device retains the power frequency reactive power compensation capability. It utilizes the dual mechanism of the GCSC's continuously adjustable capacitive reactance "breaking the resonance point" and the SSRDC's proportional feedback "real-time injection of positive damping" to enable the doubly-fed wind farm to quickly and significantly suppress subsynchronous oscillations under various operating conditions such as wind speeds of 5–15 m / s and series compensation degrees of 15–55%. The device has a simple structure, requires only one proportional coefficient for parameter tuning, and does not require large-scale modification of existing equipment. Therefore, it has comprehensive advantages such as convenient engineering implementation, low modification cost, and high robustness. Attached Figure Description
[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort, wherein: Figure 1 A schematic diagram of the structural framework of a doubly fed wind farm subsynchronous oscillation suppression device based on GCSC-SSRDC provided for an embodiment of the present invention; Figure 2This is a schematic diagram of the structural framework of the control signal generation module provided in an embodiment of the present invention; Figure 3 This is a structural block diagram of a gated series capacitor provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of the signal processing logic flow provided in an embodiment of the present invention; Figure 5 This is a flowchart illustrating a method for suppressing subsynchronous oscillations in a doubly fed wind farm based on GCSC-SSRDC, provided as an embodiment of the present invention.
[0020] Figure label: 1. Overlay unit; 2. Amplification limiting unit; 3. Lookup table unit; 4. Pulse generation unit. Detailed Implementation
[0021] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. The following embodiments are used to illustrate the present invention, but are not intended to limit the scope of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0022] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.
[0023] It should be noted that the terms "first, second, and third" used in the embodiments of the present invention are only used to distinguish similar objects and do not represent a specific ordering of objects. It is understood that "first, second, and third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of the present invention described herein can be implemented in an order other than that illustrated or described herein.
[0024] It will be understood by those skilled in the art that, unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which these embodiments of the invention pertain. It should also be understood that terms such as those defined in general dictionaries should be understood to have the same meaning as in the context of the prior art and should not be interpreted in an idealized or overly formal sense unless specifically defined as herein.
[0025] Figure 1A schematic diagram of a subsynchronous oscillation suppression device for a doubly-fed wind farm based on GCSC-SSRDC is provided for an embodiment of the present invention, as shown below. Figure 1 As shown, the device may include: Gated series capacitors (GCSCs): These are installed in series between the high-voltage side outlet of the wind farm's step-up transformer and the transmission line to replace fixed series compensation capacitors and provide fixed capacitive reactance compensation for line inductive reactance. A block diagram of a gated series capacitor is shown below. Figure 3 As shown.
[0026] The GCSC achieves control by changing the turn-off angle γ measured at the zero-crossing point of the line current. By combining the GCSC with a fixed series capacitor, the compensation cost of the wind power system can be kept to a minimum, and the system stability can be improved through the design of the control system.
[0027] Under fundamental frequency conditions, the GCSC can be equivalent to a variable series capacitor, whose reactance can be continuously adjusted between its maximum value and zero, which is equivalent to a continuously adjustable series capacitor.
[0028] The weak capacitive compensation of GCSC (i.e., the equivalent capacitive reactance is small) will change the total impedance characteristics of the system, which will break the capacitive reactance-inductive reactance matching condition that may otherwise lead to resonance, thereby shifting or eliminating the resonance point and avoiding resonance.
[0029] Power Dispatch Controller (PSC): Its analog input terminal is connected to the secondary side of the voltage transformer and current transformer on the transmission line via a shielded cable. It is used to obtain the power signal of the transmission line and output the fundamental frequency compensation reactance command after processing by a first-order low-pass filter.
[0030] The first-order low-pass filter of the power dispatch controller has a cutoff frequency of 3Hz, which is used to suppress high-frequency interference in the power signal.
[0031] In some embodiments, such as Figure 4 As shown, in the PSC module, T m The time constant of the first-order low-pass filter is related to the measured active power of the transmission line, where P is the measured power of the line. This power is processed by a low-pass filter with a cutoff frequency of 3Hz to detect low-frequency power oscillations. The output signal P of the first-order low-pass filter is then used. m With reference power P * The comparison is performed, and the error signal is input to the regulator composed of a proportional-integral controller. A lead compensation circuit can also be added as needed. If the GCSC control system only consists of a PSC under certain operating conditions, the risk of system oscillation will increase. Therefore, an auxiliary controller needs to be added to suppress subsynchronous oscillation.
[0032] After detecting the line voltage and current values and inputting them to the power calculation module, the active power of the transmission line output by this module, together with the reference power, is input to the power dispatch controller (PSC) module, and its output is the reactance. .
[0033] Subsynchronous Resonant Damping Controller (SSRDC): Its input terminal obtains the transmission line current signal through a Hall current sensor or a secondary current transformer, and outputs an additional reactance command through a filtering and scaling module and a proportional controller in sequence.
[0034] In some embodiments, the SSRDC mainly consists of a proportional controller and a filtering and scaling module, in order to obtain the optimal scaling factor. Then it is necessary to change The eigenvalues of the system are obtained by using the values of the eigenvalues. When the system transitions from an unstable mode to a stable state, the corresponding eigenvalues are obtained. The value is the optimal solution, and after adopting SSRDC, all oscillation modes of the system remain stable.
[0035] The line current is input to the filtering and scaling module, which outputs the current amplitude. The reactance is obtained after processing by a subsynchronous resonant damping controller (SSRDC). .
[0036] The proportional coefficient of the proportional controller is determined through system eigenvalue sensitivity analysis to ensure that the damping of the system is positive at the subsynchronous frequency. The filtering and scaling module includes: a bandpass filter unit for extracting the current component of the subsynchronous frequency band; and an amplitude scaling unit for normalizing the extracted current amplitude to the input range of the proportional controller.
[0037] Control signal generation module: used to superimpose the base frequency compensation reactance command and the additional reactance command, and then convert them into the turn-off pulse signal of the gated series capacitor switching device through the amplitude limiting, table lookup and pulse generation unit, so as to suppress the subsynchronous oscillation.
[0038] in, Figure 2 This is a schematic diagram of the structural framework of the control signal generation module provided in an embodiment of the present invention, as shown below. Figure 2 As shown, the control signal generation module includes: a superposition unit 1, used to add the fundamental frequency compensation reactance output by the power dispatch controller to the additional reactance output by the subsynchronous resonant damping controller; a limiting unit 2, used to limit the superimposed total reactance command within the adjustable reactance range of the gated series capacitor; a lookup table unit 3, used to convert the limited total reactance command into the corresponding turn-off angle; and a pulse generation unit 4, used to output a turn-off pulse to drive the gate to turn off the thyristor according to the turn-off angle.
[0039] In some embodiments, reactance and After the reactances are superimposed, they are processed by a limiting unit (used to limit the compensation value to the minimum and maximum compensation range) to finally obtain the optimal compensation reactance. , The instruction is converted into the corresponding turn-off angle instruction via a lookup table unit. Once the turn-off angle is input to the pulse generation unit, a turn-off pulse signal for driving the switching device can be generated.
[0040] It can be seen that when using GCSC + PSC compensation, although GCSC provides dynamic compensation capability, PSC control using only GCSC cannot suppress SSO phenomenon. PSC is mainly used for power dispatch, but lacks targeted damping control for SSO mode. Therefore, the damping magnitude of SSO mode can be effectively improved by adding a subsynchronous resonant damping controller (SSRDC).
[0041] Figure 4 This is a schematic diagram of the signal processing logic flow provided in an embodiment of the present invention.
[0042] In some embodiments, such as Figure 4 As shown, the gated series capacitor has a three-phase independent structure, and each phase includes: A fixed capacitor connected in parallel with a pair of reverse gate turn-off thyristors (GTOs) is installed on an outdoor insulating platform and connected in series with the transmission line via post insulators; The cooling system uses air-cooled or water-cooled heat sinks, which are installed on the back of the gate turn-off thyristor and are interlocked with the trigger unit through a temperature control relay for protection. Equalizing resistors and surge arresters are connected in parallel across the gate turn-off thyristors of each phase to limit operational overvoltages.
[0043] Furthermore, the three phases of the GSGC are connected in series on the A, B, and C phase lines respectively, and each phase is connected to the line at both ends via a disconnecting switch for easy maintenance bypass. The GSGC is also equipped with a voltage transformer (PT) and a current transformer (CT) on both sides, and the secondary side is connected to the cabinet terminal block via a shielded cable.
[0044] Each module in the above-mentioned doubly fed wind farm subsynchronous oscillation suppression device based on GCSC-SSRDC can be implemented in whole or in part through software, hardware and their combination. Each module can be embedded in the processor of the computer device in hardware form or independent of the processor, or it can be stored in the memory of the computer device in software form so that the processor can call and execute the corresponding operations of each module.
[0045] Corresponding to the aforementioned embodiment of the subsynchronous oscillation suppression device for doubly-fed wind farms based on GCSC-SSRDC, and employing the same technical concept, this application also provides an embodiment of the subsynchronous oscillation suppression method for doubly-fed wind farms based on GCSC-SSRDC.
[0046] Figure 5 This is a flowchart illustrating a method for suppressing subsynchronous oscillations in a doubly fed wind farm based on GCSC-SSRDC, provided as an embodiment of the present invention.
[0047] In one exemplary embodiment, such as Figure 5 As shown, the method may include the following steps: Step 100: Monitor the power and current signals of the transmission line in real time.
[0048] When monitoring the transmission line in real time, power and current signals are collected by voltage and current transformers on the high-voltage side of the booster station. The sampling frequency is 10 kHz, and after a 20 ms sliding average, a 50 Hz base value and a subsynchronous component are output.
[0049] Step 200: Input the power signal into the power scheduling controller, and after processing by a first-order low-pass filter, generate a fundamental frequency compensation reactance command.
[0050] Furthermore, the cutoff frequency of this first-order low-pass filter is 3Hz. After the power signal passes through the first-order low-pass filter, it is directly converted into a fundamental frequency compensation reactance command according to a linear strategy. The linear strategy is a pure proportional mapping between the power deviation and the reactance deviation.
[0051] Step 300: Input the current signal into the subsynchronous resonant damping controller, extract the subsynchronous frequency band component through the filtering and scaling module, normalize it and input it into the proportional controller to generate an additional reactance command.
[0052] In some embodiments, a second-order bandpass filter in the filtering and scaling module is used to digitally filter the line current signal, extract the subsynchronous component completely, suppress other power frequency and high-frequency noise, sample the filtered subsynchronous component by an analog-to-digital converter, and then use a fixed coefficient linear scaling to normalize the amplitude. At the same time, the normalized subsynchronous current is input into the proportional controller and multiplied by the proportional coefficient to obtain the additional reactance command.
[0053] Step 400: Superimpose the fundamental frequency compensation reactance command with the additional reactance command to obtain the total reactance command.
[0054] The superposition process is performed in a digital signal processor and can be done using either an analog adder or a digital adder.
[0055] Step 500: The total reactance command is converted into a turn-off pulse signal for the gated series capacitor through amplitude limiting, table lookup and pulse generation, and the equivalent reactance of the gated series capacitor is adjusted to suppress subsynchronous oscillation.
[0056] In some embodiments, after the total reactance command is generated, it is limited by hardware comparison circuit and software judgment. Once the amplitude of the total reactance command exceeds the preset upper and lower limits, it is immediately clamped at the boundary value to prevent subsequent steps from going out of bounds. At the same time, a "limiting action" event is sent to the monitoring system for easy viewing by operators.
[0057] After the amplitude is limited, the total reactance command is input into the lookup table unit, which directly maps the reactance value to the turn-off angle. The main body of the lookup table unit is a two-dimensional lookup table calculated offline. The table is stored in the memory of the control board. The processor can convert the reactance into the corresponding turn-off angle in microseconds by using the lookup table. The accuracy can reach a few tenths of a degree, which is sufficient to meet the control requirements.
[0058] After obtaining the turn-off angle, the pulse generation unit starts working. The system uses a counter synchronized with the power grid frequency to generate a turn-off pulse immediately when the counter reaches the position corresponding to the turn-off angle in each cycle. This pulse is sent to the valve control cabinet through optical fiber and then stepped up by the pulse transformer to become a positive and negative pulse sufficient to drive the gate to turn off the thyristor, ensuring that the thyristor turns off at the correct time. As the turn-off angle changes, the equivalent capacitive reactance of the gate series capacitor also changes continuously: the smaller the turn-off angle, the smaller the equivalent capacitive reactance; the larger the turn-off angle, the larger the equivalent capacitive reactance.
[0059] By adjusting the equivalent capacitive reactance in real time, the total impedance of the system is continuously corrected. On the one hand, it deviates from the resonance point that might have caused subsynchronous oscillations. On the other hand, it introduces an additional positive damping component, which directly cancels the negative resistance effect of the doubly fed wind turbine in the subsynchronous frequency band. The line power oscillations decay rapidly, and the subsynchronous oscillations are effectively suppressed.
[0060] For specific limitations on the subsynchronous oscillation suppression method for doubly fed wind farms based on GCSC-SSRDC, please refer to the limitations on the subsynchronous oscillation suppression device for doubly fed wind farms based on GCSC-SSRDC mentioned above, which will not be repeated here.
[0061] It should be understood that the phrase "one embodiment" or "an embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of the invention. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of the invention, the sequence numbers of the above-described processes do not imply a sequential order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the invention. The sequence numbers of the above-described embodiments of the invention are merely descriptive and do not represent the superiority or inferiority of the embodiments.
[0062] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.
[0063] In the several embodiments provided by this invention, it should be understood that the disclosed methods can be implemented in other ways. The methods disclosed in the several method embodiments provided by this invention can be arbitrarily combined without conflict to obtain new method embodiments. The features disclosed in the several method embodiments provided by this invention can be arbitrarily combined without conflict to obtain new method embodiments.
[0064] The above description is merely an embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.
Claims
1. A GCSC-SSRDC-based dual-fed wind farm subsynchronous oscillation suppression device, characterized in that, The application relates to a gate-controlled series capacitor, a power scheduling controller, a subsynchronous resonance damping controller and a control signal generation module. The gate-controlled series capacitor is installed in series between the high-voltage side outlet of a wind farm booster transformer and a power transmission line, is used for replacing fixed series compensation capacitors in the power transmission line, and provides fixed capacitive compensation for line inductance. The power scheduling controller is connected with the secondary sides of voltage transformers and current transformers on the power transmission line through shielded cables, is used for acquiring power signals of the power transmission line, and outputs a base frequency compensation reactance instruction after the power signals are processed by a first-order low-pass filter, and the output end of the power scheduling controller is connected with the control signal generation module. The subsynchronous resonance damping controller acquires current signals of the power transmission line through a Hall current sensor or a secondary current transformer, and outputs an additional reactance instruction after the current signals are processed by a filtering and scaling module and a proportional controller in sequence, and the output end of the subsynchronous resonance damping controller is connected with the control signal generation module. The control signal generation module is used for receiving the base frequency compensation reactance instruction and the additional reactance instruction, superimposing the two instructions, and converting the superimposed instruction into a turn-off pulse signal of a gate-controlled series capacitor switching device through a limiting, table lookup and pulse generation unit, so that subsynchronous oscillation is inhibited. 2.The GCSC-SSRDC based DFIG wind farm subsynchronous oscillation suppression device according to claim 1, wherein, The gate-controlled series capacitor is a three-phase independent structure, and each phase comprises: a fixed capacitor and a pair of reverse gate turn-off thyristors which are installed on an outdoor insulation platform and are connected in parallel with the power transmission line through a support insulator; a cooling system which adopts air-cooled or water-cooled radiators and is installed on the back of the gate turn-off thyristors and is connected with a temperature control relay and a trigger unit for interlocking protection; a voltage equalization resistor and a lightning arrester which are installed in parallel at the two ends of the gate turn-off thyristors of each phase and are used for limiting operating overvoltage. 3.The GCSC-SSRDC based DFIG wind farm subsynchronous oscillation suppression device according to claim 1, wherein, The filtering and scaling module further comprises: a band-pass filtering unit which is used for extracting subsynchronous frequency band current components; an amplitude scaling unit which is used for normalizing the amplitude of the extracted current to the input range of the proportional controller. 4.The GCSC-SSRDC based DFIG wind farm subsynchronous oscillation suppression device according to claim 1, wherein, The control signal generation module comprises: a superimposing unit which is used for adding the base frequency compensation reactance output by the power scheduling controller and the additional reactance output by the subsynchronous resonance damping controller; a limiting unit which is used for limiting the total reactance instruction after superimposition within the adjustable reactance range of the gate-controlled series capacitor; a table lookup unit which is used for converting the total reactance instruction after limiting into a corresponding turn-off angle; a pulse generation unit which is used for outputting a turn-off pulse for driving the gate turn-off thyristors according to the turn-off angle.
5. The GCSC-SSRDC based DFIG wind farm subsynchronous oscillation suppression device according to claim 3, wherein, The gate-controlled series capacitor is equivalent to a variable series capacitor under the condition of a base frequency, and the reactance value of the gate-controlled series capacitor is continuously adjustable between a maximum value and zero. 6.The GCSC-SSRDC based DFIG wind farm subsynchronous oscillation suppression device according to claim 1, wherein, The cut-off frequency of the first-order low-pass filter of the power scheduling controller is 3Hz, and the first-order low-pass filter is used for inhibiting high-frequency interference in the power signals.
7. The GCSC-SSRDC based DFIG wind farm subsynchronous oscillation suppression device according to any of claims 1, characterized in that, The proportional coefficient of the proportional controller is determined through system eigenvalue sensitivity analysis, so that the damping of the system under the subsynchronous frequency is positive.
8. A method for suppressing subsynchronous oscillation of a GCSC-SSRDC-based doubly-fed wind farm, characterized in that, The application further relates to a method for inhibiting subsynchronous oscillation of a power transmission line. The method comprises the following steps: real-time monitoring of power signals and current signals of the power transmission line; inputting the power signals into the power scheduling controller, processing the power signals through a first-order low-pass filter, and generating a base frequency compensation reactance instruction; inputting the current signals into the subsynchronous resonance damping controller, extracting subsynchronous frequency band components through a filtering and scaling module, normalizing the input into a proportional controller, and generating an additional reactance instruction; superimposing the base frequency compensation reactance instruction and the additional reactance instruction to obtain a total reactance instruction; The total reactive power instruction is converted into a gating series capacitor off pulse signal through limiting, table lookup and pulse generation, and the equivalent reactance of the gating series capacitor is adjusted to suppress subsynchronous oscillation.